CN114257718B

CN114257718B - Electronic equipment

Info

Publication number: CN114257718B
Application number: CN202011027504.4A
Authority: CN
Inventors: 陈朝喜
Original assignee: Beijing Xiaomi Mobile Software Co Ltd
Current assignee: Beijing Xiaomi Mobile Software Co Ltd
Priority date: 2020-09-25
Filing date: 2020-09-25
Publication date: 2024-02-09
Anticipated expiration: 2040-09-25
Also published as: CN114257718A

Abstract

The present disclosure relates to an electronic device comprising a spatial attitude sensor, a processor, a microprocessor, and a camera module; the space attitude sensor comprises a first SPI interface and a second SPI interface; the camera module comprises at least two OIS controllers; the processor is connected with the space attitude sensor through the first SPI interface; the microprocessor is connected with the space attitude sensor through the second SPI interface; the microprocessor is used for sending the spatial attitude data acquired from the second SPI interface to the OIS controller. In this way, the microprocessor is configured to send the spatial attitude data of the second SPI interface to the OIS controllers respectively, that is, the multi-OIS anti-shake function is implemented under the condition that the spatial attitude sensor does not increase the SPI interface, which is beneficial to optimizing the shooting effect of the electronic device.

Description

Electronic equipment

Technical Field

The disclosure relates to the field of control technologies, and in particular, to an electronic device.

Background

Currently, most of camera modules of electronic devices are provided with an optical anti-shake function (OIS), and an OIS controller in the camera adjusts lens parameters by acquiring spatial pose data of the electronic device, so as to acquire high-quality video and images.

In practical application, the above spatial attitude data come from the acceleration sensor and the gyroscope sensor, and as the sensors share two paths of serial peripheral interfaces (Serial Peripheral Interface, SPI), one path provides spatial attitude data for the processor of the electronic device, and the other path provides spatial attitude data for one of the OIS controllers. As the number of lenses in the camera module increases, the number of OIS controllers increases, and at this time, the SPI interface of the sensor cannot meet the requirement of providing spatial gesture data for a plurality of OIS controllers.

Disclosure of Invention

The present disclosure provides an electronic device to solve the deficiencies of the related art.

According to a first aspect of embodiments of the present disclosure, there is provided an electronic device comprising a spatial attitude sensor, a processor, a microprocessor, and a camera module; the space attitude sensor comprises a first SPI interface and a second SPI interface; the camera module comprises at least two OIS controllers; the processor is connected with the space attitude sensor through the first SPI interface; the microprocessor is connected with the space attitude sensor through the second SPI interface;

the microprocessor is used for sending the spatial attitude data acquired from the second SPI interface to the OIS controller.

Optionally, the microprocessor includes a power-on enabling terminal, and the processor is configured to control the microprocessor to power on or power off through the power-on enabling terminal.

Optionally, the microprocessor includes a communication bus, and the processor is configured to update firmware of the microprocessor through the communication bus.

Optionally, the microprocessor is configured to send a system state to the processor via the communication bus.

Optionally, the microprocessor includes a URAT interface, and the processor is configured to obtain log data of the microprocessor through the URAT interface.

Optionally, the microprocessor further includes a reset terminal, and the processor is configured to reset the microprocessor through the reset terminal when the microprocessor is in an abnormal state.

Optionally, each OIS controller is connected to the processor and configured to send the abnormal state of the microprocessor to the processor, so that the processor resets the microprocessor.

Optionally, the microprocessor further includes a designated port, and the microprocessor sends interrupt status information through the designated port.

Optionally, the microprocessor comprises a memory common to the at least two OIS controllers, the memory for storing the spatial pose data from the spatial pose sensor and each OIS controller for reading the spatial pose data from the memory.

Optionally, the microprocessor includes memories in one-to-one correspondence with the OIS controllers, each memory for storing the spatial pose data from the spatial pose sensor and each OIS controller for reading the spatial pose data from the corresponding memory.

The technical scheme provided by the embodiment of the disclosure can comprise the following beneficial effects:

as can be seen from the above embodiments, the electronic device in the embodiments of the present disclosure may include a spatial gesture sensor, a processor, a microprocessor, and a camera module; the space attitude sensor comprises a first SPI interface and a second SPI interface; the camera module comprises at least two OIS controllers; the processor is connected with the space attitude sensor through the first SPI interface; the microprocessor is connected with the space attitude sensor through the second SPI interface; the microprocessor is used for sending the spatial attitude data acquired from the second SPI interface to the OIS controller. In this way, the microprocessor is configured to send the spatial attitude data of the second SPI interface to the OIS controllers respectively, that is, the multi-OIS anti-shake function is implemented under the condition that the spatial attitude sensor does not increase the SPI interface, which is beneficial to optimizing the shooting effect of the electronic device.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.

Fig. 1 is a block diagram of an electronic device, according to an example embodiment.

Fig. 2 is a block diagram of another electronic device, shown in accordance with an exemplary embodiment.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The embodiments described by way of example below are not representative of all embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus consistent with some aspects of the disclosure as detailed in the accompanying claims.

To solve the above technical problem, an embodiment of the present disclosure provides an electronic device, referring to fig. 1, including a processor 10, a spatial attitude sensor 20, a microprocessor 30, and a camera module 40. The spatial attitude sensor 20 includes a first SPI interface SPI1 and a second SPI interface SPI2. The camera module 40 includes at least two OIS controllers (OIS controller 1, OIS controllers 2, … …, OIS controllers n, n being greater than or equal to 2).

The processor 10 is connected with the space attitude sensor 20 through a first SPI interface SPI 1; the processor 10 may acquire the spatial pose data through the first SPI interface SPI 1. Microprocessor 30 is connected to spatial attitude sensor 20 via a second SPI interface SPI2. Thus, the microprocessor 30 is configured to transmit the spatial attitude data acquired from the second SPI interface SPI2 to the OIS controllers 1 to n.

In this example, the manner in which the microprocessor 30 sends the spatial pose data to the OIS controllers may include:

in one example, a common memory is provided within microprocessor 30, which may store spatial pose data from spatial pose sensor 20. For example, the microprocessor 30 communicates with the spatial attitude sensor 20, and when the microprocessor 30 confirms that the memory can update data, transmits an update request to the spatial attitude sensor 20, and acquires the spatial attitude data transmitted from the spatial attitude sensor 20, and when a preset size is reached, the microprocessor 30 updates the spatial attitude data to the shared memory. The microprocessor 30 may then send a notification message to each OIS controller. After each OIS controller has obtained the notification message, a data request may be sent to the microprocessor 30. The microprocessor 30 may respond to the data request and send the spatial pose data in the memory to the OIS controller corresponding to the data request.

It should be noted that, each time the spatial pose data is updated, the microprocessor 30 may default that all OIS controllers need to transmit data, or may just respond to the OIS controller that transmits a data request. In practice, the microprocessor 30 may also set a period, for example, 1-5 seconds, for each update data, and after the period is exceeded, the microprocessor 30 defaults that all OIS controllers have acquired the spatial gesture data, and at this time, the content of the memory may be updated next time.

In another example, a plurality of memories are provided in the microprocessor 30, wherein the memories are in one-to-one correspondence with OIS controllers, i.e. one memory is provided for each OIS controller. Spatial pose data from the spatial pose sensor 20 may be stored in each memory and sent to the corresponding OIS controller. For example, the microprocessor 30 communicates with the spatial attitude sensor 20, and when the microprocessor 30 confirms that the memory can update data, sends an update request to the spatial attitude sensor 20, and acquires the spatial attitude data sent by the spatial attitude sensor 20, and when a preset size is reached, the microprocessor 30 updates the spatial attitude data to the respective memories, respectively. In this way, the OIS controller may read the spatial pose data directly from within the memory. When the set period is reached, the microprocessor 30 proceeds to next update the spatial pose data for each memory.

In this way, in this embodiment, the microprocessor 30 is configured to send the spatial attitude data of the second SPI interface to the OIS controllers 1-n, that is, one piece of spatial attitude data is divided into multiple pieces of spatial attitude data, so as to achieve the multi-OIS anti-shake function under the condition that the spatial attitude sensor does not increase the SPI interface, which is beneficial to optimizing the shooting effect of the electronic device.

With continued reference to fig. 1, the microprocessor 30 includes a power-up enable Ldo to which the processor 10 is coupled for controlling the microprocessor 30 to power up or down via the power-up enable. Thus, the processor 10 may control the microprocessor 30 to power up or power down to stop operation.

With continued reference to FIG. 1, the microprocessor 30 includes a communication bus, such as an I2C bus, and the processor 10 may be coupled to the microprocessor 30 via the communication bus I2C for updating the firmware of the microprocessor 30 via the communication bus I2C. It should be noted that the communication bus may be configured according to a microprocessor and a processor, which is not limited herein.

With continued reference to FIG. 1, during operation, microprocessor 30 may also send system status to processor 10 via communication bus I2C. The system state includes running, hanging, abnormal state, etc. of the system, and the processor 10 can reset or restart the microprocessor 30, so as to ensure the normal operation of the microprocessor 30.

With continued reference to FIG. 1, the microprocessor 30 includes a URAT interface through which the processor 10 is connected. When an error occurs in the microprocessor 30, the processor 10 may obtain log data within the microprocessor 30 via the URAT interface to locate a problem with the microprocessor 30. After the problem is located, the processor 10 may solve the problem by resetting, restarting, etc., to restore the microprocessor 30 to normal operation.

With continued reference to fig. 1, OIS controllers are coupled to processor 10 and may send an exception status of microprocessor 30 to processor 10 to cause processor 10 to reset microprocessor 30.

With continued reference to FIG. 1, microprocessor 30 also includes a reset terminal RST through which processor 10 is coupled to microprocessor 30. When the processor 10 determines that the microprocessor 30 is in an abnormal state, such as running, hanging, abnormal state of the system, or sending error data to the OIS controller, the processor 10 may reset the microprocessor 30 through the reset terminal RST when the microprocessor 30 is in the abnormal state, so that the microprocessor 30 works normally.

With continued reference to FIG. 1, microprocessor 30 also includes a designated port gpio through which processor 10 is coupled to microprocessor 30. Microprocessor 30 may send interrupt status information or other status information through a designated port, and processor 10 may control the microprocessor based on the status information.

It should be noted that, in this embodiment, only some common functions or interfaces required by the microprocessor when splitting the space state data are described, and the technician may also set according to a specific scenario, which is not described herein.

Fig. 2 is a block diagram of an electronic device, according to an example embodiment. For example, the electronic device 200 may be a smart phone, a computer, a digital broadcast terminal, a tablet device, a medical device, an exercise device, a personal digital assistant, or the like.

Referring to fig. 2, an electronic device 200 may include one or more of the following components: a processing component 202, a memory 204, a power supply component 206, a multimedia component 208, an audio component 210, an input/output (I/O) interface 212, a sensor component 214, a communication component 216, and an image acquisition component 218.

The processing component 202 generally controls overall operation of the electronic device 200, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 202 may include one or more processors 220 to execute computer programs. Further, the processing component 202 can include one or more modules that facilitate interactions between the processing component 202 and other components. For example, the processing component 202 may include a multimedia module to facilitate interaction between the multimedia component 208 and the processing component 202.

The memory 204 is configured to store various types of data to support operations at the electronic device 200. Examples of such data include computer programs, contact data, phonebook data, messages, pictures, videos, etc. for any application or method operating on the electronic device 200. The memory 204 may be implemented by any type or combination of volatile or nonvolatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disk.

The power supply assembly 206 provides power to the various components of the electronic device 200. The power supply components 206 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 200. The power supply assembly 206 may include a power chip and the controller may communicate with the power chip to control the power chip to turn on or off the switching device to power the motherboard circuit with or without the battery.

The multimedia component 208 includes a screen between the electronic device 200 and the target object that provides an output interface. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from a target object. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensor may sense not only the boundary of a touch or sliding action, but also the duration and pressure associated with the touch or sliding operation.

The audio component 210 is configured to output and/or input audio signals. For example, the audio component 210 includes a Microphone (MIC) configured to receive external audio signals when the electronic device 200 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may be further stored in the memory 204 or transmitted via the communication component 216. In some embodiments, audio component 210 further includes a speaker for outputting audio signals.

The I/O interface 212 provides an interface between the processing assembly 202 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc.

The sensor assembly 214 includes one or more sensors for providing status assessment of various aspects of the electronic device 200. For example, the sensor assembly 214 may detect an on/off state of the electronic device 200, a relative positioning of the components, such as a display and keypad of the electronic device 200, a change in position of the electronic device 200 or one of the components, the sensor assembly 214 may also detect the presence or absence of a target object in contact with the electronic device 200, an orientation or acceleration/deceleration of the electronic device 200, and a change in temperature of the electronic device 200. In this example, the sensor assembly 214 may include a magnetic force sensor, a gyroscope, and a magnetic field sensor, wherein the magnetic field sensor includes at least one of: hall sensors, thin film magneto-resistive sensors, and magnetic liquid acceleration sensors.

The communication component 216 is configured to facilitate communication between the electronic device 200 and other devices, either wired or wireless. The electronic device 200 may access a wireless network based on a communication standard, such as WiFi,2G, 3G, 4G, 5G, or a combination thereof. In one exemplary embodiment, the communication component 216 receives broadcast signals or broadcast related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, the communication component 216 further includes a Near Field Communication (NFC) module to facilitate short range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra Wideband (UWB) technology, bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the electronic device 200 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital Signal Processors (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic elements.

In an exemplary embodiment, a non-transitory readable storage medium is also provided, such as memory 204, including instructions, including an executable computer program executable by a processor. The readable storage medium may be, among other things, ROM, random Access Memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. An electronic device is characterized by comprising a space attitude sensor, a processor, a microprocessor and a camera module; the space attitude sensor comprises a first SPI interface and a second SPI interface; the camera module comprises at least two OIS controllers; the processor is connected with the space attitude sensor through the first SPI interface; the microprocessor is connected with the space attitude sensor through the second SPI interface;

the microprocessor is used for sending the spatial attitude data acquired from the second SPI interface to the OIS controller;

the microprocessor includes a memory for storing the spatial pose data from the spatial pose sensor and each OIS controller for reading the spatial pose data from the memory.

2. The electronic device of claim 1, wherein the microprocessor includes a power-up enable terminal, the processor configured to control the microprocessor to power up or power down via the power-up enable terminal.

3. The electronic device of claim 1, wherein the microprocessor includes a communication bus, the processor to update firmware of the microprocessor over the communication bus.

4. The electronic device of claim 3, wherein the microprocessor is configured to send system status to the processor via the communication bus.

5. The electronic device of claim 1, wherein the microprocessor includes a URAT interface, the processor configured to obtain log data of the microprocessor via the URAT interface.

6. The electronic device of claim 1, wherein the microprocessor further comprises a reset terminal, the processor being configured to reset the microprocessor via the reset terminal when the microprocessor is in an abnormal state.

7. The electronic device of claim 6, wherein each OIS controller is coupled to the processor for sending the microprocessor exception status to the processor to cause the processor to reset the microprocessor.

8. The electronic device of claim 1, wherein the microprocessor further comprises a designated port through which the microprocessor sends interrupt status information.

9. The electronic device of claim 1, wherein the memory is a memory common to the at least two OIS controllers.

10. The electronic device of claim 1, wherein the memory is in one-to-one correspondence with each OIS controller.