CN114256864B - Fixed time control method and device for SVCC in high-voltage direct-current transmission system - Google Patents
Fixed time control method and device for SVCC in high-voltage direct-current transmission system Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]
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Abstract
The invention discloses a fixed time control method and a fixed time control device for SVCC in a high-voltage direct-current transmission system. Compared with the traditional SVCC control method, the method avoids complex signal detection and logic processing, improves the stability of SVCC control, and has certain guiding significance for engineering popularization of SVCC.
Description
Technical Field
The invention relates to the technical field of high-voltage direct-current transmission, in particular to a fixed time control method and device for SVCC in a high-voltage direct-current transmission system.
Background
The grid converter type high-voltage direct current transmission (Line Commutated Converter based High Voltage Direct Current, LCC-HVDC) has the advantages of large transmission capacity, long transmission distance, flexible power adjustment and the like. However, with the rapid increase of the number of high-capacity direct current transmission processes, the coupling between the alternating current and direct current power grids is increasingly tight, and a single alternating current system fault may be conducted through multiple transmission lines to cause cascading failure. The commutation failure fault is a common fault of the operation of the LCC-HVDC system, and after the commutation failure of the DC system, if the control and protection adjustment is improper, continuous commutation failure can be caused, even direct current blocking is caused, the power transmission is interrupted, and the stable operation of the AC-DC system is seriously jeopardized. Therefore, there is a need to avoid the hazards associated with commutation failure by effective inhibition methods.
The series voltage commutation converter (Series Voltage Commutated Converter, SVCC) is a novel commutation topology applied to high-voltage direct current transmission, and the commutation voltage of the valve bank is further raised through series connection of auxiliary commutation capacitors, so that the commutation failure resistance of the system is improved. The direct current transmission system based on the series voltage commutation converter mainly comprises: the system comprises a transmitting end alternating current power grid, a transmitting end converter transformer, a rectifier valve, a direct current transmission line, an inverter valve, a receiving end converter transformer, a receiving end alternating current power grid, an SVCC sub-module and a control system; the SVCC submodule is an H-bridge structure composed of 4 IGBTs, 4 anti-parallel diodes and 1 auxiliary commutation capacitor, and can realize a plurality of modal outputs such as forward conduction, reverse conduction, bypass and the like; the SVCC submodule is connected between the inverse transformation flow valve and the receiving end converter transformer; the control system is configured at the rectifying station and the inverting station. However, when the SVCC system operates, the capacitor voltage is unbalanced in charge and discharge, so that popularization is limited. In order to solve the problem, current prediction balance control is proposed in literature, but after a system fails, alternating voltage and direct current of the system fluctuate greatly, balance of an auxiliary commutation capacitor is difficult to ensure only by means of current prediction control, and the auxiliary commutation capacitor needs to be pre-discharged to a predicted value before a commutation process begins and then put into the system, so that the first commutation failure after the failure is not restrained. Meanwhile, the controller of the scheme needs to additionally collect a plurality of detection amounts such as valve bank current, valve bank commutation voltage, valve bank synchronous signals and the like for judging the occurrence and end time of the commutation process, and the engineering application of SVCC is limited by the problems of large electrical quantity measurement error, complex logic processing and the like in the detection process.
Disclosure of Invention
The invention aims to solve the technical problems of providing a fixed time control method and device for SVCC in a high-voltage direct-current transmission system, which aims to overcome the defects of the prior art, realizes the rapid control of SVCC under fault, ensures the balance of auxiliary commutation capacitors, and does not need to pre-discharge the auxiliary commutation capacitors to a predicted value before the commutation process begins and then put the auxiliary commutation capacitors into the system.
In order to solve the technical problems, the invention adopts the following technical scheme: fixed time control method of SVCC in high-voltage direct-current transmission system and SVCC capacitor charging time t charge And the discharge time t of the capacitor discharge The relation of (2) is as follows:
wherein u is co (t) represents the value of the capacitance voltage of the valve bank exit phase SVCC at the moment t, u cI And (t) represents the capacitance voltage value of the valve bank access phase SVCC at the moment t, alpha is the inversion side trigger angle of the high-voltage direct-current transmission system, and omega is the angular frequency of the power grid system.
According to the invention, the switching time of a variable current chain (SVCC) can be obtained only through mathematical operation, the processing process is simple, the capacitor voltage balance of the SVCC system can be ensured faster and more stably, and the commutation failure resistance of the HVDC system is improved.
SVCC capacitor charging time t charge The calculation formula of (2) is as follows: t is t charge ＝arccos[cosα-2ωLI d /(1-d％)u l ]-α；I d The method is characterized in that the method is used for transmitting direct current of a high-voltage direct current transmission system, L is equal-value phase-change inductance of the high-voltage direct current transmission system, and u is used for transmitting direct current of the high-voltage direct current transmission system l For the amplitude component difference of two-phase alternating voltage of the phase-change valve group, d% is the voltage drop depth. Compared with other methods such as fault current detection, the method can switch the auxiliary commutation capacitor more stably, avoid detection interference, ensure balance of the auxiliary commutation capacitor and improve the disturbance rejection capability of the SVCC.
The determination of the voltage drop depth d% includes:
given a grid voltage amplitude component threshold u dt Combining the zero sequence component threshold u (0) T Judging the fault type FT of the alternating current system:
when |u (0) |>u(0) T Judging that unbalanced voltage drop occurs in the power grid system, wherein FT=2;
when u is d <u dT When the three-phase voltage drop fault of the power grid system is judged, FT=1;
when u is d >u dT When the voltage drop fault of the power grid system is judged to not occur, FT=0;
u (0) represents a zero sequence voltage component, u (0) =u a +u b +u c ；u(0) T Representing a zero sequence component threshold;
when ft=1, d% =u d /u n ；u n Is rated three-phase alternating voltage amplitude;
when ft=2, d% =u xdfault /u n ；u xdfault ＝min(u da ，u db ，u dc )；u dx For the amplitude component of the three-phase virtual alternating voltage, u x For x-phase voltage samples, x=a, b, c; the three-phase virtual alternating voltage expression is:
the method for acquiring the alternating voltage amplitude through the alpha beta transformation and further determining the voltage drop depth d percent can rapidly and accurately acquire the alternating voltage amplitude due to the fact that the acquired alternating voltage amplitude component is direct current, and further judges the system fault degree.
The invention also provides a method for inhibiting commutation failure of the HVDC system, which comprises the following steps:
if the three-phase voltage drop fault is not detected, controlling the SVCC to work in a bypass state;
if the high-voltage direct current transmission system fails to commutate, switching the SVCC to a discharging mode, reducing the voltage value of the SVCC capacitor to 0, switching on all switching devices of the SVCC, and bypassing the SVCC capacitor;
if voltage drop faults are detected and commutation failure does not occur, determining commutation starting time according to a power grid system output trigger pulse signal PLUSE, and when a valve bank connected with the SVCC exits from conduction, namely PLUSE=0, controlling a valve bank connected phase SVCC converter chain to work in a charging mode for a duration t charge Rear bypass SVCC; when the valve group connected with the SVCC is triggered to be turned on, namely PLUSE=1, the control valve group connected with the SVCC variable current chain works in a discharging mode for a duration t discharge A back bypass SVCC variable flow chain;
wherein t is charge And t discharge The fixed time control method is calculated according to the invention.
As an inventive concept, the present invention also provides a computer apparatus comprising a memory, a processor and a computer program stored on the memory; the processor executes the computer program to implement the steps of the timing control method of the present invention; or the processor executes the computer program to realize the steps of the commutation failure suppression method of the HVDC transmission system.
As an inventive concept, the present invention also provides a computer-readable storage medium having stored thereon computer programs/instructions; steps of a method for implementing a fixed time control when the computer program/instructions are executed by a processor; or the steps of the commutation failure suppression method of the HVDC transmission system are realized when the computer program/instructions are executed by a processor.
As an inventive concept, the present invention also provides a computer program product comprising a computer program/instructions; steps of a method for implementing a fixed time control when the computer program/instructions are executed by a processor; or the steps of the commutation failure suppression method of the HVDC transmission system are realized when the computer program/instructions are executed by the processor.
Compared with the prior art, the invention has the following beneficial effects: the constant time control method of the series voltage converter is a control method with less measurement quantity and no complex logic processing, and can rapidly ensure the charge-discharge balance of the SVCC converter chain. When an alternating current power grid fails, the fluctuation of voltage and current is huge, the balance of a variable current chain capacitor cannot be well ensured by the traditional SVCC variable current chain balance control only by means of current prediction control, and the SVCC provided by the invention can obtain the switching time of the variable current chain only by mathematical operation, so that the capacitor voltage balance of the SVCC system can be ensured more quickly and stably, the commutation failure resisting capacity of the HVDC system is improved, the unstable problem caused by frequent detection of the commutation process by the SVCC controller can be avoided, the quick control of the SVCC submodule under the failure is realized, and the stability of the control system is ensured.
Drawings
Fig. 1 is a schematic diagram of the overall structure of a dc power transmission system based on a series voltage commutated converter according to the present invention;
fig. 2 is a schematic diagram of a series voltage converter valve bank and transformer connection structure according to the present invention;
FIG. 3 is a schematic diagram of the operation mode of the series voltage converter of the present invention;
FIG. 4 is a schematic diagram of an AC system fault detection module according to the present invention;
fig. 5 is a block diagram of a method for controlling the constant time of a series voltage converter according to the present invention;
fig. 6 (a) to 6 (d) are simulation diagrams of the SVCC three-phase grounding inductance l=0.8h fault of the present invention;
FIG. 6 (a) system dynamics waveform; FIG. 6 (b) system off angle waveform; FIG. 6 (c) commutation capacitor voltage waveforms; FIG. 6 (d) valve block voltage waveform;
fig. 7 (a) to 7 (d) are simulation diagrams of the SVCC single-phase grounding inductance l=0.6h fault of the present invention;
FIG. 7 (a) system dynamics waveform; FIG. 7 (b) system off angle waveform; FIG. 7 (c) commutation capacitor voltage waveforms; FIG. 7 (d) valve block voltage waveform;
Detailed Description
Fig. 1 is a block diagram of an overall design of a method for controlling a constant time of a series voltage converter according to an embodiment of the present invention. The direct current transmission system based on the series voltage converter comprises an inversion side converter valve, an inversion side converter transformer, a SVCC converter chain module and a timing controller, wherein the timing controller acquires a valve group trigger signal PLUSEY, PLUSED and generates an inversion side alternating current voltage u according to the inversion side alternating current voltage u a ，u b ,u c The alternating current power grid drop degree d% and the fault type instruction FT determine that the SVCC module works in the mode X.
Fig. 2 is a connection structure diagram of a series voltage converter valve bank and a transformer according to an embodiment of the present invention, where the series voltage converter valve bank includes two gray rectifier bridges of an upper bridge arm and a lower bridge arm, and the two gray rectifier bridges are respectively connected to a Y/Y, Y/delta transformer, and an outlet three-phase ac bus.
Fig. 3 is a diagram of 8 modes of operation of the SVCC module of the present invention, wherein the black lines indicate current flow and the gray indicates no current flow. Wherein mode 1 to mode 4 are positive current flow, and mode 5 to mode 8 are negative current flow.
The SVCC fixed time control method of the embodiment of the invention consists of a fault detection module and a fixed time controller.
(1) Fault detection module
Referring to fig. 4, first, three-phase ac voltage u of receiving grid of HVDC system is sampled a ，u b ，u c Calculating a zero sequence voltage component u (0) of an alternating current system, wherein the calculation formula is shown as formula (1):
u(0)＝u a +u b +u c ； (1)
i) When |u (0) |<u(0) T When the three-phase alternating-current side power grid voltage balance is judged
When the three-phase alternating-current side power grid voltage is balanced, calculating the fundamental wave amplitude component u of the power grid voltage d Firstly, the three-phase power grid voltage is subjected to dq conversion to obtain u α ，u β The calculation process is as shown in formula (2):
then calculating to obtain the fundamental wave amplitude component u of the power grid voltage d The calculation process is as shown in formula (3):
the calculated alternating voltage amplitude component and the alternating voltage threshold u dt Comparing to judge whether a fault occurs;
when u is d <u dT When the three-phase voltage drop fault occurs in the system, the fault type zone bit FT=1 is judged; when u is d >u dT And if the voltage drop fault does not occur in the system, judging that the fault type flag bit FT=0. The voltage drop degree d of the alternating current power grid is calculated, and the calculation formula is as follows:
d％＝u d /u n ； (4)
ii) when |u (0) |>u(0) T When the three-phase alternating-current side power grid voltage unbalance is judged
When the zero sequence component of the system exceeds the threshold u (0) T When the system is in unbalanced fault, the fault type flag bit FT=2 is judged, the fundamental wave amplitude component of each phase voltage is needed to be calculated, and the voltage sampling value u of each phase is constructed x (x=a, b, c) virtual three-phase voltage components, the virtual voltage expression being as in formula (4):
calculating the amplitude component u of a three-phase virtual alternating voltage dx The calculation formula is consistent with the three-phase power grid balance calculation mode, and u is calculated by xu ，u xv ，u xw And (3) carrying out the steps of (2) and (3).
The minimum phase of the fault voltage amplitude is judged to be the fault phase, and the calculation formula is as follows:
u xdfault ＝min(u da ，u db ，u dc )； (6)
the voltage drop degree d of the alternating current power grid is calculated, and the calculation formula is as follows:
d％＝u xdfault /u n ； (7)
(2) Timing control method
Referring to fig. 5, in the svcc variable current chain timing control method, a controller solves the HVDC system phase change time in a steady state according to the system fault type FT and the voltage drop depth d%, and a calculation formula is as follows (8):
t μ ＝arccos(cosα-2ωLI d /u l )-α (8)
wherein alpha is an inversion side trigger angle, omega is a system angular frequency, L is an equivalent commutation inductance of the high-voltage direct-current transmission system, and u l For the two-phase alternating voltage amplitude component difference of the phase-change valve group, u l The calculation formula of (2) is shown in table 1, and the zero sequence component of the secondary side voltage of the Y/D transformer is 0 when single-phase fault occurs, and the valve group phase-change voltage can be calculated by using a symmetrical component method, wherein when the A phase voltage drops, the valve group phase-change voltage is shown in table 2. Time t of phase change μ Set as SVCC converter chain auxiliary commutation capacitor charging time t charge . When determining the charging time t of the SVCC converter chain auxiliary commutation capacitor charge Then, in order to ensure the balance of the voltage charge and discharge of the auxiliary commutation capacitor, the discharge time t of the auxiliary commutation capacitor discharge The formula (9) is required to be satisfied:
wherein u is co (t) represents the valve bank exit phase SVCC variable current chain capacitance voltage value, and the valve bank exit phase represents the phase where the valve bank is about to exit and conduct; u (u) cI (t) represents the valve bank access phase SVCC variable current chain capacitance voltage value, and the valve bank access phase represents the phase of the valve bank to be conducted; SVCC variable-current chain capacitor voltage u in (9) co (t)，u cI The calculation expression of (t) is shown as formula (10):
wherein i is o (t) represents the valve group exit phaseSVCC variable current chain current value, i I And (t) represents the valve group access phase SVCC variable current chain current value. u (u) o (t) represents the valve group exit phase voltage value, u I (t) represents the valve group access phase voltage value, u co (t) represents the exit phase capacitance voltage value, u cI (t) represents the input phase capacitance voltage value, u co (0) Indicating the initial value of the exit phase capacitor voltage. See tables 1 and 2 for calculations.
The SVCC converter chain auxiliary commutation capacitor discharge time t can be obtained by solving (9) and (10) discharge 。
Table 1 phase change voltages for each phase valve group
Table 2A phase voltage drop valve bank commutation voltage
If the system fault detection module determines ft=1 or ft=2, determining a commutation start time according to the system output trigger pulse signal PLUSE, and then referring to the calculated charging time t charge Discharge time t discharge And determining the working mode of the variable current chain and the input time of the auxiliary phase-change capacitor. For example, when the system outputs the trigger signal PLUSE1, the valve bank VT5-VT1 phase-change process starts, the A phase-change current chain capacitor needs to be discharged, the C phase-change current chain capacitor needs to be charged, and the A phase-change current chain is controlled to work in the mode 7 for the duration t discharge Post-bypass while controlling C phase change streaming chain to operate in mode 6 for a duration t charge And a rear bypass.
And if the three-phase voltage drop fault is detected, namely the fault detection module outputs FT=0, controlling the SVCC converter chain to work in a bypass state. If the high-voltage direct current transmission system fails to commutate, the SVCC converter chain is switched to a discharging mode, the voltage value of the auxiliary commutation capacitor is reduced to 0 in an emergency, and then all switching devices and emergency bypass capacitors are turned on.
The effectiveness and the advancement of the control method provided by the invention are verified through PSCAD simulation:
referring to fig. 6 (a) to 6 (d), the SVCC using the fixed time control method can resist three-phase ground faults of three-phase ground inductance l=0.8h. DC current I of HVDC system when fault occurs d The maximum value is only 1.2p.u, the three-phase ac network voltage does not change drastically, and the off angle γ is 7.5 °. And the voltage of the SVCC three-phase auxiliary commutation capacitor is kept stable, and fluctuates by 1kV within the range of 15kV of an initial value, so that the voltage balance requirement of the SVCC variable current chain capacitor is met. Meanwhile, the valve bank voltage is resisted to run at rated value of 300kV, and system overvoltage is not caused by the connection of the SVCC converter chain. The effectiveness of the SVCC constant time control method in three-phase grounding faults is verified through simulation, and the SVCC critical grounding inductance L=0.75H is greatly improved compared with the traditional LCC-HVDC critical grounding inductance L=1.5H.
Referring to fig. 7 (a) to 7 (d), the SVCC using the fixed time control method can resist single phase ground faults of single phase ground inductance l=0.6h. DC current I of HVDC system when fault occurs d The maximum value is only 1.18p.u, the three-phase alternating current network voltage does not change drastically, and the turn-off angle gamma is 8.1 degrees. The SVCC three-phase auxiliary commutation capacitor voltage is kept stable, the voltage fluctuates by 3kV within the range of 15kV of an initial value, and compared with the voltage fluctuation aggravated when the three-phase voltage drops (the change of the commutation voltage of each valve group is larger due to unbalanced faults), the fluctuation of the range also meets the capacitor voltage balance requirement of the SVCC current transformer chain. Meanwhile, the valve bank voltage is resisted to run at rated value of 300kV, and system overvoltage is not caused by the connection of the SVCC converter chain.
Claims (4)
1. A fixed time control method of SVCC in a high-voltage direct-current transmission system is characterized in that the SVCC capacitor charging time t charge And the discharge time t of the capacitor discharge The relation of (2) is as follows:
wherein u is co (t) represents the value of the capacitance voltage of the valve bank exit phase SVCC at the moment t, u cI (t) represents the capacitor voltage value of the valve bank access phase SVCC at the moment t, alpha is the trigger angle of the inversion side of the high-voltage direct-current transmission system, and omega is the angular frequency of the power grid system;
SVCC capacitor charging time t charge The calculation formula of (2) is as follows: t is t charge ＝arccos[cosα-2ωLI d /(1-d％)u l ]-α；I d The method is characterized in that the method is used for transmitting direct current of a high-voltage direct current transmission system, L is equal-value phase-change inductance of the high-voltage direct current transmission system, and u is used for transmitting direct current of the high-voltage direct current transmission system l The amplitude component difference of two-phase alternating voltage of the phase-change valve group is d percent, and the voltage drop depth is d percent;
the determination of the voltage drop depth d% includes:
given a grid voltage amplitude component threshold u dt Combining the zero sequence component threshold u (0) T Judging the fault type FT of the alternating current system:
when |u (0) |>u(0) T Judging that unbalanced voltage drop occurs in the power grid system, wherein FT=2;
when u is d <u dT When the three-phase voltage drop fault of the power grid system is judged, FT=1;
when u is d >u dT When the voltage drop fault of the power grid system is judged to not occur, FT=0;
u (0) represents a zero sequence voltage component, u (0) =u a +u b +u c ；u(0) T Representing a zero sequence component threshold;
when ft=1, d% =u d /u n ；u n Is rated three-phase alternating voltage amplitude;
when ft=2, d% =u xdfault /u n ；u xdfault ＝min(u da ，u db ，u dc )；u dx For the amplitude component of the three-phase virtual alternating voltage, u x For x-phase voltage samples, x=a, b, c; the three-phase virtual alternating voltage expression is:
2. the commutation failure suppression method for the HVDC system is characterized by comprising the following steps of:
if the three-phase voltage drop fault is not detected, controlling the SVCC to work in a bypass state;
if the high-voltage direct current transmission system fails to commutate, switching the SVCC to a discharging mode, reducing the voltage value of the SVCC capacitor to 0, switching on all switching devices of the SVCC, and bypassing the SVCC capacitor;
if voltage drop faults are detected and commutation failure does not occur, determining commutation starting time according to a power grid system output trigger pulse signal PLUSE, and when a valve bank connected with the SVCC exits from conduction, namely PLUSE=0, controlling a valve bank connected phase SVCC converter chain to work in a charging mode for a duration t charge Rear bypass SVCC; when the valve group connected with the SVCC is triggered to be turned on, namely PLUSE=1, the control valve group connected with the SVCC variable current chain works in a discharging mode for a duration t discharge A back bypass SVCC variable flow chain;
wherein t is charge And t discharge The method of claim 1.
3. A computer device comprising a memory, a processor, and a computer program stored on the memory; wherein the processor executes the computer program to perform the steps of the method of claim 1; alternatively, the processor executes the computer program to implement the steps of the method of claim 2.
4. A computer readable storage medium having stored thereon computer programs/instructions; wherein the computer program/instructions, when executed by a processor, implement the steps of the method of claim 1; or which computer program/instructions, when executed by a processor, implement the steps of the method as claimed in claim 2.
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| 抑制高压直流换相失败的串联电压换相变流器及控制方法;侯灵犀;魏应冬;张树卿;姜齐荣;韩英铎;;中国电机工程学报(第22期);全文 * |
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