CN114253764A

CN114253764A - Method and device for running application program and computer equipment

Info

Publication number: CN114253764A
Application number: CN202010998109.4A
Authority: CN
Inventors: 关楠; 陈秋林; 杨涛
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2020-09-21
Filing date: 2020-09-21
Publication date: 2022-03-29
Also published as: WO2022057933A1

Abstract

The embodiment of the application discloses a method and a device for running an application program and computer equipment, which are used for reducing time overhead and improving the running efficiency of the application program. The method in the embodiment of the application comprises the following steps: the processor runs a first program segment based on data in a first storage space, wherein the first program segment is used for modifying the data in the first storage space, the data in the first storage space comprises values of M first variables and values of N second variables, and the value of each first variable corresponds to the value of at least one second variable; the DMA backs up the data in the first storage space based on the target rule to obtain first backup data stored in the second storage space; for the first variable and the corresponding second variable, the modification sequence indicated by the first program segment is opposite to the backup sequence indicated by the target rule, so that if the first backup data includes the value of at least one first variable after the first program segment is operated, the processor determines that the first backup data is wrong.

Description

Method and device for running application program and computer equipment

Technical Field

The embodiment of the application relates to the technical field of computers, in particular to a method and a device for running an application program and computer equipment.

Background

With the development of the technology of the internet of things, the number of the devices of the internet of things is more and more. In the face of a large-scale Internet of things equipment group, the problem of power supply for the Internet of things equipment is solved. Due to the limitations of conventional battery power, a new type of energy harvesting device arises.

The energy collecting equipment can collect energy from energy sources such as light energy, heat energy, radio frequency, pressure and the like, so that power is supplied to equipment of the Internet of things. Therefore, the energy collecting device has strong deployment flexibility, does not need frequent maintenance and battery replacement operation, and reduces the limitation of use scenes.

However, since the external energy source is unpredictable and unstable, the internet of things device may face frequent power outage, making it difficult for the internet of things device to completely run the application program in one power supply cycle. For this reason, the intermittent system is applied to the internet of things device.

The intermittent system can solve the problem of frequent power failure by frequently saving the system state during operation. Specifically, the system state is backed up once every time the intermittent system runs a program. The backup system state refers to copying some data in the Memory to a Non-Volatile Memory (NVM), so that the data in the NVM is not lost after the internet of things device is powered off, and the program can continue to run by using the data in the NVM after the internet of things device is powered on again.

Since Direct Memory Access (DMA) can directly Access data in a Memory without involvement of a processor, DMA is widely used to back up data in an intermittent system. Because the data backup is performed by adopting an asynchronous DMA backup method, the situation that before some data is backed up by DMA, the data is modified by a processor by running a next program may occur, so that the actually backed-up data is the modified data rather than the data before modification, and therefore, the data is backed up mainly by adopting a synchronous DMA backup method at present. That is, after the processor runs a section of program, the DMA backs up the data in the memory, and after the data backup is finished, the processor runs the next section of program.

Obviously, the way of synchronous DMA backup brings extra time overhead, and reduces the operating efficiency of the application program.

Disclosure of Invention

The embodiment of the application provides a method and a device for running an application program and computer equipment, which are used for reducing time overhead and improving the running efficiency of the application program.

A first aspect of an embodiment of the present application provides a method for running an application, where the method is applied to a computer device, and the computer device includes a processor and a direct memory access DMA; the method comprises the following steps: the processor operates a first program segment based on data in a first storage space, the first program segment is one of a plurality of program segments forming an application program and is used for modifying the data in the first storage space, the data in the first storage space comprises values of M first variables and values of N second variables, the value of each first variable in the M first variables corresponds to the value of at least one second variable in the N second variables, the first program segment indicates the value of each first variable, after the value of the first variable is modified, the value of at least one second variable corresponding to the value of the first variable is modified, the value of each first variable after the first program segment is operated is known and different from the value before the first program segment is operated, and M and N are both positive integers. The DMA backups the data in the first storage space based on a backup sequence to obtain first backup data stored in a second storage space, wherein the backup sequence indicates the value of each first variable, the value of at least one second variable corresponding to the value of the first variable is backed up before the value of the first variable is backed up, and the second storage space is positioned in a nonvolatile memory; based on that the first backup data in the second storage space includes a value of at least one first variable of the M first variables after the first program segment is run, the processor determines that the first backup data in the second storage space is erroneous.

The first storage space can be located in a nonvolatile memory or a volatile memory; volatile memory includes, but is not limited to, dynamic random access memory space DRAM and static random access memory space SRAM; non-volatile memory includes, but is not limited to, FLASH memory FLASH, ferroelectric memory space FRAM, and electrically erasable programmable read-only memory space EEPROM.

In the existing method for running the application program, after the data in the first storage space is backed up, the first program segment is run, that is, the process of backing up the data in the first storage space and the process of running the first program segment by the processor are serial; the method and the device have the advantages that the data in the first storage space are backed up, and meanwhile, the first program segment is operated, namely the process of backing up the data in the first storage space is parallel to the process of operating the first program segment by the processor, so that the time overhead can be reduced, and the operation efficiency of the application program is improved; and for the value of the first variable and the value of the second variable corresponding to the first variable, the modification sequence indicated by the first program segment is opposite to the backup sequence indicated by the backup sequence, specifically, the first program segment indicates to modify the value of the first variable first and then modify the value of the second variable corresponding to the first variable, and the backup sequence indicates to modify the value of the second variable corresponding to the first variable first and then modify the value of the first variable. Therefore, when the first backup data includes the modified value of the first variable, it indicates that the processor has performed the modification operation on the value of the first variable when the value of the first variable is backed up, and therefore, it is considered to a great extent that before the value of the first variable is backed up, the processor has performed the modification operation on the value of the second variable, and it can be considered that the value of the second variable in the first backup data is the modified value of the second variable, so that the processing determines that the first backup data in the second storage space is incorrect. Based on the determination that the first backup data is wrong, the processor can be prevented from continuing to run the application program by using the wrong backup data in the second storage space after the computer device is powered off and restarted.

As one implementation, after the processor determines that the first backup data in the second storage space is erroneous and the processor runs the first program segment based on the data in the first storage space, the method further includes: the DMA backs up the data in the first storage space based on the backup sequence so as to replace the first backup data in the second storage space with second backup data; the processor operates a second program segment based on the data in the first storage space, wherein the second program segment is a program segment which operates after the first program segment according to the operation sequence in the plurality of program segments and is used for modifying the data in the first storage space, the first program segment indicates the value of each first variable, and after the value of the first variable is modified, the value of at least one second variable corresponding to the value of the first variable is modified; and based on the fact that the second backup data in the second storage space does not include the value of any first variable in the M first variables after the second program segment is operated, the processor determines that the second backup data in the second storage space is correct.

After the first backup data in the second storage space is determined to be wrong, the program segment which is operated at first in the program segments is not operated again, but the data in the first storage space is backed up again after the first program segment is operated, and the second program segment is operated at the same time, so that the wrong first backup data in the second storage space is replaced by the correct second backup data, and the time overhead of operating the application program can be reduced.

As one implementation, after the processor determines that the first backup data in the second storage space is erroneous and the processor runs the first program segment based on the data in the first storage space, before the DMA backs up the data in the first storage space based on the backup order, the method further includes: the processor sets the values of the M first variables in the first storage space to be the values of the M first variables before the first program segment is operated.

The processor sets the values of the M first variables as the values of the M first variables before the first program segment is operated, so that the values of the M first variables are reset, and the condition that the values of the first variables before and after the second program segment is operated are the same and mistaken for a backup data error is avoided.

As one implementation, after the processor determines that the first backup data in the second storage space is erroneous, the method further comprises: and after the computer equipment is powered off and restarted, the processor executes a third program segment based on the first backup data with the error stored in the second storage space, wherein the third program segment is the program segment which runs at the first in the running sequence in the plurality of program segments.

After the computer equipment is powered off and restarted, the processor executes the third program segment based on the first backup data with the error stored in the second storage space, so that the processor can be prevented from operating the next program segment of the first program segment based on the first backup data with the error, and the error of operating the application program can be avoided.

As an implementation, the method further comprises: and based on the fact that the first backup data in the second storage space does not include the value of any first variable in the M first variables after the first program segment is operated, the processor determines that the first backup data in the second storage space is correct.

This implementation provides a viable solution for determining that the first backup data is correct.

As one implementation, after the processor determines that the first backup data in the second storage space is correct, the method further includes: the DMA backs up the correct first backup data in the second storage space to a third storage space, which is also located in the nonvolatile memory.

The correct first backup data in the second storage space is backed up again, so that the processor can acquire the correct first backup data from the third storage space even if the correct first backup data in the second storage space is replaced by the wrong backup data. In this way, in case of a computer power failure, after the computer is powered off and restarted, in order to reduce time overhead, the processor may re-run the first program segment based on the correct first backup data in the third storage space without running the first third program segment of the plurality of program segments.

As one implementation, after the DMA backs up the correct first backup data in the second storage space to the third storage space, the method further includes: after the computer equipment is powered off and restarted, the processor runs the first program segment based on the first backup data in the third storage space based on the third backup data with errors stored in the second storage space and the correct first backup data stored in the third storage space.

After the correct first backup data is backed up to the third storage space, if the computer device is powered off and restarted, the computer device does not need to operate the program segment which is operated firstly in the multiple program segments forming the application program again, and the first program segment can be operated again based on the first backup data in the third storage space, so that the time overhead is reduced.

As an implementation, the first storage space is located in a volatile memory.

A second aspect of the embodiments of the present application provides an apparatus for running an application, which is applied to a computer device, and the apparatus includes: the processing unit is used for operating a first program segment on the basis of data in a first storage space, the first program segment is one of a plurality of program segments forming an application program and is used for modifying the data in the first storage space, the data in the first storage space comprises values of M first variables and values of N second variables, the value of each first variable in the M first variables corresponds to the value of at least one second variable in the N second variables, the first program segment indicates the value of each first variable, after the value of the first variable is modified, the value of at least one second variable corresponding to the value of the first variable is modified, the value of each first variable after the first program segment is operated is known and different from the value before the first program segment is operated, and M and N are both positive integers; the data backup unit is used for backing up data in the first storage space based on a backup sequence to obtain first backup data stored in a second storage space, the backup sequence indicates the value of each first variable, before backing up the value of the first variable, the value of at least one second variable corresponding to the value of the first variable is backed up, and the second storage space is located in the nonvolatile memory; and the processing unit is used for determining that the first backup data in the second storage space is wrong based on the fact that the first backup data in the second storage space comprises the value of at least one first variable in the M first variables after the first program segment is operated.

As one implementation manner, the data backup unit is further configured to perform, by the DMA, backup on data in the first storage space based on the backup order to replace the first backup data in the second storage space with the second backup data; the processing unit is further configured to run a second program segment based on the data in the first storage space, where the second program segment is a program segment that runs after the first program segment in the running order among the plurality of program segments and is used to modify the data in the first storage space, the first program segment indicates a value of each first variable, and after modifying the values of the first variables, the value of at least one second variable corresponding to the value of the first variable is modified; the processing unit is further configured to determine, based on that the second backup data in the second storage space does not include a value of any first variable of the M first variables after the second program segment is run, that the second backup data in the second storage space is correct.

As an implementation manner, the processing unit is further configured to set, by the processor, values of the M first variables in the first storage space to values of the M first variables before the first program segment is executed.

As an implementation manner, the processing unit is further configured to, after the computer device is powered off and restarted, execute, by the processor, a third program segment based on the first backup data with the error stored in the second storage space, where the third program segment is a program segment that runs first in a running order among the plurality of program segments.

As an implementation manner, the processing unit is further configured to determine, based on that the first backup data in the second storage space does not include a value of any first variable of the M first variables after the first program segment is run, that the first backup data in the second storage space is correct by the processor.

As an implementation manner, the data backup unit is further configured to backup the correct first backup data in the second storage space to a third storage space, where the third storage space is also located in the nonvolatile memory.

As an implementation manner, the processing unit is further configured to, after the computer device is powered off and restarted, based on the third backup data with the error stored in the second storage space and the correct first backup data stored in the third storage space, the processor runs the first program segment based on the first backup data in the third storage space.

As an implementation, the first storage space is located in a volatile memory.

For specific implementation, related descriptions, and technical effects of the above units, please refer to the description of the first aspect of the embodiments of the present application.

A third aspect of embodiments of the present application provides a computer device, including: one or more processors and memory; wherein the memory has stored therein computer readable instructions; the one or more processors read the computer-readable instructions to cause the computer device to implement the method according to any one of the implementations of the first aspect.

A fourth aspect of the embodiments of the present application provides a computer-readable storage medium, which includes computer-readable instructions, when the computer-readable instructions are executed on a computer, the computer is caused to execute the method according to any implementation manner of the first aspect.

A fifth aspect of embodiments of the present application provides a chip including one or more processors. Part or all of the processor is configured to read and execute the computer program stored in the memory to perform the method in any possible implementation manner of the first aspect.

Optionally, the chip may include a memory, and the memory and the processor may be connected to the memory through a circuit or a wire. Further optionally, the chip further comprises a communication interface, and the processor is connected to the communication interface. The communication interface is used for receiving data and/or information needing to be processed, the processor acquires the data and/or information from the communication interface, processes the data and/or information, and outputs a processing result through the communication interface. The communication interface may be an input output interface.

In some implementations, some of the one or more processors may also implement some of the steps of the above method by means of dedicated hardware, for example, a process involving a neural network model may be implemented by a dedicated neural network processor or a graphics processor.

The method provided by the embodiment of the application can be realized by one chip or by cooperation of a plurality of chips.

A sixth aspect of embodiments of the present application provides a computer program product, where the computer program product includes computer software instructions, and the computer software instructions can be loaded by a processor to implement the method described in any one of the implementation manners of the first aspect.

According to the technical scheme, the embodiment of the application has the following advantages:

in the existing method for running the application program, after the data in the first storage space is backed up, the first program segment is run, that is, the process of backing up the data in the first storage space and the process of running the first program segment by the processor are serial; in the embodiment of the present application, the processor operates the first program segment based on the data in the first storage space, where the first program segment is one of multiple program segments constituting the application program and is used to modify the data in the first storage space, and the DMA backs up the data in the first storage space based on the backup order to obtain the first backup data stored in the second storage space, so that the process of operating the first program segment by the processor does not need to be performed after the backup is completed, that is, the process of backing up the data in the first storage space is parallel to the process of operating the first program segment by the processor, so that the time overhead can be reduced, and the operating efficiency of the application program can be improved;

the data in the first storage space comprises values of M first variables and values of N second variables to be backed up, the value of each first variable in the M first variables corresponds to the value of at least one second variable in the N second variables, the backup sequence indicates the value of each first variable, before the backup of the values of the first variables, the value of at least one second variable corresponding to the value of the first variable is backed up, and both M and N are positive integers; the first program segment indicates the value of each first variable, after the value of the first variable is modified, the value of at least one second variable corresponding to the value of the first variable is modified, and the value of each first variable after the first program segment is operated is known and different from the value before the first program segment is operated; it can be seen that the modification sequence indicated by the first program segment is opposite to the backup sequence indicated by the backup sequence, specifically, the first program segment indicates to modify the value of the first variable first and then modify the value of the second variable corresponding to the first variable, and the backup sequence indicates to modify the value of the second variable corresponding to the first variable first and then modify the value of the first variable. Therefore, when the first backup data includes the modified value of the first variable, it indicates that the processor has performed the modification operation on the value of the first variable when the value of the first variable is backed up, and therefore, it is considered to a great extent that before the value of the first variable is backed up, the processor has performed the modification operation on the value of the second variable, and it can be considered that the value of the second variable in the first backup data is the modified value of the second variable, so that the processing determines that the first backup data in the second storage space is incorrect. Based on the determination that the first backup data is wrong, the processor can be prevented from continuing to run the application program by using the wrong backup data in the second storage space after the computer device is powered off and restarted.

Drawings

FIG. 1 is an architecture diagram of an Internet of things system in an embodiment of the present application;

FIG. 2 is a schematic diagram of a first structure of a computer device in an embodiment of the present application;

FIG. 3 is a schematic diagram of a method for running an application program in an embodiment of the present application;

FIG. 4 is a diagram of a first embodiment of data in a first storage space in an embodiment of the present application;

FIG. 5 is a diagram of a second embodiment of data in a first storage space in an embodiment of the present application;

FIG. 6 is a diagram of a third embodiment of data in the first storage space in the embodiment of the present application;

FIG. 7 is a schematic diagram of a first embodiment of a first program segment in an embodiment of the present application;

FIG. 8 is a schematic diagram of a second embodiment of a first program segment in an embodiment of the present application;

FIG. 9 is a diagram illustrating a time relationship between backing up data in a first storage space and running a first program segment according to an embodiment of the present application;

FIG. 10 is a diagram illustrating an application program running in a power-off and reboot scenario of a computer device according to an embodiment of the present application;

FIG. 11 is a diagram illustrating an apparatus for running an application according to an embodiment of the present application;

fig. 12 is a second structural diagram of a computer device in an embodiment of the present application.

Detailed Description

Embodiments of the present application will now be described with reference to the accompanying drawings, and it is to be understood that the described embodiments are merely illustrative of some, but not all, embodiments of the present application. As can be known to those skilled in the art, with the development of technology and the emergence of new scenarios, the technical solution provided in the embodiments of the present application is also applicable to similar technical problems.

The terms "first," "second," and the like in the description and in the claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Moreover, the terms "comprises," "comprising," and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not expressly listed or inherent to such process, method, article, or apparatus. The naming or numbering of the steps appearing in the present application does not mean that the steps in the method flow must be executed according to the chronological or logical sequence indicated by the naming or numbering, and the named or numbered steps of the flow may be executed in a changed order according to the technical purpose to be achieved, as long as the same or similar technical effects are achieved.

The embodiment of the application can be applied to the Internet of things system shown in FIG. 1. As shown in fig. 1, the internet of things system mainly includes internet of things devices and energy collection devices. The energy collecting device can collect energy from energy sources such as light energy, heat energy, wind energy, radio frequency, pressure and the like, for example, the energy collecting device can be a solar panel, a radio frequency device, a piezoelectric conversion device and the like. Wherein fig. 1 only shows energy sources of light energy, heat energy, wind energy, etc.

The internet of things device is a terminal device which is usually deployed in some special environments and inconvenient to replace batteries and charge.

For example, as shown in fig. 1, the internet of things device may be a fire protection device deployed in a forest, and the fire protection device is used for monitoring whether a forest has a fire; because this fire prevention equipment deploys in the forest, so inconvenient battery replacement and charging, therefore can gather light energy through energy acquisition equipment to convert light energy into electric energy, supply power to fire prevention equipment.

For example, as shown in fig. 1, the internet of things device may be a weather information monitoring device deployed on a mountain top or the like at a higher altitude, and the weather information monitoring device is used for monitoring weather information; because this meteorological information monitoring equipment deploys in the higher place of height above sea level such as mountain top more, so inconvenient battery replacement and charging, consequently can gather light energy, wind energy etc. through energy acquisition equipment to convert light energy and wind energy into the electric energy, with supplying power to meteorological information monitoring equipment.

For another example, the internet of things equipment can also be an intelligent insole which is used for collecting motion information of a person in a motion process; because this intelligent shoe-pad is when mainly being applied to the motion, consequently can gather pressure through energy acquisition equipment to convert pressure into the electric energy, with supply power to intelligent shoe-pad.

It should be understood that light energy, heat energy, wind energy, radio frequency, pressure, etc. are all unstable, and thus the internet of things devices powered by these energy sources are exposed to frequent power outages. In order to deal with the problem, an intermittent system is generally deployed in the internet of things device, and when the intermittent system works, the system state is backed up once every time a program runs. The backup system state refers to copying data required by program operation into a Non-Volatile Memory (NVM), so that after the internet of things device is powered off, the data in the NVM is not lost, and after the internet of things device is powered on again, the program can be continuously operated by using the data in the NVM.

The data required for program operation mainly includes values in registers and values of variables to be accessed by the program, and the values of the variables are usually stored in a memory. The following description will mainly take the values of variables that the program needs to access as an example, and explain the backup process of the system state.

Since Direct Memory Access (DMA) is a hardware part independent of the processor and DMA can directly Access (read or write) data in the Memory without intervention of the processor, in an intermittent system, DMA is typically used to back up the system state.

The system state using DMA backup comprises two modes of synchronous DMA backup and asynchronous DMA backup. The synchronous DMA backup mode refers to that program operation and system state backup are performed alternately, namely, after a section of program is operated, the system state backup is performed, after the system state backup is completed, the next section of program is operated, and then the system state backup is performed again. Because the synchronous DMA backup mode brings extra time overhead and reduces the running efficiency of the application program, the embodiment of the application provides a method for running the application program, and the method adopts an asynchronous DMA backup mode to backup the system state.

The asynchronous DMA backup mode refers to that program operation and system state backup are parallel, namely, the system state backup is carried out after a section of program is operated, and the next section of program is operated while the system state backup is carried out. Since the system state backup and the program operation are performed simultaneously, the program operation may cause the values of some variables in the memory to be modified before the backup, thereby causing the final backup data to be incorrect. After the internet of things equipment is powered off and restarted, the program can be continuously operated by using the wrong backup data.

The method for running the application program provided by the embodiment of the application program can not only realize asynchronous DMA backup, but also detect backup data errors in time, so that the situation that the program is continuously run by adopting wrong backup data after the equipment of the Internet of things is powered off and restarted is avoided. The following describes a method for running an application program provided in an embodiment of the present application.

Specifically, the embodiment of the present application provides a method for running an application program, which is applied to a computer device, as shown in fig. 2, where the computer device includes a processor and a direct memory access DMA.

The computer device may be a server deployed with an intermittent system, or may be a terminal device deployed with the intermittent system, and specifically, the computer device may be an internet of things device deployed with the intermittent system; wherein, this thing networking equipment includes but not limited to fire prevention equipment, meteorological information monitoring equipment and intelligent shoe-pad as described above.

The processor may be any processor capable of executing program instructions, for example, the processor may be a stand-alone central processing unit CPU, a CPU core on a system on a chip SoC, or a micro control unit MCU.

Based on the computer device, as shown in fig. 3, the method for running the application program provided by the embodiment of the application includes:

in step 101, the processor runs a first program segment based on data in the first memory space.

As shown in fig. 2, in the computer device, there is also a first storage space, which may be located in the non-volatile memory or in the volatile memory.

It should be noted that, when the first storage space is located in the volatile memory, if the computer device is powered off, the data stored in the first storage space is lost, and therefore, in the process of running the application program, the data in the first storage space needs to be backed up. When the first storage space is located in the nonvolatile memory, although the data in the nonvolatile memory does not disappear with the computer device powered off, the data in the first storage space also needs to be backed up during the running of the application program. The following description will be given with specific examples.

For example, the first storage space is located in a nonvolatile memory and stores a value a of a certain variable, and the processor runs a certain program, which is used to increase the value of the variable in the first storage space by b.

Under the condition that the value a of the variable in the first storage space is not backed up: if the program is not completely run but the operation of increasing the value of the variable in the first storage space by b is executed, and the computer equipment is suddenly powered off, the value of the variable in the first storage space is changed into a + b. And after the computer equipment is powered on and restarted, the processor can operate the section of program again, namely b is continuously increased on the basis of the value a + b, and the value of the variable in the first storage space is changed into a +2 b.

Under the condition of backing up the value a of the variable in the first storage space: because the value a of the variable in the first storage space is backed up, based on the same scenario, after the computer device is powered on and restarted, the processor will rerun the segment of program based on the backed-up value a, that is, b will be continuously added on the basis of the value a, and the value of the variable in the first storage space is still a + b.

Based on the above example, in the case that the value a of the variable in the first storage space is not backed up, the operation of increasing the value of the variable in the first storage space by b is performed twice, which results in an error in the value of the variable in the first storage space. Therefore, even if the first storage space is located in the nonvolatile memory, data in the first storage space needs to be backed up.

In the embodiments of the present application, volatile memories include, but are not limited to, Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM); non-volatile memory includes, but is not limited to, FLASH memory FLASH, ferroelectric memory space FRAM, and electrically erasable programmable read-only memory space EEPROM.

The first program segment is one of a plurality of program segments constituting an application program, and is used to modify data in the first storage space.

The term program segment and the first program segment in the embodiments of the present application will be described below.

First, a program segment refers to a program segment.

Based on the foregoing description, in an intermittent system, the system status is backed up once every time a program is run. It should be noted that, the method for implementing the backup process includes at least the following two methods.

The first method comprises the following steps: the method comprises the steps that a plurality of backup points are set through checkpoint in the process of running an application program by computer equipment, the running of the application program is stopped when the backup points are reached, and then the system state is backed up; in this case, the part of the application between the two backup points can be regarded as a program segment.

The second method comprises the following steps: in the first method, the part of the application program between two backup points is written into an independent code, and the independent code can be called a task, so that the application program can be regarded as being composed of a plurality of tasks; in this case, one task can be regarded as one program segment.

Therefore, the program segment in the embodiment of the present application may be the program segment in the first method, or may be the program segment in the second method, which is not described in detail below.

In the embodiment of the present application, the application program is composed of a plurality of program segments, a certain operation sequence generally exists among the program segments, and the first program segment may be any one of the program segments.

According to the operation sequence, when the first program segment is the program segment which operates firstly in the plurality of program segments, the data in the first storage space is the data after the initialization of the application program; when the first program segment is any program segment except the program segment which operates at first in the plurality of program segments, the data in the first storage space is obtained after the first program segment is operated.

In the embodiment of the present application, the modification of the data in the first storage space may be understood as: and the processor executes the write operation instruction in the first program segment to write the data in the first storage space. Typically, the modified data is different from the data before modification.

The first program segment may include, in addition to a write operation instruction for data in the first storage space, a read operation instruction for data in the first storage space, and in addition, the first program segment may further include other instructions, which is not specifically limited in this embodiment of the present application.

The data in the first storage space comprises values of M first variables and values of N second variables, the value of each first variable in the M first variables corresponds to the value of at least one second variable in the N second variables, and M and N are positive integers.

The following specifically describes the case of data in the first storage space.

First, it will be appreciated that the number of variables that need to be accessed is fixed for any one known application. Therefore, in the initialization process of the application program, a fixed storage space is allocated to the application program to store the values of the variables to be accessed by the application program.

In the embodiment of the present application, a variable that an application program needs to access is referred to as a second variable, and a fixed storage space allocated to the application program is referred to as a first storage space. Exemplarily, as shown in fig. 4, the first storage space is used for storing a value of the second variable a, a value of the second variable B, a value of the second variable C, and a value of the second variable D.

The values of the N second variables are values of variables that actually need to be backed up, and therefore, the values of the N second variables may also be referred to as values of variables to be backed up.

Specifically, the values of the N second variables may be values of all variables that the application program needs to access; for example, as shown in fig. 4, assuming that all variables that the application program needs to access are a second variable a, a second variable B, a second variable C, and a second variable D, values of the N second variables to be backed up may be a value of the second variable a, a value of the second variable B, a value of the second variable C, and a value of the second variable D.

The values of the N second variables may also be a part of the values of all variables that the application program needs to access. For example, before executing step 101, the processor runs a certain segment of program, where the segment of program is used to perform write operation on values of partial variables, and the N second variables to be backed up may be: values of a portion of the variables including a portion of the variables on which the write operation is performed.

Specifically, all variables that the application program needs to access are a second variable a, a second variable B, a second variable C, and a second variable D, before executing step 101, the processor runs a certain section of program, where the section of program is used to perform write operation on the values of the second variable B and the values of the second variable D, and the values of the N second variables to be backed up may only include the values of the second variable B and the values of the second variable D. It can be understood that, in general, a read operation and a write operation are performed on data in a storage space corresponding to a segment of continuous addresses, so that the values of the N second variables to be backed up may also include the values of the second variable B, the second variable C, and the second variable D.

Based on the foregoing description, the values of the N second variables may be obtained after a section of program is run, that is, before the first program section is run, the processor runs other program sections and outputs the values of the N second variables; it can be understood that, in practical applications, the operation instructions in the program segment are complex, and the values of the N second variables output by the program segment are related to the values of the input variables. Therefore, before the program segment is operated, the values of the N second variables output by the program segment are usually unpredictable, and as a possible case, the value of a certain second variable is not changed before and after the first program segment is operated. Therefore, whether the values of the N second variables store backup errors cannot be detected through the values of the second variables in the backed-up data.

In order to detect whether the values of the N second variables have a backup error, the values of M first variables are added to the first storage space in the embodiment of the present application, the value of each first variable in the M first variables corresponds to the value of at least one second variable in the N second variables, and M and N are both positive integers. In addition, in the embodiment of the application, an instruction for modifying the values of the M first variables is added in the first program segment, and the instruction may specifically instruct to modify the values of the N second variables to specific values respectively.

Therefore, the value of each first variable after the first program segment is operated and the value of each first variable before the first program segment is operated are known, and the values of the M first variables and the modification instruction in the first program segment are reasonably set, so that the value of each first variable after the first program segment is operated is different from the value of each first variable before the first program segment is operated. Therefore, whether the values of the N second variables store backup errors or not can be detected through the values of the first variables in the backed-up data.

The values of the M first variables can be set according to actual needs, and the values of the M first variables can be completely the same, partially the same or different; for convenience of setting, the values of all the M first variables may be set to 0.

When M is greater than 1, the value of each first variable may correspond to the value of one second variable, or may correspond to the values of a plurality of second variables.

It should be noted that the values of the second variables corresponding to the values of the M first variables may only include the values of a part of the N second variables, so that whether a backup error exists in the values of the part of the N second variables can be detected; the values of the second variables corresponding to the values of the M first variables may include the values of all the N second variables, so that whether backup errors exist in the values of all the N second variables may be detected.

The relative storage positions of the value of the first variable and the value of the second variable in the first storage space are not specifically limited, and the relative storage positions can be specifically adjusted according to actual needs.

In order to more simply and conveniently represent the corresponding relationship between the value of the first variable and the value of the second variable, the embodiment of the present application represents the corresponding relationship between the value of the first variable and the value of the second variable by the relative storage positions of the value of the first variable and the value of the second variable in the first storage space.

Illustratively, the storage address of the value of the first variable and the storage address of the value of at least one second variable corresponding to the value of the first variable are consecutive in the first storage space, and the storage address of the value of the first variable is higher than the storage address of the value of any one second variable corresponding to the first variable.

For example, M ═ 1 and N ═ 4. As shown in fig. 5, the values of the M first variables include the value of a first variable Z, and the values of the N second variables include the values of a second variable a, a second variable B, a second variable C, and a second variable D; the value of the first variable Z corresponds to the value of the second variable a, the value of the second variable B, the value of the second variable C and the value of the second variable D, and the value of the second variable a, the value of the second variable B, the value of the second variable C, the value of the second variable D and the value of the first variable Z are sequentially stored in the first storage space from a low storage address to a high storage address.

For example, M ═ 2 and N ═ 4. As shown in fig. 6, the values of the M first variables include a value of a first variable X and a value of a first variable Y, and the values of the N second variables include a value of a second variable a, a value of a second variable B, a value of a second variable C, and a value of a second variable D; the value of the first variable X corresponds to the value of the second variable A and the value of the second variable B, the value of the first variable Y corresponds to the value of the second variable C and the value of the second variable D, and the value of the second variable A, the value of the second variable B, the value of the first variable X, the value of the second variable C, the value of the second variable D and the value of the first variable Y are sequentially stored in the first storage space from a low storage address to a high storage address.

And the first program segment indicates that for the value of each first variable, after the value of the first variable is modified, the value of the at least one second variable corresponding to the value of the first variable is modified.

Taking any one of the M first variables (referred to as a target variable herein) as an example, based on the instruction of the first program segment, during the process of modifying the data in the first storage space, the processor modifies the value of the target variable first and then modifies the value of at least one second variable corresponding to the value of the target variable.

For example, the first program segment may be as shown in fig. 7, that is, the value of the first variable Z, the value of the second variable a, the value of the second variable B, the value of the second variable C, and the value of the second variable D are modified to 1, 5, 6, 7, and 8 in sequence.

For another example, as shown in fig. 8, the first program segment may further modify the value of the first variable X, the value of the second variable a, the value of the second variable B, the value of the first variable Y, the value of the second variable C, and the value of the second variable D to 1, 5, 6, 1, 7, and 8 in sequence.

And 102, the DMA backs up the data in the first storage space based on the backup sequence to obtain the first backup data stored in the second storage space.

The DMA in the embodiment of the present application may also be referred to as a DMA controller DMAC.

As shown in fig. 2, in the computer device, there is a second storage space, and the second storage space is located in the nonvolatile memory, which has been described based on the foregoing, and therefore, the description is not repeated here.

Backing up data in the first storage space may be understood as copying data in the first storage space to the second storage space.

The backup sequence indicates that for the value of each first variable, before the value of the first variable is backed up, the value of at least one second variable corresponding to the value of the first variable is backed up.

Taking any one of the M first variables (referred to as a target variable herein) as an example, based on an indication of a backup sequence, during a process of backing up data in the first storage space, the processor backs up a value of at least one second variable corresponding to the value of the target variable, and then backs up the value of the target variable.

Comparing the modification order indicated by the first program segment with the backup order indicated by the backup order indicates that the modification order indicated by the first program segment is opposite to the backup order indicated by the backup order.

It can be understood that, when backing up data in the storage space, the data are usually read sequentially according to the sequence of the storage addresses from low to high, so in order to configure the backup sequence more easily, the backup sequence can be represented by the relative storage positions of the values of the first variable and the second variable in the first storage space.

Specifically, a storage address of a value of the first variable and a storage address of a value of the second variable may be reasonably configured, so that the storage address of the value of the first variable and the storage address of the value of at least one second variable corresponding to the value of the first variable are continuous in the first storage space; and the storage address of the value of at least one second variable corresponding to the value of the first variable and the storage address of the value of the first variable are arranged in sequence from a low address to a high address.

Taking fig. 5 as an example, in the first storage space, the value of the second variable a, the value of the second variable B, the value of the second variable C, the value of the second variable D, and the value of the first variable Z are sequentially stored from the low storage address to the high storage address, so that backing up the data in the first storage space sequentially from low to high storage addresses is equivalent to backing up the value of the second variable a, the value of the second variable B, the value of the second variable C, the value of the second variable D, and the value of the first variable Z sequentially based on the backup order.

Similarly, taking fig. 6 as an example, in the first storage space, the value of the second variable a, the value of the second variable B, the value of the first variable X, the value of the second variable C, the value of the second variable D, and the value of the first variable Y are sequentially stored from the low storage address to the high storage address, so that backing up the data in the first storage space sequentially from the low storage address to the high storage address is equivalent to sequentially backing up the value of the second variable a, the value of the second variable B, and the value of the first variable X, and sequentially backing up the value of the second variable C, the value of the second variable D, and the value of the first variable Y based on the backup sequence.

It should be noted that the data in the first storage space is data required for operating the first program segment, and therefore the first backup data in the second storage space corresponds to the first program segment, that is, the first backup data includes a value of a variable required for operating the first program segment. The corresponding relation between the first backup data and the first program segment can also be stored in the second storage space.

In the embodiment of the present application, the execution of step 101 and the execution of step 102 are not sequential, that is, they can be executed simultaneously; correspondingly, the process of backing up the data in the first storage space and the process of operating the first program segment to modify the data in the first storage space are parallel, that is, the embodiment of the present application backs up the data in the first storage space in an asynchronous DMA backup manner.

Step 103, based on that the first backup data in the second storage space includes a value of at least one first variable of the M first variables after the first program segment is run, the processor determines that the first backup data in the second storage space is erroneous.

It is understood that, since step 101 and step 102 can be executed simultaneously, before the value of a certain second variable is backed up, the processor may have modified the value of the second variable; in this embodiment of the application, the modification sequence indicated by the first program segment is opposite to the backup sequence indicated by the backup sequence, and specifically, the first program segment indicates to modify the value of the first variable first and then modify the value of the second variable corresponding to the first variable, and the backup sequence indicates to modify the value of the second variable corresponding to the first variable first and then modify the value of the first variable. Therefore, when the first backup data includes the modified value of the first variable, it indicates that the processor has performed the modification operation on the value of the first variable when the value of the first variable is backed up, and therefore, it is considered to a great extent that before the value of the first variable is backed up, the processor has performed the modification operation on the value of the second variable, and it can be considered that the value of the second variable in the first backup data is the modified value of the second variable, so that the processing determines that the first backup data in the second storage space is incorrect.

Specifically, taking a first variable as an example, since the modification order indicated by the first program segment is opposite to the backup order indicated by the backup order, if the value of the first variable is the value of the first variable after the first program segment is run, it indicates that the processor has performed the operation of modifying the value of the first variable in the first program segment before the value of the first variable is backed up in the second storage space. At this time, it may be considered that, before backing up the value of the second variable corresponding to the value of the first variable, the processor may have already executed an operation of modifying the value of the second variable corresponding to the value of the first variable in the first program segment. Based on this, the processor determines that the backup data in the second storage space is erroneous.

The above process will be specifically described with reference to fig. 5 to 8.

The first example is: as can be seen from the first program segment shown in fig. 7, the processor sequentially modifies the values of the first variable Z, the second variable a, the second variable B, the second variable C, and the second variable D to 1, 5, 6, 7, and 8; as can be seen from the first storage space shown in fig. 5, the DMA backs up the value of the second variable a, the value of the second variable B, the value of the second variable C, the value of the second variable D, and the value of the first variable Z in sequence, where it is assumed that the value of the first variable Z in the first storage space is 0.

The following describes a process of determining, by the processor, a backup data error in the second storage space by taking a value of Z in the second storage space and a value of the second variable B as an example.

If the backup data in the second storage space includes a first variable Z whose value is 1, it indicates that the processor has modified the value of the first variable Z in the first storage space to 1 before backing up the value of the first variable Z, so that the processor may have modified the value of the second variable B in the first storage space to 6 before backing up the value of the second variable B, and thus, the processor determines that the backup data in the second storage space is erroneous.

The second example is: as can be seen from the first program segment shown in fig. 8, the processor sequentially modifies the value of the first variable X, the value of the second variable a, the value of the second variable B, the value of the first variable Y, the value of the second variable C, and the value of the second variable D to 1, 5, 6, 1, 7, and 8; as can be seen from the backup sequence shown in fig. 6, the DMA backs up the value of the second variable a, the value of the second variable B, the value of the first variable X, the value of the second variable C, the value of the second variable D, and the value of the first variable Y in sequence, where it is assumed that the value of the first variable X and the value of the first variable Y in the first storage space are both 0.

The following describes a process of determining, by the processor, that the backup data in the second storage space is erroneous, by taking a value of X and a value of the second variable a in the second storage space as examples.

If the value of the first variable X included in the first backup data in the second storage space is 1, it indicates that the processor has modified the value of the first variable X in the first storage space to 1 before backing up the value of the first variable X, so that the processor may have modified the value of the second variable a in the first storage space to 5 before backing up the value of the second variable a, and thus, the processor determines that the backup data in the second storage space is erroneous.

It should be noted that, in the second storage space, if the value of the first variable is the value of the first variable after the first program segment is run, it may be determined that the processor has executed the operation of modifying the value of the first variable in the first program segment before the value of the first variable is backed up. The processor may have executed an operation of modifying the value of the second variable corresponding to the value of the first variable in the first program segment before backing up the value of the second variable corresponding to the value of the first variable, which may be determined with a high probability but may not be determined completely.

For example, as shown in fig. 9, the direction of the arrow indicates that the time is from early to late, and the portion between the two dotted lines indicates that the time is within the same time period. As can be seen from fig. 9, when the DMA backs up the value of the second variable C, the processor starts to perform an operation of modifying the value of the first variable Z to 1 in the first program segment, so before backing up the value of the second variable a and the value of the second variable B, the processor further performs an operation of modifying the value of the second variable a to 5 and modifying the value of the second variable B to 6 in the first program segment. Therefore, in the second storage space, the values of the second variable a and the second variable B are correct.

Before the DMA backups the value of the first variable Z, the processor has modified the value of the first variable Z in the first storage space to 1, so in the second storage space, the value of the first variable Z is also 1.

After the DMA backs up the value of the first variable Z, the processor starts to execute the operation of modifying the value of the second variable C to 7 in the first program segment, so before backing up the value of the second variable C and the value of the second variable D, the processor also executes the operation of modifying the value of the second variable C to 7 and modifying the value of the second variable D to 8 in the first program segment. Therefore, in the second storage space, the values of the second variable C and the second variable D are correct.

Therefore, after the data in the first storage space is backed up, the value of the first variable Z included in the backup data in the second storage space is 1, that is, the value of the first variable Z in the second storage space is wrong, and the value of the second variable a, the value of the second variable B, the value of the second variable C, and the value of the second variable D in the second storage space are all correct.

Therefore, the backup data in the second storage space is actually correct, but if the judgment is made according to the contents in step 103, the backup data in the second storage space is mistaken for an error.

Based on the above analysis, it can be known that, in the process of determining that the backup data in the second storage space is incorrect, the method provided in the embodiment of the present application has a certain error, and the error gradually increases as the number of values of the second variable corresponding to the value of each first variable increases. Therefore, for values of a certain number of second variables to be backed up, in the embodiment of the present application, a larger number of values of the first variables are generally used to reduce the number of values of the second variables corresponding to the value of each first variable, so as to improve the accuracy of determining the backup data error in the second storage space.

For example, when the number of values of the second variable to be backed up is 4, the method shown in the second example and the method shown in the first example are preferentially selected to run the application program.

In the embodiment of the present application, in the existing method for running an application, after completing the backup of data in the first storage space, the first program segment is run, that is, a process of backing up the data in the first storage space is serial to a process of running the first program segment by the processor; in this embodiment of the present application, the processor operates the first program segment based on the data in the first storage space, where the first program segment is one of the program segments that form the application program and is used to modify the data in the first storage space, and the DMA backs up the data in the first storage space based on the backup order to obtain the first backup data stored in the second storage space, so that the process of operating the first program segment by the processor does not need to be performed after the backup is completed, that is, the process of backing up the data in the first storage space is parallel to the process of operating the first program segment by the processor, which can reduce the time overhead and improve the operating efficiency of the application program.

In addition, when the number of values of the first variable is multiple and the number of values of the second variable is also multiple, for example, as shown in fig. 6, the values of the multiple second variables in the first storage space may be segmented by the values of the multiple first variables, and the value of each first variable may detect a value backup error of at least one corresponding second variable. Therefore, the embodiment of the application can not only determine the backup data error in the second storage space, but also narrow the range of possible erroneous backup data in the second storage space more finely.

For example, in the foregoing second example, if the value of the first variable X in the second storage space is 1, it may be determined that the value of the second variable a or the value of the second variable B in the second storage space is incorrect; similarly, if the value of the first variable X in the second storage space is 0 and the value of the first variable Y in the second storage space is 1, it may be determined that the value of the second variable C in the second storage space is incorrect or the value of the second variable D is incorrect.

Based on steps 101 to 103, the processor may determine that the second backup data in the second storage space is erroneous, and after determining that the second backup data in the second storage space is erroneous, may re-execute the application program from the starting position, that is, execute the first-running program segment of the plurality of program segments constituting the application program, but the re-running of the first-running program segment may also increase time overhead. This will be explained below.

As an achievable way, as shown in fig. 3, after the processor determines that the first backup data in the second storage space is an error and the processor runs the first program segment, the method for running the application program provided by the embodiment of the present application may further include:

and 104, setting the values of the M first variables in the first storage space as the values of the M first variables before the first program segment is operated by the processor.

It is understood that the processor modifies the values of the M first variables during the operation of the first program segment. Based on the foregoing description, it can be seen that, assuming that the values of the M first variables in the first storage space are all 0, after the processor runs the first program segment, the values of some or all of the M first variables may be modified to 1.

After the processor runs the first program segment, the processor will continue to run the next program segment, which is referred to as the second program segment in this embodiment of the present application.

The second program segment may also modify the value of one or more of the M first variables, for example, the value of one or more of the M first variables may be modified to 2, and then the processor may determine whether the value of the first variable that is 2 exists in the second storage space. And in the process of operating the second program segment, the value of the first variable in the unmodified first storage space is also 1.

However, in an application, the same program segment may be run multiple times. For example, after the processor runs the second program segment, the processor needs to run the first program segment for a second time, and meanwhile, the DMA backs up the data in the first storage space after the second program segment is run, so as to obtain the backed-up data. After the second program segment is run, the value of part of the first variables in the first storage space is 2, the value of the other part of the first variables is 1, and the first program segment is used for modifying the value of the first variables into 1, so that before the value of the first variable is backed up, the processor modifies the value of 2 of the first variable in the first storage space into 1 in the process of running the first program segment for the second time, which can result in the value of the first variable in the obtained backup data being 1; before the value of the first variable is backed up, the processor does not modify the value of the first variable in the process of running the first program segment for the second time, and the value of the first variable which is 1 also appears in the backup data.

Therefore, if the processor determines that the backup data is correct or incorrect only based on whether the value of the first variable that is 1 exists in the second storage space, an erroneous determination may be caused.

Therefore, in the embodiment of the present application, the values of the M first variables are reset in step 104, and the values of the M first variables in the first storage space are set to be the values of the M first variables before the first program segment is run. For example, if the values of the M first variables in the first storage space are all 0, and the values of some of the first variables are modified to 1 in the process of executing step 101, step 104 is executed to reset the values of the M first variables to 0.

Based on the above description, when the processor needs to run the same program segment for multiple times, the values of the M first variables need to be reset through step 104; for example, when the second program segment is the same as the first program segment, the values of the M first variables are reset through the step 104, so as to avoid that the values of the first variables before and after the second program segment is operated are the same and the backup data is mistaken for an error.

Thus, in the present embodiment, step 104 is optional.

In step 105, the DMA backs up the data in the first storage space based on the backup order to replace the first backup data stored in the second storage space with the second backup data.

In this embodiment of the application, after it is determined that the second backup data in the second storage space is in error, the program segment that is operated first in the plurality of program segments is not re-operated, but after the first program segment is operated, the data in the first storage space is subjected to secondary backup, so that the second backup data is obtained.

As can be seen from the foregoing description, the size of the first storage space is fixed because the number of variables to be accessed by the application is fixed, and the size of the second storage space is fixed because the second storage space is used for storing backup data of values of the variables. Therefore, in the process of performing secondary backup on the data in the first storage space, the first backup data in the second storage space is replaced by the second backup data.

The process of backing up data in the first storage space has been explained based on step 101, so step 105 can be understood with reference to the related explanation of step 101.

And 106, the processor operates a second program segment based on the data in the first storage space, wherein the second program segment is a program segment which is operated after the first program segment according to the operation sequence in the plurality of program segments and is used for modifying the data in the first storage space, the first program segment indicates the value of each first variable, and after the value of the first variable is modified, the value of at least one second variable corresponding to the value of the first variable is modified.

As can be seen from the foregoing description, a certain operation sequence exists among the multiple program segments constituting the application program, and the operation sequence may indicate a program segment that operates after the first program segment, that is, the second program segment in the embodiment of the present application. Wherein the running order may be preset.

It should be noted that the process of operating the second program segment is the same as the process of operating the first program segment, and the step 106 can be understood by referring to the related description of the step 102.

There is also no precedence in the execution of step 105 and step 106.

Step 107, based on that the second backup data in the second storage space does not include the value of any first variable of the M first variables after the second program segment is run, the processor determines that the second backup data in the second storage space is correct.

Based on the relevant description in step 103, in the second storage space, if the values of the M first variables are all the values of the M first variables before the second program segment is run, that is, the second backup data does not include the value of any first variable of the M first variables after the second program segment is run, it may be determined that the second backup data in the second storage space is correct.

For example, as can be seen from the first program segment shown in fig. 7, the processor sequentially modifies the values of the first variable Z, the second variable a, the second variable B, the second variable C, and the second variable D to 1, 5, 6, 7, and 8; as can be seen from the first storage space shown in fig. 5, the DMA backs up the value of the second variable a, the value of the second variable B, the value of the second variable C, the value of the second variable D, and the value of the first variable Z in sequence, where it is assumed that the value of the first variable Z in the first storage space is 0.

If the value of the first variable Z included in the backup data in the second storage space is 0 (that is, not equal to 1), it is described that the value of the first variable Z is not yet modified to 1 by the processor when the value of the first variable Z is backed up, so that it can be determined that the value of the second variable B in the first storage space is not yet modified to 6 by the processor when the value of the second variable B is backed up. Similarly, it may also be determined that the processor does not modify the value of the second variable a to 5, does not modify the value of the second variable C to 7, and does not modify the value of the second variable D to 8.

Therefore, the processor can determine that the backup data in the second storage space is correct based on that the value of the first variable Z, the value of the second variable a, the value of the second variable B, the value of the second variable C, and the value of the second variable D are not modified before the backup.

For another example, as can be seen from the first program segment shown in fig. 8, the processor sequentially modifies the value of the first variable X, the value of the second variable a, the value of the second variable B, the value of the first variable Y, the value of the second variable C, and the value of the second variable D to 1, 5, 6, 1, 7, and 8; as can be seen from the backup sequence shown in fig. 6, the DMA backs up the value of the second variable a, the value of the second variable B, the value of the first variable X, the value of the second variable C, the value of the second variable D, and the value of the first variable Y in sequence, where it is assumed that the value of the first variable X and the value of the first variable Y in the first storage space are both 0.

If the value of the first variable X included in the backup data in the second storage space is not 1 (assumed to be 0), it is described that the value of the first variable X is not yet modified to 1 by the processor when the value of the first variable X is backed up, so that it can be determined that the value of the second variable a in the first storage space is not yet modified to 5 by the processor when the value of the second variable a is backed up. Likewise, it may also be determined that the processor did not modify the value of the second variable B to 6.

At this time, it may be determined that the value of the second variable a and the value of the second variable B in the first storage space are not backed up erroneously, and it may be determined that the value of the second variable C and the value of the second variable D in the first storage space are also not backed up erroneously by using the same method, so that it may be determined that the backup data in the second storage space is correct.

In the embodiment of the application, after it is determined that the first backup data in the second storage space is in error, the first program segment in the plurality of program segments is not operated again, but after the first program segment is operated, the data in the first storage space is backed up again, and the second program segment is operated at the same time, so that the first backup data in the second storage space which is in error is replaced by the correct second backup data, and the time overhead of operating the application program can be reduced.

For example, according to a preset running program, the application program sequentially comprises a program segment aa, a program segment bb, a program segment cc, a program segment dd and a program segment ee, after the processor runs the program segment bb, the DMA backs up data in the first storage space, and simultaneously runs the program segment cc to obtain wrong first backup data stored in the second storage space; in the embodiment of the present application, the program segment aa is not re-executed due to the error of the first backup data, but the data in the first storage space after the program segment cc is run is continuously backed up, so that the error first backup data in the third storage space is replaced with the correct second backup data.

It can be seen from this that, in the case that the computer device is not powered off, after it is determined that the first backup data in the second storage space is incorrect, the program segment aa which is operated first is not re-operated, but the program segment cc is continuously operated, which not only enables the application to operate normally, but also reduces the time overhead for operating the application.

It can be understood that the above embodiments are mainly applied to the scenario that the computer device is not powered off, and after determining that the second backup data in the second storage space is in error, the next program segment may be continuously run to reduce the time overhead. However, the situation may be different in a scenario where the computer device is powered off, which is explained below.

As an implementable manner, as shown in fig. 3, after the processor determines that the first backup data in the second storage space is an error, the method for running the application program provided by the embodiment of the present application further includes:

and step 108, after the computer equipment is powered off and restarted, based on the first backup data with the error stored in the second storage space, the processor executes a third program segment, wherein the third program segment is the program segment which runs at the first in the running sequence in the plurality of program segments.

It is understood that if the DMA backs up the data in the first storage space after the first program segment is executed again, the first backup data in the second storage space will be replaced, so that the computer device power-off restart may occur after step 101 is executed and before the DMA backs up the data in the first storage space after the first program segment is executed, at this time, the second storage space stores the first backup data.

For example, after step 101 is executed, but step 102 is in the process of executing, that is, the data in the first storage space has been backed up and the first backup data in the second storage space is obtained, while the first program segment is still running, at this time, the computer device is powered off and restarted, and then the processor may run the third program segment.

It should be noted that, since the third program segment is the program segment that is executed first in the execution order among the program segments, the value of the variable (which may also be considered as the initial value of the variable of the application program) required for executing the third program segment may be obtained from an executable file of the third program segment, and the executable file may be stored in a nonvolatile memory of the computer device, and the nonvolatile memory may be the same as the nonvolatile memory in which the second storage space is located.

Specifically, after the computer device is powered off and restarted, the second storage space stores the first backup data with errors, so that the processor cannot continue to execute the next program segment of the first program segment based on the first backup data with errors; in the embodiment of the present application, the processor executes a program segment that runs first in the running order, that is, a third program segment, among the plurality of program segments.

For example, according to a preset running program, the application program sequentially comprises a program segment aa, a program segment bb, a program segment cc, a program segment dd and a program segment ee, and after the processor runs the program segment bb, the DMA backs up data in the first storage space to obtain erroneous first backup data stored in the second storage space; the processor runs the program segment cc while backing up the data in the first memory space, and the computer device is powered off during the running of the program segment cc; after the computer device is powered off and restarted, the processor will rerun aa due to the error in the first backup data in the second storage space.

In the embodiment of the application, after the computer device is powered off and restarted, the processor executes the third program segment based on the first backup data with the error stored in the second storage space, so that the processor can be prevented from running the next program segment of the first program segment based on the first backup data with the error, and thus, the running of the application program can be prevented from being mistaken.

Based on the above description, in the case that the first backup data is in error, if the computer device is powered off and restarted, the processor may execute the first running third program segment; if the computer device is not powered off and restarted, the processor may continue to the next program segment (i.e., the second program segment) of the first program segment and perform backup on the data in the first storage space again to implement overwriting on the erroneous first backup data. In addition, the first backup data may be correct, and the case where the first backup data is correct will be described below.

As an implementation manner, as shown in fig. 3, the method for running an application provided by the embodiment of the present application further includes:

step 109, based on that the first backup data in the second storage space does not include the value of any first variable of the M first variables after the first program segment is run, the processor determines that the first backup data in the second storage space is correct.

Based on the relevant description in step 107, in the second storage space, if the values of the M first variables are all the values before the first program segment is run, that is, the first backup data does not include the value of any first variable of the M first variables after the first program segment is run, it may be determined that the first backup data in the second storage space is correct.

It will be appreciated that in the foregoing embodiment, it is assumed that the processor has run a greater number of program segments before the first program segment is run; after the computer device is powered off and restarted, if the second storage space stores the wrong first backup data, the processor will run the third program segment from the beginning, which will certainly increase the time overhead.

A method for avoiding the above-described situation is described below.

Specifically, as an implementable manner, as shown in fig. 3, after the processor determines that the first backup data in the second storage space is correct, the method for running the application program provided by the embodiment of the present application further includes:

in step 110, the DMA backs up the correct first backup data in the second storage space to a third storage space, where the third storage space is also located in the nonvolatile memory.

As shown in fig. 2, in the computer device, there is also a third storage space, which is also located in the non-volatile memory; specifically, the third storage space and the second storage space may be located in the same nonvolatile memory, but the second storage space and the third storage space have different storage addresses, and the third storage space and the second storage space may also be located in different nonvolatile memories.

The process of backing up the correct first backup data to the third storage space is the same as the process of backing up the data in the first storage space to the second storage space, which is not described in detail in this embodiment of the present application. As is apparent from the above description, since the correspondence relationship between the first backup data and the first program segment may be stored in the second storage space, the correspondence relationship between the first backup data and the first program segment may be backed up in the third storage space in the process of backing up the first backup data to the third storage space.

It should be noted that, although the correct first backup data is stored in the second storage space of the nonvolatile memory, the correct first backup data in the second storage space may be replaced in the next process of backing up the data in the first storage space, and the correct first backup data in the second storage space may be replaced by the wrong backup data.

Therefore, in the embodiment of the present application, the correct first backup data in the second storage space is backed up again, so that even if the correct first backup data in the second storage space is replaced by the wrong backup data, the processor may acquire the correct first backup data from the third storage space. In this way, in case of a computer power failure, after the computer is powered off and restarted, in order to reduce time overhead, the processor may re-run the first program segment based on the correct first backup data in the third storage space without running the first third program segment of the plurality of program segments.

Specifically, as an implementable manner, as shown in fig. 3, after the DMA backs up the correct first backup data in the second storage space to the third storage space, the method for running the application provided in the embodiment of the present application further includes:

and step 111, after the computer equipment is powered off and restarted, based on the third backup data with errors stored in the second storage space and the correct first backup data stored in the third storage space, the processor runs the first program segment based on the first backup data in the third storage space.

The third backup data may be obtained by backup after the first program segment is operated, or may be obtained after at least one program segment after the first program segment is operated. For example, the application includes a program segment aa, a program segment bb, a program segment cc, a program segment dd, and a program segment ee, and if the first backup data is obtained after the program segment aa is executed, the third backup data may be obtained after the program segment bb is executed, or may be obtained after the program segment cc, the program segment dd, or the program segment ee is executed.

As can be seen from the foregoing description, the corresponding relationship between the first backup data and the first program segment may also be backed up in the third storage space, so the processor may determine the first program segment based on the first backup data in the third storage space and the corresponding relationship between the first backup data and the first program segment, and then execute the first program segment. Wherein the processor executing the first program segment based on the first backup data in the third storage space may include: the first backup data in the third storage space is copied to the first storage space, and then the first program segment is operated based on the first backup data in the first storage space.

The above process is described below with a specific example.

As shown in fig. 10, the application includes a program segment aa, a program segment bb, a program segment cc, a program segment dd, and a program segment ee, and the DMA backs up the data in the first storage space at 5 backup points in fig. 10, where backup point 1 is before the program segment aa is run, backup point 2 is after the program segment aa is run, backup point 3 is after the program segment bb is run, backup point 4 is after the program segment cc is run, and backup point 5 is after the program segment dd is run.

At the backup point 4, the DMA backs up the data in the first storage space to obtain the correct first backup data stored in the second storage space, and then the DMA backs up the first backup data to the third storage space.

At the backup point 5, the DMA backs up the data in the first storage space to obtain the wrong third backup data stored in the second storage space, that is, the correct first backup data in the second storage space is replaced with the wrong third backup data; however, since the third backup data is wrong, the third backup data is not backed up in the third storage space, that is, the third storage space still stores the correct first backup data.

In the process of operating the program segment ee by the processor, the computer device is powered off, and after the computer device is powered on and restarted, the computer does not need to return to the backup point 1 to execute the program segment aa again, but can return to the backup point 4, that is, the program segment dd is re-operated based on the correct first backup data in the third storage space. It can thus be seen that in this example the time overhead for running program segment aa, program segment bb, program segment cc is reduced.

As can be seen from the related description of step 101 to step 111, in the embodiment of the present application, the first storage space, the second storage space, and the third storage space may be allocated in the computer device.

The first storage space is used for storing values of variables required by the program segment to run, and in the process of running the program segment by the processor, the values of the variables required can be directly read from the first storage space, and the values of the variables in the first storage space can also be subjected to write operation.

The second storage space is used for storing backup data of the data in the first storage space, that is, each time a program segment is run, the DMA will backup the data in the first storage space to the second storage space. Therefore, the second storage space always stores the backup data of the processor after the last program segment is run, and the backup data may be wrong or correct.

The third storage space is also used for storing backup data of the data in the first storage space, except that the third storage space only stores correct backup data. I.e. the DMA will only copy the correct backup data in the second memory space to the third memory space.

Referring to fig. 11, fig. 11 is a schematic diagram of an apparatus for running an application according to an embodiment of the present application. As shown in fig. 11, an embodiment of the present application provides an embodiment of an apparatus for running an application, which is applied to a computer device, and the apparatus includes:

the processing unit 201 is configured to run a first program segment based on data in a first storage space, where the first program segment is one of multiple program segments forming an application program and is configured to modify the data in the first storage space, the data in the first storage space includes values of M first variables and values of N second variables, the value of each of the M first variables corresponds to the value of at least one of the N second variables, the first program segment indicates the value of each first variable, after the value of the first variable is modified, the value of the at least one second variable corresponding to the value of the first variable is modified, the value of each first variable after the first program segment is run is known and different from the value before the first program segment is run, and M and N are both positive integers;

the data backup unit 202 is configured to backup data in the first storage space based on a backup sequence to obtain first backup data stored in a second storage space, where the backup sequence indicates, for each value of the first variable, before backing up the value of the first variable, a value of at least one second variable corresponding to the value of the first variable is backed up, and the second storage space is located in a nonvolatile memory;

the processing unit 201 is configured to determine that the first backup data in the second storage space is an error based on that the first backup data in the second storage space includes a value of at least one first variable of the M first variables after the first program segment is run.

As an implementation manner, the data backup unit 202 is further configured to perform, by DMA, backup on data in the first storage space based on the backup order to replace the first backup data in the second storage space with the second backup data;

the processing unit 201 is further configured to run a second program segment based on the data in the first storage space, where the second program segment is a program segment that runs after the first program segment in the running order among the plurality of program segments, and is configured to modify the data in the first storage space, where the first program segment indicates, for each value of the first variable, a value of at least one second variable corresponding to the value of the first variable after the value of the first variable is modified;

the processing unit 201 is further configured to determine, based on that the second backup data in the second storage space does not include a value of any first variable of the M first variables after the second program segment is run, that the second backup data in the second storage space is correct.

As an implementation manner, the processing unit 201 is further configured to set, by the processor, values of M first variables in the first storage space to values of the M first variables before the first program segment is executed.

As an implementation manner, the processing unit 201 is further configured to, after the computer device is powered off and restarted, based on the first backup data with the error stored in the second storage space, execute a third program segment by the processor, where the third program segment is a program segment that runs first in the running order among the plurality of program segments.

As an implementation manner, the processing unit 201 is further configured to determine that the first backup data in the second storage space is correct based on that the first backup data in the second storage space does not include a value of any first variable of the M first variables after the first program segment is executed.

As an implementation manner, the data backup unit 202 is further configured to backup the correct first backup data in the second storage space to a third storage space, where the third storage space is also located in the nonvolatile memory.

As an implementation manner, the processing unit 201 is further configured to, after the computer device is powered off and restarted, based on the third backup data with the error stored in the second storage space and the correct first backup data stored in the third storage space, the processor runs the first program segment based on the first backup data in the third storage space.

As an implementation, the first storage space is located in a volatile memory.

For the specific implementation, the related description and the technical effects of the above units, please refer to the description of the embodiments shown in fig. 3 in the present application.

Referring to fig. 12, fig. 12 is a schematic structural diagram of a terminal 200 according to an embodiment of the present disclosure.

As shown in fig. 12, the terminal 200 may include a processor 210, an external memory interface 220, an internal memory 221, a Universal Serial Bus (USB) interface 230, an energy collection module 240, a power management module 241, a battery 242, an antenna 1, an antenna 2, a mobile communication module 250, a wireless communication module 260, a sensor module 270, a DMA280, and the like. Wherein, the sensor module 270 may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, etc.

It is to be understood that the illustrated structure of the embodiment of the present application does not constitute a specific limitation to the terminal 200. In other embodiments of the present application, terminal 200 may include more or fewer components than shown, or some components may be combined, some components may be split, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

The pressure sensor is used for sensing a pressure signal and converting the pressure signal into an electric signal. The gyro sensor may be used to determine the motion attitude of the terminal 200. The air pressure sensor is used for measuring air pressure.

The acceleration sensor may detect the magnitude of acceleration of the terminal 200 in various directions (including three axes or six axes). The magnitude and direction of gravity can be detected when the terminal 200 is stationary.

A distance sensor for measuring a distance.

The ambient light sensor is used for sensing the ambient light brightness.

The fingerprint sensor is used for collecting fingerprints.

The temperature sensor is used for detecting temperature.

Processor 210 may include one or more processing units, such as: the processor 210 may include an Application Processor (AP), a modem processor, a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a memory, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural-Network Processing Unit (NPU), etc. The different processing units may be separate devices or may be integrated into one or more processors.

The controller may be, among other things, the neural center and the command center of the terminal 200. The controller can generate an operation control signal according to the instruction operation code and the timing signal to complete the control of instruction fetching and instruction execution.

A memory may also be provided in processor 210 for storing instructions and data. In some embodiments, the memory in the processor 210 is a cache memory. The memory may hold instructions or data that have just been used or recycled by processor 210. If the processor 210 needs to use the instruction or data again, it can be called directly from the memory. Avoiding repeated accesses reduces the latency of the processor 210, thereby increasing the efficiency of the system.

In some embodiments, processor 210 may include one or more interfaces. The interface may include an integrated circuit (I1C) interface, an integrated circuit built-in audio (I1S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose input/output (GPIO) interface, a Subscriber Identity Module (SIM) interface, and/or a Universal Serial Bus (USB) interface, etc.

It should be understood that the interfacing relationship between the modules illustrated in the embodiment of the present application is only an exemplary illustration, and does not limit the structure of the terminal 200. In other embodiments of the present application, the terminal 200 may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.

The energy harvesting module 240 is used to obtain energy input from the operating environment, such as light energy, radio frequency, pressure or heat energy, and convert the energy into electric energy to be stored in the battery 242.

The power management module 241 is used to connect the battery 242, the energy collection module 240 and the processor 210. The power management module 241 receives input from the battery 242 and/or the energy harvesting module 240, and provides power to the processor 210, the internal memory 221, the external memory, and the wireless communication module 260.

The wireless communication function of the terminal 200 may be implemented by the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, a modem processor, a baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in terminal 200 may be used to cover a single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed as a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 250 may provide a solution including wireless communication of 1G/3G/4G/5G, etc. applied on the terminal 200. The mobile communication module 250 may include at least one filter, a switch, a power amplifier, a Low Noise Amplifier (LNA), and the like. The mobile communication module 250 may receive the electromagnetic wave from the antenna 1, filter, amplify, etc. the received electromagnetic wave, and transmit the electromagnetic wave to the modem processor for demodulation. The mobile communication module 250 may also amplify the signal modulated by the modem processor, and convert the signal into electromagnetic wave through the antenna 2 to radiate the electromagnetic wave. In some embodiments, at least some of the functional modules of the mobile communication module 250 may be disposed in the processor 210. In some embodiments, at least some of the functional modules of the mobile communication module 250 may be disposed in the same device as at least some of the modules of the processor 210.

The modem processor may include a modulator and a demodulator. The modulator is used for modulating a low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then passes the demodulated low frequency baseband signal to a baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs a sound signal through an audio device (not limited to the speaker 270A, the receiver 270B, etc.) or displays an image or video through the display screen 194. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be separate from the processor 210, and may be disposed in the same device as the mobile communication module 250 or other functional modules.

The wireless communication module 260 may provide a solution for wireless communication applied to the terminal 200, including Wireless Local Area Networks (WLANs) (e.g., wireless fidelity (Wi-Fi) networks), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), Infrared (IR), and the like. The wireless communication module 260 may be one or more devices integrating at least one communication processing module. The wireless communication module 260 receives electromagnetic waves via the antenna 1, performs frequency modulation and filtering processing on electromagnetic wave signals, and transmits the processed signals to the processor 210. The wireless communication module 260 may also receive a signal to be transmitted from the processor 210, frequency-modulate and amplify the signal, and convert the signal into electromagnetic waves via the antenna 2 to radiate the electromagnetic waves.

In some embodiments, antenna 1 of terminal 200 is coupled to mobile communication module 250 and antenna 2 is coupled to wireless communication module 260, such that terminal 200 may communicate with networks and other devices via wireless communication techniques. The wireless communication technology may include global system for mobile communications (GSM), General Packet Radio Service (GPRS), code division multiple access (code division multiple access, CDMA), Wideband Code Division Multiple Access (WCDMA), time-division code division multiple access (time-division code division multiple access, TD-SCDMA), Long Term Evolution (LTE), LTE, BT, GNSS, WLAN, NFC, FM, and/or IR technologies, etc. The GNSS may include a Global Positioning System (GPS), a global navigation satellite system (GLONASS), a beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS), and/or a Satellite Based Augmentation System (SBAS).

The external memory interface 220 may be used to connect an external memory card, such as a Micro SD card, to extend the storage capability of the terminal 200. The external memory card communicates with the processor 210 through the external memory interface 220 to implement a data storage function. For example, files such as music, video, etc. are saved in an external memory card.

Internal memory 221 may be used to store computer-executable program code, including instructions. The processor 210 executes various functional applications of the terminal 200 and data processing by executing instructions stored in the internal memory 221. The internal memory 221 may include a volatile memory 221A and a non-volatile memory 221B, where the volatile memory 221A is used for storing data used in the process of executing the program, and the non-volatile memory 221B is used for storing a check code corresponding to the data in the volatile memory 221A and backing up the data in the volatile memory 221A.

A complete DMA operation mainly comprises the following steps.

(1) DMA request

The processor initializes the DMA and issues operation commands to the I/O interface, which makes DMA requests to the DMA. The DMA, upon receiving a request, issues a request to the processor and applies a request signal to a HOLD request input of the processor.

(2) DMA response

The processor responds to the DMA after receiving the request, adds a response signal to a hold acknowledge (HLDA) response output end of the DMA, simultaneously presets a head address of a storage space to be accessed, the number of exchange data and a read-write command to the DMC, and gives up the control right of the system bus, and at the moment, the DMA obtains the control right of the system bus.

(3) DMA transfer

After the DMA obtains the control right of the system bus, the processor immediately suspends or only executes internal operation, and the DMA operates the data in the processor.

(4) DMA completion

When the operation of the data in the processor is finished, the DMA releases the control right of the bus and sends an end signal to the I/O interface.

Embodiments of the present application also provide a chip including one or more processors. Some or all of the processors are configured to read and execute computer programs stored in the memory to perform the methods of the respective embodiments of fig. 3.

Embodiments of the present application also provide a computer storage medium for storing computer software instructions for the computer device, which includes a program designed for executing the computer device.

The computer device may be an apparatus for running an application as described in the foregoing description of fig. 11.

The embodiment of the present application further provides a computer program product, which includes computer software instructions that can be loaded by a processor to implement the aforementioned flow in the method shown in fig. 3.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

Claims

1. A method for running an application program, applied to a computer device, the computer device comprising a processor and a Direct Memory Access (DMA); the method comprises the following steps:

the processor executes a first program segment based on data in a first memory space, the first program segment being one of a plurality of program segments constituting an application program, and is configured to modify data in the first storage space, where the data in the first storage space includes values of M first variables and values of N second variables, the value of each of the M first variables corresponds to the value of at least one of the N second variables, the first program segment indicates the value for each of the first variables, after modifying the value of the first variable, modifying the value of the at least one second variable corresponding to the value of the first variable, the value of each first variable after the first program segment is operated is known and different from the value of each first variable before the first program segment is operated, and M and N are positive integers;

the DMA backs up data in the first storage space based on a backup sequence to obtain first backup data stored in the second storage space, wherein the backup sequence indicates, for each value of the first variable, before backing up the value of the first variable, the value of the at least one second variable corresponding to the value of the first variable is backed up, and the second storage space is located in a nonvolatile memory;

based on that the first backup data includes a value of at least one of the M first variables after the first program segment is run, the processor determines that the first backup data in the second storage space is erroneous.

2. The method of claim 1, wherein after the processor determines that the first backup data in the second memory space is erroneous and the processor runs a first program segment based on data in the first memory space, the method further comprises:

the DMA backs up data in the first storage space based on the backup sequence so as to replace the first backup data in the second storage space with second backup data;

the processor runs a second program segment based on the data in the first storage space, wherein the second program segment is a program segment which runs after the first program segment according to the running sequence in the plurality of program segments and is used for modifying the data in the first storage space, the first program segment indicates the value of each first variable, and after the value of the first variable is modified, the value of at least one second variable corresponding to the value of the first variable is modified;

based on that the second backup data in the second storage space does not include a value of any first variable of the M first variables after the second program segment is run, the processor determines that the second backup data in the second storage space is correct.

3. The method of claim 2, wherein after the processor determines that the first backup data in the second memory space is erroneous and the processor runs the first program segment based on the data in the first memory space, before the DMA backs up the data in the first memory space based on the backup order, the method further comprises:

and the processor sets the values of the M first variables in the first storage space to be the values of the M first variables before the first program segment is operated.

4. The method of claim 1, wherein after the processor determines that the first backup data in the second storage space is erroneous, the method further comprises:

after the computer equipment is powered off and restarted, the processor executes a third program segment based on the first backup data with errors stored in the second storage space, wherein the third program segment is a program segment which runs at first in the running sequence in the plurality of program segments.

5. The method of claim 1, further comprising:

based on that the first backup data in the second storage space does not include a value of any first variable of the M first variables after the first program segment is run, the processor determines that the first backup data in the second storage space is correct.

6. The method of claim 5, wherein after the processor determines that the first backup data in the second storage space is correct, the method further comprises:

and the DMA backs up the correct first backup data in the second storage space to a third storage space, wherein the third storage space is also positioned in a nonvolatile memory.

7. The method of claim 6, wherein after the DMA backs up the correct first backup data in the second storage space to a third storage space, the method further comprises:

after the computer equipment is powered off and restarted, the processor runs the first program segment based on the first backup data in the third storage space based on the third backup data with errors stored in the second storage space and the correct first backup data stored in the third storage space.

8. The method of any of claims 1 to 7, wherein the first storage space is located in a volatile memory.

9. An apparatus for running an application program, applied to a computer device, the apparatus comprising:

the processing unit executes a first program segment based on data in the first storage space, the first program segment being one of a plurality of program segments constituting an application program, and is configured to modify data in the first storage space, where the data in the first storage space includes values of M first variables and values of N second variables, the value of each of the M first variables corresponds to the value of at least one of the N second variables, the first program segment indicates the value for each of the first variables, after the value of the first variable is modified, modifying the value of the at least one second variable corresponding to the value of the first variable, the value of each first variable after the first program segment is operated is known and different from the value of each first variable before the first program segment is operated, and M and N are positive integers;

the data backup unit is configured to backup data in the first storage space based on a backup sequence to obtain first backup data stored in the second storage space, where the backup sequence indicates a value of each first variable, and before backing up the value of the first variable, the value of the at least one second variable corresponding to the value of the first variable is backed up, and the second storage space is located in a nonvolatile memory;

the processing unit is configured to determine that the first backup data in the second storage space is erroneous based on that the first backup data in the second storage space includes a value of at least one of the M first variables after the first program segment is run.

10. A computer device, comprising: one or more processors and memory; wherein the memory has stored therein computer readable instructions;

the one or more processors read the computer-readable instructions to cause the computer device to implement the method of any one of claims 1-8.

11. A computer readable storage medium comprising computer readable instructions which, when run on a computer, cause the computer to perform the method of any of claims 1 to 8.