CN114243812A - BMS management system intelligence awakens circuit up - Google Patents
BMS management system intelligence awakens circuit up Download PDFInfo
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- CN114243812A CN114243812A CN202111384422.XA CN202111384422A CN114243812A CN 114243812 A CN114243812 A CN 114243812A CN 202111384422 A CN202111384422 A CN 202111384422A CN 114243812 A CN114243812 A CN 114243812A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
- H02J7/00036—Charger exchanging data with battery
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0042—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction
- H02J7/0045—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by the mechanical construction concerning the insertion or the connection of the batteries
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Power Sources (AREA)
Abstract
The invention discloses an intelligent wake-up circuit of a BMS (battery management system), which comprises a charging wake-up circuit, a discharging wake-up circuit, a resistor R3, a field-effect tube Q3 and a field-effect tube Q5, wherein the anode P + of an external power supply or a load is connected with the anode B + of a power supply of a lithium battery through a wiring terminal J6, the cathode B-of the battery of the lithium battery is connected with one end of the resistor R3 through the wiring terminal J6, the other end of the resistor R3 is connected with the source electrode of the field-effect tube Q3, the drain electrode of the field-effect tube Q3 is connected with the drain electrode of the field-effect tube Q5, the source electrode of the field-effect tube Q5 is connected with the anode P-of the external power supply or the load through a wiring terminal J4, and the grid electrodes of the field-effect tube Q3 and the field-effect tube Q5 are connected with a single chip microcomputer drive control circuit; the charging wake-up circuit and the discharging wake-up circuit are arranged between the field effect transistor Q5 and the connection terminal J4 in parallel and are connected with the source electrode of the field effect transistor Q5. The invention adopts pure hardware type to carry out intelligent awakening, does not need multiple wires and can effectively solve the problem of charging, electrifying and lighting.
Description
Technical Field
The invention relates to an intelligent wake-up circuit of a BMS (battery management system), belonging to the technical field of wake-up circuits.
Background
The BMS management system has a wide application range, is large enough to be applied to large-scale energy storage systems, electric vehicles and the like, and is small enough to be applied to shared bicycles, shared bicycles and the like, when a battery pack does not work, in order to reduce the working current of the system, the system needs to be dormant, the system is powered on again after being dormant, and a wake-up circuit is involved.
Disclosure of Invention
In order to solve the defects of the prior art, the invention provides the BMS intelligent wake-up circuit which adopts pure hardware type to carry out intelligent wake-up without multiple wires and can effectively solve the problems of charging, electrifying and sparking.
The technical scheme adopted by the invention is as follows:
an intelligent wake-up circuit of a BMS management system comprises a charging wake-up circuit, a discharging wake-up circuit, a resistor R3, field effect transistors Q3 and Q5, wherein the anode P + of an external power supply or a load is connected with a connecting terminal J6 of the anode B + of a power supply of a lithium battery through a connecting terminal J6, the cathode B-of the battery of the lithium battery is connected with one end of a resistor R3 through a connecting terminal J6, the other end of the resistor R3 is connected with the source electrode of the field effect transistor Q3, the drain electrode of a field effect transistor Q3 is connected with the drain electrode of the field effect transistor Q5, the source electrode of the field effect transistor Q5 is connected with the cathode P-of the external power supply or the load through the connecting terminal J4, and the grid electrodes of the field effect transistors Q3 and Q5 are both connected with a single chip microcomputer drive control circuit; the charging wake-up circuit and the discharging wake-up circuit are arranged between the field effect transistor Q5 and the wiring terminal J4 in parallel and are connected with the source electrode of the field effect transistor Q5, and the charging wake-up circuit and the discharging wake-up circuit are connected with the single chip microcomputer and are used for sending charging wake-up signals and discharging wake-up signals to the single chip microcomputer and controlling the field effect transistors Q3 and Q5 to be conducted through the single chip microcomputer driving control circuit so as to establish a circulation loop.
Preferably, the charge wake-up circuit comprises diodes D, a triode Q, capacitors C, C and resistors R, wherein a cathode of the diode D is connected to a source of the field effect transistor Q, an anode of the diode D is connected to an emitter of the triode Q, one pole of the capacitor C and one end of the resistor R, respectively, a base of the triode Q, the other pole of the capacitor C and the other end of the resistor R are connected to one end of the resistor R, the other end of the resistor R is grounded GND, a collector of the triode Q is connected to a cathode of the diode D, an anode of the diode D is connected to one end of the resistor R, the other end of the resistor R is connected to a base of the triode Q, one end of the resistor R and one pole of the capacitor C, respectively, an emitter of the triode Q, the other end of the resistor R and the other pole of the capacitor C are connected to a linear voltage reduction module in the BMS management system, the linear voltage reduction module supplies power to the charging wake-up circuit through VBAT, a collector of the triode Q24 is connected with one end of the resistor R92, the other end of the resistor R92 is connected with the anode of the diode D15, and the cathode of the diode D15 is connected with the single chip microcomputer and used for sending a charging wake-up signal to the single chip microcomputer.
Further preferably, the wake-up discharge circuit includes diodes D9, D14, D19, D20 and D21, a transistor Q23, a transistor Q25, resistors R25, R100 and R101, wherein the anode of the diode D25 is connected to the source of the transistor Q25, the cathode of the diode D25 is connected to one end of the resistor R25, the other end of the resistor R25 is connected to one end of the resistor R100, the other end of the resistor R100 is connected to the cathode of the diode D25 and the gate of the transistor Q25, the anode of the diode D25 and the source of the transistor Q25 are connected to ground GND, the drain of the transistor Q25 is connected to the cathode of the diode D25, one end of the resistor R25 and one end of the resistor R25, the anode of the diode D25 is connected to one end of the resistor R36101, the cathode of the diode R25 is connected to the anode of the diode D25, the gate of the resistor R25 and the gate of the transistor R25 are connected to ground GND, the drain electrode of the triode Q23 is connected with the anode of the diode D14, the cathode of the diode D14 is connected with the single chip microcomputer and used for sending a discharging awakening signal to the single chip microcomputer, the source electrode of the triode Q23, the other end of the resistor R97 and the other end of the resistor R101 are connected with a linear voltage reduction module in the BMS management system, and the linear voltage reduction module supplies power to the discharging awakening circuit through VBAT.
Further preferably, the collector of the transistor Q24 is further connected to the single chip for sending a charging detection signal to the single chip.
Further preferably, the anode of the diode D9 is also connected to the single chip for sending a discharge detection signal to the single chip.
The invention has the beneficial effects that:
the pure hardware type wake-up circuit comprising the charging wake-up circuit and the discharging wake-up circuit is adopted to intelligently wake up the battery, signal line control is not required to be additionally added, portability is high, cost is low, and the problem of ignition during charging of the battery can be effectively solved.
Drawings
Fig. 1 is a circuit diagram of the present invention.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings and examples.
As shown in fig. 1: the embodiment is an intelligent wake-up circuit of a BMS management system, which comprises a charging wake-up circuit, a discharging wake-up circuit, a resistor R3, field-effect transistors Q3 and Q5, wherein the anode P + of an external power supply or a load is connected with a connecting terminal J6 of the anode B + of a power supply of a lithium battery through the connecting terminal J6, two connecting terminals J6 are connected through a fuse to form a connecting line, the cathode B-of the battery of the lithium battery is connected with one end of the resistor R3 through a connecting terminal J6, the other end of the resistor R3 is connected with the source of a field-effect transistor Q3, the drain of the field-effect transistor Q3 is connected with the drain of the field-effect transistor Q5, the source of the field-effect transistor Q5 is connected with the cathode P-of the external power supply or the load through a connecting terminal J4, and the gates of the field-effect transistor Q3 and the field-effect transistor Q5 are both connected with a single chip microcomputer drive control circuit; the charging wake-up circuit and the discharging wake-up circuit are arranged between the field effect transistor Q5 and the wiring terminal J4 in parallel and are connected with the source electrode of the field effect transistor Q5, and the charging wake-up circuit and the discharging wake-up circuit are connected with the single chip microcomputer and are used for sending charging wake-up signals and discharging wake-up signals to the single chip microcomputer and controlling the field effect transistors Q3 and Q5 to be conducted through the single chip microcomputer driving control circuit so as to establish a circulation loop.
The charging wake-up circuit comprises diodes D, D and D, triodes Q and Q, capacitors C and C, resistors R, R and R, wherein the cathode of the diode D is connected with the source electrode of the field effect transistor Q, the anode of the diode D is respectively connected with the emitting electrode of the triode Q, one electrode of the capacitor C and one end of the resistor R, the base electrode of the triode Q, the other electrode of the capacitor C and the other end of the resistor R are respectively connected with one end of the resistor R, the other end of the resistor R is grounded GND, the collector electrode of the triode Q is connected with the cathode of the diode D, the anode of the diode D is connected with one end of the resistor R, the other end of the resistor R is respectively connected with the base electrode of the triode Q, one end of the resistor R and one electrode of the capacitor C, the emitting electrode of the triode Q, the other end of the resistor R and the other electrode of the capacitor C are respectively connected with a linear voltage reduction module in the BMS management system, the linear voltage reduction module supplies power to the charging wake-up circuit through VBAT, a collector of the triode Q24 is connected with one end of the resistor R92, the other end of the resistor R92 is connected with the anode of the diode D15, and the cathode of the diode D15 is connected with the single chip microcomputer and used for sending a charging wake-up signal to the single chip microcomputer.
The discharging wake-up circuit comprises diodes D9, a triode Q9, a Q9, resistors R9, R100, R101, wherein the anode of the diode D9 is connected with the source of the field effect transistor Q9, the cathode of the diode D9 is connected with one end of the resistor R9, the other end of the resistor R9 is connected with one end of the resistor R100, the other end of the resistor R100 is respectively connected with the cathode of the diode D9 and the gate of the transistor Q9, the anode of the diode D9 and the source of the transistor Q9 are connected with GND, the drain of the transistor Q9 is respectively connected with the cathode of the diode D9, one end of the resistor R9 and one end of the resistor R9, the anode of the diode D9 is connected with one end of the resistor R36101, the cathode of the diode D9 is connected with the anode of the diode D9, the drain of the diode D9 and the drain of the transistor Q9 are connected with GND, the drain of the diode D9, the drain of the transistor R9 and the drain of the transistor R9 are connected with GND, the drain of the transistor 9 and the transistor R9, the drain of the transistor R9 are connected with GND, and the transistor 9, the drain of the transistor R9, and the drain of the transistor R9 are connected with the drain of the transistor. The negative electrode of the diode D14 is connected with the single chip microcomputer and used for sending a discharging awakening signal to the single chip microcomputer, the source electrode of the triode Q23, the other end of the resistor R97 and the other end of the resistor R101 are connected with a linear voltage reduction module in the BMS management system, and the linear voltage reduction module supplies power to the discharging awakening circuit through VBAT.
The collector of the triode Q24 is also connected with the singlechip and used for sending a charging detection signal CHG _ DEC to the singlechip.
The anode of the diode D9 is also connected with the singlechip and used for sending a discharge detection signal LOAD _ DEC to the singlechip.
And (3) charging and awakening:
after the BMS management system is dormant, the field effect tubes Q3 and Q5 are disconnected, when a charger is plugged in for charging, the voltage between the battery cathode B-of the battery and the cathode P-of an external power supply is equal to the battery voltage, the field effect tubes Q16 and Q24 are conducted at the moment, the linear voltage reduction module outputs a WAKE _ UP WAKE-UP signal to the single chip microcomputer through the field effect tube Q24 through VBAT, and the single chip microcomputer of the single chip microcomputer drives a control circuit to control the field effect tubes Q3 and Q5 to be conducted so as to establish a circulation loop, so that the external power supply can charge the battery.
Discharging and awakening:
after the BMS management system is dormant, the field effect transistors Q3 and Q5 are disconnected, when a load is connected, the voltage between the battery cathode B-of the battery and the load cathode P-of the battery is equal to the battery voltage, the field effect transistor Q25 is conducted at the moment, the cathode voltage of the diode D9 is pulled low, the grid of the field effect transistor Q23 is lowered to be low voltage, so that the field effect transistor Q23 is conducted, the linear voltage reduction module outputs a WAKE _ UP awakening signal to the single chip microcomputer through the field effect transistor Q23 through VBAT, the single chip microcomputer drive control circuit of the single chip microcomputer controls the conduction of the field effect transistors Q3 and Q5 to establish a circulation loop, and the battery can supply power for the load.
The above description is only a preferred embodiment of the present patent, and it should be noted that, for those skilled in the art, several modifications and decorations can be made without departing from the inventive concept, and these modifications and decorations should also be regarded as the protection scope of the present patent.
Claims (5)
1. The utility model provides a BMS management system intelligence wake-up circuit, includes charge wake-up circuit, the wake-up circuit that discharges, resistance R3 and field effect transistor Q3, Q5, its characterized in that: the positive pole P + of an external power supply or a load is connected with a connecting terminal J6 of a positive pole B + of a power supply of a lithium battery through a connecting terminal J6, a battery negative pole B-of the lithium battery is connected with one end of a resistor R3 through a connecting terminal J6, the other end of the resistor R3 is connected with a source electrode of a field-effect tube Q3, a drain electrode of the field-effect tube Q3 is connected with a drain electrode of the field-effect tube Q5, the source electrode of the field-effect tube Q5 is connected with the negative pole P-of the external power supply or the load through a connecting terminal J4, and grid electrodes of the field-effect tube Q3 and a field-effect tube Q5 are both connected with a singlechip drive control circuit; the charging wake-up circuit and the discharging wake-up circuit are arranged between the field effect transistor Q5 and the wiring terminal J4 in parallel and are connected with the source electrode of the field effect transistor Q5, and the charging wake-up circuit and the discharging wake-up circuit are connected with the single chip microcomputer and are used for sending charging wake-up signals and discharging wake-up signals to the single chip microcomputer and controlling the conduction of the field effect transistors Q3 and Q5 through the single chip microcomputer driving control circuit so as to establish a circulation loop.
2. The intelligent wake-up circuit for a BMS management system according to claim 1, wherein the charging wake-up circuit comprises diodes D15, D16, D17, transistors Q16, Q24, capacitors C9, C10 and resistors R10, the cathode of the diode D10 is connected to the source of the fet Q10, the anode of the diode D10 is connected to the emitter of the transistor Q10, one pole of the capacitor C10 and one end of the resistor R10, the base of the transistor Q10, the other pole of the capacitor C10 and the other end of the resistor R10 are connected to one end of the resistor R10, the other end of the resistor R10 is connected to GND, the collector of the transistor Q10 is connected to the cathode of the diode D10, the anode of the diode D10 is connected to one end of the resistor R10, the other end of the resistor R10 is connected to the base of the transistor Q10 and one end of the resistor R10, an emitting electrode of the triode Q24, the other end of the resistor R93 and the other electrode of the capacitor C10 are connected with a linear voltage reduction module in the BMS management system, the linear voltage reduction module supplies power to the charging wake-up circuit through VBAT, a collecting electrode of the triode Q24 is connected with one end of the resistor R92, the other end of the resistor R92 is connected with an anode of the diode D15, and a cathode of the diode D15 is connected with the single chip microcomputer and used for sending a charging wake-up signal to the single chip microcomputer.
3. The BMS management system intelligent wake-up circuit according to claim 1, wherein the discharging wake-up circuit comprises diodes D9, D14, D19, D20, D21, diodes Q23, Q25 and resistors R91, R96, R97, R99, R100, R101, the anode of the diode D19 is connected to the source of the FET Q5, the cathode of the diode D19 is connected to one end of the resistor R96, the other end of the resistor R96 is connected to one end of the resistor R100, the other end of the resistor R100 is connected to the cathode of the diode D21 and the gate of the transistor Q25, the anode of the diode D21 and the source of the transistor Q21 are connected to ground GND, the drain of the transistor Q21 is connected to the cathode of the diode D21, one end of the resistor R21 and one end of the resistor R21, the anode of the diode D21 is connected to one end of the resistor R36101, and the anode of the resistor R21 is connected to the diode D21, the negative electrode of the diode D20 is connected with one end of the resistor R91 and the grid of the triode Q23, the other end of the resistor R91 is grounded GND, the drain electrode of the triode Q23 is connected with the positive electrode of the diode D14, the negative electrode of the diode D14 is connected with the single chip microcomputer and used for sending a discharging wake-up signal to the single chip microcomputer, the source electrode of the triode Q23, the other end of the resistor R97 and the other end of the resistor R101 are connected with a linear voltage reduction module in the BMS management system, and the linear voltage reduction module supplies power to the discharging wake-up circuit through VBAT.
4. The intelligent wake-up circuit for BMS management system according to claim 2, wherein the collector of said transistor Q24 is further connected to a single chip for sending a charging detection signal to the single chip.
5. The intelligent wake-up circuit for BMS management system according to claim 3, wherein the anode of the diode D9 is also connected to the single chip for sending a discharge detection signal to the single chip.
Priority Applications (1)
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CN202111384422.XA CN114243812A (en) | 2021-11-22 | 2021-11-22 | BMS management system intelligence awakens circuit up |
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CN202111384422.XA CN114243812A (en) | 2021-11-22 | 2021-11-22 | BMS management system intelligence awakens circuit up |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117148908A (en) * | 2023-10-25 | 2023-12-01 | 绿进新能源科技(常熟)有限公司 | BMS-based high-low side charging awakening and complete machine low-power-consumption circuit |
CN117239882A (en) * | 2023-11-10 | 2023-12-15 | 深圳市优贝特科技有限公司 | Power saving and activating method and power saving and activating circuit |
-
2021
- 2021-11-22 CN CN202111384422.XA patent/CN114243812A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117148908A (en) * | 2023-10-25 | 2023-12-01 | 绿进新能源科技(常熟)有限公司 | BMS-based high-low side charging awakening and complete machine low-power-consumption circuit |
CN117148908B (en) * | 2023-10-25 | 2024-01-26 | 绿进新能源科技(常熟)有限公司 | BMS-based high-low side charging awakening and complete machine low-power-consumption circuit |
CN117239882A (en) * | 2023-11-10 | 2023-12-15 | 深圳市优贝特科技有限公司 | Power saving and activating method and power saving and activating circuit |
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