CN114239448A - System and method for accelerating deployment of MMU mapping table - Google Patents

System and method for accelerating deployment of MMU mapping table Download PDF

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CN114239448A
CN114239448A CN202111508291.1A CN202111508291A CN114239448A CN 114239448 A CN114239448 A CN 114239448A CN 202111508291 A CN202111508291 A CN 202111508291A CN 114239448 A CN114239448 A CN 114239448A
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mapping table
mmu
mmu mapping
soc
address
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卫国荣
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Shanghai Li Ke Semiconductor Technology Co ltd
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Abstract

The invention provides a system and a method for accelerating deployment of an MMU mapping table. The system comprises an MMU mapping table generating device and a verification program packaging device which run on a verification program compiling server, and an MMU mapping table deploying device which runs on a target SOC; the MMU mapping table generating device reads, analyzes and checks the configuration file of the MMU mapping table, and generates the MMU mapping table matched with the target SOC according to the configuration file of the MMU mapping table; the verifying program packaging device analyzes the original verifying program generated by compiling, acquires an MMU mapping table address specified by the verifying program and the maximum size information of the MMU mapping table, checks the validity of the size of the target SOC-adapted MMU mapping table, and combines and packages the generated SOC-adapted MMU mapping table and the verifying program into a new verifying program containing the MMU mapping table; and the MMU mapping table deployment device analyzes the MMU mapping table adapted to the target SOC, and completes the deployment of the MMU mapping table on the target SOC.

Description

System and method for accelerating deployment of MMU mapping table
Technical Field
The invention relates to the field of verification test of SOC chips, in particular to a system and a method for accelerating MMU mapping table deployment.
Background
At present, the verification and test work in the SOC chip design stage is performed in a large part in the previous silicon stage, i.e., before the chip is returned, and a large amount of verification work is performed by a verification program (software).
The main verification platforms at this stage are an EDA simulation tool, an Emulator hardware simulation platform and the like, and the running speed of the main verification platform is very slow compared with a real chip; the powerful RichOS is too long to meet the requirement of authentication because of its long boot time, so that a large number of authentication procedures are bare metal, which results in that many of the functions provided by RichOS cannot be used directly, including the deployment of the memory management unit and the MMU mapping table associated therewith.
If the software verification program does not enable the MMU, the SOC cache cannot be utilized to accelerate the simulation, the verification time is very long, and a plurality of C library functions cannot be used, so that the verification work cannot be carried out; meanwhile, since the labor division of the validation personnel is different, not every validation personnel is familiar with the MMU hardware unit of a specific SOC, which causes difficulty when software validation personnel who are not familiar with the MMU hardware module modify the MMU address mapping code, easily causes the problem of mis-configuring the MMU, and causes that validation cannot be performed, or causes a mis-validation result due to the MMU configuration error.
Disclosure of Invention
The invention provides a system and a method for accelerating the deployment of an MMU mapping table, so that SOC module verifiers can deploy the MMU mapping table correctly without needing to know the details of any MMU hardware unit and writing any MMU mapping table creating code.
The technical problem to be solved by the invention is realized by the following technical scheme:
the invention provides a system for accelerating MMU mapping table deployment, which comprises an MMU mapping table generating device and a verification program packaging device which operate on a verification program compiling server, and an MMU mapping table deployment device which operates on a target SOC; the MMU mapping table generating device reads, analyzes and checks the configuration file of the MMU mapping table, and generates the MMU mapping table matched with the target SOC according to the configuration file of the MMU mapping table; the verifying program packaging device analyzes the original verifying program generated by compiling, acquires an MMU mapping table address specified by the verifying program and the maximum size information of the MMU mapping table, checks the validity of the size of the target SOC-adapted MMU mapping table, and combines and packages the generated SOC-adapted MMU mapping table and the verifying program into a new verifying program containing the MMU mapping table; and the MMU mapping table deployment device analyzes the MMU mapping table adapted to the target SOC, and completes the deployment of the MMU mapping table on the target SOC.
Preferably, the content of the MMU mapping table configuration file includes a target SOC processor type, a mappable address range supported by the target SOC, an MMU mapping table base address of the target SOC, and address mapping information; the address mapping information comprises a physical address, a virtual address, a mapping page size, a mapping address range and a mapping address attribute.
Preferably, the MMU mapping table adapted to the target SOC generated by the MMU mapping table generating device is in a binary format, and can be directly used in the target SOC without any modification; the target SOC-adapted MMU mapping table includes one or more levels of page tables, and a page table entry corresponding to each level of page table points to a lower level page table base address/non-last level of page table in multi-level mapping, or includes translation information from a virtual address to a physical address and a corresponding translated address attribute, i.e. last level of page table.
Preferably, the validator packetizing means checks if the SOC adapted MMU mapping table size exceeds the validator allowed mapping table maximum size.
Preferably, the MMU mapping table deploying device configures an MMU-related system register according to the SOC-adapted MMU mapping table, so as to enable the MMU hardware module on the target SOC, and prepare for the verification program to continue the subsequent module verification work.
A method for accelerating deployment of an MMU mapping table comprises the following overall processes:
step S101, according to the requirement of the current verification program, a verifier modifies or creates an MMU mapping table configuration file as an input file of an MMU mapping table generation device;
step S102, the MMU mapping table generating device analyzes the content of the MMU mapping table configuration file according to the MMU mapping table configuration file provided in step S101, and generates an MMU mapping table adapted to the target SOC;
step S103, the verifying program packaging device packages the pre-compiled verifying program and the MMU mapping table which is generated in the step S102 and is adaptive to the SOC into a new verifying program containing the MMU mapping table according to a specific format; after the target SOC is started, running the new verification program containing the MMU mapping table generated in step S103, where the verification program contains the MMU mapping table deploying device;
step S104, the verification program calls the method provided by the MMU mapping table deployment device to complete the deployment of the MMU mapping table; the main function is to extract the MMU mapping table for SOC adaptation generated in step S102, configure the MMU-related hardware register, and enable the MMU hardware module, where the MMU mapping table for SOC points to the MMU mapping table for SOC adaptation generated in step S102.
Preferably, the step S102 includes the steps of:
step 1, an MMU mapping table generating device reads an MMU mapping table configuration file provided by a user and modified;
step 2, checking validity of the configuration file of the MMU mapping table, including: whether the processor type specified by the MMU mapping table configuration file supports; whether the SOC address range specified by the MMU mapping table configuration file is legal or not is matched with the address range supported by the processor type specified by the MMU mapping table configuration file; whether the mapping page size specified by the MMU mapping table configuration file is correct or not is matched with the mapping page size supported by the processor type specified by the MMU mapping table configuration file; the mapping relation specified by the configuration file of the MMU mapping table is legal, the physical address and the virtual address are aligned with the size of the mapping page specified by the configuration file of the MMU mapping table, the mapping size must be integral multiple of the size of the mapping page specified by the configuration file of the MMU mapping table, and the address must be in the SOC address range specified by the configuration file of the MMU mapping table; the mapping attribute is supported by the processor type specified by the MMU mapping table configuration file;
step 3, if the MMU mapping table configuration file specifies a target SOC page table base address, using the address as an MMU mapping table base address for generating SOC adaptation, otherwise, the MMU mapping table generating device dynamically acquires the MMU mapping table base address from the verification program;
step 4, reading the address mapping relation specified by the MMU mapping table configuration file one by one, and creating an MMU mapping entry according to an MMU mapping entry format supported by the processor type specified by the MMU mapping table configuration file; and after all the mapping entries are created, generating an MMU mapping table adapted by the SOC.
Preferably, the step S103 includes the steps of:
step 1, reading the verification program, and acquiring a mapping table base address of an MMU (memory management unit) of the verification program, wherein if the acquisition fails, the verification program format is wrong, or the verification program directly exits without starting the MMU;
step 2, reading the MMU mapping table which is generated by the MMU mapping table generating device and is in SOC adaptation before, acquiring a base address corresponding to the mapping table, and if the base address is inconsistent with the MMU mapping table base address provided by the verification program acquired in step 1, modifying the MMU mapping table base address of the verification program to be the base address corresponding to the MMU mapping table generated by the MMU mapping table generating device;
and 3, packing the verification program and the MMU mapping table generated by the MMU mapping table generating device according to the specified format to be a new verification program containing the MMU mapping table.
Preferably, the step S104 includes the steps of:
step S501, after the SOC is started, the verification program containing the MMU mapping table runs to the MMU mapping table deployment stage, and the MMU mapping table deployment device firstly obtains the MMU mapping table base address specified by the running verification program;
wherein the MMU mapping table base address is specified by the validator packaging apparatus when the validator comprising the MMU mapping table is launched;
step S502, if the MMU mapping table base address is not consistent with the initial address of the verification program containing the MMU mapping table + the MMU mapping table offset address, copying the MMU mapping table with SOC adaptation generated by the MMU mapping table generating device in the verification program containing the MMU mapping table to the MMU mapping table base address specified by the verification program containing the MMU mapping table; it should be noted that, unless otherwise required, a mapping table base address is specified in the MMU mapping table configuration file, and this step is not performed, and the two addresses are consistent in principle, thereby reducing the process of copying the memory and further speeding up the deployment of the MMU mapping table;
step S503, configuring a register related to the MMU hardware module, wherein the MMU mapping table points to the MMU mapping table of SOC adaptation generated by the MMU mapping table generating device; because the MMU mapping table for SOC adaptation is already created before, the MMU mapping table deploying device does not need to dynamically create the MMU mapping table during running, but only configures the MMU hardware register to point to the MMU mapping table for SOC adaptation generated by the MMU mapping table generating device, which is packed into the verification program containing the MMU mapping table by the verification program packing device, which saves a large amount of MMU mapping table deploying time and further speeds up the running of the verification program;
step S504, dispose MMU hardware module register, enable MMU, give back CPU operation right to the verification program containing MMU mapping table, continue the follow-up verification work.
The invention has the beneficial effects that: the mapping table generating device completes the generation of the MMU mapping table, and the operation time configuration is converted into the compiling time configuration, so that a large amount of operation time for creating the MMU mapping table can be saved, and the simulation operation speed is accelerated. The mapping table configuration file describes all information mapped by the MMU in a text mode, shields details of the hardware bottom layer of the MMU, and is very simple to use. SOC verification testers do not need to write any line of codes, meanwhile, the probability of configuration errors of the MMU mapping table is greatly reduced, and the simulation verification process is accelerated.
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FIG. 1 is a flowchart of a method of accelerating MMU mapping table deployment of the present invention versus a flowchart of a method of conventional MMU mapping table deployment;
FIG. 2 is a schematic diagram of an MMU mapping table configuration file involved in the method for accelerating MMU mapping table deployment according to the present invention;
FIG. 3 is a flowchart of the operation of the apparatus for generating the mapping table of the subordinate MMU of the system for accelerating the deployment of the mapping table of the MMU of the present invention;
FIG. 4 is a flowchart of the system subordinate validator packing apparatus for accelerating MMU mapping table deployment of the present invention;
FIG. 5 is a flowchart of the apparatus for deploying the subordinate MMU mapping tables of the system for accelerating the deployment of the MMU mapping tables according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
FIG. 1 is a flowchart of a method for accelerating the deployment of an MMU mapping table according to the present embodiment and a flowchart of a method for accelerating the deployment of an MMU mapping table according to the prior art. The flow of the method for accelerating the deployment of the MMU mapping table shown in the right half of fig. 1 is as follows:
step S101, according to the requirement of the current verification program, a verifier modifies or creates an MMU mapping table configuration file as an input file of an MMU mapping table generation device; the main configuration item is mapping configuration information from a physical address to a virtual address.
Step S102, the MMU mapping table generating device parses the content of the MMU mapping table configuration file provided in step S101, and generates an MMU mapping table adapted to the target SOC.
And step S103, the verifying program packaging device packages the pre-compiled verifying program and the MMU mapping table which is generated in the step S102 and is adaptive to the SOC into a new verifying program containing the MMU mapping table according to a specific format.
After the target SOC is started, the new verification program containing the MMU mapping table generated in step S103 is executed, and the verification program contains the MMU mapping table deploying device.
Step S104, the verification program calls the method provided by the MMU mapping table deployment device to complete the deployment of the MMU mapping table; the main function is to extract the MMU mapping table for SOC adaptation generated in step S102, configure the MMU-related hardware register, and enable the MMU hardware module, where the MMU mapping table for SOC points to the MMU mapping table for SOC adaptation generated in step S102.
Compared with the conventional MMU mapping table deployment method on the left side of FIG. 1, the creation of the MMU mapping table is no longer created in the SOC running process, but is completed by the MMU mapping table generating device in the compiling server in the process of compiling the verification program, so that for the software program running on the simulation platform, a large amount of MMU mapping table creation time can be saved;
meanwhile, compared with the conventional MMU mapping table deployment method on the left side of FIG. 1, the creation process of the MMU mapping table is not realized through software codes any more, but through a simple configuration file, details of a specific MMU hardware module are shielded, an interface is more friendly for software verification personnel, the MMU mapping table can be flexibly and simply configured according to own requirements, and the probability of errors in creating the MMU mapping table through the codes is reduced.
In order to more clearly illustrate the implementation process of the present invention, a preferred embodiment of the present invention is given below with reference to fig. 2 to 5, and the technical details of the present invention are further given in conjunction with the description of the embodiment.
The core idea of the method provided by the embodiment of the invention is that the MMU mapping table deployment process is changed from the target SOC running creation to the verification program compiling creation in advance at the compiling server, and compared with the target SOC running creation, a large amount of simulation time can be saved. Meanwhile, for a chip verifier, the MMU mapping table is built and deployed in a way of writing codes instead of a way of configuring files through a textual MMU mapping table, so that details of any MMU hardware do not need to be known, the MMU mapping codes do not need to be written, the MMU mapping can be completed only through simple configuration parameters, the deployment is very simple, and MMU mapping errors caused by writing the mapping codes can be greatly reduced.
The following is a detailed description of the modification/creation of the MMU mapping table configuration file, the generation of the target SOC-adapted MMU mapping table according to the mapping table configuration file, the packaging of the verification program, the SOC-adapted MMU mapping table generated by the MMU mapping table generation device, and the mapping table deployment device, respectively.
FIG. 2 is a schematic diagram of an MMU mapping table configuration file involved in the method for accelerating MMU mapping table deployment according to the present invention.
The processor type: since the MMU mapping table format is strongly dependent on the specific processor type, the MMU mapping table generating means has to know exactly what processor to create the MMU mapping table.
SOC address range: the configuration item is a redundant item and is mainly used for checking whether the address mapping relation configuration in the MMU mapping table configuration file is wrong or not and whether the address mapping relation configuration exceeds an address range supported by the SOC or not.
Mapping table base address: an optional item, if specified, the base address of the target SOC adapted MMU mapping table generated by the MMU mapping table generating means uses the specified address, otherwise the MMU mapping table generating means dynamically obtains the base address of the MMU mapping table from the validation program.
Mapping page size: and the redundancy design is adopted, the default page table size is adopted, and when the address mapping relation does not specify the size of the address-changed mapping page, the changed value is used as the size of the mapping page.
The address mapping relation is as follows: the main configuration contents comprise physical address, virtual address, mapping page size, mapping address range and mapping address attribute
Generally, the configuration file has a basic configuration, a chip software verifier only needs to make appropriate modifications according to the specific verification content, and a plurality of configuration items, such as processor type, page table size, mapping attribute, and the like, only provide a few fixed options, and the problem of configuration errors is basically avoided.
FIG. 3 is a flowchart of the apparatus for generating the mapping table of the subordinate MMU of the system for accelerating the deployment of the mapping table of the MMU of the present invention. The process of generating the MMU mapping table is as follows:
step 1, the MMU mapping table generating device reads the MMU mapping table configuration file provided and modified by the user.
Step 2, checking validity of the configuration file of the MMU mapping table, including:
the MMU mapping table configures whether the processor type specified by the file supports.
And whether the SOC address range specified by the MMU mapping table configuration file is legal or not is matched with the address range supported by the processor type specified by the MMU mapping table configuration file.
Whether the mapping page size specified by the MMU mapping table configuration file is correct or not is matched with the mapping page size supported by the processor type specified by the MMU mapping table configuration file.
The mapping relation specified by the MMU mapping table configuration file is legal, the physical address and the virtual address are aligned with the mapping page size specified by the MMU mapping table configuration file, the mapping size is required to be integral multiple of the mapping page size specified by the MMU mapping table configuration file, and the address is required to be within the SOC address range specified by the MMU mapping table configuration file.
The mapping attributes are those supported by the processor type specified by the MMU mapping table configuration file.
And 3, if the MMU mapping table configuration file specifies the base address of the target SOC page table, using the address as the base address of the MMU mapping table for generating SOC adaptation, otherwise, dynamically acquiring the base address of the MMU mapping table from the verification program by the MMU mapping table generating device.
Step 4, reading the address mapping relation specified by the MMU mapping table configuration file one by one, and creating an MMU mapping entry according to an MMU mapping entry format supported by the processor type specified by the MMU mapping table configuration file; and after all the mapping entries are created, generating an MMU mapping table adapted by the SOC.
FIG. 4 is a flowchart of the system subordinate validator packing apparatus for accelerating MMU mapping table deployment of the present invention. The verification procedure including the MMU mapping table comprises the following steps:
step 1, reading the verification program, and obtaining a mapping table base address of the MMU of the verification program, wherein if the obtaining fails, the verification program format is wrong, or the verification program directly exits without starting the MMU.
And 2, reading the MMU mapping table which is generated by the MMU mapping table generating device and is adaptive to the SOC, acquiring a base address corresponding to the mapping table, and modifying the MMU mapping table base address of the verification program to be the base address corresponding to the MMU mapping table generated by the MMU mapping table generating device if the base address is inconsistent with the MMU mapping table base address provided by the verification program acquired in the step 1.
And 3, packing the verification program and the MMU mapping table generated by the MMU mapping table generating device according to the specified format to be a new verification program containing the MMU mapping table.
FIG. 5 is a flowchart of the apparatus for deploying the subordinate MMU mapping tables of the system for accelerating the deployment of the MMU mapping tables according to the present invention. The process that the MMU mapping table deployment device completes the deployment of the MMU mapping table comprises the following steps:
step S501, after the SOC is started, the verification program including the MMU mapping table runs to an MMU mapping table deployment stage, and the MMU mapping table deployment apparatus first obtains an MMU mapping table base address specified by the running verification program.
Wherein the MMU mapping table base address is specified by the validator packaging apparatus when the validator that includes the MMU mapping table is launched.
Step S502, if the MMU mapping table base address is not consistent with the initial address of the verification program containing the MMU mapping table + the MMU mapping table offset address, copying the MMU mapping table with SOC adaptation generated by the MMU mapping table generating device in the verification program containing the MMU mapping table to the MMU mapping table base address specified by the verification program containing the MMU mapping table; it should be noted that, unless otherwise required, a mapping table base address is specified in the MMU mapping table configuration file, and this step is not performed, and the two addresses are in principle consistent, thereby reducing the process of copying the memory, and further speeding up the deployment of the MMU mapping table
Step S503, configuring a register related to the MMU hardware module, wherein the MMU mapping table points to the MMU mapping table of SOC adaptation generated by the MMU mapping table generating device; because the MMU mapping table for SOC adaptation is already created before, the MMU mapping table deploying device does not need to dynamically create the MMU mapping table during running, but only configures the MMU hardware register to point to the MMU mapping table for SOC adaptation generated by the MMU mapping table generating device, which is packed into the authentication program containing the MMU mapping table by the authentication program packing device, which saves a large amount of MMU mapping table deploying time and further speeds up running of the authentication program.
Step S504, dispose MMU hardware module register, enable MMU, give back CPU operation right to the verification program containing MMU mapping table, continue the follow-up verification work.

Claims (9)

1. A system for accelerating MMU mapping table deployment, comprising: the system comprises an MMU mapping table generating device and an authentication program packaging device which run on an authentication program compiling server, and an MMU mapping table deploying device which runs on a target SOC; the MMU mapping table generating device reads, analyzes and checks the configuration file of the MMU mapping table, and generates the MMU mapping table matched with the target SOC according to the configuration file of the MMU mapping table; the verifying program packaging device analyzes the original verifying program generated by compiling, acquires an MMU mapping table address specified by the verifying program and the maximum size information of the MMU mapping table, checks the validity of the size of the target SOC-adapted MMU mapping table, and combines and packages the generated SOC-adapted MMU mapping table and the verifying program into a new verifying program containing the MMU mapping table; and the MMU mapping table deployment device analyzes the MMU mapping table adapted to the target SOC, and completes the deployment of the MMU mapping table on the target SOC.
2. The system to accelerate MMU mapping table deployment of claim 1, wherein: the content of the MMU mapping table configuration file comprises a target SOC processor type, a mappable address range supported by the target SOC, an MMU mapping table base address of the target SOC and address mapping information; the address mapping information comprises a physical address, a virtual address, a mapping page size, a mapping address range and a mapping address attribute.
3. The system to accelerate MMU mapping table deployment of claim 1, wherein: the MMU mapping table which is generated by the MMU mapping table generating device and is adaptive to the target SOC is in a binary format, and can be directly used in the target SOC without any modification; the target SOC-adapted MMU mapping table includes one or more levels of page tables, and a page table entry corresponding to each level of page table points to a lower level page table base address/non-last level of page table in multi-level mapping, or includes translation information from a virtual address to a physical address and a corresponding translated address attribute, i.e. last level of page table.
4. The system to accelerate MMU mapping table deployment of claim 1, wherein: the validator packetizing means checks if the SOC adapted MMU mapping table size exceeds the validator allowed mapping table maximum size.
5. The system to accelerate MMU mapping table deployment of claim 1, wherein: and the MMU mapping table deployment device configures an MMU related system register according to the SOC-adapted MMU mapping table, enables the MMU hardware module on the target SOC, and prepares for the verification program to continue the subsequent module verification work.
6. The method for accelerating MMU mapping table deployment based on the system for accelerating MMU mapping table deployment of any claim 1-5, characterized in that the overall flow of the method is as follows:
step S101, according to the requirement of the current verification program, a verifier modifies or creates an MMU mapping table configuration file as an input file of an MMU mapping table generation device;
step S102, the MMU mapping table generating device analyzes the content of the MMU mapping table configuration file according to the MMU mapping table configuration file provided in step S101, and generates an MMU mapping table adapted to the target SOC;
step S103, the verifying program packaging device packages the pre-compiled verifying program and the MMU mapping table which is generated in the step S102 and is adaptive to the SOC into a new verifying program containing the MMU mapping table according to a specific format; after the target SOC is started, running the new verification program containing the MMU mapping table generated in step S103, where the verification program contains the MMU mapping table deploying device;
step S104, the verification program calls the method provided by the MMU mapping table deployment device to complete the deployment of the MMU mapping table; the main function is to extract the MMU mapping table for SOC adaptation generated in step S102, configure the MMU-related hardware register, and enable the MMU hardware module, where the MMU mapping table for SOC points to the MMU mapping table for SOC adaptation generated in step S102.
7. The method of accelerating MMU mapping table deployment of claim 6, wherein the step S102 comprises the steps of:
step 1, an MMU mapping table generating device reads an MMU mapping table configuration file provided by a user and modified;
step 2, checking validity of the configuration file of the MMU mapping table, including: whether the processor type specified by the MMU mapping table configuration file supports; whether the SOC address range specified by the MMU mapping table configuration file is legal or not is matched with the address range supported by the processor type specified by the MMU mapping table configuration file; whether the mapping page size specified by the MMU mapping table configuration file is correct or not is matched with the mapping page size supported by the processor type specified by the MMU mapping table configuration file; the mapping relation specified by the configuration file of the MMU mapping table is legal, the physical address and the virtual address are aligned with the size of the mapping page specified by the configuration file of the MMU mapping table, the mapping size must be integral multiple of the size of the mapping page specified by the configuration file of the MMU mapping table, and the address must be in the SOC address range specified by the configuration file of the MMU mapping table; the mapping attribute is supported by the processor type specified by the MMU mapping table configuration file;
step 3, if the MMU mapping table configuration file specifies a target SOC page table base address, using the address as an MMU mapping table base address for generating SOC adaptation, otherwise, the MMU mapping table generating device dynamically acquires the MMU mapping table base address from the verification program;
step 4, reading the address mapping relation specified by the MMU mapping table configuration file one by one, and creating an MMU mapping entry according to an MMU mapping entry format supported by the processor type specified by the MMU mapping table configuration file; and after all the mapping entries are created, generating an MMU mapping table adapted by the SOC.
8. The method of accelerating MMU mapping table deployment of claim 6, wherein the step S103 comprises the steps of:
step 1, reading the verification program, and acquiring a mapping table base address of an MMU (memory management unit) of the verification program, wherein if the acquisition fails, the verification program format is wrong, or the verification program directly exits without starting the MMU;
step 2, reading the MMU mapping table which is generated by the MMU mapping table generating device and is in SOC adaptation before, acquiring a base address corresponding to the mapping table, and if the base address is inconsistent with the MMU mapping table base address provided by the verification program acquired in step 1, modifying the MMU mapping table base address of the verification program to be the base address corresponding to the MMU mapping table generated by the MMU mapping table generating device;
and 3, packing the verification program and the MMU mapping table generated by the MMU mapping table generating device according to the specified format to be a new verification program containing the MMU mapping table.
9. The method of accelerating MMU mapping table deployment of claim 6, wherein the step S104 comprises the steps of:
step S501, after the SOC is started, the verification program containing the MMU mapping table runs to the MMU mapping table deployment stage, and the MMU mapping table deployment device firstly obtains the MMU mapping table base address specified by the running verification program;
wherein the MMU mapping table base address is specified by the validator packaging apparatus when the validator comprising the MMU mapping table is launched;
step S502, if the MMU mapping table base address is not consistent with the initial address of the verification program containing the MMU mapping table + the MMU mapping table offset address, copying the MMU mapping table with SOC adaptation generated by the MMU mapping table generating device in the verification program containing the MMU mapping table to the MMU mapping table base address specified by the verification program containing the MMU mapping table; it should be noted that, unless otherwise required, a mapping table base address is specified in the MMU mapping table configuration file, and this step is not performed, and the two addresses are consistent in principle, thereby reducing the process of copying the memory and further speeding up the deployment of the MMU mapping table;
step S503, configuring a register related to the MMU hardware module, wherein the MMU mapping table points to the MMU mapping table of SOC adaptation generated by the MMU mapping table generating device; because the MMU mapping table for SOC adaptation is already created before, the MMU mapping table deploying device does not need to dynamically create the MMU mapping table during running, but only configures the MMU hardware register to point to the MMU mapping table for SOC adaptation generated by the MMU mapping table generating device, which is packed into the verification program containing the MMU mapping table by the verification program packing device, which saves a large amount of MMU mapping table deploying time and further speeds up the running of the verification program;
step S504, dispose MMU hardware module register, enable MMU, give back CPU operation right to the verification program containing MMU mapping table, continue the follow-up verification work.
CN202111508291.1A 2021-12-10 2021-12-10 System and method for accelerating deployment of MMU mapping table Pending CN114239448A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114860627A (en) * 2022-07-06 2022-08-05 沐曦集成电路(上海)有限公司 Method for dynamically generating page table based on address information
CN115190102A (en) * 2022-07-22 2022-10-14 北京象帝先计算技术有限公司 Information broadcasting method and device, electronic unit, SOC and electronic equipment

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114860627A (en) * 2022-07-06 2022-08-05 沐曦集成电路(上海)有限公司 Method for dynamically generating page table based on address information
CN114860627B (en) * 2022-07-06 2022-09-30 沐曦集成电路(上海)有限公司 Method for dynamically generating page table based on address information
CN115190102A (en) * 2022-07-22 2022-10-14 北京象帝先计算技术有限公司 Information broadcasting method and device, electronic unit, SOC and electronic equipment
CN115190102B (en) * 2022-07-22 2024-04-16 北京象帝先计算技术有限公司 Information broadcasting method, information broadcasting device, electronic unit, SOC (system on chip) and electronic equipment

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