CN114237544A - Audio input method and device, electronic equipment and storage medium - Google Patents
Audio input method and device, electronic equipment and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
- G06F3/162—Interface to dedicated audio devices, e.g. audio drivers, interface to CODECs
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
Abstract
The disclosure provides an audio input method, an audio input device, electronic equipment and a storage medium, and relates to the field of artificial intelligence, in particular to a voice technology. The specific implementation scheme is as follows: receiving audio data sent by N audio input units in a multipath manner through a Field Programmable Gate Array (FPGA); wherein N is a natural number greater than 1; sending the received audio data to a universal serial bus physical layer chip USB-PHY through the FPGA in a single-path mode; the audio data it receives is input into the audio receiving unit through the USB-PHY. The embodiment of the application can conveniently expand the number of channels and meet the requirement of multi-channel recording; and no extra driver is needed, so that the compatibility is good and the operation is simple.
Description
Technical Field
The present disclosure relates to the field of artificial intelligence technologies, and further relates to a speech technology, and in particular, to an audio input method, apparatus, electronic device, and storage medium.
Background
With the popularization of intelligent voice technology, the requirement of simultaneous recording by multiple microphones is more and more extensive. The existing multi-channel recording implementation scheme generally adopts the following modes: 1) special chips such as XMOS are adopted; the scheme needs to additionally install a driver, so that the compatibility of an operating system is poor; 2) recording through a professional sound card; the scheme needs to purchase a professional sound card, the purchase price is high, and the operability is poor; 3) an audio peripheral of a Universal Serial Bus (USB) 1.1 interface is realized by adopting Micro Control Units (MCU) such as STM32 and the like; in the scheme, a common MCU is adopted, only audio peripheral equipment of UAC1.0(USB audio protocol) can be realized, at most 8-channel audio data are supported, and the number of channels is small.
Disclosure of Invention
The disclosure provides an audio input method, an audio input device, an electronic device and a storage medium.
In a first aspect, the present application provides an audio input method, the method comprising:
receiving audio data sent by N audio input units in a multipath manner through a Field Programmable Gate Array (FPGA); wherein N is a natural number greater than 1;
sending the received audio data to a universal serial bus physical layer chip USB-PHY through the FPGA in a single-path mode;
the audio data received by the USB-PHY is input into an audio receiving unit through the USB-PHY.
In a second aspect, the present application provides an audio input device, the device comprising: the device comprises a receiving module, a sending module and an input module; wherein the content of the first and second substances,
the receiving module is used for receiving the audio data sent by the N audio input units in a multipath manner through the FPGA; wherein N is a natural number greater than 1;
the transmitting module is used for transmitting the received audio data to the USB-PHY through the FPGA in a single-path mode;
the input module is used for inputting the audio data received by the input module into an audio receiving unit through the USB-PHY.
In a third aspect, an embodiment of the present application provides an electronic device, including:
one or more processors;
a memory for storing one or more programs,
when executed by the one or more processors, cause the one or more processors to implement the audio input method of any embodiment of the present application.
In a fourth aspect, the present application provides a storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the audio input method according to any embodiment of the present application.
In a fifth aspect, a computer program product is provided, which when executed by a computer device implements the audio input method of any of the embodiments of the present application.
According to the technology of the application, the problem that the operating system compatibility is poor due to the adoption of a special chip in the prior art is solved; the technical scheme provided by the application can conveniently expand the number of channels and meet the requirement of multi-channel recording; and no extra driver is needed, so that the compatibility is good and the operation is simple.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.
Drawings
The drawings are included to provide a better understanding of the present solution and are not to be construed as limiting the present disclosure. Wherein:
fig. 1 is a first flowchart of an audio input method provided by an embodiment of the present application;
FIG. 2 is a second flowchart of an audio input method provided by an embodiment of the present application;
FIG. 3 is a third flowchart of an audio input method provided by an embodiment of the present application;
FIG. 4 is a schematic structural diagram of an audio input system provided in an embodiment of the present application;
FIG. 5 is a schematic structural diagram of an audio input device according to an embodiment of the present application;
fig. 6 is a block diagram of an electronic device for implementing an audio input method according to an embodiment of the present application.
Detailed Description
Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of the embodiments of the disclosure are included to assist understanding, and which are to be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
Example one
Fig. 1 is a first flowchart of an audio input method provided in an embodiment of the present application, where the method may be performed by an audio input apparatus or an electronic device, where the apparatus or the electronic device may be implemented by software and/or hardware, and the apparatus or the electronic device may be integrated in any intelligent device with a network communication function. As shown in fig. 1, the audio input method may include the steps of:
s101, receiving audio data sent by N audio input units in a multi-path mode through an FPGA; wherein N is a natural number greater than 1.
In this step, the electronic device may receive, through a Field-Programmable Gate Array (FPGA for short), audio data sent by the N audio input units in a multi-path manner; wherein N is a natural number greater than 1. The audio input unit in the embodiment of the present application may include: an analog audio input unit and a digital audio input unit; the audio data sent by the analog audio input unit is analog audio data; the audio data sent by the digital audio input unit is digital audio data; the analog audio input unit may be an analog microphone; the digital audio input unit may be a digital microphone. Specifically, if the audio data sent by the N audio input units are digital audio data, the electronic device may receive the digital audio data sent by the N audio input units through any one of the N ADCs; and then, respectively taking the N digital audio data received by any ADC as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a multi-path 12S interface. Optionally, if the audio data sent by the N audio input units are analog audio data, the electronic device may further receive the analog audio data sent by the N audio input units through the N ADCs; the N ADCs are cascaded in a TDM mode; the N audio input units send analog audio data through respective corresponding audio transmission channels; then converting the analog audio data sent by the N audio input units into digital audio data; and then the N converted digital audio data are respectively used as audio data to be transmitted, and the audio data to be transmitted are sent to the FPGA through the multi-path 12S interface.
And S102, sending the received audio data to the USB-PHY through the FPGA in a single-path mode.
In this step, the electronic device may send the received audio data to a Universal Serial Bus physical layer (USB-PHY for short) chip via the FPGA in a single-channel manner. Specifically, the electronic device may send the audio data received by the electronic device to the first-in first-out FIFO unit through the FPGA; and then transmits the audio data it receives to the USB-PHY through the FIFO unit.
And S103, inputting the audio data received by the USB-PHY into an audio receiving unit through the USB-PHY.
In this step, the electronic device may input the audio data it receives into the audio receiving unit through the USB-PHY. Specifically, the USB-PHY may input audio data it receives into the audio receiving unit through the USB2.0 interface; preferably, the USB-PHY can support UAC2.0 protocol, is suitable for Windows operating system and Linux operating system above Windows7, has good compatibility, does not need to additionally install driver, and is simple to operate.
The audio input method provided by the embodiment of the application comprises the steps of firstly receiving audio data sent by N audio input units in a multi-path mode through an FPGA; then, sending the received audio data to the USB-PHY through the FPGA in a single-path mode; and then the audio data received by the USB-PHY is input into the audio receiving unit through the USB-PHY. That is to say, the application can realize the simultaneous input of multiple audio frequencies through the FPGA and the USB-PHY. In the existing audio input method, a special chip or a professional sound card is used for recording, or a common MCU is used. Because the hardware architecture of FPGA + USB-PHY is adopted, the front end utilizes the interface programmable capability of FPGA, so that 1-path to 32-path audio input is conveniently expanded, and the audio is sent into the USB-PHY after being combined by the FPGA; and the USB2.0 high-speed transmission interface and the UAC2.0 protocol are realized through the USB-PHY. The method and the device overcome the defect that in the prior art, the compatibility of an operating system is poor due to the adoption of a special chip; the technical scheme provided by the application can conveniently expand the number of channels and meet the requirement of multi-channel recording; in addition, additional installation of a drive is not needed, the compatibility is good, and the operation is simple; moreover, the technical scheme of the embodiment of the application is simple and convenient to implement, convenient to popularize and wide in application range.
Example two
Fig. 2 is a second flowchart of an audio input method provided by an embodiment of the present application. Further optimization and expansion are performed based on the technical scheme, and the method can be combined with the various optional embodiments. As shown in fig. 2, the audio input method may include the steps of:
s201, if the audio data sent by the N audio input units are digital audio data, receiving the digital audio data sent by the N audio input units through any one ADC of the N ADCs; the N ADCs are cascaded in a TDM mode; the N audio input units transmit digital audio data through respective corresponding TDM paths.
In this step, if the audio data sent by the N audio input units are digital audio data, the electronic device may receive the digital audio data sent by the N audio input units through any one ADC of the N analog-to-digital converters ADC; the N ADCs are cascaded in a TDM mode; the N audio input units transmit digital audio data through respective corresponding TDM paths. Specifically, the electronic device may receive digital audio data sent by the N audio input units through the any one ADC by a preset channel configuration; or, a corresponding TDM path may be configured for each piece of digital audio data, and the digital audio data sent by the N audio input units is received through the TDM path; the N audio input units transmit digital audio data through the corresponding TDM channels.
S202, the N digital audio data received by any ADC are respectively used as audio data to be transmitted, and the audio data to be transmitted are sent to the FPGA through the multi-channel 12S interface.
In this step, the electronic device may use the N digital audio data received by the any one ADC as the audio data to be transmitted, and send each audio data to be transmitted to the FPGA through the multiple 12S interfaces. Specifically, the electronic device can send each audio data to be transmitted to the FPGA through a preset channel configuration and a multi-path 12S interface; or, configuring a corresponding TDM channel for each audio data to be transmitted based on the multiple 12S interfaces, and then sending each audio data to be transmitted to the FPGA through the TDM channel.
And S203, sending the received audio data to the USB-PHY through the FPGA in a single-path mode.
In this step, the electronic device may send the audio data received by the electronic device to the USB-PHY through the FPGA in a single-channel manner. Specifically, an FIFO interface can be arranged between the FPGA and the USB-PHY, and the FPGA sends the audio data received by the FPGA to the USB-PHY through the FIFO interface in a one-way mode.
And S204, inputting the audio data received by the USB-PHY into an audio receiving unit through the USB-PHY.
In this step, the electronic device may input the audio data it receives into the audio receiving unit through the USB-PHY. Specifically, the USB-PHY may input audio data it receives into the audio receiving unit through the USB2.0 interface; preferably, the USB-PHY can support UAC2.0 protocol, is suitable for Windows operating system and Linux operating system above Windows7, has good compatibility, does not need to additionally install driver, and is simple to operate.
The audio input method provided by the embodiment of the application comprises the steps of firstly receiving audio data sent by N audio input units in a multi-path mode through an FPGA; then, sending the received audio data to the USB-PHY through the FPGA in a single-path mode; and then the audio data received by the USB-PHY is input into the audio receiving unit through the USB-PHY. That is to say, the application can realize the simultaneous input of multiple audio frequencies through the FPGA and the USB-PHY. In the existing audio input method, a special chip or a professional sound card is used for recording, or a common MCU is used. Because the hardware architecture of FPGA + USB-PHY is adopted, the front end utilizes the interface programmable capability of FPGA, so that 1-path to 32-path audio input is conveniently expanded, and the audio is sent into the USB-PHY after being combined by the FPGA; and the USB2.0 high-speed transmission interface and the UAC2.0 protocol are realized through the USB-PHY. The method and the device overcome the defect that in the prior art, the compatibility of an operating system is poor due to the adoption of a special chip; the technical scheme provided by the application can conveniently expand the number of channels and meet the requirement of multi-channel recording; in addition, additional installation of a drive is not needed, the compatibility is good, and the operation is simple; moreover, the technical scheme of the embodiment of the application is simple and convenient to implement, convenient to popularize and wide in application range.
EXAMPLE III
Fig. 3 is a third flow chart of an audio input method according to an embodiment of the present application. Further optimization and expansion are performed based on the technical scheme, and the method can be combined with the various optional embodiments. As shown in fig. 3, the audio input method may include the steps of:
s301, if the audio data sent by the N audio input units are analog audio data, receiving the analog audio data sent by the N audio input units through the N ADCs; the N ADCs are cascaded in a TDM mode; the N audio input units send analog audio data through the corresponding audio transmission channels.
In this step, if the audio data sent by the N audio input units are analog audio data, the analog audio data sent by the N audio input units are received through the N ADCs; the N ADCs are cascaded in a TDM mode; the N audio input units send analog audio data through the corresponding audio transmission channels. Specifically, the electronic device may receive analog audio data sent by the first microphone via the ADC 1; receiving the analog audio data sent by the second microphone through the ADC 2; …, respectively; receiving analog audio data sent by an Nth microphone through an ADC (analog to digital converter); wherein N is a natural number greater than 1.
S302, converting the analog audio data sent by the N audio input units into digital audio data.
In this step, the electronic device may convert the analog audio data transmitted by the N audio input units into digital audio data. Specifically, the electronic device may convert analog audio data sent by the first microphone into digital audio data via the ADC 1; converting the analog audio data sent by the second microphone into digital audio data by the ADC 2; …, respectively; the analog audio data transmitted by the nth microphone is converted into digital audio data by the ADC N.
And S303, respectively taking the converted N digital audio data as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a multi-path 12S interface.
In this step, the electronic device may use the converted N digital audio data as audio data to be transmitted, and send each audio data to be transmitted to the FPGA through the multiple 12S interfaces. Specifically, the electronic device can send each audio data to be transmitted to the FPGA through a preset channel configuration and a multi-path 12S interface; or, the electronic device may also configure a corresponding TDM channel for each to-be-transmitted audio data based on the multiple 12S interfaces, and then send each to-be-transmitted audio data to the FPGA through the TDM channel.
And S304, sending the received audio data to the USB-PHY through the FPGA in a single-path mode.
In this step, the electronic device may send the audio data received by the electronic device to the USB-PHY through the FPGA in a single-channel manner. Specifically, an FIFO interface can be arranged between the FPGA and the USB-PHY, and the FPGA sends the audio data received by the FPGA to the USB-PHY through the FIFO interface in a one-way mode.
And S305, inputting the audio data received by the USB-PHY into an audio receiving unit through the USB-PHY.
In this step, the electronic device may input the audio data it receives into the audio receiving unit through the USB-PHY. Specifically, the USB-PHY may input audio data it receives into the audio receiving unit through the USB2.0 interface; preferably, the USB-PHY can support UAC2.0 protocol, is suitable for Windows operating system and Linux operating system above Windows7, has good compatibility, does not need to additionally install driver, and is simple to operate.
Fig. 4 is a schematic structural diagram of an audio input system provided in an embodiment of the present application. As shown in fig. 4, the system may include: the device comprises an audio input unit, an FPGA, a USB-PHY and an audio receiving unit; the number of the audio input units can be N; n is a natural number greater than 1. The N audio input units may include: audio input unit 1, audio input unit 2, …, audio data unit N. Specifically, the N audio input units may be N microphones. The N audio input units can send the audio data sent by each audio input unit to the FPGA through the multi-path 12S interface; then the FPGA sends the received audio data to the USB-PHY through the FIFO interface; and finally, the USB-PHY inputs the audio data received by the USB-PHY into an audio receiving unit.
The audio input method provided by the embodiment of the application comprises the steps of firstly receiving audio data sent by N audio input units in a multi-path mode through an FPGA; then, sending the received audio data to the USB-PHY through the FPGA in a single-path mode; and then the audio data received by the USB-PHY is input into the audio receiving unit through the USB-PHY. That is to say, the application can realize the simultaneous input of multiple audio frequencies through the FPGA and the USB-PHY. In the existing audio input method, a special chip or a professional sound card is used for recording, or a common MCU is used. Because the hardware architecture of FPGA + USB-PHY is adopted, the front end utilizes the interface programmable capability of FPGA, so that 1-path to 32-path audio input is conveniently expanded, and the audio is sent into the USB-PHY after being combined by the FPGA; and the USB2.0 high-speed transmission interface and the UAC2.0 protocol are realized through the USB-PHY. The method and the device overcome the defect that in the prior art, the compatibility of an operating system is poor due to the adoption of a special chip; the technical scheme provided by the application can conveniently expand the number of channels and meet the requirement of multi-channel recording; in addition, additional installation of a drive is not needed, the compatibility is good, and the operation is simple; moreover, the technical scheme of the embodiment of the application is simple and convenient to implement, convenient to popularize and wide in application range.
Example four
Fig. 5 is a schematic structural diagram of an audio input device according to an embodiment of the present application. As shown in fig. 5, the apparatus 500 includes: a receiving module 501, a sending module 502 and an input module 503; wherein the content of the first and second substances,
the receiving module 501 is configured to receive, through the FPGA, audio data sent by the N audio input units in a multi-path manner; wherein N is a natural number greater than 1;
the sending module 502 is configured to send the received audio data to the USB-PHY through the FPGA in a single-channel manner;
the input module 503 is configured to input the received audio data into the audio receiving unit through the USB-PHY.
Further, the audio input unit includes: an analog audio input unit and a digital audio input unit; the audio data sent by the analog audio input unit is analog audio data; the audio data sent by the digital audio input unit is digital audio data; the analog audio input unit is an analog microphone; the digital audio input unit is a digital microphone.
Further, the receiving module 501 is specifically configured to receive, by using any one ADC of the N analog-to-digital converters ADC, the digital audio data sent by the N audio input units if the audio data sent by the N audio input units are digital audio data; the N ADCs are cascaded in a TDM mode; n audio input units send digital audio data through respective corresponding TDM paths; and respectively taking the N digital audio data received by any one ADC as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a multi-path 12S interface.
Further, the receiving module 501 is specifically configured to receive, by using the N ADCs, the analog audio data sent by the N audio input units if the audio data sent by the N audio input units are analog audio data; the N ADCs are cascaded in a TDM mode; the N audio input units send analog audio data through respective corresponding audio transmission channels; converting the analog audio data sent by the N audio input units into digital audio data; and respectively taking the N converted digital audio data as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a plurality of 12S interfaces.
Further, the receiving module 501 is specifically configured to send, through a preset channel configuration, each audio data to be transmitted to the FPGA through the multiple 12S interfaces; or configuring a corresponding TDM channel for each audio data to be transmitted based on the multiple 12S interfaces, and sending each audio data to be transmitted to the FPGA through the TDM channel.
Further, the sending module 502 is specifically configured to send the received audio data to a first-in first-out FIFO unit through the FPGA; and sending the audio data received by the FIFO unit to the USB-PHY.
The audio input device can execute the method provided by any embodiment of the application, and has corresponding functional modules and beneficial effects of the execution method. For technical details that are not described in detail in this embodiment, reference may be made to the audio input method provided in any embodiment of the present application.
In the technical scheme of the disclosure, the acquisition, storage, application and the like of the personal information of the related user all accord with the regulations of related laws and regulations, and do not violate the good customs of the public order.
EXAMPLE five
The present disclosure also provides an electronic device, a readable storage medium, and a computer program product according to embodiments of the present disclosure.
FIG. 6 illustrates a schematic block diagram of an example electronic device 600 that can be used to implement embodiments of the present disclosure. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the disclosure described and/or claimed herein.
As shown in fig. 6, the apparatus 600 includes a computing unit 601, which can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM)602 or a computer program loaded from a storage unit 608 into a Random Access Memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the device 600 can also be stored. The calculation unit 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input/output (I/O) interface 605 is also connected to bus 604.
A number of components in the device 600 are connected to the I/O interface 605, including: an input unit 606 such as a keyboard, a mouse, or the like; an output unit 607 such as various types of displays, speakers, and the like; a storage unit 608, such as a magnetic disk, optical disk, or the like; and a communication unit 609 such as a network card, modem, wireless communication transceiver, etc. The communication unit 609 allows the device 600 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
The computing unit 601 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The calculation unit 601 performs the respective methods and processes described above, such as an audio input method. For example, in some embodiments, the audio input method may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as storage unit 608. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 600 via the ROM 602 and/or the communication unit 609. When the computer program is loaded into the RAM 603 and executed by the computing unit 601, one or more steps of the audio input method described above may be performed. Alternatively, in other embodiments, the computing unit 601 may be configured to perform the audio input method by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), system on a chip (SOCs), Complex Programmable Logic Devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), Wide Area Networks (WANs), and the Internet.
The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server with a combined blockchain.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure may be executed in parallel, sequentially, or in different orders, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved, and the present disclosure is not limited herein.
The above detailed description should not be construed as limiting the scope of the disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present disclosure should be included in the scope of protection of the present disclosure.
Claims (15)
1. An audio input method, the method comprising:
receiving audio data sent by N audio input units in a multipath manner through a Field Programmable Gate Array (FPGA); wherein N is a natural number greater than 1;
sending the received audio data to a universal serial bus physical layer chip USB-PHY through the FPGA in a single-path mode;
the audio data received by the USB-PHY is input into an audio receiving unit through the USB-PHY.
2. The method of claim 1, wherein the audio input unit comprises: an analog audio input unit and a digital audio input unit; the audio data sent by the analog audio input unit is analog audio data; the audio data sent by the digital audio input unit is digital audio data; the analog audio input unit is an analog microphone; the digital audio input unit is a digital microphone.
3. The method of claim 2, wherein the receiving, by the FPGA, the audio data sent by the N audio input units in a multiplexed manner comprises:
if the audio data sent by the N audio input units are digital audio data, receiving the digital audio data sent by the N audio input units through any one ADC in the N analog-to-digital converters (ADC); the N ADCs are cascaded in a TDM mode; n audio input units send digital audio data through respective corresponding TDM paths;
and respectively taking the N digital audio data received by any one ADC as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a multi-path 12S interface.
4. The method of claim 2, wherein the receiving, by the FPGA, the audio data sent by the N audio input units in a multiplexed manner comprises:
if the audio data sent by the N audio input units are analog audio data, receiving the analog audio data sent by the N audio input units through the N ADCs; the N ADCs are cascaded in a TDM mode; the N audio input units send analog audio data through respective corresponding audio transmission channels;
converting the analog audio data sent by the N audio input units into digital audio data;
and respectively taking the N converted digital audio data as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a plurality of 12S interfaces.
5. The method according to claim 3 or 4, wherein the sending each audio data to be transmitted to the FPGA through a multi-path 12S interface comprises:
sending each audio data to be transmitted to the FPGA through the multi-channel 12S interface by preset channel configuration; or configuring a corresponding TDM channel for each audio data to be transmitted based on the multiple 12S interfaces, and sending each audio data to be transmitted to the FPGA through the TDM channel.
6. The method of claim 1, wherein the transmitting audio data received by the FPGA to the USB-PHY in a one-way manner comprises:
sending the received audio data to a first-in first-out (FIFO) unit through the FPGA; and sending the audio data received by the FIFO unit to the USB-PHY.
7. An audio input device, the device comprising: the device comprises a receiving module, a sending module and an input module; wherein the content of the first and second substances,
the receiving module is used for receiving the audio data sent by the N audio input units in a multipath manner through the field programmable gate array FPGA; wherein N is a natural number greater than 1;
the transmitting module is used for transmitting the received audio data to a universal serial bus physical layer chip USB-PHY in a single-path mode through the FPGA;
the input module is used for inputting the audio data received by the input module into an audio receiving unit through the USB-PHY.
8. The apparatus of claim 7, the audio input unit comprising: an analog audio input unit and a digital audio input unit; the audio data sent by the analog audio input unit is analog audio data; the audio data sent by the digital audio input unit is digital audio data; the analog audio input unit is an analog microphone; the digital audio input unit is a digital microphone.
9. The apparatus according to claim 8, wherein the receiving module is specifically configured to receive, by any one of the N analog-to-digital converters (ADCs), the digital audio data sent by the N audio input units if the audio data sent by the N audio input units are digital audio data; the N ADCs are cascaded in a TDM mode; n audio input units send digital audio data through respective corresponding TDM paths; and respectively taking the N digital audio data received by any one ADC as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a multi-path 12S interface.
10. The apparatus according to claim 8, wherein the receiving module is specifically configured to receive, through the N ADCs, the analog audio data sent by the N audio input units if the audio data sent by the N audio input units are analog audio data; the N ADCs are cascaded in a TDM mode; the N audio input units send analog audio data through respective corresponding audio transmission channels; converting the analog audio data sent by the N audio input units into digital audio data; and respectively taking the N converted digital audio data as audio data to be transmitted, and sending each audio data to be transmitted to the FPGA through a plurality of 12S interfaces.
11. The apparatus according to claim 9 or 10, wherein the receiving module is specifically configured to send, through a preset channel configuration, each audio data to be transmitted to the FPGA through the multiple 12S interfaces; or configuring a corresponding TDM channel for each audio data to be transmitted based on the multiple 12S interfaces, and sending each audio data to be transmitted to the FPGA through the TDM channel.
12. The apparatus according to claim 7, wherein the sending module is specifically configured to send the received audio data to a first-in first-out FIFO unit through the FPGA; and sending the audio data received by the FIFO unit to the USB-PHY.
13. An electronic device, comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.
14. A non-transitory computer readable storage medium having stored thereon computer instructions for causing the computer to perform the method of any one of claims 1-6.
15. A computer program product comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1-6.
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