CN114236869B - Display grating driving circuit, method and host equipment - Google Patents
Display grating driving circuit, method and host equipment Download PDFInfo
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- CN114236869B CN114236869B CN202210071694.2A CN202210071694A CN114236869B CN 114236869 B CN114236869 B CN 114236869B CN 202210071694 A CN202210071694 A CN 202210071694A CN 114236869 B CN114236869 B CN 114236869B
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B30/00—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images
- G02B30/20—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes
- G02B30/26—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes of the autostereoscopic type
- G02B30/30—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes of the autostereoscopic type involving parallax barriers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
- G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
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Abstract
The embodiment of the invention provides a display grating driving circuit, a method and host equipment, wherein the circuit comprises the following components: program control driving source module and digital switch control module; the program-controlled driving source module comprises a digital potentiometer sub-circuit, a driving square wave sub-circuit and a signal amplifying sub-circuit; the digital switch control module comprises a plurality of analog switch sub-circuits; the digital potentiometer sub-circuit adjusts the resistance value of each appointed resistor in the driving square wave sub-circuit and the signal amplifying sub-circuit according to the first control instruction; the driving square wave sub-circuit generates a first driving square wave signal based on the resistance value of the designated resistor; the signal amplifying sub-circuit amplifies the first driving square wave signal based on the resistance value of the signal appointed resistor to generate a grating driving signal; and the digital switch control module distributes the received grating driving signals to the control electrodes of each path of grating according to the received second control instruction. The method has the advantages that IO port resources of the AP end are not occupied, grating driving parameters can be adjusted in real time, and then 3D effects are displayed.
Description
Technical Field
The application relates to the technical field of naked eye 3D display driving, in particular to a display grating driving circuit, a display grating driving method and host equipment.
Background
Naked eye 3D technology principle research is perfected, products are still in a research and development stage, and the naked eye 3D products are already in commercial use, but the application range is limited at present. The naked eye 3D technology has the greatest advantage that the constraint of glasses is eliminated, and a realistic stereoscopic image with space and depth can be obtained without any auxiliary equipment (such as 3D glasses, helmets and the like).
At present, aiming at the driving scheme of the naked eye 3D display industry which is not mature and complete, two types of common schemes exist at present, one type of common schemes is to adopt an LCD (Liquid Crystal Display ) pixel driving scheme, a source chip is adopted to drive TN (Twisted Nematic) grating, compared with the pixel driving scheme, the grating driving scheme is simpler and has single function, the adoption of the source chip to drive the grating can lead to the resource waste of the source chip, and meanwhile, more IO port resources at an AP (Application processor, an application processor or a host) end are occupied; the other is a scheme of directly driving the grating electrode by adopting an IO port of an MCU (Microcontroller Unit, micro control unit), and the later debugging is difficult and the application range is limited because the core driving parameters for driving the grating in the scheme are not adjustable once the setting is completed.
Therefore, how to provide a grating driving circuit which does not occupy the IO port resource of the AP end and has adjustable grating driving parameters is an important problem to be solved.
Disclosure of Invention
An object of the embodiments of the present application is to provide a display raster driving circuit, a method, and a host device, so as to implement that an IO port resource at an AP end is not occupied and raster driving parameters are adjustable. The specific technical scheme is as follows:
in a first aspect, embodiments of the present application provide a display raster drive circuit, including:
program control driving source module and digital switch control module; the program-controlled driving source module comprises a digital potentiometer sub-circuit, a driving square wave sub-circuit and a signal amplifying sub-circuit; the digital switch control module comprises a plurality of analog switch sub-circuits;
the digital potentiometer sub-circuit is used for receiving a first control instruction and adjusting the resistance value of each appointed resistor in the driving square wave sub-circuit and the signal amplifying sub-circuit according to the first control instruction;
the driving square wave sub-circuit is used for generating a first driving square wave signal based on the resistance value of a designated resistor in the driving square wave sub-circuit;
the signal amplifying sub-circuit is used for receiving the first driving square wave signal, amplifying the first driving square wave signal based on the resistance value of a designated resistor in the signal amplifying sub-circuit and generating the grating driving signal;
the digital switch control module is used for receiving a second control instruction, and distributing the received grating driving signals to control electrodes of all paths of gratings in a group of display gratings according to the second control instruction.
In one possible implementation, the signal amplifying sub-circuit includes:
a signal amplifying first sub-circuit and a signal amplifying second sub-circuit;
the signal amplification first sub-circuit is used for receiving the first driving square wave signal and amplifying the first driving square wave signal to generate a first grating driving signal;
the signal amplifying second sub-circuit is used for receiving the first grating driving signal, amplifying the first grating driving signal based on the resistance value of the appointed resistor in the signal amplifying sub-circuit, and generating the grating driving signal.
In one possible embodiment, the program-controlled driving source module further includes: a VCOM generating circuit;
the digital potentiometer sub-circuit is further used for adjusting the resistance value of a designated resistor in the VCOM generating circuit according to the first control instruction;
the VCOM generating circuit is used for generating the common terminal voltage VCOM based on the resistance value of the appointed resistor in the VCOM generating circuit.
In one possible embodiment, the plurality of analog switch sub-circuits are connected in a serial manner.
In one possible implementation manner, the program-controlled driving source module and the digital switch control module each comprise a communication port supporting an SPI protocol, and the program-controlled driving source module and the communication interface of the digital switch control module are connected in parallel.
In a possible implementation manner, the digital potentiometer subcircuit is specifically used for: at the enabling end of the digital potentiometer sub-circuitReceiving low level signal and enabling end of the digital switch control module>When receiving a high-level signal, receiving the first control instruction by utilizing the communication interface;
the digital switch control module is specifically configured to: at the enabling end of the digital potentiometer sub-circuitReceiving high level signal and enabling end of the digital switch control module>And when receiving the low-level signal, receiving a second control instruction by utilizing the communication interface.
In a second aspect, embodiments of the present application provide a display raster driving method applied to the circuit in any one of the first aspects, where the method includes:
receiving a first control instruction, and adjusting the resistance value of each appointed resistor in the driving square wave subcircuit and the signal amplifying subcircuit according to the first control instruction;
generating a first driving square wave signal based on a resistance value of a designated resistor in the driving square wave sub-circuit;
amplifying the first driving square wave signal based on the resistance value of a designated resistor in the signal amplifying sub-circuit to generate a grating driving signal;
and receiving a second control instruction, and distributing the grating driving signals to control electrodes of all the gratings in a group of display gratings according to the second control instruction.
In a third aspect, embodiments of the present application provide a host device configured to generate a first control command, a second control signal command, and a power signal required by the display raster drive circuit according to any one of the first aspect.
In a fourth aspect, embodiments of the present application provide a grating driving substrate, including:
a display raster drive circuit as claimed in any one of the first aspects.
In a fifth aspect, an embodiment of the present application provides a naked eye 3D display screen, including: the grating-driven substrate according to the fourth aspect.
The embodiment of the invention has the beneficial effects that:
the embodiment of the invention provides a display grating driving circuit, a method and host equipment, wherein the circuit comprises the following components: program control driving source module and digital switch control module; the program-controlled driving source module comprises a digital potentiometer sub-circuit, a driving square wave sub-circuit and a signal amplifying sub-circuit; the digital switch control module comprises a plurality of analog switch sub-circuits; the digital potentiometer sub-circuit is used for receiving a first control instruction and adjusting the resistance value of each appointed resistor in the driving square wave sub-circuit and the signal amplifying sub-circuit according to the first control instruction; the driving square wave sub-circuit is used for generating a first driving square wave signal based on the resistance value of a designated resistor in the driving square wave sub-circuit; the signal amplifying sub-circuit is used for receiving the first driving square wave signal, amplifying the first driving square wave signal based on the resistance value of a designated resistor in the signal amplifying sub-circuit and generating the grating driving signal; the digital switch control module is used for receiving a second control instruction, and distributing the received grating driving signals to control electrodes of all paths of gratings in a group of display gratings according to the second control instruction. Compared with the prior art, the scheme in this application drives multichannel grating, need not the IO mouth control drive of AP end, does not occupy the IO mouth resource of AP end, because among the direct drive grating electrode scheme of IO mouth of prior art through MCU, the drive voltage of IO mouth is 0V or 3.3V often, and is nonadjustable once setting up the back, causes later stage debugging difficulty, but grating drive parameter real-time adjustment in the scheme of this application.
Of course, not all of the above-described advantages need be achieved simultaneously in practicing any one of the products or methods of the present application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other embodiments may also be obtained according to these drawings to those skilled in the art.
FIG. 1 is a first schematic diagram of a display raster drive circuit according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of a driving square wave sub-circuit according to an embodiment of the present application;
FIG. 3 (a) is a first portion of a second schematic diagram of a display raster drive circuit according to an embodiment of the present application;
FIG. 3 (b) is a second portion of a second schematic diagram of a display raster drive circuit according to an embodiment of the present application;
FIG. 4 is a first schematic diagram of a signal amplifying sub-circuit according to an embodiment of the present application;
FIG. 5 is a second schematic diagram of a signal amplifying sub-circuit according to an embodiment of the present application;
FIG. 6 is a third schematic diagram of a signal amplifying sub-circuit according to an embodiment of the present application;
FIG. 7 is a first schematic diagram of a VCOM generating circuit in accordance with an embodiment of the present application;
FIG. 8 is a second schematic diagram of the VCOM generating circuit in the embodiment of the present application;
FIG. 9 is a timing diagram of a display raster drive circuit according to an embodiment of the present disclosure;
FIG. 10 (a) is a first portion of a third schematic diagram of a display raster drive circuit according to an embodiment of the present application;
FIG. 10 (b) is a second portion of a third schematic diagram of a display raster drive circuit according to an embodiment of the present application;
fig. 11 is a schematic diagram of a display raster driving method according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. Based on the embodiments herein, a person of ordinary skill in the art would be able to obtain all other embodiments based on the disclosure herein, which are within the scope of the disclosure herein.
In order to provide a display raster driving scheme that does not occupy the IO port resource of the AP end and has adjustable raster driving parameters, an embodiment of the present application provides a display raster driving circuit, see fig. 1, including:
program-controlled driving source module 1 and digital switch control module 2; the program-controlled driving source module 1 comprises a digital potentiometer sub-circuit 11, a driving square wave sub-circuit 12 and a signal amplifying sub-circuit 13; the digital switch control module 2 comprises a plurality of analog switch sub-circuits 21;
the digital potentiometer sub-circuit 11 is configured to receive a first control instruction, and adjust resistance values of each designated resistor in the driving square wave sub-circuit 12 and the signal amplifying sub-circuit 13 according to the first control instruction;
the driving square wave sub-circuit 12 is configured to generate a first driving square wave signal based on a resistance value of a specified resistor in the driving square wave sub-circuit 12;
the signal amplifying sub-circuit 13 is configured to receive the first driving square wave signal, amplify the first driving square wave signal based on a resistance value of a specified resistor in the signal amplifying sub-circuit 13, and generate the grating driving signal;
the digital switch control module 21 is configured to receive a second control instruction, and distribute the received grating driving signal to the control electrodes of each path of gratings in the set of display gratings according to the second control instruction.
The first control instruction and the second control instruction in the present application are provided by an AP end, which may be an application processor, for example, a CPU central processing unit (Central Processing Unit, abbreviated as CPU), a digital signal processor (Digital Signal Processing, abbreviated as DSP), a Field programmable gate array (Field-Programmable Gate Array, abbreviated as FPGA), or the like. The AP terminal may also provide a positive power supply VSP (e.g., 5V-8V), a negative power supply VSN (e.g., (-8V) - (-5V)), and ground GND for the display raster drive circuit.
The digital potentiometer sub-circuit receives the first control command by using a communication interface, for example, a communication interface based on SPI protocol, and outputs different resistance values according to the first control command. The digital potentiometer sub-circuit includes digital potentiometers with different measuring ranges according to different types, in one example, the digital potentiometer with the measuring range of the AD5124 type digital potentiometer is a digital potentiometer with 100K, and according to the received first control instruction, a plurality of resistance values of 390 omega, 781 omega, 1563 omega … … K omega are output, and the corresponding resistance value (step) of each stage is: step= 390.625 Ω. In one example, the digital potentiometer has 4 channels U1B, U1C, U1D, U E for providing different resistance values for other sub-circuits, U1Dig-PotA is a digital potentiometer logic interface, and U1B, U1C, U1D, U1E, U1Dig-PotA is a different functional part of a digital potentiometer.
In one example, referring to fig. 2, the drive square wave subcircuit includes: NE555 clocks the chip and its peripheral resistors and capacitors. The first driving square wave signal is generated by an NE555 (chip U4) timer, specifically, the first end of a resistor R7 is respectively connected with the VSP, the 7 th end of a U4 and the 8 th end of the U4, the second end of the resistor R7 is connected with the first end of a U1B, the second end of the U1B is suspended, the third end of the U1B is respectively connected with the first end of a capacitor C1 and the 6 th end of the U4, the second end of the capacitor C1 is respectively connected with the second end of a capacitor C2 and the ground GND, and the first end of the capacitor C2 is connected withThe 5 th end of U4 is connected, and the 4 th end of U4 is connected with VSP, and the 3 rd end of U4 is unsettled, and the 1 st end of U4 is connected with GND, and the 2 nd end of U4 unsettled is connected with the 6 th end of U4 and is regarded as the generating end of first drive square wave signal U4OUT. The frequency calculation formula of the first driving square wave signal is as follows: f=1/t=1/(0.693 ((r7+2r) U1B ) C1), T is the period of the first driving square wave signal, R U1B For U1B resistance, R can be adjusted by U1B And adjusting the frequency of the first driving square wave signal in real time with the resistance value of R7. For example, r7=100Ω, c1=10uf, R U1B The frequency range of the first driving square wave signal which can be output is about 1HZ-160HZ when the values of 390 omega, 781 omega and 1563 omega … … are 100kΩ.
The digital switch control module can receive a second control instruction based on a communication interface of the SPI protocol, and distributes the received grating driving signals to control electrodes of each path of grating in the group of display gratings according to the second control instruction. Typically, there are 40 gratings in a set of display gratings.
In one example, referring to fig. 3 (a) and 3 (b), the a port in fig. 3 (a) is connected to the a port in fig. 3 (b), the b port in fig. 3 (a) is connected to the b port in fig. 3 (b), the c port in fig. 3 (a) is connected to the c port in fig. 3 (b), and the d port in fig. 3 (a) is connected to the d port in fig. 3 (b). U1Dig-PotA is a logic interface of a digital potentiometer in the digital potentiometer sub-circuit, and the digital switch control module comprises: the 5 analog switches and the peripheral resistors thereof realize that grating driving signals are distributed to the control electrode of the 40-path grating through the 5 analog switches, specifically, U5, U6, U7, U8 and U9 are 8-path analog switches ADG1414, U1Dig-PotA is a digital potentiometer logic interface, the SYNC end of the SPI protocol communication interface is connected with the 1 st end of U1Dig-PotA, the CS end of the SPI protocol communication interface is respectively connected with the 25 th end of U5, the 15 th end of U5, the 25 th end of U6, the 15 th end of U6, the 25 th end of U7, the 15 th end of U7, the 25 th end of U8, the 15 th end of U8, the 25 th end of U9, the 15 th end of U9, the SCLK end of the SPI protocol communication interface is respectively connected with the 18 th end of U1Dig-PotA, the 26 th end of U5, the 14 th end of U5, the 26 th end of U6, the 14 th end of U7, the 26 th end of U7, the 14 th end of U9, the SPI 9 and the 14 th end of U9.
The 30 th end of U5, the 10 th end of U5, the 12 th end of U5, the 28 th end of U5, the 30 th end of U6, the 10 th end of U6, the 12 th end of U6, the 28 th end of U6, the 30 th end of U7, the 10 th end of U7, the 12 th end of U7, the 28 th end of U7, the 30 th end of U8, the 10 th end of U8, the 12 th end of U8, the 28 th end of U8, the 30 th end of U9, the 10 th end of U9, the 12 th end of U9, and the 28 th end of U9 are all connected with VSP; the 5 th end of U5, the 5 th end of U6, the 5 th end of U7, the 5 th end of U8 and the 5 th end of U9 are all connected with VSN; the 29 th end of U5, the 11 th end of U5, the 29 th end of U6, the 11 th end of U6, the 29 th end of U7, the 11 th end of U7, the 29 th end of U8, the 11 th end of U8, the 29 th end of U9, and the 11 th end of U9 are all connected with GND.
The 13 th end of U5 is connected with the 27 th end of U6, and the 13 th end of U6 is connected with the 27 th end of U7, and the 13 th end of U7 is connected with the 27 th end of U8, and the 13 th end of U8 is connected with the 27 th end of U9.
The 3 rd end of U5, the 4 th end of U5, the 6 th end of U5, the 7 th end of U5, the 18 th end of U5, the 19 th end of U5, the 21 st end of U5, the 22 nd end of U5, the 3 rd end of U6, the 4 th end of U6, the 6 th end of U6, the 7 th end of U6, the 18 th end of U6, the 19 th end of U6, the 21 st end of U6, the 22 nd end of U6, the 3 rd end of U7, the 4 th end of U7, the 6 th end of U7, the 7 th end of U7, the 18 th end of U7, the 19 th end of U7, the 21 nd end of U7, the 22 nd end of U8, the 4 th end of U8, the 7 th end of U8, the 18 th end of U8, the 21 st end of U8, the 3 th end of U9, the 4 th end of U9, the U9 and the U9 are all connected with the signal ends of U9, the signal ends of U9, and the signal ends of U9.
The 2 nd end of U1Dig-PotA, the 9 th end of U1Dig-PotA and the second end of TVS tube D1 are all connected with GND, the 16 th end of U1Dig-PotA, the 17 th end of U1Dig-PotA and the first end of TVS tube D1 are all connected with VSP, the 20 th end of U1Dig-PotA, the 20 th end of U5, the 20 th end of U6, the 20 th end of U7, the 20 th end of U8 and the 20 th end of U9 are all suspended, and the 1 st-8 th end of the exclusion RN1, the 1 st-8 th end of the exclusion RN2, the 1 st-8 th end of the exclusion RN3, the 1 st-8 th end of the exclusion RN4 and the 1 st-8 th end of the exclusion RN5 are all connected with VCOM.
The 9 th end of the discharge resistor RN1 is connected with the 24 th end of U5 and is used as a control electrode signal S1 of the 1 st path grating, the 10 th end of the discharge resistor RN1 is connected with the 23 rd end of U5 and is used as a control electrode signal S2 of the 2 nd path grating, the 11 th end of the discharge resistor RN1 is connected with the 17 th end of U5 and is used as a control electrode signal S3 of the 3 rd path grating, the 12 th end of the discharge resistor RN1 is connected with the 16 th end of U5 and is used as a control electrode signal S4 of the 4 th path grating, the 13 th end of the discharge resistor RN1 is connected with the 9 th end of U5 and is used as a control electrode signal S5 of the 5 th path grating, the 14 th end of the discharge resistor RN1 is connected with the 8 th end of U5 and is used as a control electrode signal S6 of the 6 th path grating, the 15 th end of the discharge resistor RN1 is connected with the 2 nd end of U5 and is used as a control electrode signal S7 of the 7 th path grating, the 16 th end of the discharge resistor RN1 is connected with the 1 st end of U5 and is used as a control electrode signal S8 of the 8 th path grating, the 9 th end of the discharge resistor RN2 is connected with the 24 th end of U6 and is used as a control electrode signal S9 of the 9 th grating, the 10 th end of the discharge resistor RN2 is connected with the 23 th end of U6 and is used as a control electrode signal S10 of the 10 th grating, the 11 th end of the discharge resistor RN2 is connected with the 17 th end of U6 and is used as a control electrode signal S11 of the 11 th grating, the 12 th end of the discharge resistor RN2 is connected with the 16 th end of U6 and is used as a control electrode signal S12 of the 12 th grating, the 13 th end of the discharge resistor RN2 is connected with the 9 th end of U6 and is used as a control electrode signal S13 of the 13 th grating, the 14 th end of the discharge resistor RN2 is connected with the 8 th end of U6 and is used as a control electrode signal S14 of the 14 th grating, the 15 th end of the discharge resistor RN2 is connected with the 2 nd end of U6 and is used as a control electrode signal S15 of the 15 th grating, the 16 th end of the discharge resistor RN2 is connected with the 1 st end of U6 and is used as a control electrode signal S16 of the 16 th grating, the 9 th end of the discharge resistor RN3 is connected with the 24 th end of U7 and is used as a control electrode signal S17 of the 17 th grating, the 10 th end of the discharge resistor RN3 is connected with the 23 rd end of U7 and is used as a control electrode signal S18 of the 18 th grating, the 11 th end of the discharge resistor RN3 is connected with the 17 th end of U7 and is used as a control electrode signal S19 of the 19 th grating, the 12 th end of the discharge resistor RN3 is connected with the 16 th end of U7 and is used as a control electrode signal S20 of the 20 th grating, the 13 th end of the discharge resistor RN3 is connected with the 9 th end of U7 and is used as a control electrode signal S21 of the 21 st grating, the 14 th end of the discharge resistor RN3 is connected with the 8 th end of U7 and is used as a control electrode signal S22 of the 22 nd grating, the 15 th end of the discharge resistor RN3 is connected with the 2 nd end of U7 and is used as a control electrode signal S23 of the 23 nd grating, the 16 th end of the discharge resistor RN3 is connected with the 1 st end of U7 and is used as a control electrode signal S24 of the 24 th grating, the 9 th end of the discharge resistor RN4 is connected with the 24 th end of U8 and is used as a control electrode signal S25 of the 25 th grating, the 10 th end of the discharge resistor RN4 is connected with the 23 th end of U8 and is used as a control electrode signal S26 of the 26 th grating, the 11 th end of the discharge resistor RN4 is connected with the 17 th end of U8 and is used as a control electrode signal S27 of the 27 th grating, the 12 th end of the discharge resistor RN4 is connected with the 16 th end of U8 and is used as a control electrode signal S28 of the 28 th grating, the 13 th end of the discharge resistor RN4 is connected with the 9 th end of U8 and is used as a control electrode signal S29 of the 29 th grating, the 14 th end of the discharge resistor RN4 is connected with the 8 th end of U8 and is used as a control electrode signal S30 of the 30 th grating, the 15 th end of the discharge resistor RN4 is connected with the 2 nd end of U8 and is used as a control electrode signal S31 of the 31 th grating, the 16 th end of the discharge resistor RN4 is connected with the 1 st end of U8 and is used as a control electrode signal S32 of the 32 th grating, the 9 th end of the discharge resistor RN5 is connected with the 24 th end of U9 and is used as a control electrode signal S33 of the 33 th grating, the 10 th end of the discharge resistor RN5 is connected with the 23 rd end of U9 and is used as a control electrode signal S34 of the 34 th grating, the 11 th end of the discharge resistor RN5 is connected with the 17 th end of U9 and is used as a control electrode signal S35 of the 35 th grating, the 12 th end of the discharge resistor RN5 is connected with the 16 th end of U9 and is used as a control electrode signal S36 of the 36 th grating, the 13 th end of the discharge resistor RN5 is connected with the 9 th end of U9 and is used as a control electrode signal S37 of the 37 th grating, the 14 th end of the discharge resistor RN5 is connected with the 8 th end of U9 and is used as a control electrode signal S38 of the 38 th grating, the 15 th end of the discharge resistor RN5 is connected with the 2 nd end of U9 and is used as a control electrode signal S39 th grating, the 16 th end of the discharge resistor RN5 is connected with the 1 st end of U9 and is used as a control electrode signal S36 of the th grating, the discharge resistor RN5 is connected with the control electrode signal S40 of the 1 st end of U9, and the control electrode signal S40 of the single grating can be driven by one grating to realize the control signal 40 of the grating, and the single grating can be adjusted.
In the embodiment of the application, different resistance values are provided for the driving square wave subcircuit and the signal amplifying subcircuit through the digital potentiometer subcircuit, the frequency and the amplitude of the grating driving signal, namely grating driving parameters, can be adjusted in real time based on the different resistance values, and the scheme of the application receives control instructions through the SPI communication port to control the digital switch control module, so that the purpose of not occupying AP end resources is achieved, and an IO port of an AP end is not required to drive 40 paths of gratings.
In a possible embodiment, referring to fig. 4, the signal amplifying sub-circuit 13 includes:
a signal amplification first sub-circuit 131, a signal amplification second sub-circuit 132;
the signal amplifying first sub-circuit 131 is configured to receive the first driving square wave signal, amplify the first driving square wave signal, and generate a first grating driving signal;
the signal amplifying second sub-circuit 132 is configured to receive the first grating driving signal, amplify the first grating driving signal based on a resistance value of a specified resistor in the signal amplifying sub-circuit, and generate the grating driving signal.
The square wave amplitude range of the first driving square wave signal is 0-VSP, the voltage range (-6V) to (-6V) required by the driving grating is not met, and the signal amplifying sub-circuit adjusts the first driving square wave signal into the voltage range required by the driving grating through two-stage amplification.
In an example, referring to fig. 5 and 6, the signal amplifying sub-circuit includes an operational amplifier and its peripheral resistor, and for fig. 5, in particular, ADA4891-3 is a three-channel operational amplifier, where U2A, U2B, U C is three channels of an operational amplifier, a first end of resistor R3 is connected to VSP, a second end of resistor R3 is connected to a first end of resistor R4 and an inverting input end of U2B, a second end of resistor R4 is connected to an output end of U2B and is used as a first grating driving signal U2BOUT, a second end of resistor R5 is connected to a second end of resistor R6 and a forward input end of U2B, a first end of resistor R6 is connected to GND, and a first end of resistor R5 is connected to a first driving square wave signal U4OUT. The first raster drive signal U2BOUT is calculated by the following formula:
u2 bout=u4out (R6/(r5+r6)) ((r3+r4)/R3) -VSP (R4/R3), the square wave voltage output by U2BOUT amplified by fig. 5 is between ±1/2 VSP. For fig. 6, specifically, the first end of the U1D is suspended, the second end of the U1D is connected with GND, the third end of the U1D is connected with the first end of the resistor R8 and the reverse input end of the U2C, the second end of the resistor R8 is connected with the output end of the U2C and is used as the grating driving signal U2COUT, the second end of the resistor R1 is connected with the third end of the U1C, the first end of the U1B is connected with the positive input end of the U2C, and the second end of the U1B is connected with GND. The raster drive signal U2COUT is calculated by the following formula: u2 cout=u2bout (RU 1C/(r1+ru1c)) ((RU 1 d+r8)/RU 1D), where RU1C and RU1D are resistance values of U1C and U1D, the range of values of U1C, U1D is the same as that of U1B, and the square wave voltage outputted by U2COUT after amplification in fig. 6 can be adjusted to any voltage value symmetric about GND between VSN and VSP, for example (-6V) to (-6V). After the first driving square wave signal is amplified twice, the voltage range required by driving the grating is met, and the grating driving signal U2COUT is connected to a plurality of analog switch sub-circuits in the digital switch control module.
In the embodiment of the application, the first driving square wave signal can be adjusted to the voltage range required by the driving grating through different resistance values output by the digital potentiometer sub-circuit, so that the purpose of adjusting the grating driving parameters in real time is realized.
In one possible embodiment, referring to fig. 7, the program-controlled driving source module further includes: a VCOM generating circuit 14;
the digital potentiometer sub-circuit 11 is further configured to adjust a resistance value of a specified resistor in the VCOM generating circuit according to the first control command;
the VCOM generating circuit 14 is configured to generate the common terminal voltage VCOM based on a resistance value of a specified resistor in the VCOM generating circuit.
In one example, referring to fig. 8, the VCOM generating circuit includes an operational amplifier and a peripheral resistor thereof, specifically, a first end of the resistor R2 is connected to the VSP, a second end of the resistor R2 is connected to a second end of the U1E, a first end of the U1E is connected to the VSN, a third end of the U1E is connected to a positive input end of the U2A, a positive power source v+ of the U2A is connected to the VSP, a negative power source V-of the U2A is connected to the VSN, and a reverse input end of the U2A is connected to an output end of the U2A as a common terminal voltage VCOM. VCOM is used for providing a common terminal for each path of grating, the voltage range of VCOM is-3.5V-0V, and the common terminal voltage VCOM is calculated by the following formula: vcom=vsn (1-U1E/100 k), where U1E is the resistance of U1E, and can take values between 390 Ω, 781 Ω, 1563 Ω … … kΩ, step= 390.625 Ω.
In the embodiment of the application, the value of the common terminal voltage VCOM can be adjusted through different resistance values output by the digital potentiometer sub-circuit, and the required common terminal voltage VCOM is provided for the grating.
In one possible embodiment, the plurality of analog switch sub-circuits are connected in a serial fashion.
In one example, referring to fig. 3 (a) and 3 (b), the DIN end of the communication interface of the SPI protocol is connected to the 27 th end of U5, the 13 th end of U5 is connected to the 27 th end of U6, the 13 th end of U6 is connected to the 27 th end of U7, the 13 th end of U7 is connected to the 27 th end of U8, the 13 th end of U8 is connected to the 27 th end of U9, and 40 gratings can be driven by connecting 5 8-channel analog switches in series into 40 channels.
In the embodiment of the application, the received grating driving signals are distributed to the control electrodes of all the gratings in the group of display gratings in a serial connection mode of the analog switch sub-circuits, and finally the 3D display effect is achieved.
In one possible embodiment, the program-controlled driving source module and the digital switch control module each comprise a communication port supporting an SPI protocol, and the program-controlled driving source module is connected in parallel with the communication interface of the digital switch control module.
In one example, referring to fig. 3 (a) and 3 (b), the 4 SPI communication interface control lines SYNC, CS, SCLK, DIN of U1Dig-PotA connect in parallel the U1Dig-PotA in the digital potentiometer circuit in the programmable drive source module and the 5 analog switch sub-circuits in the digital switch control module.
In the embodiment of the application, the parallel control of the program control driving source module and the digital switch control module by one SPI communication interface is realized by a communication interface parallel connection mode, and the resources of an AP end are saved.
In one possibilityIn an embodiment of (a), the digital potentiometer subcircuit is specifically configured to: at the enabling end of the digital potentiometer sub-circuitReceiving low level signal and enabling end of the digital switch control module>When receiving a high-level signal, receiving the first control instruction by utilizing the communication interface;
the digital switch control module is specifically configured to: at the enabling end of the digital potentiometer sub-circuitReceiving high level signal and enabling end of the digital switch control module>And when receiving the low-level signal, receiving a second control instruction by utilizing the communication interface.
The program-controlled driving source module is connected with the communication interface of the digital switch control module in parallel, see fig. 3 (a) and 3 (b), through the 1 st end of the digital potentiometer sub-circuit U1Dig-PotA in the program-controlled driving source moduleAs enabling terminal, 25 th terminal and 15 th terminal of U5-U9 in digital switch control module +.>As an enabling end, the low level is input to the enabling end, so that the corresponding low level of the enabling end is enabled to be effective, and parallel control of the two modules is achieved.
Referring to FIG. 9, at the enable end of U5-U9When receiving low level signal (at this time, the enable terminal of the digital potentiometer sub-circuit is +.>The receiving high-level signal is disabled), the communication interface can be utilized to receive a second control instruction, the second control instruction is sequentially transmitted to the 5-path analog switch sub-circuit, and the serial control of the 5-path analog switch sub-circuit is realized. At the enabling end of U1Dig-PotA +.>When receiving the low level signal (at this time, the enable terminal of the digital switch control module +.>The receiving high-level signal is disabled), the communication interface receives the first control instruction, and the communication interface can be used for receiving a second control instruction to output a specified resistance value for driving the square wave sub-circuit, the signal amplification sub-circuit and the VCOM generation circuit.
In the embodiment of the application, based on a parallel connection mode of the communication interface, the corresponding control instruction is received by inputting a low-level signal to the enabling end, and then the program-controlled driving source module and the digital switch control module are controlled.
In one example, referring to fig. 10 (a) and 10 (b), the a port in fig. 10 (a) is connected to the a port in fig. 10 (b), the b port in fig. 10 (a) is connected to the b port in fig. 10 (b), the c port in fig. 10 (a) is connected to the c port in fig. 10 (b), the d port in fig. 10 (a) is connected to the d port in fig. 10 (b), the U4OUT port in fig. 10 (a) is connected to the U4OUT port in fig. 10 (b), and fig. 10 (a) and 10 (b) are the above-mentioned summary diagrams of fig. 2, 3 (a), fig. 3 (b), fig. 5, fig. 6, and fig. 8, and in each specific embodiment, the connection manner of the circuit has been described, and the summary diagrams of fig. 10 (a) and 10 (b) are not described.
An embodiment of the present application provides a display raster driving method, referring to fig. 11, applied to any one of the circuits described above, including:
s11, receiving a first control instruction, and adjusting resistance values of each appointed resistor in the driving square wave subcircuit and the signal amplifying subcircuit according to the first control instruction;
s12, generating a first driving square wave signal based on the resistance value of a designated resistor in the driving square wave sub-circuit;
s13, amplifying the first driving square wave signal based on the resistance value of a designated resistor in the signal amplifying sub-circuit to generate a grating driving signal;
s14, receiving a second control instruction, and distributing the grating driving signals to control electrodes of all paths of gratings in a group of display gratings according to the second control instruction.
In the embodiment of the application, the display grating driving method is applied to the display grating driving circuit, the purpose of adjusting the frequency and the amplitude of the grating driving signal, namely the grating driving parameters in real time is achieved, the control command is received through the SPI communication port to control the digital switch control module, the purpose of not occupying AP end resources is achieved, and the 3D display effect is finally achieved.
The embodiment of the application provides a host device for generating a first control instruction, a second control signal instruction and a power signal required by any one of the display grating driving circuits.
The power signal includes VSP, VSN, GND.
The embodiment of the application provides a grating driving substrate, which comprises: a display raster drive circuit as claimed in any one of the preceding claims.
The embodiment of the application provides a bore hole 3D display screen, include: the grating drives the substrate as described above.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and each embodiment is mainly described in a different manner from other embodiments, so that identical and similar parts between the embodiments are referred to each other.
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.
Claims (10)
1. A display raster drive circuit, said circuit comprising:
program control driving source module and digital switch control module; the program-controlled driving source module comprises a digital potentiometer sub-circuit, a driving square wave sub-circuit and a signal amplifying sub-circuit; the digital switch control module comprises a plurality of analog switch sub-circuits;
the digital potentiometer sub-circuit is used for receiving a first control instruction and adjusting the resistance value of each appointed resistor in the driving square wave sub-circuit and the signal amplifying sub-circuit according to the first control instruction;
the driving square wave sub-circuit is used for generating a first driving square wave signal based on the resistance value of a designated resistor in the driving square wave sub-circuit;
the signal amplifying sub-circuit is used for receiving the first driving square wave signal, amplifying the first driving square wave signal based on the resistance value of the appointed resistor in the signal amplifying sub-circuit and generating a grating driving signal;
the digital switch control module is used for receiving a second control instruction, and distributing the received grating driving signals to control electrodes of all paths of gratings in a group of display gratings according to the second control instruction.
2. The circuit of claim 1, wherein the signal amplification subcircuit comprises:
a signal amplifying first sub-circuit and a signal amplifying second sub-circuit;
the signal amplification first sub-circuit is used for receiving the first driving square wave signal and amplifying the first driving square wave signal to generate a first grating driving signal;
the signal amplifying second sub-circuit is used for receiving the first grating driving signal, amplifying the first grating driving signal based on the resistance value of the appointed resistor in the signal amplifying sub-circuit, and generating the grating driving signal.
3. The circuit of claim 1, wherein the programmable drive source module further comprises: a VCOM generating circuit;
the digital potentiometer sub-circuit is further used for adjusting the resistance value of a designated resistor in the VCOM generating circuit according to the first control instruction;
the VCOM generating circuit is used for generating the common terminal voltage VCOM based on the resistance value of the appointed resistor in the VCOM generating circuit.
4. The circuit of claim 1, wherein the plurality of analog switch sub-circuits are connected in series.
5. The circuit of claim 1, wherein the programmable drive source module and the digital switch control module each include a communication port supporting an SPI protocol, and wherein the programmable drive source module is concurrently connected with the communication interface of the digital switch control module.
6. The circuit according to claim 5, whereinIn thatThe number isThe potentiometer subcircuit is specifically used for: at the numberPotential ofWhen an enabling end SYNC of the sub-circuit receives a low-level signal and an enabling end CS of the digital switch control module receives a high-level signal, the communication interface is utilized to receive the first control instruction;
the digital switch control module is specifically configured to: and when the enabling end SYNC of the digital potentiometer sub-circuit receives a high-level signal and the enabling end CS of the digital switch control module receives a low-level signal, a second control instruction is received by utilizing the communication interface.
7. A method of raster driving a display, applied to the circuit of any one of claims 1-6, the method comprising:
receiving a first control instruction, and adjusting the resistance value of each appointed resistor in the driving square wave subcircuit and the signal amplifying subcircuit according to the first control instruction;
generating a first driving square wave signal based on a resistance value of a designated resistor in the driving square wave sub-circuit;
amplifying the first driving square wave signal based on the resistance value of a designated resistor in the signal amplifying sub-circuit to generate a grating driving signal;
and receiving a second control instruction, and distributing the grating driving signals to control electrodes of all the gratings in a group of display gratings according to the second control instruction.
8. A host device for generating the first control command, the second control signal command and the power signal required by the display raster drive circuit of any one of claims 1-6.
9. A grating-driven substrate, comprising:
a display raster drive circuit as claimed in any one of claims 1 to 6.
10. A naked eye 3D display screen, comprising: the grating-driven substrate of claim 9.
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