CN114217145B - Active power filter embedded voltage phase sequence self-identification self-adaptation device and method - Google Patents
Active power filter embedded voltage phase sequence self-identification self-adaptation device and method Download PDFInfo
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- CN114217145B CN114217145B CN202111306135.7A CN202111306135A CN114217145B CN 114217145 B CN114217145 B CN 114217145B CN 202111306135 A CN202111306135 A CN 202111306135A CN 114217145 B CN114217145 B CN 114217145B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/18—Indicating phase sequence; Indicating synchronism
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
Abstract
The invention discloses a self-identification self-adaptation device and method for embedded voltage phase sequence of an active power filter, comprising a system voltage conditioning module, a system current conditioning module, a sending current conditioning module, a second-order low-pass filtering quadrature module, a phase discrimination module, a second-order pass direct isolation module, a phase sequence judging module, a voltage phase sequence switching module, a system current phase sequence switching module and a sending current phase sequence switching module. The invention adopts a second-order low-pass filter and a second-order pass direct-isolation module to remove the influence of harmonic wave and interference on phase sequence judgment; the hysteresis comparison is adopted as a phase change judgment basis, so that accurate and reliable phase change judgment in a normal voltage range is ensured, and when the voltage is abnormal, the judgment in the original normal state is maintained, and the anti-interference performance of phase sequence judgment is improved.
Description
Technical Field
The invention relates to a voltage phase sequence self-identification self-adaption device and method, in particular to a voltage phase sequence self-identification self-adaption device and method embedded in an active power filter, and belongs to the technical field of power electronic converters.
Background
In the field of electronic converters, both frequency converters and active power filters, it is necessary to detect the phase sequence of a three-phase voltage. If the wires of the converters are out of order, the problems that the equipment cannot normally operate, such as motor reversal carried by the frequency converter, and the active power filter cannot stabilize the voltage at the direct current side, cause equipment failure and even damage, are caused.
The current common voltage phase sequence detection method mainly comprises a zero crossing detection method, a fundamental wave phase angle calculation comparison method and a rotation coordinate method. The zero-crossing detection method judges the voltage phase sequence by judging the sequence of zero crossing or judging the voltage values of the other two phases when any zero crossing occurs, and the method leads to misjudgment and low reliability when harmonic waves and interference exist to cause zero crossing for a plurality of times; the fundamental wave phase angle calculation and comparison method ensures accuracy by processing and calculating through a CPU through a higher sampling rate, and has larger calculated amount. The rotary coordinate method obtains a Q-axis component Uq through coordinate transformation of three-phase voltage, performs phase locking according to positive sequence, and judges whether the deviation exceeds a set error range or not through judging the deviation between the Uq fed back by a phase-locked loop and the actual Uq. When the lower harmonic of the power grid is larger, the deviation of the Uq is more likely to exceed the set range, and erroneous judgment is generated.
In the prior art, an electric power active filter is required to be connected into a power grid in a voltage positive sequence mode. When the voltage phase sequence of the power grid is detected to be negative after the equipment is electrified, the equipment is blocked, an alarm is sent out, and a user is reminded of changing the wiring again after the power is cut off. The prior art increases the installation difficulty and reduces the efficiency of the installation work.
Disclosure of Invention
The invention aims to provide a voltage phase sequence self-identification self-adaptation device and method embedded in an active power filter, and the accuracy of voltage phase sequence judgment is improved.
In order to solve the technical problems, the invention adopts the following technical scheme:
an embedded voltage phase sequence self-identification self-adaptation device of an active power filter is characterized in that: the system comprises a system voltage conditioning module, a system current conditioning module, a current sending conditioning module, a second-order low-pass filtering quadrature module, a phase discrimination module, a second-order direct-isolation module, a phase sequence judging module, a voltage phase sequence switching module, a system current phase sequence switching module and a current sending phase sequence switching module;
the system voltage conditioning module is connected into a three-phase power grid to condition high voltage UA, UB and UC of the power grid into a first low voltage signal Ua, a second low voltage signal Ub and a third low voltage signal Uc; the system current conditioning module conditions current signals IA, IB and IC of the primary CT of the three-phase system into a first system current signal Ia, a second system current signal Ib and a third system current signal IC respectively; the sending current conditioning module respectively conditions the output IFA, IFB, IFC of the three-phase Hall current transformer into a first sending current signal Ifa, a second sending current signal Ifb and a third sending current signal Ifc;
taking the conditioned first low-voltage signal Ua and the conditioned second low-voltage signal Ub as input signals of a second-order low-pass filtering quadrature module, and outputting quadrature signals Uab which contain differential signal fundamental wave components of the first low-voltage signal and the second low-voltage signal; the quadrature signal Uab and the differential signal Ubc of the second low voltage signal Ub and the third low voltage signal Uc are used as inputs of a phase discrimination module; the output Um of the phase discrimination module is sent to a second-order communication and direct-isolation module; the output Umd of the second-order communication direct-isolation module is sent to a phase sequence judging module; the phase sequence judging module outputs a phase sequence judging mark S; the phase sequence judgment mark S, the second low-voltage signal Ub and the third low-voltage signal Uc are used as inputs of a voltage phase sequence switching module; the voltage phase sequence switching module outputs a second low voltage signal Ub and a third low voltage signal Uc which are matched with the voltage positive sequence;
the phase sequence judgment mark S, the second system current signal Ib and the third system current signal Ic are used as inputs of a system current phase sequence switching module; the system current phase sequence switching module outputs a second system current signal Ib and a third system current signal Ic which are matched with the voltage positive sequence;
the phase sequence judgment mark S, the second sent current signal Ifb and the third sent current signal Ifc are used as the input of a sent current phase sequence switching module; the output current phase sequence switching module outputs a second output current signal Ifb and a third output current signal Ifc matched with the positive voltage sequence.
Further, the second-order low-pass filtering quadrature module consists of a differential operation circuit and a second-order low-pass filter;
the differential operation circuit comprises an operational amplifier U1, a resistor R2, a resistor R3 and a resistor R4; the + pin of the operational amplifier U1 is connected with one end of a resistor R1 and one end of a resistor R2, the other end of the resistor R1 is connected with a first low-voltage signal Ua, and the other end of the resistor R2 is connected with GND; the pin of the operational amplifier U1 is connected with one end of a resistor R3 and one end of a resistor R4, the other end of the resistor R3 is connected with a second low-voltage signal Ub, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1;
the second-order low-pass filter comprises an operational amplifier U2, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C1 and a resistor C2; the positive pin of the operational amplifier U2 is connected with one end of a resistor R6 and one end of a capacitor C2, the other end of the resistor R6 is connected with one end of a resistor R5 and one end of a capacitor C1, the other end of the resistor R5 is connected to the output end of the operational amplifier U1, the other end of the capacitor C1 is connected to the output end of the operational amplifier U2, the negative pin of the operational amplifier U2 is connected with one end of a resistor R8 and one end of a resistor R7, the other ends of the resistor R8 and the capacitor C2 are connected with GND, and the other end of the resistor R7 is connected to the output end of the operational amplifier U2.
Further, the phase discrimination module is a four-quadrant analog multiplier, the X1 pin of the four-quadrant analog multiplier chip U3 is connected with the output end of the operational amplifier U2, the X2 pin and the Z pin are connected with GND, the Y1 pin is connected with the second low voltage signal Ub, and the Y2 pin is connected with the third low voltage signal Uc; the W pin is the output end.
Further, the second-order pass direct-isolation module comprises an operational amplifier U4, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C3 and a capacitor C4; the positive pin of the operational amplifier U4 is connected with one end of a resistor R10 and one end of a capacitor C4, the other end of the resistor R10 is connected with one end of a resistor R9 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the output end of the operational amplifier U4, the other end of the resistor R9 is connected to the W pin of the chip U3, the negative pin of the operational amplifier U4 is connected with one end of a resistor R11 and one end of a resistor R12, the other end of the resistor R12 and the other end of the capacitor C4 are connected with GND, and the other end of the resistor R11 is connected to the output end of the operational amplifier U4.
Further, the phase sequence judging module comprises a comparator U5, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17 and a zener diode D1; the positive end of the comparator U5 is respectively connected with one ends of the resistors R13 and R16, the other end of the resistor R13 is connected with the output end of the operational amplifier U4, the other end of the resistor R16 is connected with the output end of the comparator U5, one end of the comparator U5 is connected with one end of the resistor R14, the other end of the resistor R14 is connected with one ends of the resistors R15 and R17 respectively, the other end of the resistor R17 is connected with VCC, the other end of the resistor R15 is respectively connected with the cathode of the bidirectional voltage stabilizing diode D1 and one end of the resistor R27, the other end of the resistor R27 is connected with the anode of the diode D2, the cathode of the diode D2 is connected with one end of the resistor R28, and the anode of the bidirectional voltage stabilizing diode D1 and the other end of the resistor R28 are connected with GND.
Further, the voltage phase sequence switching module comprises a second analog switch chip U6, a second low voltage signal Ub is respectively connected to an aY (13) and a bX (2) pin of the chip U6, a third low voltage signal Uc is respectively connected to an aX (12) and a bY (1) pin of the chip U6, a phase sequence judgment mark S is respectively connected to an Ae (11) and a Be (10) pin of the chip U6, an a (14) pin of the chip U6 outputs a phase-converted second low voltage signal Ub, and a b (15) pin of the chip U6 outputs a phase-converted third low voltage signal Uc; when the phase sequence judging mark S is at a high level, the second low-voltage signal Ub after phase change is connected to the second low-voltage signal Ub, and the third low-voltage signal Uc after phase change is connected to the third low-voltage signal Uc; when the phase sequence judging mark S is at a low level, the second low-voltage signal Ub after phase change is connected to the second low-voltage signal Uc, and the third low-voltage signal Uc after phase change is connected to the third low-voltage signal Ub.
Further, the system current phase sequence switching module comprises a second analog switch chip U6 and a second analog switch chip U7, the second system current signal Ib is respectively connected to the cY (3) of the chip U6 and the cY (5) of the chip U7, the third system current signal Ic is respectively connected to the cY (5) of the chip U6 and the cY (3) of the chip U7, the phase sequence judgment mark S is respectively connected to the Ce (9) of the chip U6 and the Ce (9) of the chip U7, the c (4) of the chip U6 outputs a second system current signal Ib after phase conversion, and the c (4) of the chip U7 outputs a third system current signal Ic after phase conversion; when the phase sequence judging mark S is at a high level, the second system current signal Ib after phase change is accessed to the second system current signal Ib, and the third system current signal Ic after phase change is accessed to the third system current signal Ic; when the phase sequence judging mark S is at a low level, the second system current signal Ib after phase change is connected to the second system current signal Ic, and the third system current signal Ic after phase change is connected to the third system current signal Ib.
Further, the phase sequence switching module of the sending current is an analog switch chip U7, the second sending current signal Ifb is respectively connected to the aY (13) and bX (2) pins of the chip U7, the third sending current signal Ifc is connected to the aX (12) and bY (1) pins of the chip U7, the phase sequence judgment mark S is respectively connected to the Ae (11) and Be (10) pins of the chip U7, the a (14) of the chip U7 outputs a phase-converted second sending current signal Ifb, and the b (15) of the chip U7 outputs a phase-converted third sending current signal Ifc; when the phase sequence judging mark S is at a high level, the second sent current signal Ifb after phase change is connected to the second sent current signal Ifb, and the third sent current signal Ifc after phase change is connected to the third sent current signal Ifc; when the phase sequence judging mark S is at a low level, the second sent current signal Ifb after phase change is connected to the second sent current signal Ifc, and the third sent current signal Ifc after phase change is connected to the third sent current signal Ifb.
The voltage phase sequence self-identification self-adaptation method of the voltage phase sequence self-identification self-adaptation device embedded in the active power filter is characterized by comprising the following steps of:
step one: the power grid voltage signals UA, UB and UC, the power grid current signals IA, IB and IC and the emitted current signals IFA, IFB, IFC are respectively connected to the respective signal conditioning circuits;
step two: sending the conditioned first low-voltage signal Ua and the conditioned second low-voltage signal Ub to a second-order filtering quadrature module, and outputting a line voltage quadrature signal Uab which is used for filtering harmonic waves and has 90-degree lag of fundamental wave phase;
step three: multiplying the quadrature signal Uab with the line voltage Ubc to perform phase discrimination, and outputting Um by phase discrimination;
step four: the phase discrimination output Um outputs a direct current component Umd through a second-order communication direct current isolation module;
step five: judging the phase sequence through the direct current component Umd, and outputting a phase sequence identifier S; s is high level to represent positive sequence, and low level to represent negative sequence; theoretical criteria: when Umd >0, positive sequence; when Umd <0 is negative sequence; in order to avoid the phenomenon of unstable criterion oscillation at the zero point, the actual criterion is as follows: when Umd < UL, negative sequence; when Umd > UH, it is a positive sequence; the rest is kept unchanged;
step six: carrying out phase sequence conversion processing of system voltage, system current and emission current according to the phase sequence identifier S, and maintaining the system voltage, the system current and the emission current unchanged when the phase sequence identifier S is at a high level; when the phase sequence identifier S is at a low level, the second low-voltage signal Ub and the third low-voltage signal Uc are respectively exchanged, the second system current signal Ib and the third system current signal Ic are exchanged, and the second sent current signal Ifb and the third sent current signal Ifc are exchanged;
step seven: the system voltages Ua, ub and Uc maintaining positive sequence, the system currents Ia, ib and Ic are sent to an ADC chip or an ADC of a DSP for sampling;
step eight: carrying out phase locking, harmonic calculation, voltage stabilizing control, current emission tracking and the like on the sampled data processed by the ADC according to the positive sequence of the system voltage, and respectively calculating the duty ratio Dutya, dutyb, dutyc of the A, B, C three-phase IGBT;
step nine: PWM signal distribution is carried out according to the phase sequence identification S uploaded to the DSP; when the phase sequence flag S is at a high level, the sequential allocation is performed in positive order, i.e., pwma=dutya, pwmb=dutyb, pwmc=dutyc; when the phase sequence flag S is at a low level, exchange allocation is performed in negative sequence B, C, i.e., pwma=dutya, pwmb=dutyc, pwmc=dutyb.
Compared with the prior art, the invention has the following advantages and effects:
1. the invention adopts a second-order low-pass filter and a second-order pass direct-isolation module to remove the influence of harmonic wave and interference on phase sequence judgment;
2. according to the invention, hysteresis comparison is adopted as a phase change judgment basis, so that accurate and reliable phase change judgment in a normal voltage range is ensured, and when the voltage is abnormal, the judgment in the original normal state is maintained, and the anti-interference performance of phase sequence judgment is improved;
3. according to the invention, the voltage and current are ensured to be accessed to the main control CPU in a positive sequence manner from the hardware, and the detection method and the control strategy of the power active filter are not required to be changed; after the power supply is connected into the wrong sequence, the power cable does not need to be replaced by power failure;
4. the invention has low technical requirements on equipment installers and improves the installation efficiency of the power active filter.
Drawings
Fig. 1 is a block diagram of an active power filter embedded voltage phase sequence self-identification adaptive device of the present invention.
Fig. 2 is a circuit diagram of a second order low pass filtered quadrature module of the present invention.
Fig. 3 is a circuit diagram of the phase detection module and the second-order through-cut-off module of the present invention.
Fig. 4 is a circuit diagram of the phase sequence judging module of the present invention.
Fig. 5 is a circuit diagram of a voltage phase sequence switching module, a system current phase sequence switching module and an emission current phase sequence switching module according to the present invention.
Fig. 6 is a circuit diagram of a system voltage conditioning module of the present invention.
Fig. 7 is a circuit diagram of a system current conditioning module of the present invention.
Fig. 8 is a circuit diagram of an outgoing current conditioning module of the present invention.
Fig. 9 is a phase sequence criterion diagram of the voltage phase sequence self-identification self-adaptation method of the invention.
Detailed Description
In order to explain in detail the technical solutions adopted by the present invention to achieve the predetermined technical purposes, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments, and that technical means or technical features in the embodiments of the present invention may be replaced without inventive effort, and the present invention will be described in detail below with reference to the accompanying drawings in combination with the embodiments.
As shown in fig. 1, an active power filter embedded voltage phase sequence self-identification adaptive device is characterized in that: the system comprises a system voltage conditioning module, a system current conditioning module, a current sending conditioning module, a second-order low-pass filtering quadrature module, a phase discrimination module, a second-order direct-isolation module, a phase sequence judging module, a voltage phase sequence switching module, a system current phase sequence switching module and a current sending phase sequence switching module;
as shown in fig. 6, 7 and 8, the system voltage conditioning module is connected to the three-phase power grid to condition the power grid high voltages UA, UB and UC into a first low voltage signal UA, a second low voltage signal UB and a third low voltage signal UC; the system current conditioning module conditions current signals IA, IB and IC of the primary CT of the three-phase system into a first system current signal Ia, a second system current signal Ib and a third system current signal IC respectively; the sending current conditioning module respectively conditions the output IFA, IFB, IFC of the three-phase Hall current transformer into a first sending current signal Ifa, a second sending current signal Ifb and a third sending current signal Ifc;
taking the conditioned first low-voltage signal Ua and the conditioned second low-voltage signal Ub as input signals of a second-order low-pass filtering quadrature module, and outputting quadrature signals Uab which contain differential signal fundamental wave components of the first low-voltage signal and the second low-voltage signal; the quadrature signal Uab and the differential signal Ubc of the second low voltage signal Ub and the third low voltage signal Uc are used as inputs of a phase discrimination module; the output Um of the phase discrimination module is sent to a second-order communication and direct-isolation module; the output Umd of the second-order communication direct-isolation module is sent to a phase sequence judging module; the phase sequence judging module outputs a phase sequence judging mark S; the phase sequence judgment mark S, the second low-voltage signal Ub and the third low-voltage signal Uc are used as inputs of a voltage phase sequence switching module; the voltage phase sequence switching module outputs a second low voltage signal Ub and a third low voltage signal Uc which are matched with the voltage positive sequence;
the phase sequence judgment mark S, the second system current signal Ib and the third system current signal Ic are used as inputs of a system current phase sequence switching module; the system current phase sequence switching module outputs a second system current signal Ib and a third system current signal Ic which are matched with the voltage positive sequence;
the phase sequence judgment mark S, the second sent current signal Ifb and the third sent current signal Ifc are used as the input of a sent current phase sequence switching module; the output current phase sequence switching module outputs a second output current signal Ifb and a third output current signal Ifc matched with the positive voltage sequence.
As shown in fig. 2, the second-order low-pass filtering quadrature module is composed of a differential operation circuit and a second-order low-pass filter. The differential operation circuit comprises an operational amplifier U1, a resistor R2, a resistor R3 and a resistor R4; the + pin of the operational amplifier U1 is connected with one end of a resistor R1 and one end of a resistor R2, the other end of the resistor R1 is connected with a first low-voltage signal Ua, and the other end of the resistor R2 is connected with GND; the pin of the operational amplifier U1 is connected with one end of a resistor R3 and one end of a resistor R4, the other end of the resistor R3 is connected with a second low-voltage signal Ub, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1.
The second-order low-pass filter comprises an operational amplifier U2, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C1 and a resistor C2; the positive pin of the operational amplifier U2 is connected with one end of a resistor R6 and one end of a capacitor C2, the other end of the resistor R6 is connected with one end of a resistor R5 and one end of a capacitor C1, the other end of the resistor R5 is connected to the output end of the operational amplifier U1, the other end of the capacitor C1 is connected to the output end of the operational amplifier U2, the negative pin of the operational amplifier U2 is connected with one end of a resistor R8 and one end of a resistor R7, the other ends of the resistor R8 and the capacitor C2 are connected with GND, and the other end of the resistor R7 is connected to the output end of the operational amplifier U2.
Second order low pass filter positiveThe traffic module is characterized in that: the cut-off angle frequency of the second-order low-pass filter is 100 pi rad/s, the gain is 2, and the lag is 90 degrees at the angle frequency of 100 pi rad/s; resistor r7=r8=4r5=4r6, capacitor c1=c2,
as shown in fig. 3, the phase discrimination module is a four-quadrant analog multiplier, the X1 pin of the four-quadrant analog multiplier chip U3 is connected to the output end of the operational amplifier U2, the X2 and Z pins are connected to GND, the Y1 pin is connected to the second low voltage signal Ub, and the Y2 pin is connected to the third low voltage signal Uc; the W pin is the output end.
The second-order pass direct-isolation module comprises an operational amplifier U4, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C3 and a capacitor C4; the positive pin of the operational amplifier U4 is connected with one end of a resistor R10 and one end of a capacitor C4, the other end of the resistor R10 is connected with one end of a resistor R9 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the output end of the operational amplifier U4, the other end of the resistor R9 is connected to the W pin of the chip U3, the negative pin of the operational amplifier U4 is connected with one end of a resistor R11 and one end of a resistor R12, the other end of the resistor R12 and the other end of the capacitor C4 are connected with GND, and the other end of the resistor R11 is connected to the output end of the operational amplifier U4.
The second-order communication and direct-isolation module is characterized in that: the cut-off angle frequency of the low-pass filter is 20 pi rad/s; resistor r11=r12=4r9=4r10, capacitor c3=c4,
as shown in fig. 4, the phase sequence judging module includes a comparator U5, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, and a zener diode D1; the positive end of the comparator U5 is respectively connected with one ends of the resistors R13 and R16, the other end of the resistor R13 is connected with the output end of the operational amplifier U4, the other end of the resistor R16 is connected with the output end of the comparator U5, one end of the comparator U5 is connected with one end of the resistor R14, the other end of the resistor R14 is connected with one ends of the resistors R15 and R17 respectively, the other end of the resistor R17 is connected with VCC, the other end of the resistor R15 is respectively connected with the cathode of the bidirectional voltage stabilizing diode D1 and one end of the resistor R27, the other end of the resistor R27 is connected with the anode of the diode D2, the cathode of the diode D2 is connected with one end of the resistor R28, and the anode of the bidirectional voltage stabilizing diode D1 and the other end of the resistor R28 are connected with GND.
The phase sequence judging module adopts an uplink double hysteresis comparator when Umd>In the UH process, the comparator U5 outputs a bidirectional voltage stabilizing value +Uz on the bidirectional voltage stabilizing tube D1, the phase sequence judgment mark S is high level, the level amplitude is close to the voltage stabilizing value +Uz of the bidirectional voltage stabilizing diode D1, and the phase sequence is positive; when Umd<In the UL, the comparator U5 outputs a bi-directional regulator voltage-stabilizing value-Uz on the bi-directional regulator D1, the phase sequence judgment flag S is at a low level, and the level amplitude is close to zero level, which indicates that the phase sequence is a negative sequence; when U is H ≥U md ≥U L When the output of the comparator U5 is unchanged, the original state is kept unchanged; determining hysteresis width and multiplier reduction ratio according to theoretical phase discrimination module output value and input voltage normal range, and its parameter U H ，U L The specific implementation form is as follows:where k is the ratio of the minimum value of the allowable input voltage to the nominal value, at nominal voltage +.>Peak value of Uab, U at rated voltage bcmax The multiplier scales down 10 times for the peak value of the line voltage Ubc.
The hysteresis width of the phase sequence judging module isWherein U is z For the voltage stabilizing value of the bidirectional voltage stabilizing diode D1, the resistor configuration satisfies +.>
As shown in fig. 5, the voltage phase sequence switching module includes an alternative analog switch chip U6, a second low voltage signal Ub is respectively connected to aY (13) and bX (2) pins of the chip U6, a third low voltage signal Uc is respectively connected to aX (12) and bY (1) pins of the chip U6, a phase sequence judgment identifier S is respectively connected to Ae (11) and Be (10) pins of the chip U6, an a (14) pin of the chip U6 outputs a phase-converted second low voltage signal Ub, and a b (15) pin of the chip U6 outputs a phase-converted third low voltage signal Uc; when the phase sequence judging mark S is at a high level, the second low-voltage signal Ub after phase change is connected to the second low-voltage signal Ub, and the third low-voltage signal Uc after phase change is connected to the third low-voltage signal Uc; when the phase sequence judging mark S is at a low level, the second low-voltage signal Ub after phase change is connected to the second low-voltage signal Uc, and the third low-voltage signal Uc after phase change is connected to the third low-voltage signal Ub.
The system current phase sequence switching module comprises a second-choice analog switch chip U6 and a second-choice analog switch chip U7, a second system current signal Ib is respectively connected to a cY (3) of the chip U6 and a cX (5) pin of the chip U7, a third system current signal Ic is respectively connected to the cX (5) of the chip U6 and the cY (3) pin of the chip U7, a phase sequence judgment mark S is respectively connected to a Ce (9) of the chip U6 and a Ce (9) pin of the chip U7, a c (4) pin of the chip U6 outputs a second system current signal Ib after phase conversion, and a c (4) pin of the chip U7 outputs a third system current signal Ic after phase conversion; when the phase sequence judging mark S is at a high level, the second system current signal Ib after phase change is accessed to the second system current signal Ib, and the third system current signal Ic after phase change is accessed to the third system current signal Ic; when the phase sequence judging mark S is at a low level, the second system current signal Ib after phase change is connected to the second system current signal Ic, and the third system current signal Ic after phase change is connected to the third system current signal Ib.
The phase sequence switching module of the emitted current is an alternative analog switch chip U7, a second emitted current signal Ifb is respectively connected to an aY (13) pin and a bX (2) pin of the chip U7, a third emitted current signal Ifc is connected to an aX (12) pin and a bY (1) pin of the chip U7, a phase sequence judgment mark S is respectively connected to an Ae (11) pin and a Be (10) pin of the chip U7, an a (14) pin of the chip U7 outputs a second emitted current signal Ifb after phase conversion, and a b (15) pin of the chip U7 outputs a third emitted current signal Ifc after phase conversion; when the phase sequence judging mark S is at a high level, the second sent current signal Ifb after phase change is connected to the second sent current signal Ifb, and the third sent current signal Ifc after phase change is connected to the third sent current signal Ifc; when the phase sequence judging mark S is at a low level, the second sent current signal Ifb after phase change is connected to the second sent current signal Ifc, and the third sent current signal Ifc after phase change is connected to the third sent current signal Ifb.
As shown in fig. 9, a voltage phase sequence self-identification adaptive method of a voltage phase sequence self-identification adaptive device embedded in an active power filter includes the following steps:
step one: the power grid voltage signals UA, UB and UC, the power grid current signals IA, IB and IC and the emitted current signals IFA, IFB, IFC are respectively connected to the respective signal conditioning circuits;
step two: sending the conditioned first low-voltage signal Ua and the conditioned second low-voltage signal Ub to a second-order filtering quadrature module, and outputting a line voltage quadrature signal Uab which is used for filtering harmonic waves and has 90-degree lag of fundamental wave phase;
step three: multiplying the quadrature signal Uab with the line voltage Ubc to perform phase discrimination, and outputting Um by phase discrimination;
step four: the phase discrimination output Um outputs a direct current component Umd through a second-order communication direct current isolation module;
step five: judging the phase sequence through the direct current component Umd, and outputting a phase sequence identifier S; s is high level to represent positive sequence, and low level to represent negative sequence; theoretical criteria: when Umd >0, positive sequence; when Umd <0 is negative sequence; in order to avoid the phenomenon of unstable criterion oscillation at the zero point, the actual criterion is as follows: when Umd < UL, negative sequence; when Umd > UH, it is a positive sequence; the rest is kept unchanged;
step six: carrying out phase sequence conversion processing of system voltage, system current and emission current according to the phase sequence identifier S, and maintaining the system voltage, the system current and the emission current unchanged when the phase sequence identifier S is at a high level; when the phase sequence identifier S is at a low level, the second low-voltage signal Ub and the third low-voltage signal Uc are respectively exchanged, the second system current signal Ib and the third system current signal Ic are exchanged, and the second sent current signal Ifb and the third sent current signal Ifc are exchanged;
step seven: the system voltages Ua, ub and Uc maintaining positive sequence, the system currents Ia, ib and Ic are sent to an ADC chip or an ADC of a DSP for sampling;
step eight: carrying out phase locking, harmonic calculation, voltage stabilizing control, current emission tracking and the like on the sampled data processed by the ADC according to the positive sequence of the system voltage, and respectively calculating the duty ratio Dutya, dutyb, dutyc of the A, B, C three-phase IGBT;
step nine: PWM signal distribution is carried out according to the phase sequence identification S uploaded to the DSP; when the phase sequence flag S is at a high level, the sequential allocation is performed in positive order, i.e., pwma=dutya, pwmb=dutyb, pwmc=dutyc; when the phase sequence flag S is at a low level, exchange allocation is performed in negative sequence B, C, i.e., pwma=dutya, pwmb=dutyc, pwmc=dutyb.
The invention adopts a second-order low-pass filter and a second-order pass direct-isolation module to remove the influence of harmonic wave and interference on phase sequence judgment; the hysteresis comparison is adopted as a phase change judgment basis, so that accurate and reliable phase change judgment in a normal voltage range is ensured, and when the voltage is abnormal, the judgment in the original normal state is maintained, and the anti-interference performance of phase sequence judgment is improved; the voltage and the current are ensured to be accessed to the main control CPU in a positive sequence manner from the hardware, and the detection method and the control strategy of the power active filter are not required to be changed; after the power supply is connected into the wrong sequence, the power cable does not need to be replaced by power failure; the technical requirements on equipment installers are not high, and the installation efficiency of the power active filter is improved.
The present invention is not limited to the preferred embodiments, but is capable of modification and variation in detail, and other embodiments, such as those described above, of making various modifications and equivalents will fall within the spirit and scope of the present invention.
Claims (9)
1. An embedded voltage phase sequence self-identification self-adaptation device of an active power filter is characterized in that: the system comprises a system voltage conditioning module, a system current conditioning module, a current sending conditioning module, a second-order low-pass filtering quadrature module, a phase discrimination module, a second-order direct-isolation module, a phase sequence judging module, a voltage phase sequence switching module, a system current phase sequence switching module and a current sending phase sequence switching module;
the system voltage conditioning module is connected into a three-phase power grid to condition high voltage UA, UB and UC of the power grid into a first low voltage signal Ua, a second low voltage signal Ub and a third low voltage signal Uc; the system current conditioning module conditions current signals IA, IB and IC of primary CT of the three-phase power grid into a first system current signal Ia, a second system current signal Ib and a third system current signal IC respectively; the sending current conditioning module respectively conditions the output IFA, IFB, IFC of the three-phase Hall current transformer into a first sending current signal Ifa, a second sending current signal Ifb and a third sending current signal Ifc;
taking the conditioned first low-voltage signal Ua and the conditioned second low-voltage signal Ub as input signals of a second-order low-pass filtering quadrature module, and outputting quadrature signals Uab which contain differential signal fundamental wave components of the first low-voltage signal and the second low-voltage signal; the quadrature signal Uab, the second low voltage signal Ub and the third low voltage signal Uc are used as inputs of a phase discrimination module; the output Um of the phase discrimination module is sent to a second-order communication and direct-isolation module; the output Umd of the second-order communication direct-isolation module is sent to a phase sequence judging module; the phase sequence judging module outputs a phase sequence judging mark S; the phase sequence judgment mark S, the second low-voltage signal Ub and the third low-voltage signal Uc are used as inputs of a voltage phase sequence switching module; the voltage phase sequence switching module outputs a second low voltage signal Ub and a third low voltage signal Uc which are matched with the voltage positive sequence;
the phase sequence judgment mark S is used as the input of a system current phase sequence switching module; the system current phase sequence switching module outputs a second system current signal Ib and a third system current signal Ic which are matched with the voltage positive sequence;
the phase sequence judgment mark S, the second sent current signal Ifb and the third sent current signal Ifc are used as the input of a sent current phase sequence switching module; the output current phase sequence switching module outputs a second output current signal Ifb and a third output current signal Ifc matched with the positive voltage sequence.
2. An active power filter embedded voltage phase sequence self-identification adaptive device as claimed in claim 1, wherein: the second-order low-pass filtering quadrature module consists of a differential operation circuit and a second-order low-pass filter;
the differential operation circuit comprises an operational amplifier U1, a resistor R2, a resistor R3 and a resistor R4; the + pin of the operational amplifier U1 is connected with one end of a resistor R1 and one end of a resistor R2, the other end of the resistor R1 is connected with a first low-voltage signal Ua, and the other end of the resistor R2 is connected with GND; the pin of the operational amplifier U1 is connected with one end of a resistor R3 and one end of a resistor R4, the other end of the resistor R3 is connected with a second low-voltage signal Ub, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1;
the second-order low-pass filter comprises an operational amplifier U2, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a capacitor C1 and a capacitor C2; the positive pin of the operational amplifier U2 is connected with one end of a resistor R6 and one end of a capacitor C2, the other end of the resistor R6 is connected with one end of a resistor R5 and one end of a capacitor C1, the other end of the resistor R5 is connected to the output end of the operational amplifier U1, the other end of the capacitor C1 is connected to the output end of the operational amplifier U2, the negative pin of the operational amplifier U2 is connected with one end of a resistor R8 and one end of a resistor R7, the other ends of the resistor R8 and the capacitor C2 are connected with GND, and the other end of the resistor R7 is connected to the output end of the operational amplifier U2.
3. An active power filter embedded voltage phase sequence self-identification adaptive device as claimed in claim 2, wherein: the phase discrimination module is a four-quadrant analog multiplier, the X1 pin of the four-quadrant analog multiplier chip U3 is connected with the output end of the operational amplifier U2, the X2 pin and the Z pin are connected with GND, the Y1 pin is connected with the second low-voltage signal Ub, and the Y2 pin is connected with the third low-voltage signal Uc; the W pin is the output end.
4. A voltage phase sequence self-identification adaptive device embedded in an active power filter as claimed in claim 3, wherein: the second-order pass direct-isolation module comprises an operational amplifier U4, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C3 and a capacitor C4; the positive pin of the operational amplifier U4 is connected with one end of a resistor R10 and one end of a capacitor C4, the other end of the resistor R10 is connected with one end of a resistor R9 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the output end of the operational amplifier U4, the other end of the resistor R9 is connected to the W pin of the chip U3, the negative pin of the operational amplifier U4 is connected with one end of a resistor R11 and one end of a resistor R12, the other end of the resistor R12 and the other end of the capacitor C4 are connected with GND, and the other end of the resistor R11 is connected to the output end of the operational amplifier U4.
5. The adaptive device for voltage phase sequence self-identification embedded in an active power filter of claim 4, wherein: the phase sequence judging module comprises a comparator U5, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a zener diode D1, a resistor R27, a diode D2 and a resistor R28; the positive end of the comparator U5 is respectively connected with one ends of the resistors R13 and R16, the other end of the resistor R13 is connected with the output end of the operational amplifier U4, the other end of the resistor R16 is connected with the output end of the comparator U5, one end of the comparator U5 is connected with one end of the resistor R14, the other end of the resistor R14 is connected with one ends of the resistors R15 and R17 respectively, the other end of the resistor R17 is connected with VCC, the other end of the resistor R15 is respectively connected with the cathode of the bidirectional voltage stabilizing diode D1 and one end of the resistor R27, the other end of the resistor R27 is connected with the anode of the diode D2, the cathode of the diode D2 is connected with one end of the resistor R28, and the anode of the bidirectional voltage stabilizing diode D1 and the other end of the resistor R28 are connected with GND.
6. The adaptive device for voltage phase sequence self-identification embedded in an active power filter of claim 5, wherein: the voltage phase sequence switching module comprises an alternative analog switch chip U6, a second low-voltage signal Ub is respectively connected to an aY (13) pin and a bX (2) pin of the chip U6, a third low-voltage signal Uc is respectively connected to an aX (12) pin and a bY (1) pin of the chip U6, a phase sequence judging mark S is respectively connected to an Ae (11) pin and a Be (10) pin of the chip U6, an a (14) pin of the chip U6 outputs a phase-converted second low-voltage signal Ub, and a b (15) pin of the chip U6 outputs a phase-converted third low-voltage signal Uc; when the phase sequence judging mark S is at a high level, the second low-voltage signal Ub after phase change is connected to the second low-voltage signal Ub, and the third low-voltage signal Uc after phase change is connected to the third low-voltage signal Uc; when the phase sequence judging mark S is at a low level, the second low-voltage signal Ub after phase change is connected to the third low-voltage signal Uc, and the third low-voltage signal Uc after phase change is connected to the second low-voltage signal Ub.
7. The adaptive device for phase sequence self-identification of voltage embedded in an active power filter of claim 6, wherein: the system current phase sequence switching module comprises a second-choice analog switch chip U6 and a second-choice analog switch chip U7, a second system current signal Ib is respectively connected to a cY (3) of the chip U6 and a cX (5) pin of the chip U7, a third system current signal Ic is respectively connected to the cX (5) of the chip U6 and the cY (3) pin of the chip U7, a phase sequence judgment mark S is respectively connected to a Ce (9) of the chip U6 and a Ce (9) pin of the chip U7, a c (4) pin of the chip U6 outputs a second system current signal Ib after phase conversion, and a c (4) pin of the chip U7 outputs a third system current signal Ic after phase conversion; when the phase sequence judging mark S is at a high level, the second system current signal Ib after phase change is accessed to the second system current signal Ib, and the third system current signal Ic after phase change is accessed to the third system current signal Ic; when the phase sequence judging mark S is at a low level, the second system current signal Ib after phase change is connected to the third system current signal Ic, and the third system current signal Ic after phase change is connected to the second system current signal Ib.
8. The active power filter embedded voltage phase sequence self-identification adaptive device of claim 7, wherein: the phase sequence switching module of the emitted current is an alternative analog switch chip U7, a second emitted current signal Ifb is respectively connected to an aY (13) pin and a bX (2) pin of the chip U7, a third emitted current signal Ifc is respectively connected to an aX (12) pin and a bY (1) pin of the chip U7, a phase sequence judgment mark S is respectively connected to an Ae (11) pin and a Be (10) pin of the chip U7, an a (14) pin of the chip U7 outputs a second emitted current signal Ifb after phase conversion, and a b (15) pin of the chip U7 outputs a third emitted current signal Ifc after phase conversion; when the phase sequence judging mark S is at a high level, the second sent current signal Ifb after phase change is connected to the second sent current signal Ifb, and the third sent current signal Ifc after phase change is connected to the third sent current signal Ifc; when the phase sequence judging mark S is at a low level, the second sent current signal Ifb after phase change is connected to the third sent current signal Ifc, and the third sent current signal Ifc after phase change is connected to the second sent current signal Ifb.
9. A voltage phase sequence self-identification adaptation method of an active power filter embedded voltage phase sequence self-identification adaptation device according to any of claims 1-8, characterized by comprising the steps of:
step one: the power grid voltage signals UA, UB and UC, the power grid current signals IA, IB and IC and the emitted current signals IFA, IFB, IFC are respectively connected to the respective signal conditioning circuits;
step two: sending the conditioned first low-voltage signal Ua and the conditioned second low-voltage signal Ub to a second-order low-pass filtering quadrature module, and outputting a line voltage quadrature signal Uab which is used for filtering harmonic waves and has 90-degree lag of fundamental wave phase;
step three: multiplying the quadrature signal Uab with the line voltage Ubc to perform phase discrimination, and outputting Um by phase discrimination;
step four: the phase discrimination output Um outputs a direct current component Umd through a second-order communication direct current isolation module;
step five: judging the phase sequence through the direct current component Umd, and outputting a phase sequence identifier S; s is high level to represent positive sequence, and low level to represent negative sequence; theoretical criteria: when Umd >0, positive sequence; when Umd <0 is negative sequence; in order to avoid the phenomenon of unstable criterion oscillation at the zero point, the actual criterion is as follows: when Umd < UL, negative sequence; when Umd > UH, it is a positive sequence; the rest is kept unchanged;
step six: carrying out phase sequence conversion processing of system voltage, system current and emission current according to the phase sequence identifier S, and maintaining the system voltage, the system current and the emission current unchanged when the phase sequence identifier S is at a high level; when the phase sequence identifier S is at a low level, the second low-voltage signal Ub and the third low-voltage signal Uc are respectively exchanged, the second system current signal Ib and the third system current signal Ic are exchanged, and the second sent current signal Ifb and the third sent current signal Ifc are exchanged;
step seven: the system voltages Ua, ub and Uc maintaining positive sequence, the system currents Ia, ib and Ic are sent to an ADC chip or an ADC of a DSP for sampling;
step eight: carrying out phase locking, harmonic calculation, voltage stabilizing control, current emission tracking and the like on the sampled data processed by the ADC according to the positive sequence of the system voltage, and respectively calculating the duty ratio Dutya, dutyb, dutyc of the A, B, C three-phase IGBT;
step nine: PWM signal distribution is carried out according to the phase sequence identification S uploaded to the DSP; when the phase sequence flag S is at a high level, the sequential allocation is performed in positive order, i.e., pwma=dutya, pwmb=dutyb, pwmc=dutyc; when the phase sequence flag S is at a low level, exchange allocation is performed in negative sequence B, C, i.e., pwma=dutya, pwmb=dutyc, pwmc=dutyb.
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