CN114205315B - Frame output scheduling method supporting Qbv mechanism in time sensitive network - Google Patents
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Abstract
The invention discloses a frame output scheduling method supporting Qbv mechanism in a time sensitive network, which relates to the technical field of time sensitive networks and comprises the following steps: and calibrating an ST time slot slicing strategy and an RC time slot slicing strategy in advance, carrying out slicing allocation strategy on time slot resources according to flow characteristics, calibrating Qbv output queue constraint to simplify data plane forwarding logic and control plane planning, calibrating Qbv gating table structures based on the ST time slot slicing strategy and the RC time slot slicing strategy, and carrying out ST time slot slicing frame output scheduling processing and RC time slot frame output scheduling processing based on the ST time slot slicing strategy and the RC time slot slicing strategy. The invention decouples the ST flow and RC flow scheduling planning, designs a Qbv output queue structure, a gating table structure and a frame output scheduling method based on the ST/RC time slot slicing strategy, and can provide effective support for the scheduling logic of the data plane output port and the design of an upper layer planning algorithm.
Description
Technical Field
The invention relates to the technical field of time-sensitive networks, in particular to a frame output scheduling method supporting a Qbv mechanism in a time-sensitive network.
Background
Time sensitive networks (Time-SENSITIVE NETWORKING, TSNs) are an ethernet technology that guarantees deterministic transmission of critical traffic, where the traffic shaping mechanism is the key to guarantee certainty. The IEEE 802.1 working group defines a Time-aware shaping mechanism (Time-AWARE SHAPER, TAS) in the 802.1 Qbv standard, through which the certainty of the transmission delay of critical traffic on end systems and switches is guaranteed.
The principle of the gating mechanism specified by the 802.1Qbv is shown in fig. 1, 8 gating is set at the standard 8 queue output ends, the gating state is on and indicates that the queue is allowed to output the message, and the gating state is off and indicates that the queue is not allowed to output the message. The gating state is determined by the Qbv gating table and the current time. The Qbv gating table describes gating states of each time period within a gating period, and the gating states are set through circulation. Each entry defines the gating state of each queue at each slot, and the validation time of that entry. When the gating states of the queues are open, the output queue selection algorithm selects a specific queue output message according to the strategy. Thus, in 802.1Qbv enabled devices, the generation of control plane Qbv gating tables and the support of data planes for gating-based output scheduling method design are critical.
The effective time and all gating states of a gating table in the Qbv gating table need to be calculated, time slot allocation of ST flow and non-ST flow in the existing method can interfere with each other, and a feasible solution needs to be found through repeated iteration adjustment of a time slot allocation strategy, so that the design complexity and the calculation complexity of a control plane planning algorithm are very high. To simplify Qbv gating table generation,
The invention designs decoupling ST flow scheduling and non-ST flow scheduling, and the main idea is to divide a time line into equal-length time slot blocks (blocks), wherein each time slot Block comprises an ST time slot slice and an RC time slot slice, the ST time slot slice is exclusively used for transmitting ST frames and BE frames, and the RC time slot slice is exclusively used for transmitting RC frames and BE frames. And a Guard Band (GB) slot slice is used between the ST slot slice and the RC slot slice to ensure isolation. Based on this slot allocation strategy, ST flows and non-ST flow planning do not interfere with each other and partial gating states can be predetermined prior to execution of the planning algorithm, thereby effectively simplifying computation of the control plane Qbv gating table.
For the problems in the related art, no effective solution has been designed at present.
Disclosure of Invention
Aiming at the problems in the related art, the invention designs a frame output scheduling method supporting a Qbv mechanism in a time sensitive network so as to overcome the technical problems in the prior art.
The technical scheme of the invention is realized as follows:
a frame output scheduling method supporting Qbv mechanism in time sensitive network includes the following steps:
The method comprises the following steps:
Step S1, pre-calibrating ST time slot slices and RC time slot slices, wherein the steps include that time slot resources are subjected to a slice allocation strategy according to flow characteristics;
S2, calibrating Qbv output queue structure, wherein the Qbv output queue structure comprises calibration Qbv output queue constraint to simplify data plane forwarding logic and control plane planning;
S3, calibrating a Qbv gating table structure, wherein the Qbv gating table structure is calibrated based on ST time slot slices and RC time slot slices;
s4, performing frame scheduling, including ST time slot slice frame output scheduling processing and RC time slot frame output scheduling processing based on ST time slot slice and RC time slot slice strategies;
the ST time slot slice frame output scheduling processing comprises the steps of scheduling and transmitting packets in an ST queue and a BE queue with gating states being opened;
and the RC time slot frame output scheduling processing comprises scheduling and transmitting the packets in an RC queue and a BE queue with open gating states.
The slice allocation strategy for the time slot resources according to the flow characteristics comprises the following steps:
The calibration time line is divided into equal-length time periods which are expressed as blocks, the length of each Block is T4-T0, and the interior of each Block comprises an ST time slot slice, an RC time slot slice and a GB time slot slice;
ST slot slice transmits ST and BE frames, RC slot slice transmits RC and BE frames, GB slot slice avoids packet transmission across ST and RC slot slices;
The method comprises the steps that the lengths of each time slot slice in each Block are the same, and the starting time and the ending time of each time slot in the first Block are determined;
And calculating the starting time and the ending time of each time slot in each subsequent Block based on the number and the length of the Block.
The Qbv output queue constraint calibration method comprises the following steps:
constraint self-defining total number of output queues, flow type and priority corresponding to each queue;
in the same gating list item, at most, only 1 ST queue is gated on, and other ST queues with gating off can only input messages;
restricting the ST queue which is opened for gating, outputting messages only, and requiring all messages in the queue to be completely emptied in an opening time period;
The constraint output queue is selected in a strict priority mode, priorities of all ST queues are the same, priorities can BE distinguished among RC queues, priorities can BE distinguished among BE queues, and meanwhile, the priorities of ST queues are guaranteed to BE higher than priorities of all RC queues and are higher than priorities of all BE queues.
Wherein, qbv gating table structure includes: queue ID, gating start time and gating state, wherein;
The queue ID represents a queue number corresponding to the gating state;
the gating start time represents the start time of the current gating state to take effect, and the difference value between the effective time of the next gating state and the start time of the current gating state is the time for keeping the current gating state;
The gating states comprise an opening state and a closing state, wherein the opening state represents that the queue allows output messages at the current moment, and the closing state represents that the queue prohibits output messages at the current moment.
The ST time slot slice frame output scheduling process comprises the following steps:
Step S401, acquiring an ST queue ST_X with the gating on;
step S402, outputting all frames in the ST_X queue;
step S403, judging whether all BE queues in the ST time slot slice can send messages, if so, executing step S404; if not, then step S405 is performed;
Step S404, outputting a packet in BE queue with highest priority in ST time slot slice;
step S405, judging whether ST time slot slicing is cut off, if yes, finishing execution; if not, step S403 is performed.
The RC time slot frame output scheduling processing comprises the following steps:
step S406, judging whether all RC queues in the RC time slot slice can send messages, if so, executing step S407; if not, executing step S409;
Step S407, outputting a packet in the RC queue with the highest priority in the RC time slot slice;
step S408, judging whether the RC time slot slice is cut off, if so, finishing execution; if not, then step S406 is performed;
Step S409, judging whether all BE queues in the RC time slot slice can send messages, if so, executing step S410; if not, then step S408 is performed;
Step S410, a packet in the BE queue with the highest priority in the RC slot slice is output, and step S408 is executed.
The invention has the beneficial effects that:
The invention discloses a frame output scheduling method supporting Qbv mechanism in a time sensitive network, which comprises the steps of calibrating ST time slot slicing and RC time slot slicing strategies in advance, carrying out slicing allocation strategies on time slot resources according to flow characteristics, calibrating Qbv output queue constraint to simplify data plane forwarding logic and control plane planning, calibrating Qbv gating table structures based on the ST time slot slicing and RC time slot slicing strategies, carrying out ST time slot slice frame output scheduling processing and RC time slot frame output scheduling processing based on the ST time slot slicing and RC time slot slicing strategies, realizing decoupling of ST flow and RC flow scheduling planning, not only defining the number of queues in the output queue structure and the flow types corresponding to each queue by a user, but also driving frame output scheduling output according to gating states, wherein the frame scheduling method comprises Qbv gating tables and frame output scheduling, the gating states in the Qbv gating tables are configured by upper layer planning tools, supporting the ST time slot slicing and the slot gating strategies, and the frame output scheduling selecting grouping output according to the current queue gating states and priority strategies, and providing effective support for scheduling logic and upper layer algorithm planning output of data plane output ports.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a Qbv gating mechanism of a frame output scheduling method supporting a Qbv mechanism in a time sensitive network according to an embodiment of the invention;
fig. 2 is a schematic diagram of ST slot slice and RC slot slice allocation for a frame output scheduling method supporting Qbv mechanism in a time sensitive network according to an embodiment of the present invention;
FIG. 3 is an output queue structure and frame scheduling method for a frame output scheduling method supporting a Qbv mechanism in a time sensitive network according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a Qbv gating table structure of a frame output scheduling method supporting a Qbv mechanism in a time sensitive network according to an embodiment of the invention;
FIG. 5 is a flow chart of ST slot slice frame scheduling for a frame output scheduling method supporting Qbv mechanism in a time sensitive network according to an embodiment of the present invention;
Fig. 6 is a flow chart of RC slot slice frame scheduling for a frame output scheduling method supporting Qbv mechanism in a time sensitive network according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which are derived by a person skilled in the art based on the embodiments of the invention, fall within the scope of protection of the invention.
According to the embodiment of the invention, a frame output scheduling method supporting a Qbv mechanism in a time sensitive network is provided.
As shown in fig. 1 to 6, according to the frame output scheduling method supporting the Qbv mechanism in the time-sensitive network, the scheduling logic of the data plane output port adopting the Qbv gating mechanism and the upper layer planning algorithm design provide effective support, and the method comprises the following steps:
Step S1, pre-calibrating ST time slot slices and RC time slot slices, wherein the steps include that time slot resources are subjected to a slice allocation strategy according to flow characteristics;
In this technical solution, as shown in fig. 2, the time line is divided into equal-length time segments, denoted as blocks, each Block has a length of T4-T0, and includes an ST slot slice (T0-T1 in Block 0), an RC slot slice (T2-T3 in Block 0), and two GB slot slices (T1-T2 and T3-T4 in Block 0). ST slot slice transmits ST and BE frames, RC slot slice transmits RC and BE frames, and GB slot slice avoids packet transmissions across ST and RC slot slices. The respective slot slice lengths of the ST/RC/GB slot slices in each Block are the same, so that as long as the start and end times (T0, T1, T2, T3, T4) of each slot inside the first Block are determined, the start and end times of each slot inside the subsequent blocks can be calculated based on the number of the blocks and the Block length (blen), for example, the RC slot slice real time t6=t2+ blen of the Block 1.
S2, calibrating Qbv output queue structure, wherein the Qbv output queue structure comprises calibration Qbv output queue constraint to simplify data plane forwarding logic and control plane planning;
According to the technical scheme, the design of a data plane forwarding logic and a control plane planning algorithm supporting Qbv is simplified, and Qbv output queue constraint is calibrated based on an output queue structure and a frame scheduling method in the 802.1 Qbv standard, and the method specifically comprises the following steps:
constraint self-defining total number of output queues, flow type and priority corresponding to each queue;
in the same gating list item, at most, only 1 ST queue is gated on, and other ST queues with gating off can only input messages;
restricting the ST queue which is opened for gating, outputting messages only, and requiring all messages in the queue to be completely emptied in an opening time period;
The constraint output queue is selected in a strict priority mode, priorities of all ST queues are the same, priorities can BE distinguished among RC queues, priorities can BE distinguished among BE queues, and meanwhile, the priorities of ST queues are guaranteed to BE higher than priorities of all RC queues and are higher than priorities of all BE queues.
In addition, as shown in fig. 3, in the present technical solution, the Qbv output queues have 8 queues in total, and mainly include the following features:
a) Among the 8 queues, there are 4 ST queues, 2 RC queues (high-low priority) and 2 BE queues (high-low priority);
b) In the same gating list item, at most, gating of 1 ST queues is opened, and other ST queues with gating closed can only input messages.
D) And for the ST queue with the open gate control, only the messages can be output, all the messages in the queue are required to be completely emptied in the opening time period, and the ST time slot planning algorithm can ensure that the ST time slot slice boundary is not exceeded before the emptying.
D) The output queues are selected by adopting a strict priority mode, the priorities of the 4 ST queues are 4, the priorities of the 2 RC queues are 3 and 2, the priorities of the 2 BE queues are 1 and 0, and the priority order is ST0=ST1=ST2=ST3 > RC0> RC1> BE0> BE1.
S3, calibrating a Qbv gating table structure, wherein the Qbv gating table structure is calibrated based on ST time slot slices and RC time slot slices;
according to the technical scheme, as shown in fig. 4, the Qbv gating table structure comprises: queue ID, gating start time and gating state, wherein;
Queue ID, which indicates the queue number corresponding to the gating state;
the gating start time represents the start time of the current gating state to take effect, and the difference value between the effective time of the next gating state and the start time of the current gating state is the time for keeping the current gating state;
The gating state comprises an opening state and a closing state, wherein the opening state represents that the queue allows output of the message at the current moment, and the closing state represents that the queue prohibits output of the message at the current moment.
In addition, to effectively support the slot slice allocation strategy, the Qbv gating table is logically composed of a plurality of blocks, and each Block has 4 entries corresponding to 4 slot slices respectively. In each Block, the gating state of the first entry, i.e., ST slot slice, is: 1 ST queue gating state is on, all BE queue gating states are on, and other queue gating states are off; the third entry, i.e., the gating state of the RC slot slice, is: all RC queues and all BE queues are gated on, and other queues are all off; the gating states of the second and fourth entries, i.e. the GB slots, are all 0. In each Block, except that the gating state of the ST queue in the ST slot slice is configurable, the remaining gating states are predetermined according to the ST slot slice and RC slot slice policies. And determining the gating state of the ST queue in the ST slot slice according to a slot planning result.
In addition, as shown in fig. 4, in this technical solution, the Qbv gating table is logically composed of a plurality of blocks, and each Block has 4 entries corresponding to 4 slot slices. In each Block, the gating states are predetermined except that the gating states of the 4 ST queues in the ST slot slice are configurable. In Block 0, the gating states of the first entry, i.e., the ST slot slice, are in turn: s0=x0, st1=x1, st2=x2, st3=x3, rc0=0, rc1=0, be0=1; BE1 = 1; the third entry, i.e. the gating state of the RC slot slice, is in turn: st0=0, st1=0, st2=0, st3=0, rc0=1, rc1=1, be0=1; BE1 = 1; the gating states of the second and fourth entries, i.e. the GB slots, are all 0. X0, X1, X2, X3 in Block 0, these values need to be determined from the slot planning result of the ST frame.
S4, performing frame scheduling, including ST time slot slice frame output scheduling processing, RC time slot frame output scheduling processing and GB time slot frame output scheduling processing based on ST time slot slice and RC time slot slice strategies; the ST time slot slice frame output scheduling processing mainly schedules and transmits packets in an ST queue and a BE queue with open gating states; the RC time slot frame output scheduling processing mainly schedules and transmits packets in an RC queue and a BE queue with open gating states; and the GB time slot frame output schedule processes that the gating states in the GB time slots are all closed, and scheduling transmission is not performed.
In addition, as shown in fig. 5, in the present technical solution, in Block 0, the time T0-T1 is the ST slot slice, one of four queues ST0, ST1, ST2 and ST3 is gated on, two BE queues are on, and other ST queues and two RC queues are gated off, including the following steps:
step 1, acquiring an ST queue ST_X with a gating on;
step 2, outputting all frames in the ST_X queue;
Step 3: judging whether a BE0 queue in the ST time slot slice has a transmittable message, if so, executing the step 4; if not, executing the step 6;
step 4: outputting a packet in a BE0 queue in the ST slot slice;
step 5: judging whether ST time slot slicing is cut off or not, if so, finishing execution; if not, executing the step 3;
Step 6: judging whether a BE1 queue in the ST time slot slice can send a message, if so, executing a step 7, and if not, executing a step 5;
step 7: outputting one packet in the BE1 queue in the ST slot slice, and executing step 5.
In addition, in this technical solution, as shown in fig. 6, in the RC slot frame output scheduling process, in Block 0, the times T2-T3 are RC slot slices, two RC queues and two BE queues are gated on, and all ST queues are gated off. Executing RC time slot slice frame scheduling process in RC time slot slice, comprising the following steps:
step 1, judging whether a message which can be sent exists in an RC0 queue in an RC time slot, and if so, executing step 2; if not, executing the step 4;
step 2, outputting a packet in an RC0 queue in an RC time slot;
step 3: judging whether the RC time slot is cut off, if so, finishing execution; if not, executing the step 1;
step 4: judging whether a message which can be sent exists in an RC1 queue in an RC time slot, and if so, executing a step 5; if not, executing the step 6;
step 5: outputting a group in an RC1 queue in an RC time slot, and executing the step 3;
step 6: judging whether a BE0 queue in the RC time slot has a transmittable message, if so, executing the step 7; if not, executing the step 8;
Step 7: outputting a packet in a BE0 queue in an RC time slot;
Step 8: judging whether a BE1 queue in the ST time slot slice has a transmittable message, if so, executing a step 9; if not, executing the step 3;
step 9: outputting one packet in the BE1 queue in the ST slot slice, and executing step 3.
In addition, according to the technical scheme, the GB time slot slice frame output scheduling processing is performed, in the Block 0, two time periods of T1-T2 and T3-T4 are GB time slots, the gating states of all queues are closed, and the frame scheduling operation is not executed.
In summary, by means of the above technical solution of the present invention, through pre-calibrating the ST/RC slot slicing strategy, slice allocation strategy is performed on slot resources according to flow characteristics, calibration Qbv output queue constraint is performed to simplify data plane forwarding logic and control plane planning, the structure of the Qbv gating table is calibrated based on the ST slot slicing strategy and the RC slot slicing strategy, ST slot frame output scheduling processing and RC slot frame output scheduling processing are performed based on the ST slot slicing strategy and the RC slot slicing strategy, decoupling of ST flow and RC flow scheduling planning is achieved, not only the number of queues in the output queue structure and the flow type corresponding to each queue are defined by a user, but also the frame output scheduling output is driven according to the gating state, and meanwhile, the frame scheduling method includes the Qbv gating table and frame output scheduling, the gating state in the Qbv gating table is configured by an upper layer planning tool, the scheduling logic and upper layer algorithm design of the data plane output port can be effectively supported, and the frame output scheduling is selected and packet output according to the current queue gating state and priority strategy.
The foregoing is merely a preferred embodiment of the present application and is not intended to limit the present application, and other embodiments of the present disclosure will readily occur to those skilled in the art upon consideration of the specification and disclosure at the examples. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (3)
1. A frame output scheduling method supporting Qbv mechanism in a time sensitive network is characterized by comprising the following steps:
Step S1, pre-calibrating ST time slot slices and RC time slot slices, wherein the steps include that time slot resources are subjected to a slice allocation strategy according to flow characteristics;
S2, calibrating Qbv output queue structure, wherein the Qbv output queue structure comprises calibration Qbv output queue constraint to simplify data plane forwarding logic and control plane planning;
S3, calibrating a Qbv gating table structure, wherein the Qbv gating table structure is calibrated based on ST time slot slices and RC time slot slices;
s4, performing frame scheduling, including ST time slot slice frame output scheduling processing and RC time slot frame output scheduling processing based on ST time slot slice and RC time slot slice strategies;
the ST time slot slice frame output scheduling processing comprises the steps of scheduling and transmitting packets in an ST queue and a BE queue with gating states being opened;
the RC time slot frame output scheduling processing comprises scheduling and transmitting the packets in an RC queue and a BE queue with gating states being opened;
The slice allocation strategy for the time slot resources according to the flow characteristics comprises the following steps:
The calibration time line is divided into equal-length time periods which are expressed as blocks, the length of each Block is T4-T0, and the interior of each Block comprises an ST time slot slice, an RC time slot slice and a GB time slot slice;
ST slot slice transmits ST and BE frames, RC slot slice transmits RC and BE frames, GB slot slice avoids packet transmission across ST and RC slot slices;
The method comprises the steps that the lengths of each time slot slice in each Block are the same, and the starting time and the ending time of each time slot in the first Block are determined;
the start and end time of each time slot inside each subsequent Block is calculated based on the Block number and the Block length,
Calibrating Qbv output queue constraint, which comprises the following steps:
constraint self-defining total number of output queues, flow type and priority corresponding to each queue;
in the same gating list item, at most, only 1 ST queue is gated on, and other ST queues with gating off can only input messages;
restricting the ST queue which is opened for gating, outputting messages only, and requiring all messages in the queue to be completely emptied in an opening time period;
the constraint output queues are selected in a strict priority mode, priorities of all ST queues are the same, priorities can BE distinguished among RC queues, priorities can BE distinguished among BE queues, and meanwhile, the priorities of ST queues are guaranteed to BE higher than priorities of all RC queues and are higher than priorities of all BE queues;
wherein, qbv gating table structure includes: queue ID, gating start time and gating state, wherein;
The queue ID represents a queue number corresponding to the gating state;
the gating start time represents the start time of the current gating state to take effect, and the difference value between the effective time of the next gating state and the start time of the current gating state is the time for keeping the current gating state;
The gating states comprise an opening state and a closing state, wherein the opening state represents that the queue allows output messages at the current moment, and the closing state represents that the queue prohibits output messages at the current moment.
2. The frame output scheduling method supporting Qbv mechanism in a time sensitive network according to claim 1, wherein the ST slot slice frame output scheduling process comprises the steps of:
Step S401, acquiring an ST queue ST_X with the gating on;
step S402, outputting all frames in the ST_X queue;
step S403, judging whether all BE queues in the ST time slot slice can send messages, if so, executing step S404; if not, then step S405 is performed;
Step S404, outputting a packet in BE queue with highest priority in ST time slot slice;
step S405, judging whether ST time slot slicing is cut off, if yes, finishing execution; if not, step S403 is performed.
3. The frame output scheduling method supporting Qbv mechanism in a time sensitive network according to claim 2, wherein the RC slot frame output scheduling process comprises the steps of:
step S406, judging whether all RC queues in the RC time slot slice can send messages, if so, executing step S407; if not, executing step S409;
Step S407, outputting a packet in the RC queue with the highest priority in the RC time slot slice;
step S408, judging whether the RC time slot slice is cut off, if so, finishing execution; if not, then step S406 is performed;
Step S409, judging whether all BE queues in the RC time slot slice can send messages, if so, executing step S410; if not, then step S408 is performed;
Step S410, a packet in the BE queue with the highest priority in the RC slot slice is output, and step S408 is executed.
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