Ion implantation assisted oxidation type VCSEL preparation method
Technical Field
The invention relates to the technical field of laser preparation, in particular to an ion implantation-assisted oxidation type VCSEL preparation method.
Background
The Vertical Cavity Surface Emitting Laser (VCSEL) structure is divided into a p Bragg reflector (p-DBR), an n Bragg reflector (n-DBR) and an active region, wherein a quantum well of the active region performs photoelectric conversion, and a laser resonant cavity is formed between the p-DBR and the n-DBR. VCSELs require spatial confinement of both the electric and optical fields to provide maximum photoelectric conversion efficiency.
Typically, the ion implanted region becomes an electrically isolated region, and early non-oxidized VCSELs were current limited by ion implantation alone, resulting in lasing. However, due to the limitation of the optical field caused by the lack of the oxide layer, the photoelectric conversion efficiency is low (about 20%).
Existing VCSEL structures rely mainly on oxide layers for current and optical field confinement. Since the confinement is limited only in the vicinity of the oxide layer, the current confinement decreases with distance from the oxide layer. In some processes, ion Implantation (Ion Implantation) is used to assist in current limiting. Particularly, in the VCSEL having a plurality of PN junctions (Multiple Junction) for an automobile radar, since the resonator is longer, the current is laterally extended without increasing the current limitation, thereby reducing the photoelectric conversion efficiency, and the structure of fig. 1 is generally adopted. In which the current diffuses faster in the region away from the oxide layer 6, the oxide layer 6 and the active region being between the N-bragg mirror 3 and the P-bragg mirror 7.
The semiconductor material loses high conductivity due to the conventional ion implantation process, wherein the inner diameter of the ion implantation needs to be larger than the outer diameter of the P metal, so that current can flow into the active region. However, the size of the P metal limits the current region limited by ion implantation, so that the current limiting effect is weak.
As shown in fig. 2, the use of multiple sets of oxide layers 6 may reduce current diffusion between oxide layers 6, but multiple sets of oxide layers 6 tend to be limited in actual growth by process instability and thus difficult to control. However, even with multiple sets of oxide layers 6, the current limit after passing through the last set of active regions is limited by the wider ion implanted regions.
Disclosure of Invention
The invention aims to provide an ion implantation-assisted oxidation type VCSEL preparation method which at least can solve part of defects in the prior art.
In order to achieve the above object, the embodiment of the present invention provides the following technical solutions: an ion implantation assisted oxidation type VCSEL preparation method comprises the following steps:
s1, growing an epitaxial structure layer on a substrate, and growing P-surface metal on the epitaxial structure layer;
s2, after the P-surface metal grows, growing a first protection layer above the P-surface metal;
s3, after the first protective layer grows, an oxide layer is manufactured, wherein the manufacturing mode is that channel etching is firstly carried out, oxidation is carried out on the basis of the channel etching, and an oxidized aperture is etched;
s4, after the oxidized aperture is etched, growing a second protective layer;
s5, after the second protective layer grows, performing photoetching patterns, then performing ion implantation, controlling the inner diameter of the ion implantation to be larger than the diameter of the oxidation hole, wherein the inner diameter of the ion implantation is smaller than the inner diameter of the P-surface metal;
s6, after the ion implantation is finished, growing a third protective layer again;
s7, etching the through hole after the third protective layer grows;
and S8, treating the P-surface metal and growing the N-surface metal to obtain the laser.
Further, in the step S5, the species and the dose of the ion implantation include he+ ion having an implantation energy of 370keV and a dose of 4e+13, he+ ion having an implantation energy of 560keV and a dose of 3e+13, h+ ion having an implantation energy of 300keV and a dose of 3.5e+14, h+ ion having an implantation energy of 370keV and a dose of 3.5e+14, and h+ ion having an implantation energy of 420keV and a dose of 5e+14.
Further, the oxide layer in the step S3 has multiple layers.
Further, the first protective layer, the second protective layer and the third protective layer are all silicon oxide, silicon nitride or silicon oxynitride.
Further, in the step S8, the treatment of the P-side metal includes electroplating and thickening the P-side metal, and then performing dicing street etching.
Further, in the step S8, wafer thinning is performed before N-face metal growth, and the alloy is subjected to high temperature after growth.
Further, after the step S8, performance test and wafer dicing are performed.
Compared with the prior art, the invention has the beneficial effects that: the preparation method of the oxidized VCSEL assisted by ion implantation comprises the steps of controlling the inner diameter of ion implantation to be larger than the diameter of an oxidized hole, wherein the range of the inner diameter smaller than that of P-surface metal can enable a part of the surface of an epitaxial layer, which is in contact with the P-surface metal, with high conductivity to maintain high conductivity, so that good ohmic contact between the metal and a semiconductor is kept, and meanwhile, a lower epitaxial structure layer is non-conductive, and current is limited; for the structure of multiple oxide layers, the current passing through the last active region can be better limited; the slope efficiency increases due to the better restriction on the current. The voltage is correspondingly improved due to the narrowing of the current channel, but the overall photoelectric conversion efficiency is improved by about 4-8%; because the current is better limited, the junction area capacitance of the material is reduced, the intrinsic capacitance parameter is reduced, and the high-frequency modulation bandwidth of the chip is improved.
Drawings
FIG. 1 is a schematic diagram of a conventional oxidized VCSEL (single oxide layer);
FIG. 2 is a schematic diagram of a conventional oxidized VCSEL (multiple oxide layer);
fig. 3 is a schematic diagram (single oxide layer) of a VCSEL manufactured by an ion implantation-assisted oxide VCSEL manufacturing method according to an embodiment of the present invention;
fig. 4 is a schematic diagram (multiple oxide layers) of a VCSEL manufactured by an ion implantation-assisted oxide VCSEL manufacturing method according to an embodiment of the present invention;
fig. 5 is a schematic diagram showing the distribution of ion concentration in a VCSEL structure of a VCSEL manufactured by an ion implantation-assisted oxide VCSEL manufacturing method according to an embodiment of the present invention;
fig. 6 is a graph showing the comparison of the conventional VCSEL voltage, optical power, and photoelectric conversion efficiency with the VCSEL voltage, optical power, and photoelectric conversion efficiency of the present embodiment;
in the reference numerals: 1-N surface metal; 2-a substrate; a 3-N Bragg reflector; a 4-tunnel junction; 5-quantum wells; a 6-oxide layer; 7-P bragg mirrors; 8-silicon nitride; 9-ion implantation region; 10-P-plane metal.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 3, an embodiment of the present invention provides a method for preparing an oxide VCSEL with ion implantation assistance, including the following steps: s1, growing an epitaxial structure layer on a substrate 2, and growing P-surface metal 10 on the epitaxial structure layer; s2, after the growth of the P-surface metal 10 is finished, growing a first protection layer above the P-surface metal 10; s3, after the first protective layer grows, an oxide layer 6 is manufactured, wherein the manufacturing method is that channel etching is firstly carried out, oxidation is carried out on the basis of the channel etching, and an oxidized aperture is etched; s4, after the oxidized aperture is etched, growing a second protective layer; s5, after the second protective layer grows, performing photoetching patterns, then performing ion implantation, controlling the inner diameter of the ion implantation to be larger than the diameter of the oxidation hole, wherein the inner diameter of the ion implantation is smaller than the inner diameter of the P-surface metal 10; s6, after the ion implantation is finished, growing a third protective layer again; s7, etching the through hole after the third protective layer grows; s8, processing the P-surface metal 10 and growing the N-surface metal 1 to obtain the laser. In this embodiment, the inner diameter of the ion implantation is controlled to be larger than the diameter of the oxide hole, but smaller than the inner diameter of the P-surface metal 10, so that the high conductivity of the portion of the surface of the epitaxial layer, which is in contact with the P-metal, can be maintained to be high, and good ohmic contact between the metal and the semiconductor can be maintained. Specifically, the N-type bragg reflector, the tunnel junction 4, the quantum well 5, the oxide layer 6, the P-type bragg reflector, the N-side metal 1, the P-side metal 10, the multi-layer protection layer, and the like are all existing VCSEL manufacturing methods, and according to a great deal of research, this embodiment, it is found that when ions are implanted, the inner diameter of the ion implantation is controlled to be larger than the diameter of the oxide hole, and the inner diameter of the ion implantation is controlled to be smaller than the inner diameter of the P-side metal 10, as shown in fig. 3, the arrow below the current path at this time has better restriction on the current between the plurality of active regions. Preferably, for a structure with multiple oxide layers 6, as shown in fig. 4, the current through the last active region may also be better limited. To achieve this ion implantation effect, it is necessary to reduce the diameter of the resist to be protected before implantation and to discard the ion implantation portion having a shallower implantation depth. Wherein fig. 3 and 4 each have a plurality of quantum wells 5 and a plurality of tunnel junctions 4.
As an optimization scheme of the embodiment of the invention, in the step S5, the ion implantation species and dose include he+ ion with implantation energy of 370keV and dose of 4e+13, he+ ion with implantation energy of 560keV and dose of 3e+13, h+ ion with implantation energy of 300keV and dose of 3.5e+14, h+ ion with implantation energy of 370keV and dose of 3.5e+14, and h+ ion with implantation energy of 420keV and dose of 5e+14. In this embodiment, when controlling the inner diameter of the ion implantation, the ion implantation species and dose may be selected so that the high conductivity of the portion of the surface of the epitaxial layer in contact with the P metal maintains high conductivity, so that good ohmic contact is still maintained between the metal and the semiconductor. While making the underlying epitaxial layer non-conductive, limiting current. The distribution of the final ion concentration in the VCSEL structure is shown in fig. 5.
As an optimization scheme of the embodiment of the present invention, referring to fig. 3 and fig. 4, the first protection layer, the second protection layer, and the third protection layer are all silicon oxide, silicon nitride, or silicon oxynitride. Shown is silicon nitride 8.
As an optimization scheme of the embodiment of the invention, in the step S8, the treatment of the P-surface metal 10 comprises the steps of firstly electroplating and thickening the P-surface metal 10, and then etching a cutting channel; in the step S8, wafer thinning is carried out before the growth of the N-face metal 1, and the alloy is subjected to high temperature after the growth; and after the step S8, performing performance test and wafer cutting.
As an optimization scheme of the embodiment of the present invention, please refer to fig. 6, the slope efficiency is increased due to the better limitation of the current. The voltage is correspondingly improved due to the narrowing of the current channel, but the overall photoelectric conversion efficiency is improved by about 4-8%. Because the current is better limited, the junction area capacitance of the material is reduced, the intrinsic capacitance parameter is reduced, and the high-frequency modulation bandwidth of the chip is improved.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.