CN114203750A - Display panel and preparation method thereof - Google Patents
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- CN114203750A CN114203750A CN202111512150.7A CN202111512150A CN114203750A CN 114203750 A CN114203750 A CN 114203750A CN 202111512150 A CN202111512150 A CN 202111512150A CN 114203750 A CN114203750 A CN 114203750A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/54—Encapsulations having a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides a display panel and a preparation method thereof. The display panel includes a barrier layer, a flexible layer, and a metal layer. The barrier layer is arranged on an array substrate. The flexible layer is arranged on one surface of the barrier layer, which is far away from the array substrate. The metal layer is arranged on one surface of the flexible layer far away from the barrier layer. The array substrate is provided with a thin film transistor structure. And the orthographic projection of the thin film transistor structure on the substrate layer is superposed with the orthographic projection of the metal layer on the substrate layer.
Description
Technical Field
The invention relates to the field of display equipment, in particular to a display panel and a preparation method thereof.
Background
A Thin Film Transistor (TFT) device and a driving circuit are fabricated on the glass-based backplane, and then LED chips are transferred to the glass-based backplane to be connected to the backplane circuits one by one, thereby realizing active LED display. Because TFT device receives steam influence easily and leads to the electrical property to take place the skew, influences the display effect, consequently the LED display screen based on glass base TFT backplate needs to develop brand-new packaging technology in order to realize the volume production, solves the steam and to TFT electrical property influence.
The encapsulation characteristics of a material can be measured by the water oxygen transmission rate (WVTR) index. For example, an OLED (Organic Light Emitting Diode) device has a WVTR of about 10 "4 to 10" 5 by a packaging layer formed by TFE (Thin Film Encapsulation) technology. Mass-produced PCB (Printed Circuit Board) type LED display screens are usually packaged by using silica gel or acrylic gel, and the WVTR of the silica gel and the acrylic gel is about 1 to 200. The LED chip is made of inorganic materials, and compared with an OLED device, the LED display screen has the characteristics of long service life and higher water and oxygen resistance, so that the LED display screen based on the PCB is low in packaging difficulty.
However, the glass-based TFT backplane requires that the WVTR of the encapsulation material reaches 10-4 to 10-5 to prevent the influence of moisture on the TFT device, and if the glass-based LED display is encapsulated by using the TFE technology, the inorganic film in the TFE process is broken due to an excessively high thickness difference between the LED chip and the TFT backplane, and the TFE encapsulation fails, so that a new encapsulation technology needs to be developed for the LED display based on the glass-based TFT backplane.
Disclosure of Invention
The invention aims to provide a display panel and a preparation method thereof, and aims to solve the problem that the packaging effect of a packaging layer in an LED display panel in the prior art is poor.
To achieve the above object, the present invention provides a display panel including a barrier layer, a flexible layer, and a metal layer. The barrier layer is arranged on an array substrate. The flexible layer is arranged on one surface of the barrier layer, which is far away from the array substrate. The metal layer is arranged on one surface of the flexible layer far away from the barrier layer. The array substrate is internally provided with a thin film transistor structure, and the thin film transistor structure is arranged on a substrate layer. And the orthographic projection of the thin film transistor structure on the substrate layer is superposed with the orthographic projection of the metal layer on the substrate layer.
Further, the display panel has a light emitting region and a non-light emitting region connected to the light emitting region. The array substrate is further provided with an insulating structure, and the insulating structure is arranged on the substrate layers in the light emitting area and the non-light emitting area. The thin film crystal structure is arranged in the non-luminous area;
the display panel further comprises a light emitting device and signal wiring. The light emitting device is arranged on the metal layer and positioned in the light emitting area. The signal routing is arranged on the insulating structure in the non-luminous area.
Further, the metal layer includes a signal connection line and an electrode connection line. The signal connecting line is arranged in the light emitting area and is electrically connected with the signal wiring. The electrode connecting line extends from the non-light-emitting area to the edge of the light-emitting area and is electrically connected with the thin film transistor structure. One connecting end of the light-emitting device is electrically connected with the signal connecting wire, and the other connecting end of the light-emitting device is electrically connected with the electrode connecting wire.
Further, the display panel further comprises an encapsulation layer, wherein the encapsulation layer is arranged on the array substrate and covers the light-emitting device.
Further, the display panel further comprises a passivation layer and a light shielding layer. The passivation layer is arranged on the metal layer and is positioned in the non-luminous area. The shading layer is arranged on one surface of the passivation layer, which is far away from the metal layer.
Further, the material of the barrier layer comprises an inorganic material, and the material of the flexible layer comprises an organic material.
Furthermore, the display panel further comprises a conductive layer, and the conductive layer is arranged on one surface of the metal layer far away from the barrier layer.
The invention also provides a preparation method of the display panel, which comprises the following steps: forming an array substrate on a substrate layer; forming a barrier layer on the array substrate; forming a flexible layer on one surface of the barrier layer far away from the array substrate; and forming a metal layer corresponding to the thin film transistor structure in the array substrate on one surface of the flexible layer far away from the barrier layer.
Further, the preparation method of the display panel further comprises the following steps: preparing a light emitting device on the metal layer; and forming an encapsulation layer on the array substrate and the light emitting device.
Further, the preparation method of the display panel further comprises the following steps: forming a passivation layer on the metal layer; and forming a light shielding layer on the passivation layer.
The invention has the advantages that: according to the display panel, the array substrate and the light-emitting device in the display panel are respectively protected by two different packaging technologies, namely the array substrate is packaged by adopting the barrier layer containing the high WVTR material and the metal layer, and the light-emitting device is packaged by adopting the low WVTR material, so that the packaging requirements of the array substrate and the light-emitting device are met. In addition, no new processing equipment is required to be introduced into the preparation method of the display panel, and the production cost cannot be increased.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a layer structure of a display panel according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a layer structure of a display panel according to an embodiment of the present invention;
FIG. 3 is a schematic flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating the layered structure of the display panel after step S10 according to the embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating the layered structure of the display panel after step S20 according to the embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating the layered structure of the display panel in step S30 according to an embodiment of the present invention;
FIG. 7 is a schematic diagram illustrating the layered structure of the display panel after step S30 according to the embodiment of the present invention;
FIG. 8 is a schematic diagram illustrating the layered structure of the display panel after step S40 according to the embodiment of the present invention;
FIG. 9 is a schematic diagram illustrating the layered structure of the display panel in step S50 according to an embodiment of the present invention;
fig. 10 is a schematic view of a layer structure of a display panel according to another embodiment of the invention.
The components in the figures are represented as follows:
a light emitting region 1A; a non-light-emitting region 1B;
an array substrate 10; a substrate layer 11;
a thin film transistor structure 12; a shield layer 121;
an active layer 122; a gate layer 123;
a source drain layer 124; an insulating structure 13;
a buffer layer 131; a gate insulating layer 132;
an interlayer dielectric layer 133; a signal trace 20;
a barrier layer 30; a flexible layer 40;
a metal layer 50; a signal connection line 51;
a first connection end 511; the electrode connection lines 52;
a second connection end 521; a light emitting device 60;
a third connection end 61; a fourth connection end 62;
a passivation layer 70; a light-shielding layer 80;
an encapsulation layer 90; a through hole 41;
a conductive layer 100.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, which are included to demonstrate that the invention can be practiced, and to provide those skilled in the art with a complete description of the invention so that the technical content thereof will be more clear and readily understood. The present invention may be embodied in many different forms of embodiments and should not be construed as limited to the embodiments set forth herein.
In the drawings, structurally identical elements are represented by like reference numerals, and structurally or functionally similar elements are represented by like reference numerals throughout the several views. The size and thickness of each component shown in the drawings are arbitrarily illustrated, and the present invention is not limited to the size and thickness of each component. The thickness of the components may be exaggerated where appropriate in the figures to improve clarity.
Furthermore, the following description of the various embodiments of the invention refers to the accompanying drawings that illustrate specific embodiments of the invention, by which the invention may be practiced. Directional phrases used in this disclosure, such as, for example, "upper," "lower," "front," "rear," "left," "right," "inner," "outer," "side," and the like, refer only to the orientation of the appended drawings and are, therefore, used herein for better and clearer illustration and understanding of the invention, and do not indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention. Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
When certain components are described as being "on" another component, the components can be directly on the other component; there may also be an intermediate member disposed on the intermediate member and the intermediate member disposed on the other member. When an element is referred to as being "mounted to" or "connected to" another element, they may be directly "mounted to" or "connected to" the other element or indirectly "mounted to" or "connected to" the other element through an intermediate element.
The embodiment of the invention provides a display panel 1, wherein the display panel 1 is used for providing display pictures for electronic terminal equipment such as mobile phones, televisions, tablet computers and the like. As shown in fig. 1 to 2, the display panel 1 has a light emitting region 1A and a non-light emitting region 1B connected to the light emitting region 1A. The display panel 1 includes an array substrate 10, signal traces 20, a barrier layer 30, a flexible layer 40, a metal layer 50, and a light emitting device 60.
The array substrate 10 includes a thin film transistor structure 12 and an insulating structure 13, and preferably, the thin film transistor structure 12 is a metal oxide thin film transistor. The thin film transistor structure 12 includes a shielding layer 121, an active layer 122, a gate layer 123, and a source/drain layer 124. The insulating structure 13 includes a buffer layer 131, a gate insulating layer 132, and an interlayer dielectric layer 133.
The shielding layer 121 is disposed on a substrate layer 11. The buffer layer 131 is disposed on the substrate layer 11 and covers the substrate layer 11. The active layer 122 is disposed on a surface of the buffer layer 131 away from the shielding layer 121, and corresponds to the shielding layer 121. The gate insulating layer 132 is disposed on a surface of the active layer 122 away from the buffer layer 131. The gate layer 123 is disposed on a surface of the gate insulating layer 132 away from the active layer 122. The interlayer dielectric layer 133 is disposed on the buffer layer 131 and covers the exposed surfaces of the active layer 122, the gate insulating layer 132, and the gate layer 123. The source/drain layer 124 is disposed on a surface of the interlayer dielectric layer 133 away from the gate layer 123, and includes a source and a drain. One end of the source electrode penetrates through the interlayer dielectric layer 133 to be electrically connected with one end of the active layer 122, and the other end of the source electrode penetrates through the interlayer dielectric layer 133 and the buffer layer 131 in sequence to be electrically connected with the shielding layer 121. The drain electrode penetrates the interlayer dielectric layer 133 and is electrically connected to the other end of the active layer 122.
The array substrate 10 generates an electric field by applying a current voltage to the gate electrode layer 123, and the electric field may cause the surface of the active layer 122 to generate induced charges, so as to change the thickness of the conductive channel, thereby achieving the purpose of controlling the current of the source/drain electrode layer 124, and implementing the driving of the light emitting device 60.
The signal trace 20 is disposed in the light emitting region 1A of the display panel 1, and is disposed on a surface of the interlayer dielectric layer 133 away from the buffer layer 131 together with the source/drain layer 124. The signal trace 20 is a power voltage VSS signal trace 20.
The blocking layer 30 is disposed on the interlayer dielectric layer 133 in the light emitting region 1A and the non-light emitting region 1B, and covers the exposed surfaces of the source/drain layer 124 and the signal trace 20. The barrier layer 30 has a thickness of 100-1000 microns and is made of an inorganic material. Preferably, the inorganic material may be one or more of silicon oxide, nitrogen oxide, or aluminum oxide. The barrier layer 30 can passivate and protect the source and drain layers 124, and prevent short circuit between conductive film layers. Meanwhile, since the WVTR (water oxygen transmission rate) of the inorganic material can reach 10-4 to 10-5, the barrier layer 30 containing the inorganic material also has excellent water-nutrient barrier capability, and can prevent water vapor from invading and corroding the thin film transistor structure 12, thereby protecting the array substrate 10.
The flexible layer 40 is disposed on a surface of the blocking layer 30 away from the interlayer dielectric layer 133, and also covers the light emitting region 1A and the non-light emitting region 1B. The flexible layer 40 has a thickness of 1-10 microns and is made of an organic material. Preferably, the organic material may be one or more of polyethylene, polyesters, polyurethanes and the like. The flexible layer 40 is made of an organic material with excellent flexibility, can release stress in the barrier layer 30, prevents the barrier layer 30 from failing due to cracks generated by the stress, and can prevent the surface of the panel from being scratched in the preparation process. Moreover, the flexible layer 40 can also wrap the particles to prevent moisture from invading from the particle site.
The metal layer 50 is disposed on a surface of the flexible layer 40 away from the barrier layer 30, and preferably, the metal material used for the metal layer 50 is copper or aluminum. The metal layer 50 includes a signal connection line 51 and an electrode connection line 52.
The signal connection line 51 is disposed on the flexible layer 40 in the light emitting region 1A and corresponds to the signal trace 20. A first connection end 511 extends from the bottom surface of the signal connection line 51, and the first connection end 511 sequentially penetrates through the flexible layer 40 and the barrier layer 30 to the upper surface of the signal trace 20, so as to be electrically connected to the signal trace 20.
The electrode connecting line 52 is disposed on the flexible layer 40 of the non-light-emitting region 1B and extends from the non-light-emitting region 1B to the edge of the light-emitting region 1A. A second connection end 521 extends from a bottom surface of the electrode connection line 52, and the second connection end 521 sequentially penetrates through the flexible layer 40 and the barrier layer 30 to an upper surface of the source/drain layer 124, so as to be electrically connected to a drain electrode in the source/drain layer 124.
Further, an orthographic projection of the electrode connecting line 52 on the substrate layer 11 is overlapped with an orthographic projection of the thin film transistor structure 12 on the substrate layer 11. Since the metal material also has excellent water and oxygen blocking capability, the electrode connecting line 52 also has the function of blocking the invasion of water and oxygen, thereby increasing the coverage area of the electrode connecting line 52 and enabling the orthographic projection of the thin film transistor structure 12 on the substrate layer 11 to fall within the orthographic projection range of the electrode connecting line 52, and further enabling the electrode connecting line 52 to cover and protect the thin film transistor structure 12.
Meanwhile, the barrier layer 30, the flexible layer 40 and the metal layer 50 are combined to form an inorganic/organic/inorganic laminated structure similar to that formed by a TFE (Thin Film Encapsulation) process, so that the inorganic Film layer (i.e., the barrier layer 30) and the metal Film layer (i.e., the metal layer 50) have high water oxygen barrier capability, and meanwhile, the problem of inorganic Film layer cracking is improved by the organic Film layer (i.e., the flexible layer 40), the service life of the inorganic Film layer is prolonged, and the Encapsulation effect of the array substrate 10 is further improved. In addition, the flexible layer 40 can also prevent the metal layer 50 and the conductive film layer in the tft structure 12 from forming a parasitic capacitance, which affects the electrical property of the tft structure 12.
The light emitting device 60 is disposed on a surface of the metal layer 50 away from the flexible layer 40 and located in the light emitting region 1A. The light emitter has a third connection 61 and a fourth connection 62, the third connection 61 is electrically connected to the signal connection 51 in the metal layer 50, and the fourth connection 62 is electrically connected to the electrode connection 52 in the metal layer 50. The light emitting device 60 may be a light emitting device 60 such as an LED (light emitting diode), a Mini-LED (sub-millimeter light emitting diode), a Micro-LED (Micro-scale light emitting diode), or the like.
Specifically, the display panel 1 further includes a passivation layer 70, a light shielding layer 80, and an encapsulation layer 90.
The passivation layer 70 is disposed on a surface of the metal layer 50 away from the flexible layer 40, and is located in the non-light emitting region 1B. Preferably, the passivation layer 70 extends from the non-light emitting region 1B to the light emitting region 1A, covers an exposed surface of the metal layer 50 not connected to the light emitting device 60, and passivates and protects the exposed surface of the metal layer 50.
The light shielding layer 80 is disposed on a surface of the passivation layer 70 away from the metal layer 50. The light shielding layer 80 is made of a black insulating material, and is used to reduce light reflection of the metal layer 50, thereby improving the contrast of the display panel 1. Meanwhile, the light shielding layer 80 can prevent light emitted by the light emitting device 60 and external light from being irradiated into the array substrate 10, thereby solving the problem of electrical deviation of the thin film transistor structure 12 caused by light irradiation.
The encapsulation layer 90 is disposed on the light shielding layer 80 and the light emitting device 60, and wraps the exposed surface of the light emitting device 60 and the exposed surface of the light shielding layer 80. The encapsulation layer 90 may be silica gel, acrylic glue (polymethyl methacrylate glue) or glass cover plate, which is used for secondary encapsulation of the display panel 1 to protect the light emitting device 60.
The embodiment of the invention also provides a preparation method of the display panel 1, which is used for preparing the display panel 1. The preparation method has the flow shown in fig. 3, and comprises the following specific preparation steps:
step 10) forming a barrier layer 30 on an array substrate 10:
the thin film transistor structure 12 and the insulating structure 13 are prepared on a substrate layer 11 through a TFT process, and the thin film transistor structure 12 and the insulating structure 13 are combined to form the array substrate 10. The signal trace 20 is simultaneously prepared when the source/drain layer 124 in the tft structure 12 is prepared. Depositing an inorganic film layer or a metal oxide film layer covering the source/drain layer 124 and the signal trace 20 on the interlayer dielectric layer 133 in the insulating structure 13 to form the barrier layer 30 shown in fig. 4.
Step S20) forming a flexible layer 40 on the barrier layer 30:
depositing an organic film layer on a surface of the barrier layer 30 away from the array substrate 10 to form a flexible layer 40 as shown in fig. 5.
Step S30) forming a metal layer 50 on the flexible layer 40:
through holes 41 shown in fig. 6 are sequentially formed in the flexible layer 40 and the barrier layer 30 through an etching process, and the through holes 41 penetrate through the flexible layer 40 and the barrier layer 30 to the upper surfaces of the source drain layer 124 and the signal trace 20. Depositing a metal film layer filling the through hole 41 on a surface of the flexible layer 40 away from the barrier layer 30, and patterning the metal film layer to form a signal connection line 51 and an electrode connection line 52 as shown in fig. 7. The electrode connection line 52 and the signal connection line 51 are combined to form the metal layer 50.
Step S40) forms a passivation layer 70 and a light shielding layer 80 on the metal layer 50:
an insulating film and a light shielding film are sequentially formed on the metal layer 50 in the non-light emitting region to form a passivation layer 70 and a light shielding layer 80 as shown in fig. 8.
Step S50) transfers the light emitting device 60 onto the metal layer 50, and encapsulates it:
the light emitting device 60 is prepared in advance through a light emitting diode process. The light emitting device 60 is transferred onto the metal layer 50 in the light emitting region 1A by a transfer method such as bulk transfer, and the light emitting device 60 is bonded to the signal connection line 51 and the electrode connection line 52 by a method of solder paste, ACF (anisotropic conductive film), or eutectic metal, forming a panel structure as shown in fig. 9. The light emitting device 60 is encapsulated by a silicon gel, an acryl gel or a glass cover plate to form the display panel 1 as shown in fig. 1.
In the display panel provided by the embodiment of the invention, the laminated structure formed by the barrier layer, the flexible layer and the metal layer fully utilizes the advantages of inorganic materials, organic materials and metal materials, the packaging effect of the array substrate is improved through the barrier layer and the metal layer, and the stress in the barrier layer is released through the flexible layer to prevent the barrier layer from being torn, so that the service life of the barrier layer is prolonged. Meanwhile, the barrier layer, the flexible layer and the metal layer are all prepared by conventional equipment in the TFT, new processing equipment is not required to be introduced like a TFE process, and the production cost cannot be increased. The packaging layer prepared from the packaging materials such as silica gel and acrylic gel has excellent filling performance, is not easy to crack, and can well protect the light-emitting device.
In another embodiment of the present invention, a display panel 1' including a conductive layer 100 is further provided, as shown in fig. 10, the conductive layer 100 is a transparent conductive layer covering a surface of the metal layer 50 away from the flexible layer 40. The remaining layer structure of the display panel is similar to the display panel 1 in the embodiment of the invention, and therefore, redundant description is not provided herein. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that features described in different dependent claims and herein may be combined in ways different from those described in the original claims. It is also to be understood that features described in connection with individual embodiments may be used in other described embodiments.
Claims (10)
1. A display panel, comprising:
the barrier layer is arranged on an array substrate;
the flexible layer is arranged on one surface of the barrier layer, which is far away from the array substrate;
the metal layer is arranged on one surface of the flexible layer, which is far away from the barrier layer;
the array substrate is internally provided with a thin film transistor structure, and the thin film transistor structure is arranged on a substrate layer;
and the orthographic projection of the thin film transistor structure on the substrate layer is superposed with the orthographic projection of the metal layer on the substrate layer.
2. The display panel according to claim 1, having a light-emitting region and a non-light-emitting region connected to the light-emitting region;
the array substrate is also provided with an insulating structure, and the insulating structure is arranged on the substrate layers in the light emitting area and the non-light emitting area;
the thin film crystal structure is arranged in the non-luminous area;
the display panel further includes:
the light-emitting device is arranged on the metal layer and is positioned in the light-emitting area;
and the signal routing is arranged on the insulating structure in the non-luminous area.
3. The display panel of claim 2, wherein the metal layer comprises:
the signal connecting line is arranged in the light emitting area and is electrically connected with the signal wiring;
the electrode connecting wire extends from the non-luminous area to the edge of the luminous area and is electrically connected with the thin film transistor structure;
one connecting end of the light-emitting device is electrically connected with the signal connecting wire, and the other connecting end of the light-emitting device is electrically connected with the electrode connecting wire.
4. The display panel of claim 2, further comprising:
and the packaging layer is arranged on the array substrate and covers the light-emitting device.
5. The display panel of claim 2, further comprising:
the passivation layer is arranged on the metal layer and is positioned in the non-luminous area;
and the shading layer is arranged on one surface of the passivation layer, which is far away from the metal layer.
6. The display panel of claim 1,
the material of the barrier layer comprises an inorganic material;
the material of the flexible layer comprises an organic material.
7. The display panel of claim 1, further comprising:
and the conducting layer is arranged on one surface of the metal layer, which is far away from the barrier layer.
8. A preparation method of a display panel is characterized by comprising the following steps:
forming an array substrate on a substrate layer;
forming a barrier layer on the array substrate;
forming a flexible layer on one surface of the barrier layer far away from the array substrate;
and forming a metal layer corresponding to the thin film transistor structure in the array substrate on one surface of the flexible layer far away from the barrier layer.
9. The method for manufacturing a display panel according to claim 8, further comprising the steps of:
preparing a light emitting device on the metal layer;
and forming an encapsulation layer on the array substrate and the light emitting device.
10. The method for manufacturing a display panel according to claim 8, further comprising the steps of:
forming a passivation layer on the metal layer;
and forming a light shielding layer on the passivation layer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111512150.7A CN114203750A (en) | 2021-12-07 | 2021-12-07 | Display panel and preparation method thereof |
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| CN202111512150.7A CN114203750A (en) | 2021-12-07 | 2021-12-07 | Display panel and preparation method thereof |
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