CN114185524A - Device list extraction method and device in circuit design software and related equipment - Google Patents
Device list extraction method and device in circuit design software and related equipment Download PDFInfo
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Abstract
The invention discloses a method, a device and related equipment for extracting a device list in circuit design software, wherein the method comprises the following steps: the method comprises the following initial steps: providing an input unit and a list; and (3) information extraction: extracting information of each subunit in the input unit, and judging the extracted information of the subunits to update the list; an output step: and screening the updated list, and outputting target information, wherein the target information is the list information contained in the target library. The invention enables the circuit design software to automatically extract and count the device list in the circuit design so as to provide design information for the subsequent process, thereby greatly improving the counting efficiency and accuracy.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a method and a device for extracting a device list in circuit design software and related equipment.
Background
With the wide application of integrated circuits, the hardware circuit design of electronic products is also enriched. Generally, in the process of designing a hardware circuit of an electronic product, a schematic diagram design file needs to be drawn according to design requirements, the design and drawing processes are usually completed by a design engineer on a computer by using a computer aided design tool (for example, integrated circuit design software), and the core of the whole process of design, drawing and the like is an electronic component in the schematic diagram, if the design is known, which devices in a design library (such as a PDK library) have important roles in the specific selection of a physical verification file, the plate making information after tape-out and the like.
Taking the integrated circuit design software of virtuoso as an example, it generally manages the design data of users according to library (library), cell (cell) and view (view), and their relationship is that the library contains cells and the cell contains views. A design is typically a library with a large number (different on a design scale) of cells, which include at least two views below: symbol, which is a symbol that may represent the shape and port of the unit; schema is a circuit diagram that defines the actual composition of the interior of the cell. The cell typically calls multiple symbols, which are connected to form schema, plus pins (i/o pins), to form a symbol for being called by other schema, but the lowest symbol of the whole design must come from the PDK library provided by the ic fab, which is composed of some basic devices, such as MOS, CAP, DIODE, restor, etc., and these basic devices typically only have symbol view and no schema view.
Usually, a circuit design contains a large number of cells, and there are also multiple layers of nesting relationships from the top layer of the whole design to the bottom, such as a cell whose schema calls the symbol of B cell and C cell, and the schema of B cell and C cell continues to call the symbol of other cells, and so on. Because the existing design software has no related function of automatically extracting statistical information of a device list in design (referred to as a device list in the text for short), in multi-level design, if only the engineer artificially counts the device list information, time and labor are wasted, omission or errors are easy to occur, and the risk of tape-out errors is increased.
Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.
Disclosure of Invention
In order to solve the technical problems, the invention provides a method, a device and related equipment for extracting a device list in circuit design software, which can automatically extract and count the device list in circuit design by software to provide design information for subsequent processes, thereby greatly improving the counting efficiency and accuracy.
According to a first aspect of the present disclosure, there is provided a device list extraction method in circuit design software, including: the method comprises the following initial steps: providing an input unit and a list;
and (3) information extraction: extracting information of each subunit in the input unit, and judging the extracted information of the subunits to update the list;
an output step: and screening the updated list, and outputting target information, wherein the target information is the list information contained in a target library.
Optionally, the information extraction step of any subunit in the input unit is as follows: extracting the information of the subunit, judging whether the information of the subunit is contained in the list, and if so, extracting the information of the next subunit in the input unit; if not, the information of the subunit is stored in the list, and the subunit is used as the input unit.
Optionally, the list of information of the sub-unit that has not been updated is an empty list.
Optionally, the step of extracting information of each sub-unit includes:
opening a schematic diagram view or a symbol view corresponding to the input unit;
scanning the opened view to extract information of each sub-unit of the input unit.
Optionally, when information of each subunit in the input unit is extracted, the schematic diagram view corresponding to the input unit is preferentially opened.
Optionally, the information of the subunit includes a subunit code.
Optionally, the information of the sub-unit further includes a voltage deviation parameter between the well region of the sub-unit and the substrate.
Optionally, the types of the sub-units include a sub-unit and a bottom sub-unit that can open a lower view.
Optionally, the target library is at least one of a PDK library and a custom library.
According to a second aspect of the present disclosure, there is provided a device list extraction apparatus in circuit design software, including: an input module for providing an input unit;
the extraction module is used for extracting the information of the subunits contained in the input unit;
the storage module is used for storing the information of the subunits extracted by the extraction module;
and the screening module is used for screening the information of the subunits stored by the storage module and outputting target information, wherein the target information is list information contained in a target library.
According to a third aspect of the present disclosure, there is provided an electronic apparatus, comprising: a processor and a memory, the memory storing a program executable on the processor, the program being executed by the processor to implement the operations performed by the device list extraction method as described above.
According to a fourth aspect of the present disclosure, there is provided a computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program or instructions, which, when executed by a processor, implement the operations performed by the device list extraction method as described above.
The invention has the beneficial effects that: according to the device list extraction method, device and related equipment in the circuit design software, provided input units are provided, information of each subunit in the provided input units is extracted in a recursive circulation mode in a traversing mode, in the process, lists are continuously updated step by step based on the extracted subunit information, extraction and statistics of all subunit information applied to the provided input units are achieved, the whole process can be automatically completed by a program, the situations of omission and errors are greatly reduced compared with the situation that engineers conduct examination and statistics with naked eyes, and the statistical efficiency and accuracy are greatly improved. Further, list information contained in the target library is screened out from the extracted unit list, and design information can be provided for subsequent processes.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
FIG. 1 is a flow diagram illustrating a method for extracting a device list in circuit design software according to an embodiment of the present disclosure;
FIG. 2 shows a schematic flow chart of a loop in the information extraction step provided according to an embodiment of the present disclosure;
FIG. 3 illustrates an exemplary diagram of the relationship of cells in a circuit design provided in accordance with an embodiment of the disclosure;
fig. 4 is a schematic structural diagram illustrating a device list extraction apparatus in circuit design software provided according to an embodiment of the present disclosure;
fig. 5 shows a schematic structural diagram of an electronic device provided according to an embodiment of the present disclosure.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Referring to fig. 1, an embodiment of the present invention provides a method for extracting a device list in circuit design software, which may be applied to integrated circuit design software (including but not limited to virtuoso software), so as to achieve automatic extraction and statistics of information of each sub-unit applied to an integrated circuit design (circuit design for short) based on software design. The following describes in detail a device list extraction method in the circuit design software provided by the present invention, taking virtuoso software as an example. The Virtuoso (integrated circuit design software) is a circuit and layout design tool introduced by Cadence (some EDA software vendor). The layout designer can fully utilize the tool to complete various layout and circuit designs by relying on the process libraries provided by various process manufacturers.
As shown in fig. 1, the method for extracting a device list in circuit design software according to the embodiment of the present invention includes the following steps:
first, an initial step (i.e., step S1) is performed: an input unit and a list are provided.
When the information of the sub-units needs to be extracted, a circuit design which needs to extract the device list information needs to be specified by a user as an initial input unit (the design can be a complete circuit design, and can also be a design corresponding to a certain arbitrary level of sub-units in the complete circuit design, which is not limited by the invention), and then a program corresponding to the device list extraction method runs in the circuit design range specified by the user to extract the information of each sub-unit contained in the circuit design. Herein, when the circuit design for extracting the device list information is a complete circuit design, the initial input unit specified by the user corresponds to the highest parent unit of the circuit design.
Alternatively, the triggering mode of the program may be set to be manually triggered or automatically triggered. For example, when the manual trigger is set, the initial input unit can be set to be triggered when a user clicks a corresponding function menu and can be further selected, so that the flexibility of information extraction of the sub-unit can be improved, and the selectivity of the user is higher; when the automatic triggering is set, the automatic triggering can be set when the window corresponding to the initial input unit is opened by a user, so that the automation degree of information extraction of the sub-units can be improved, and when the information extraction of the batch sub-units is required to be carried out on a plurality of circuit designs, the extraction efficiency is higher.
Further, when the information extraction of the sub-unit is required, an initial list for storing the extracted information of the sub-unit is provided, and the initial list may be directly specified by the user or automatically provided by the system, and is notified to the user to save after the extraction is completed or automatically saved at an address previously specified by the user. Preferably, the initial list, i.e., the list of the information of the sub-units that is not updated, is generally selected as a null list, so as to realize the individual display of the information of the sub-units extracted in the circuit design and reduce the data processing amount in the subsequent screening process.
Next, an information extraction step (i.e., step S2) is performed: and extracting the information of each subunit in the input unit, and judging the extracted information of the subunits to update the list.
In the embodiment of the disclosure, in order to traverse all the subunits in the initial input unit and avoid omission, the manner of extracting the information of each subunit in the information extraction step is set to be recursive and cyclic one-by-one extraction, so that the extracted information of the subunits contained in the input unit (i.e., the input unit provided in the initial step) is more complete and more accurate.
Illustratively, the step of extracting information from any subunit in the input unit specifically includes: and extracting the information of the subunit, judging whether the information of the subunit is contained in the list, if not, storing the information of the subunit in the list to update the list, taking the subunit as an input unit, and taking the updated list and the subunit as cyclic input, and if so, extracting the information of the next subunit in the input unit.
In this embodiment, referring to fig. 2, a specific execution flow of the information extraction step is as follows:
first, in step S21, an input unit and a list are taken as input for each loop.
The input unit and the list are those provided in the initial step when the information extraction step is performed for the first time. When the information extraction step is executed for the second time and later, the input unit is provided according to the previous information extraction result, and the list is the list updated in the previous information extraction.
Next, in step S22, information of the sub-unit is extracted.
The extracting information of each subunit in the input unit includes: opening a schematic diagram view or a symbol view corresponding to the input unit; the opened view is scanned to extract information of each sub-unit included in the input unit.
In the virtuoso software, each cell includes a schematic view (schema view) and a symbol view (symbol view), and both views include all sub-cell information in the current cell. When detecting that the unit comprises the schematic diagram view and the schematic diagram view can be opened, obtaining the information of each subunit in the unit by opening the schematic diagram view corresponding to the unit preferentially; when the unit is detected not to contain the schematic view or the schematic view is opened incorrectly, the information of each sub-unit in the unit is obtained by opening the symbol view corresponding to the unit.
It can be understood that the input unit comprises at least one of the sub-unit type which can open the lower view and the sub-unit type which can not open the lower view. Wherein the subunit information includes a subunit code. Further, extracting information of each sub-unit includes extracting a sub-unit code number of each sub-unit that can open the lower view and/or extracting a sub-unit code number of each sub-unit that cannot open the lower view. Furthermore, for a part of the bottom sub-units (such as MOS devices), extracting information of each bottom sub-unit further includes extracting voltage deviation parameters between the well region of the bottom sub-unit and the substrate, and other parameters that are beneficial to subsequently selecting plate making information after physical verification files and tape-out.
Further, in extracting information of each sub-unit in the input unit, if the information of the sub-unit can be extracted in the input unit, step S23 is performed for each extracted sub-unit; if the sub-unit information is not extracted from the input unit, step S26 is executed.
In step S23, it is determined whether or not the information of the child cell is included in the list.
For the extracted information of each subunit in the input unit, whether the information of the subunit is contained in the list needs to be judged, so that repeated extraction and storage can be avoided while traversal is realized, the subunits with the same specification only appear once in the finally obtained list, complete design information can be provided for a subsequent process, the program execution time can be shortened, the storage amount and the data amount needing comparison during subsequent list screening are reduced, and the efficiency is higher. In addition, in this embodiment, each time the information of one sub-unit is extracted from the input unit, that is, the judgment operation corresponding to step S23 is performed, so that the risk of missed storage can be reduced to a certain extent.
Further, each time a subunit is determined, if it is determined that the information of the subunit is not included in the list, step S25 is executed, the information of the subunit is stored in the list to update the list, the subunit is used as a new input unit, and the program itself is continuously called as a loop input together with the updated list until the traversal of each level of subunits is realized. If the information of the sub-unit is determined to be included in the list, step S24 is executed to extract the information of the next sub-unit in the input unit.
Further, after the information of the sub-unit of one input unit is extracted, if the extracted information of the sub-unit includes information of the sub-unit capable of opening the lower view and information of the bottom sub-unit at the same time, each time the information of one sub-unit is stored in the list to update the list, the method further includes judging whether the type of the sub-unit is the sub-unit capable of opening the lower view or the bottom sub-unit, and storing the sub-unit capable of opening the lower view or the bottom sub-unit in the list in a partitioning manner according to the judgment result, so that the screening amount is reduced in the subsequent screening step, and the screening efficiency is improved.
In one possible embodiment of the present invention, the type of a subunit is determined according to whether the subunit can open the lower view. For example, when an input unit is opened and scanned, each sub-unit in the input unit obtained by scanning may be pre-opened, an attempt may be made to obtain a lower-layer view of the sub-unit, and the sub-unit may be stored in a corresponding area in the list according to a pre-opening result. The judgment method can be suitable for the judgment of the subunits in various types of circuit designs, and the judgment result is high in accuracy. In another possible embodiment of the present invention, the type of the sub-unit may be determined according to whether the extracted information of the sub-unit includes a specific naming format or a specific keyword, if so, the sub-unit is determined to be a sub-unit that can open a lower view, and if not, the sub-unit is determined to be a lower sub-unit. Although the judgment method has requirements on unit naming in circuit design, the judgment process is simple, the type of a subunit can be quickly judged, and the efficiency is higher.
In step S26, the next sub-unit is taken as an input unit.
In this embodiment, when the input unit input as the information extraction step is the input unit provided in the initial step, if the information of the sub-unit of the input unit is not extracted in step S22, the information extraction step is ended, and the filtering step is performed. When the input unit input as the information extraction step is a sub-unit of any level in the input unit provided in the initial step, if the information of the sub-unit of the input unit is not extracted in step S22, the remaining sub-units extracted in the previous cycle are used as input units until each level of the sub-units in the input unit provided in the initial step is traversed, and then the filtering step is performed.
For example, referring to fig. 3, it is assumed that a certain circuit design includes 3-level cells, where the first-level cell is an a cell, the second-level cell includes 3 sub-cells (a1 cell, a2 cell, A3 cell) of the a cell, and the third-level cell, i.e., the bottom-level sub-cell, includes 3 sub-cells (a11 cell, a12 cell, a13 cell) below the a1 cell and 2 sub-cells (a21 cell, a22 cell) below the a2 cell. When the information extraction step is executed for the first time, the unit A is an input unit, the information A1 unit, the unit A2 unit and the unit A3 of each subunit in the unit A are extracted, the subunit information of the unit A1 is judged not to be contained in the list, the subunit information of the unit A1 is stored in the list to update the list, and the unit A1 is used as a new input unit and used as a cycle input together with the updated list. When the information extraction step is performed for the second time, the a1 cell is a new input cell, the information a11 cell, a12 cell, and a13 cell of each subunit in the a1 cell are extracted, it is determined that the subunit information of the a11 cell is not included in the list, the subunit information of the a11 cell is stored in the list to update the list again, and the a11 cell is used as a new input cell together with the updated list as a looped input. When the information extraction step is executed for the third time, the a11 unit is a new input unit, at this time, the subunit information in the a11 unit is not extracted, and then any one of the a12 unit, the a13 unit, the a2 unit and the A3 unit is used as a new input unit and a list updated for the last time is used as a loop input to continue to call the program until traversal of each stage of units (including the a1 unit, the a2 unit, the A3 unit, the a11 unit, the a12 unit, the a13 unit, the a21 unit and the a22 unit) in the circuit design is realized, and then the complete subunit information included in the circuit design is acquired, so that the loop method is simple. It should be noted that, when the next sub-unit is taken as a new input unit, the execution order of the remaining sub-units as input units is not limited in the present invention.
Thereafter, an output step (i.e., step S3) is performed: and screening the updated list and outputting target information.
In this embodiment, the target information is list information included in the target library. After each level of subunit in the current circuit design is traversed, screening and comparing the information of the subunits stored in the list finally obtained after traversal according to the target library, and outputting the list information contained in the target library as target information according to the screening result. The target library is at least one of a PDK library and a custom library.
It should be noted that, the method for traversing each level of sub-unit in the circuit design of the present invention can not only extract the device list information in the circuit design, but also implement the action of batch modification of the circuit design as long as the program is slightly modified. The modified program should also be within the scope of the present invention if the main idea is the same as or similar to that described in the present invention.
The embodiment of the invention also provides a device list extraction device in circuit design software, which can extract the device list information in the circuit design software based on the device list extraction method shown in the figures 1 to 3. As shown in fig. 4, includes: an input module 10, an extraction module 20, a storage module 30, and a screening module 40.
The input module 10 is used to provide an input unit. The input module 10 provides input units, of which the initial input unit is designated by the operator and the subsequent input units are returned from the extraction result according to the extraction module 20.
The extracting module 20 is used for extracting the information of the sub-units contained in the input unit. In this embodiment, the extracting module 20 extracts information of each sub-unit of each stage in the input unit in a recursive loop manner. The specific extraction method and steps can be understood by referring to the description of fig. 1 to 3, and are not described in detail herein.
The storage module 30 is used for storing the information of the sub-units extracted by the extraction module 20. In this embodiment, the storage module 30 is, for example, a storage list.
The filtering module 40 is configured to filter the information of the sub-units stored in the storage module 30, and output target information, which is list information included in the target library.
An embodiment of the present invention further provides an electronic device 100, as shown in fig. 5, which includes a memory 120 and a processor 110, where the memory 120 stores a program that can be executed on the processor 110, and when the program is executed by the processor 110, the program can implement each process of each embodiment in the device list extraction method in the circuit design software shown in fig. 1 to fig. 3, and can achieve the same technical effect, and details are not repeated here to avoid repetition.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by instructions controlling associated hardware, and the instructions may be stored in a computer readable storage medium and loaded and executed by a processor. To this end, the embodiment of the present invention further provides a computer-readable storage medium, on which a computer program or an instruction is stored, which, when being executed by a processor, can implement the processes of the embodiments in the device list extraction method in the circuit design software illustrated in fig. 1 to 3. The computer-readable storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, which can store program codes.
Since the instructions stored in the readable storage medium can execute the steps in the method for extracting a device list in the circuit design software provided in the embodiment of the present invention, the beneficial effects that can be achieved by the method for extracting a device list in the circuit design software provided in the embodiment of the present invention can be achieved, for details, see the foregoing embodiments, and are not described herein again. The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
In summary, after the input unit is provided, the information of each subunit in the provided input unit is extracted in a recursive cycle manner, and in the process, the list is continuously updated step by step based on the extracted subunit information, so that the extraction and statistics of all the subunit information applied to the provided input unit are realized, and the whole process can be automatically completed by a program. Further, list information contained in the target library is screened out from the extracted unit list, and design information can be provided for subsequent processes.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (12)
1. A device list extraction method in circuit design software comprises the following steps:
the method comprises the following initial steps: providing an input unit and a list;
and (3) information extraction: extracting information of each subunit in the input unit, and judging the extracted information of the subunits to update the list;
an output step: and screening the updated list, and outputting target information, wherein the target information is the list information contained in a target library.
2. The device list extraction method according to claim 1, wherein the information extraction step of any one of the subunits in the input unit is as follows: extracting the information of the subunit, judging whether the information of the subunit is contained in the list, if so, extracting the information of the next subunit in the input unit; if not, the information of the subunit is stored in the list, and the subunit is used as the input unit.
3. The device list extraction method according to claim 1, wherein the list of the information of the non-updated sub-unit is an empty list.
4. The device list extraction method according to claim 1, wherein the step of extracting information of each subunit includes:
opening a schematic diagram view or a symbol view corresponding to the input unit;
scanning the opened view to extract information of each sub-unit of the input unit.
5. The device list extraction method according to claim 4, wherein, in extracting the information of each subunit in the input unit, a schematic view corresponding to the input unit is preferentially opened.
6. The device list extraction method of claim 5, wherein the information of the sub-unit includes a sub-unit code number.
7. The device list extraction method of claim 6, wherein the information of the sub-cell further comprises a voltage deviation parameter between a well region of the sub-cell and the substrate.
8. The device list extraction method of any one of claims 1 to 7, wherein the types of the sub-elements include sub-elements and underlying sub-elements that can open an underlying view.
9. The device list extraction method of claim 1, wherein the target library is at least one of a PDK library and a custom library.
10. A device list extraction apparatus in circuit design software, comprising:
an input module for providing an input unit;
the extraction module is used for extracting the information of the subunits contained in the input unit;
the storage module is used for storing the information of the subunits extracted by the extraction module;
and the screening module is used for screening the information of the subunits stored by the storage module and outputting target information, wherein the target information is list information contained in a target library.
11. An electronic device, comprising: a processor and a memory, the memory storing a program executable on the processor, the program being executable by the processor to perform operations performed by the device list extraction method of any one of claims 1 to 9.
12. A computer-readable storage medium, having stored thereon a computer program or instructions, which, when executed by a processor, implement the operations performed by the device list extraction method of any one of claims 1 to 9.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116187224A (en) * | 2023-04-27 | 2023-05-30 | 芯耀辉科技有限公司 | Process design suite device library and design migration method |
| CN116629199A (en) * | 2023-06-13 | 2023-08-22 | 合芯科技有限公司 | Automatic modification method, device, equipment and storage medium of circuit schematic diagram |
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2021
- 2021-09-27 CN CN202111132984.5A patent/CN114185524A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116187224A (en) * | 2023-04-27 | 2023-05-30 | 芯耀辉科技有限公司 | Process design suite device library and design migration method |
| CN116629199A (en) * | 2023-06-13 | 2023-08-22 | 合芯科技有限公司 | Automatic modification method, device, equipment and storage medium of circuit schematic diagram |
| CN116629199B (en) * | 2023-06-13 | 2023-11-24 | 合芯科技有限公司 | Automatic modification method, device, equipment and storage medium of circuit schematic diagram |
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