CN114170903A - Display device - Google Patents
Display device Download PDFInfo
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- CN114170903A CN114170903A CN202111473565.8A CN202111473565A CN114170903A CN 114170903 A CN114170903 A CN 114170903A CN 202111473565 A CN202111473565 A CN 202111473565A CN 114170903 A CN114170903 A CN 114170903A
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- signal line
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- power signal
- display device
- scanning circuit
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- 239000000758 substrate Substances 0.000 claims abstract description 107
- 239000002184 metal Substances 0.000 claims description 31
- 239000010410 layer Substances 0.000 description 71
- 230000003071 parasitic effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 239000002356 single layer Substances 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 2
- 239000002355 dual-layer Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a display device. The display device comprises a display area, a non-display area, a substrate and a scanning circuit, wherein the scanning circuit is arranged in the non-display area and is arranged on one side of the substrate; the power signal line is arranged on one side of the first electrode adjacent to the substrate; the vertical projection of the power signal line on the substrate at least partially overlaps the vertical projection of the scanning circuit on the substrate. The technical scheme of the invention realizes the narrow frame of the display device.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display device.
Background
With the development of display technology, people have higher and higher requirements on the screen occupation ratio of display devices. The frame of the existing display device is large, and the screen occupation ratio of the display device is improved.
Disclosure of Invention
The embodiment of the invention provides a display device, which aims to solve the problem that the frame space of the display device is large, and the screen occupation ratio of the display device is influenced.
An embodiment of the present invention provides a display device, including: a display area and a non-display area;
the display device further includes:
a substrate;
the scanning circuit is arranged in the non-display area, arranged on one side of the substrate and used for outputting scanning signals;
the first electrode is arranged on one side of the scanning circuit, which is far away from the substrate, and extends from the display area to the non-display area;
a power signal line disposed in the non-display region and electrically connected to the first electrode; the power signal line is arranged on one side of the first electrode adjacent to the substrate;
the vertical projection of the power signal line on the substrate at least partially overlaps the vertical projection of the scanning circuit on the substrate.
Optionally, the display device further includes:
the second electrode is arranged in the display area and arranged on one side, adjacent to the substrate, of the first electrode;
the metal layer is arranged on the non-display area, the metal layer and the second electrode are arranged on the same layer, and the metal layer is arranged on one side of the power signal line, which is far away from the substrate;
the power signal line is electrically connected to the first electrode through the metal layer.
Optionally, the display device further includes:
the light-emitting control circuit and the scanning circuit are arranged on the same layer;
the vertical projection of the power signal line on the substrate and the vertical projection of the light-emitting control circuit on the substrate at least partially overlap.
Optionally, the display device further includes:
the GIP signal lines are partially electrically connected with the scanning circuit, partially electrically connected with the light-emitting control circuit and arranged on the same layer as the scanning circuit;
the vertical projection of the power signal line on the substrate at least partially overlaps the vertical projection of the GIP signal line on the substrate.
Alternatively, the power signal line may include a plurality of first via holes in a region where the power signal line overlaps the scan circuit.
Optionally, in an area where the power signal line and the scanning circuit are overlapped, the metal layer is electrically connected to the power signal line through at least one first via hole;
the vertical projection of the first through hole on the substrate is not overlapped with the vertical projection of the first through hole on the substrate.
Optionally, in a region where the power signal line overlaps the light emission control circuit, the power signal line includes a plurality of second through holes;
the power signal line includes a plurality of third vias in a region where the power signal line overlaps the GIP signal line.
Optionally, the power signal line includes a first wiring layer, the first wiring layer is disposed on a side of the scanning circuit away from the substrate, and a vertical projection of the first wiring layer on the substrate at least partially overlaps a vertical projection of the scanning circuit on the substrate.
Optionally, the power signal line further includes:
the second wiring layer is arranged on one side, adjacent to the substrate, of the first wiring layer and is electrically connected with the first wiring layer;
the second wiring layer and the scanning circuit are arranged on the same layer.
Optionally, the display device further includes:
a driving chip;
the non-display area comprises a first frame area, a second frame area and a third frame area, the first frame area and the second frame area are arranged oppositely, the third frame area is adjacent to the first frame area and the second frame area, and the driving chip is arranged in the third frame area;
the scanning circuit includes a first scanning circuit; the first scanning circuit is positioned in the first frame area, the power signal line is arranged in the first frame area, and the vertical projection of the power signal line on the substrate is at least partially overlapped with the vertical projection of the first scanning circuit on the substrate; and/or the presence of a gas in the gas,
the scanning circuit includes a second scanning circuit; the second scanning circuit is located in the second frame area, the power signal line is arranged in the second frame area, and the vertical projection of the power signal line on the substrate is at least partially overlapped with the vertical projection of the second scanning circuit on the substrate.
According to the display device provided by the embodiment of the invention, the vertical projection of the power signal line on the substrate is at least partially overlapped with the vertical projection of the scanning circuit on the substrate, so that the power signal line can be wired on one side of the scanning circuit far away from the substrate, and the power signal line and the scanning circuit at least partially share the width of the non-display area, so that on one hand, the power signal line is ensured to have a larger cross-sectional area, the stability of the power signal line for transmitting the power signal is improved, on the other hand, the width of the power signal line in the area which is not overlapped with the scanning circuit can be reduced, the frame width of the display device is reduced, the screen occupation ratio of the display device is improved, and the narrow frame of the display device is realized.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the contents of the embodiments of the present invention and the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view along AA' of the display device of FIG. 1 according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view along AA' of another embodiment of the display device of FIG. 1;
FIG. 4 is a cross-sectional view along AA' of still another display device shown in FIG. 1 according to an embodiment of the present invention;
FIG. 5 is a cross-sectional view along AA' of still another display device shown in FIG. 1 according to an embodiment of the present invention;
fig. 6 is a top view of the power signal lines shown in fig. 5 of a display device according to an embodiment of the present invention;
FIG. 7 is a cross-sectional view along AA' of still another display device shown in FIG. 1 according to an embodiment of the present invention;
FIG. 8 is a cross-sectional view along AA' of still another display device shown in FIG. 1 according to an embodiment of the present invention;
FIG. 9 is a cross-sectional view along AA' of still another display device shown in FIG. 1 according to an embodiment of the present invention;
FIG. 10 is a schematic structural diagram of another display device according to an embodiment of the present invention;
FIG. 11 is a cross-sectional view taken along a direction CC' of still another display device shown in FIG. 10 according to an embodiment of the present invention;
fig. 12 is a cross-sectional view along the direction BB' of still another display device shown in fig. 10 according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Based on the above technical problem, the present embodiment proposes the following solutions:
fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention. Fig. 2 is a cross-sectional view along the AA' direction of the display device in fig. 1 according to an embodiment of the present invention. With reference to fig. 1 and 2, a display device according to an embodiment of the present invention includes a display region 10 and a non-display region 20, and the display device further includes a substrate 1; a scan circuit 2 disposed in the non-display region 20, the scan circuit 2 being disposed at one side of the substrate 1, the scan circuit 2 being configured to output a scan signal; the first electrode 3, the first electrode 3 is set up in the scanning circuit 2 and far away from one side of the substrate 1, the first electrode 3 extends to the non-display area 20 from the display interval 10; a power signal line 4 disposed in the non-display area 20, the power signal line 4 being electrically connected to the first electrode 3; the power signal line 4 is arranged on one side of the first electrode 3 adjacent to the substrate 1; the vertical projection of the power supply signal line 4 on the substrate 1 at least partially overlaps the vertical projection of the scanning circuit 2 on the substrate 1.
Specifically, the display device may include a display area 10 and a non-display area 20, the display area 10 is used for displaying a picture, the display area 10 includes a plurality of light emitting units (not shown in the figure), and the display device may further include a pixel driving circuit (not shown in the figure) for driving the light emitting units to emit light, and the pixel driving circuit drives the light emitting units to emit light according to the scanning signal output by the scanning circuit 2, so that the display area 10 of the display device displays the picture. The first electrode 3 is disposed on a side of the scan circuit 2 away from the substrate 1, the first electrode 3 extends from the display region 10 to the non-display region 20, and the first electrode 3 in the non-display region 20 is electrically connected to the power signal line 4. In the display region 10, the light emitting unit includes a first electrode 3, the power signal line 4 may transmit a power signal to the first electrode 3 of the light emitting unit, the first electrode 3 may include a cathode, and a power signal of a generally low level is transmitted on the first electrode 3. Since the power signal line 4 and the pixel driving circuit are opaque, the pixel driving circuit in the display region 10 needs to be disposed on a side of the light emitting unit adjacent to the substrate 1 to prevent the pixel driving circuit from shading the light emitting unit. The power supply signal line 4 is disposed on a side of the first electrode 3 adjacent to the substrate 1, and the power supply signal line 4 is disposed on a side of the scan circuit 2 away from the substrate.
Since the larger the wiring cross-sectional area of the power signal line 4 is, the smaller the resistance of the power signal line 4 is, the smaller the voltage drop of the power signal transmitted on the power signal line 4 is, and the higher the transmission efficiency of the power signal is. The vertical projection of the power signal line 4 on the substrate 1 is at least partially overlapped with the vertical projection of the scanning circuit 2 on the substrate 1, so that the wiring section area of the power signal line 4 can be increased, the resistance of the power signal line 4 is reduced, the loss of the power signal in the transmission process is reduced, the power signals obtained by the first electrodes 3 of the pixel units in the display area 10 are close, and the display effect of the display picture of the display device is improved.
As the demand for high refresh frequency and high screen ratio of the display device is higher and higher, a higher demand is made for a narrow bezel of the non-display area 20. Since the conventional power source signal lines and the conventional scanning circuits are generally arranged at intervals in sequence on the substrate, the width of the non-display area 20 of the display device is limited.
By arranging the vertical projection of the power signal line 4 on the substrate 1 and the vertical projection of the scanning circuit 2 on the substrate 1 to be at least partially overlapped, the power signal line 4 can be arranged on one side of the scanning circuit 2 far away from the substrate 1, and the cross-sectional area of the power signal line 4 is increased. Because the power signal line 4 and the scanning circuit 2 at least partially share the width of the non-display area 20, the width of the power signal line 2 in the area which is not overlapped with the scanning circuit 2 can be reduced, which not only can ensure that the power signal line 4 has better signal transmission capability, but also can reduce the width of the power signal line 2 in the area which is not overlapped with the scanning circuit 2, thereby reducing the frame width of the display device, improving the screen occupation ratio of the display device and realizing the narrow frame of the display device.
The display device provided by this embodiment is configured to overlap at least a part of the vertical projection of the power signal line on the substrate and the vertical projection of the scanning circuit on the substrate, so that the power signal line can be routed on one side of the scanning circuit away from the substrate, and the power signal line and the scanning circuit share at least a part of the width of the non-display area, on one hand, a larger cross-sectional area of the power signal line is ensured, and the stability of the power signal line for transmitting the power signal is improved, on the other hand, the width of the power signal line 2 in the region not overlapped with the scanning circuit 2 is reduced, the frame width of the display device is reduced, the screen occupation ratio of the display device is improved, and a narrow frame of the display device is realized.
Alternatively, fig. 3 is a cross-sectional view along the AA' direction of another display device shown in fig. 1 according to an embodiment of the present invention. On the basis of the above embodiment, referring to fig. 3, the display device may further include a second electrode (not shown) disposed in the display region 10, the second electrode being disposed on a side of the first electrode 3 adjacent to the substrate 1; a metal layer 6 disposed in the non-display region 20, wherein the metal layer 6 is disposed on the same layer as the second electrode, and the metal layer 6 is disposed on a side of the power signal line 4 away from the substrate 1; the power signal line 4 is electrically connected to the first electrode 3 through the metal layer 6.
Specifically, the second electrode may be an anode, the anode located in the display area 10 may transmit an anode signal for the light emitting unit, the power signal transmitted by the anode is usually a high level signal, when the anode transmits the power signal, the light emitting unit emits light, and the display area 10 of the display device realizes image display. The metal layer 6 provided in the same layer as the second electrode is electrically connected to the power signal line 4, and the power signal line 4 is electrically connected to the first electrode 3 through the metal layer 6, so that the metal layer 6 is multiplexed as the power signal line 4, the cross-sectional area of the power signal line 4 after the metal layer 6 is multiplexed as a power signal is further increased, the resistance of the power signal line 4 is further reduced, and the voltage drop of the power signal transmitted through the power signal line 4 is reduced. Because the metal layer 6 is arranged on the side of the power signal line 4 far away from the substrate 1 and on the side of the first electrode 3 near the substrate 1, the cross-sectional area of the power signal line 4 in the thickness direction of the non-display area 20 of the power signal line 4 is increased, and the width of the power signal line 2 in the area not overlapped with the scanning circuit 2 is further reduced, so that the width of the non-display area 20 of the display device can be reduced, the screen occupation ratio of the display device is further improved, and the narrow frame of the display device is realized.
Alternatively, fig. 4 is a cross-sectional view along the AA' direction of another display device shown in fig. 1 according to an embodiment of the present invention. On the basis of the above embodiment, referring to fig. 4, the display device may further include a light emission control circuit 7, and the light emission control circuit 7 is disposed in the same layer as the scanning circuit 2; the vertical projection of the power supply signal line 4 on the substrate 1 at least partially overlaps the vertical projection of the light emission control circuit 7 on the substrate 1.
Specifically, the light emission control circuit 7 is electrically connected to the pixel driving circuit located in the display region 10, and the light emission control circuit 7 is used for controlling the light emission of the light emitting unit located in the display region 10. The light-emitting control circuit 7 and the scanning circuit 2 are arranged on the same layer, and the light-emitting control circuit 7 and the scanning circuit 2 can be manufactured by the same process, so that the process flow is saved. The vertical projection of the power signal line 4 on the substrate 1 and the vertical projection of the light-emitting control circuit 7 on the substrate 1 are at least partially overlapped, so that the power signal line 4 can be wired on one side of the light-emitting control circuit 7, which is far away from the substrate 1, and the cross-sectional area of the power signal line 4 is further increased. Since the power signal line 4 and the light emission control circuit 7 at least partially share the width of the non-display area 20, the width of the power signal line 2 in the region not overlapped with the scanning circuit 2 can be further reduced, the frame width of the display device can be further reduced, and the screen occupation ratio of the display device can be improved.
Alternatively, fig. 5 is a cross-sectional view along the AA' direction of another display device shown in fig. 1 according to an embodiment of the present invention. On the basis of the above embodiments, referring to fig. 5, the display device may further include GIP signal lines 8, a portion of the GIP signal lines 8 is electrically connected to the scan circuit 2 (not shown in the figure), a portion of the GIP signal lines 8 is electrically connected to the light-emitting control circuit 7 (not shown in the figure), and the GIP signal lines 8 and the scan circuit 2 are disposed in the same layer; the vertical projection of the power signal line 4 on the substrate 1 at least partially overlaps the vertical projection of the GIP signal line 8 on the substrate 1.
Specifically, the GIP signal lines 8 may include a portion of GIP signal lines electrically connected to the scan circuit 2, and a portion of GIP signal lines electrically connected to the light emission control circuit 7. The part of the GIP signal lines electrically connected to the scan circuit 2 may include, for example, scan signal lines for transmitting scan signals output from the scan circuit 2 to the pixel drive circuit. The part of the GIP signal lines electrically connected to the light emission control circuit 7 may include, for example, light emission control signal lines for transmitting light emission control signals output from the light emission control circuit 7 to the pixel drive circuit. The GIP signal line 8 and the scanning circuit 2 are arranged on the same layer, and the GIP signal line 8 and the scanning circuit 2 can be manufactured by the same process, so that the process is saved. By arranging that the vertical projection of the power signal line 4 on the substrate 1 is at least partially overlapped with the vertical projection of the GIP signal line 8 on the substrate 1, the power signal line 4 can be wired on one side of the GIP signal line 8 far away from the substrate 1, and the cross-sectional area of the power signal line 4 is further increased. Since the power signal lines 4 at least partially share the width of the non-display area 20 with the GIP signal lines 8, the width of the power signal lines 2 in the region not overlapped with the scanning circuit 2 and the region not overlapped with the GIP signal lines 8 can be further reduced, so that the width of the non-display area 20 is further narrowed, and the screen occupation ratio of the display device is further improved.
It should be noted that the GIP signal lines 8 may be single-layer traces or dual-layer traces, and fig. 5 only exemplarily shows the GIP signal lines 8 as single-layer traces, which is not limited herein.
Alternatively, fig. 6 is a top view of the power signal line shown in fig. 5 of the display device according to the embodiment of the present invention. On the basis of the above-described embodiment, referring to fig. 6, the power supply signal line 4 includes a plurality of first through holes 41 in a region where the power supply signal line 4 overlaps the scanning circuit 2.
Specifically, in the area where the power signal line 4 overlaps the scanning circuit 2, by setting the power signal line 4 to include the plurality of first through holes 41, the area of the power signal line 4 directly facing the scanning circuit 2 can be reduced, the parasitic capacitance between the power signal line 4 and the scanning circuit 2 is reduced, the interference of the parasitic capacitance on the signals transmitted by the power signal line 4 and the scanning circuit 2 is reduced, and the stability of the signals transmitted by the power signal line 4 and the scanning circuit 2 is improved.
Alternatively, fig. 7 is a cross-sectional view along AA' of another display device shown in fig. 1 according to an embodiment of the present invention. On the basis of the above-described embodiment, referring to fig. 7, in the region where the power signal line 4 overlaps the scanning circuit 2, the metal layer 6 is electrically connected to the power signal line 4 through at least one first via hole 61; the vertical projection of the first via 61 on the substrate 1 does not overlap the vertical projection of the first via 41 on the substrate 1.
Specifically, in the region where the power signal line 4 overlaps the scanning circuit 2, the metal layer 6 is electrically connected to the power signal line 4 through at least one first via 61, so that the metal layer 6 is electrically connected to the power signal line 4 reliably, and the metal layer 6 is electrically connected to the power signal line 4 through a plurality of first vias 61, so that the contact resistance between the power signal line 4 and the metal layer 6 can be reduced, and the voltage drop of the power signal transmitted through the power signal line 4 and the metal layer 6 can be reduced.
The vertical projection of the first via hole 61 on the substrate 1 is not overlapped with the vertical projection of the first through hole 41 on the substrate 1, and the area where the first through hole 41 is not arranged on the power signal line 4 can be electrically connected with the metal layer 6 through the first via hole 61, so that the flatness of the film layer can be improved, and the reliability of the electrical connection between the power signal line 4 and the metal layer 6 can be improved. Alternatively, the metal layer 6 may be electrically connected to the power signal line 4 through the slit 62 in a region where the power signal line 4 overlaps the scanning circuit 2, or in a region where the power signal line 4 overlaps the light emission control circuit 7.
It should be noted that fig. 7 exemplarily shows that in the region where the power signal line 4 overlaps the light emission control circuit 7, the metal layer 6 is electrically connected to the power signal line 4 through the slit 62; in the case where the metal layer 6 is electrically connected to the power signal line 4 through the first via hole 61 in the region where the power signal line 4 and the GIP signal line 8 overlap, there is no limitation thereto.
Alternatively, on the basis of the above-described embodiment, with continuing to combine fig. 5 and 6, in the area where the power signal line 4 overlaps the light emission control circuit 7, the power signal line 4 includes the plurality of second through holes 42; in a region where the power signal line 4 overlaps the GIP signal line 8, the power signal line 4 includes a plurality of third through holes 43.
Specifically, in the area where the power signal line 4 overlaps the light emission control circuit 7, by providing that the power signal line 4 includes a plurality of second through holes 42, the area of the power signal line 4 directly facing the light emission control circuit 7 can be reduced, the parasitic capacitance between the power signal line 4 and the light emission control circuit 7 can be reduced, and the interference of the parasitic capacitance on the signals transmitted by the power signal line 4 and the light emission control circuit 7 can be reduced. In the overlapped region of the power signal line 4 and the GIP signal line 8, by arranging that the power signal line 4 includes a plurality of third through holes 43, the area of the power signal line 4 directly facing the GIP signal line 8 can be reduced, the parasitic capacitance between the power signal line 4 and the GIP signal line 8 is reduced, the interference of the parasitic capacitance on the signals transmitted by the power signal line 4 and the GIP signal line 8 is reduced, and the stability of the signals transmitted by the power signal line 4 and the light emission control circuit 7 is further improved.
Alternatively, the power signal line 4 may include a single layer or two layers of traces. If the power signal line 4 includes a single layer trace, the power signal line 4 may include a first trace layer; if the power signal line 4 includes two layers of traces, the power signal line 4 may include a first trace layer and a second trace layer. The first wiring layer is disposed on a side of the scan circuit away from the substrate, and the second wiring layer may be disposed on a side of the first wiring layer adjacent to the substrate.
Fig. 8 is a cross-sectional view along AA' of still another display device shown in fig. 1 according to an embodiment of the present invention. On the basis of the above-described embodiment, referring to fig. 8, the power signal line 4 may include a first wiring layer 401, the first wiring layer 401 is disposed on a side of the scanning circuit 2 away from the substrate 1, and a vertical projection of the first wiring layer 401 on the substrate 1 at least partially overlaps a vertical projection of the scanning circuit 2 on the substrate 1.
Specifically, because the width of the non-display area 20 shared by the first routing layer 401 and the scanning circuit 2 can be reduced as required, the width of the first routing layer 401 which is not overlapped with the scanning circuit 2 can be reduced, so that the frame width of the display device is reduced, the screen occupation ratio of the display device is improved, and the narrow frame of the display device is realized.
Alternatively, fig. 9 is a cross-sectional view along the AA' direction of another display device shown in fig. 1 according to an embodiment of the present invention. On the basis of the above embodiment, referring to fig. 9, the power signal line 4 may further include a second routing layer 402, the second routing layer 402 is disposed on a side of the first routing layer 401 adjacent to the substrate 1, and the second routing layer 402 is electrically connected to the first routing layer 401; the second wiring layer 402 is disposed on the same layer as the scanning circuit 2.
Specifically, the first routing layer 401 may be arranged in a block, and the first routing layer arranged in a block may be electrically connected to the metal layer through a first via or a slot. Alternatively, the first wiring layer 401 may be continuously disposed, for example, the first wiring layer 401 may simultaneously cover the scan circuit 2, the light emission control circuit 7, and the GIP signal line, so that the cross-sectional area of the power signal line may be further increased, and the manufacturing process may be simple. Because the first routing layer 401 can cover the scanning circuit 2, the light-emitting control circuit 7 and the GIP signal lines at the same time, the width of the non-display area 20 occupied by the first routing layer 401 and the second routing layer 402 which are not overlapped with the scanning circuit 2, the light-emitting control circuit 7 and the GIP signal lines can be smaller, so that the width of the non-display area 20 occupied by the power signal lines 4 is smaller, and the screen occupation ratio of the display device is further improved.
Optionally, fig. 10 is a schematic structural diagram of another display device provided in an embodiment of the present invention. Fig. 11 is a cross-sectional view of the display device shown in fig. 10 taken along direction CC according to another embodiment of the present invention. Fig. 12 is a cross-sectional view along the direction BB' of still another display device shown in fig. 10 according to an embodiment of the present invention. On the basis of the above embodiments, with reference to fig. 10 to 12, the display device may further include a driving chip (not shown in the figures); the non-display area 20 comprises a first frame area 201, a second frame area 202 and a third frame area 203, wherein the first frame area 201 and the second frame area 202 are arranged oppositely, the third frame area 203 is adjacent to the first frame area 201 and the second frame area 202, and a driving chip is arranged in the third frame area 203; the scanning circuit 2 includes a first scanning circuit 21; the first scanning circuit 21 is located in the first frame area 201, the power signal line 4 is arranged in the first frame area 201, and the vertical projection of the power signal line 4 on the substrate 1 at least partially overlaps with the vertical projection of the first scanning circuit 21 on the substrate 1; and/or, the scanning circuit 2 includes a second scanning circuit 22; the second scanning circuit 22 is disposed in the second frame region 202, the power signal line 4 is disposed in the second frame region 202, and a vertical projection of the power signal line 4 on the substrate 1 at least partially overlaps a vertical projection of the second scanning circuit 22 on the substrate 1.
Specifically, the driving chip may be disposed in the third frame region 203, for example, the third frame region 203 is a lower frame of the display device. The driving chip can control the pixel driving circuit to drive the light emitting units in the display region 10 to emit light. The first frame area 201 and the second frame area 202 are disposed opposite to each other, and the third frame area 203 is adjacent to the first frame area 201 and the second frame area 202, for example, the first frame area 201 may be a left frame of the display device, and the second frame may be a right frame of the display device.
With reference to fig. 10 and 11, a vertical projection of the power signal line 4 disposed in the first frame area 201 on the substrate 1 at least partially overlaps a vertical projection of the first scanning circuit 21 disposed in the first frame area 201 on the substrate 1, so that a cross-sectional area of the power signal line 4 is increased, and a width of the power signal line 4 in the first frame area 201 of the display device can be made smaller by reducing a width of the power signal line 2 that does not overlap the first scanning circuit 21, so that the first frame area 201 realizes a narrow frame.
With reference to fig. 10 and 12, the vertical projection of the power signal line 4 disposed in the second frame region 202 on the substrate 1 at least partially overlaps the vertical projection of the second scan circuit 22 disposed in the second frame region 202 on the substrate 1, and the cross-sectional area of the power signal line in the second frame region 202 is increased, so that the width of the power signal line 4 in the width direction of the second frame region 202 can be made smaller by reducing the width of the power signal line 2 that does not overlap the second scan circuit 22, and the width of the second frame region 202 can be made narrower.
The vertical projection of the power signal line 4 on the substrate 1 and the vertical projection of the first scanning circuit 21 on the substrate 1 can be at least partially overlapped, and the vertical projection of the power signal line 4 on the substrate 1 and the vertical projection of the second scanning circuit 22 on the substrate 1 can be at least partially overlapped, so that the width of the first frame area 201 and the width of the second frame area 202 are both narrow, the screen occupation ratio of the display device is further improved, and the narrow frame of the display device is realized.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A display device, comprising: a display area and a non-display area;
the display device further includes:
a substrate;
the scanning circuit is arranged on one side of the substrate and is used for outputting scanning signals;
the first electrode is arranged on one side, far away from the substrate, of the scanning circuit, and extends from the display area to the non-display area;
a power source signal line disposed in the non-display region, the power source signal line being electrically connected to the first electrode; the power signal line is arranged on one side of the first electrode adjacent to the substrate;
the vertical projection of the power signal line on the substrate at least partially overlaps the vertical projection of the scanning circuit on the substrate.
2. The display device according to claim 1, further comprising:
the second electrode is arranged in the display area and is arranged on one side, adjacent to the substrate, of the first electrode;
the metal layer is arranged in the non-display area, the metal layer and the second electrode are arranged on the same layer, and the metal layer is arranged on one side, far away from the substrate, of the power signal line;
the power signal line is electrically connected to the first electrode through the metal layer.
3. The display device according to claim 1, further comprising:
the light-emitting control circuit and the scanning circuit are arranged on the same layer;
the vertical projection of the power signal line on the substrate at least partially overlaps the vertical projection of the light emission control circuit on the substrate.
4. The display device according to claim 3, further comprising:
a part of the GIP signal lines are electrically connected with the scanning circuit, a part of the GIP signal lines are electrically connected with the light-emitting control circuit, and the GIP signal lines and the scanning circuit are arranged on the same layer;
the vertical projection of the power signal line on the substrate at least partially overlaps the vertical projection of the GIP signal line on the substrate.
5. The display device according to claim 2,
the power supply signal line includes a plurality of first vias in a region where the power supply signal line overlaps the scan circuit.
6. The display device according to claim 5,
in the area where the power signal line and the scanning circuit are overlapped, the metal layer is electrically connected with the power signal line through at least one first via hole;
the vertical projection of the first through hole on the substrate is not overlapped with the vertical projection of the first through hole on the substrate.
7. The display device according to claim 4,
in a region where the power supply signal line overlaps with the light emission control circuit, the power supply signal line includes a plurality of second through holes;
the power signal line includes a plurality of third vias in a region where the power signal line overlaps the GIP signal line.
8. The display device according to claim 1,
the power signal line comprises a first wiring layer which is arranged on one side of the scanning circuit far away from the substrate, and the vertical projection of the first wiring layer on the substrate at least partially overlaps with the vertical projection of the scanning circuit on the substrate.
9. The display device according to claim 8, wherein the power supply signal line further comprises:
the second wiring layer is arranged on one side, adjacent to the substrate, of the first wiring layer and is electrically connected with the first wiring layer;
the second wiring layer and the scanning circuit are arranged on the same layer.
10. The display device according to claim 1, further comprising:
a driving chip;
the non-display area comprises a first frame area, a second frame area and a third frame area, the first frame area and the second frame area are arranged oppositely, the third frame area is adjacent to the first frame area and the second frame area, and the driving chip is arranged in the third frame area;
the scanning circuit includes a first scanning circuit;
the first scanning circuit is positioned in the first frame area, the power signal line is arranged in the first frame area, and the vertical projection of the power signal line on the substrate at least partially overlaps with the vertical projection of the first scanning circuit on the substrate; and/or the presence of a gas in the gas,
the scan circuit includes a second scan circuit; the second scanning circuit is located in the second frame area, the power signal line is arranged in the second frame area, and the vertical projection of the power signal line on the substrate at least partially overlaps with the vertical projection of the second scanning circuit on the substrate.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111473565.8A CN114170903B (en) | 2021-11-29 | 2021-11-29 | Display device |
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| CN202111473565.8A CN114170903B (en) | 2021-11-29 | 2021-11-29 | Display device |
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| CN114170903B CN114170903B (en) | 2024-02-20 |
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| JP2010003434A (en) * | 2008-06-18 | 2010-01-07 | Seiko Epson Corp | Organic electroluminescent device |
| CN208273033U (en) * | 2018-05-14 | 2018-12-21 | 云谷（固安）科技有限公司 | Display module |
| CN208273036U (en) * | 2018-05-14 | 2018-12-21 | 云谷（固安）科技有限公司 | Display module |
| CN109116644A (en) * | 2018-08-29 | 2019-01-01 | 上海天马微电子有限公司 | Display panel and display device |
| US20200258970A1 (en) * | 2019-02-12 | 2020-08-13 | Samsung Display Co., Ltd. | Display device and method of manufacturing the same |
| CN113097263A (en) * | 2021-03-25 | 2021-07-09 | 京东方科技集团股份有限公司 | Display substrate and display device |
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2021
- 2021-11-29 CN CN202111473565.8A patent/CN114170903B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2010003434A (en) * | 2008-06-18 | 2010-01-07 | Seiko Epson Corp | Organic electroluminescent device |
| CN208273033U (en) * | 2018-05-14 | 2018-12-21 | 云谷（固安）科技有限公司 | Display module |
| CN208273036U (en) * | 2018-05-14 | 2018-12-21 | 云谷（固安）科技有限公司 | Display module |
| CN109116644A (en) * | 2018-08-29 | 2019-01-01 | 上海天马微电子有限公司 | Display panel and display device |
| US20200258970A1 (en) * | 2019-02-12 | 2020-08-13 | Samsung Display Co., Ltd. | Display device and method of manufacturing the same |
| CN113097263A (en) * | 2021-03-25 | 2021-07-09 | 京东方科技集团股份有限公司 | Display substrate and display device |
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| CN114170903B (en) | 2024-02-20 |
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