CN114167637A

CN114167637A - Liquid crystal display panel and liquid crystal display module

Info

Publication number: CN114167637A
Application number: CN202111453086.XA
Authority: CN
Inventors: 黄佩迪; 卢集晖
Original assignee: HKC Co Ltd; Chongqing HKC Optoelectronics Technology Co Ltd
Current assignee: HKC Co Ltd; Chongqing HKC Optoelectronics Technology Co Ltd
Priority date: 2021-11-30
Filing date: 2021-11-30
Publication date: 2022-03-11

Abstract

The embodiment of the application discloses liquid crystal display panel and liquid crystal display module, including being a plurality of sub-pixels that the array was arranged, a plurality of in arbitrary one in the multirow sub-pixel the sub-pixel shares same data line and emergent same colour light, a plurality of sub-pixels in arbitrary one in the multirow sub-pixel share same scanning line. And a second color sub-pixel is arranged between any adjacent first color sub-pixel and any adjacent third color sub-pixel, and the light-emitting area of the second color sub-pixel is smaller than the light-emitting area of the first color sub-pixel and the light-emitting area of the third color sub-pixel. The first color sub-pixel or the third color sub-pixel is shared by two adjacent rows of sub-pixels, so that the number of sub-pixels and data lines in the liquid crystal display panel is reduced, the image display effect is ensured, and the wiring complexity of the liquid crystal display panel manufacturing process is reduced.

Description

Liquid crystal display panel and liquid crystal display module

Technical Field

The application relates to the technical field of display, in particular to a liquid crystal display panel and a liquid crystal display module.

Background

At present, in order to ensure the high resolution of the liquid crystal display panel, the pixel arrangement mode of the liquid crystal display panel is mostly the standard RGB arrangement mode, but along with the increasing of the manufacturing size of the liquid crystal display panel, the user has higher and higher requirements for the resolution and the resolution of the liquid crystal display panel, so that the RGB pixel points required in the manufacturing of the liquid crystal display panel are more, the data lines correspondingly connected with the pixel points are correspondingly increased, and the production complexity of the liquid crystal display panel is gradually increased. How to maintain the high resolution of the lcd panel with the same size and reduce the complexity of the lcd panel is a problem to be solved.

Disclosure of Invention

In view of the above-mentioned deficiencies of the prior art, the present application provides a liquid crystal display panel and a liquid crystal display module with low manufacturing complexity and high resolution.

The application provides a liquid crystal display panel, includes:

a plurality of scanning lines arranged along a first direction;

a plurality of data lines arranged along a second direction, the second direction being perpendicular to the first direction;

the array substrate comprises a plurality of sub-pixels arranged in a matrix, wherein the plurality of sub-pixels comprise first color sub-pixels, second color sub-pixels and third color sub-pixels, the first color sub-pixels, the second color sub-pixels and the third color sub-pixels emit different color light rays, the plurality of sub-pixels are arranged in a row along the first direction, and the plurality of sub-pixels are arranged in a column along the second direction. A plurality of sub-pixels in any one of the columns of sub-pixels share the same data line and provide data signals and emit light rays with the same color, a plurality of sub-pixels in any one of the rows of sub-pixels share the same scanning line and provide scanning signals, a second color sub-pixel is arranged between any adjacent first color sub-pixel and third color sub-pixel, and the light-emitting area of the second color sub-pixel is smaller than the light-emitting area of the first color sub-pixel and the light-emitting area of the third color sub-pixel.

Optionally, the first color sub-pixel emits red light, the second color sub-pixel emits green light, and the first color sub-pixel emits blue light; the light emitting area of the first color sub-pixel is two times or four times of the light emitting area of the second color sub-pixel; the light emitting area of the third color sub-pixel is twice or four times the light emitting area of the second color sub-pixel. Alternatively, when a plurality of matrix-arranged sub-pixels display one frame of image,

and when the plurality of sub-pixels in the ith row receive the scanning signals, receiving the data voltages loaded by the plurality of sub-pixels in the ith-1 row, wherein i is an integer larger than 3.

Alternatively, if i is 4,

when the sub-pixels in the 4 th row receive the scanning signals, each sub-pixel in the 4 th row receives the data voltage of the sub-pixel in the same column in the 3 rd row;

when the plurality of sub-pixels in the 5 th row receive the scanning signals, each sub-pixel in the 5 th row receives the data voltage of the sub-pixel in the same column in the 4 th row;

when the sub-pixels in the 6 th row receive the scan signals, each sub-pixel in the 6 th row receives the data voltage of the sub-pixel in the same column in the 5 th row.

Optionally, for the plurality of sub-pixels in the i-th to last rows, the row where the plurality of second color sub-pixels are located is defined as an xth row, the xth row and the x-1 th row correspond to a plurality of self-pixel units that receive an adjustment data voltage, the adjustment data voltage is obtained by calculating a plurality of corresponding raw data signals of the sub-pixels that are input from the outside of the liquid crystal display panel and correspond to the xth row and the x-1 th row, the adjustment data voltage is between data voltages corresponding to the raw data signals of the plurality of sub-pixels in the xth row and the x-1 th row, and when the plurality of sub-pixels in the xth row and the x-1 th row receive the scan signals, the adjustment data voltage is loaded to the plurality of sub-pixels in the xth row and the x-1 th row, respectively.

The application also provides a liquid crystal display module which comprises the liquid crystal display panel. Wherein, the liquid crystal display panel includes:

a plurality of scanning lines arranged along a first direction;

the array substrate comprises a plurality of sub-pixels arranged in a matrix, wherein the plurality of sub-pixels comprise first color sub-pixels, second color sub-pixels and third color sub-pixels, the first color sub-pixels, the second color sub-pixels and the third color sub-pixels emit different color light rays, the plurality of sub-pixels are arranged in a row along the first direction, and the plurality of sub-pixels are arranged in a column along the second direction. A plurality of sub-pixels in any one column of the sub-pixels share the same data line and the provided data signals and emit light rays with the same color, a plurality of sub-pixels in any one row of the sub-pixels share the same scanning line and the provided scanning signals, a second color sub-pixel is arranged between any adjacent first color sub-pixel and third color sub-pixel, and the light-emitting area of the second color sub-pixel is smaller than the light-emitting area of the first color sub-pixel and the light-emitting area of the third color sub-pixel.

Optionally, the first color sub-pixel emits red light, the second color sub-pixel emits green light, and the third color sub-pixel emits blue light;

the light emitting area of the first color sub-pixel is two times or four times of the light emitting area of the second color sub-pixel;

the light emitting area of the third color sub-pixel is twice or four times the light emitting area of the second color sub-pixel.

Alternatively, when a plurality of matrix-arranged sub-pixels display one frame of image,

and when the plurality of sub-pixels in the ith row receive the scanning signals, receiving the data voltages loaded by the plurality of sub-pixels in the ith-1 row, wherein i is an integer greater than 3.

Alternatively, if i is 4,

Optionally, the liquid crystal display module further includes a display control circuit, a data driving circuit and a scanning driving circuit, wherein the display control circuit includes a data storage unit and an algorithm unit. The data storage unit is used for temporarily storing original data signals received from the outside of the liquid crystal display module. For the plurality of sub-pixels in the i-th to last rows, the row where the plurality of second color sub-pixels are located is defined as the x-th row, the algorithm unit is configured to calculate original data signals corresponding to the plurality of sub-pixels in the x-th row and the x-1 th row to obtain adjustment data signals, data voltages corresponding to the adjustment data signals are between data voltages corresponding to the original data signals of the plurality of sub-pixels in the x-th row and the x-1 th row, and when the plurality of sub-pixels in the x-th row and the x-1 th row receive the scanning signals, the adjustment data voltages corresponding to the adjustment data signals are loaded to the plurality of sub-pixels in the x-th row and the x-1 th row, respectively. The data driving circuit is connected with the display control circuit and the data lines and used for receiving the processed adjusting data signals from the algorithm unit, converting the adjusting data signals into adjusting data voltages and loading the adjusting data voltages to the sub-pixels through the data lines. The scanning driving circuit is connected with the display control circuit and the plurality of scanning lines and used for providing scanning signals to the plurality of sub-pixels according to a preset period, and the scanning signals are used for starting the plurality of sub-pixels to receive and adjust the data voltage.

Compared with the prior art, the pixel sharing arrangement method can greatly reduce the use amount of pixel points and data lines in the liquid crystal display panel, simplify the production flow of the liquid crystal display panel while ensuring the image display effect, and save the manufacturing cost of the liquid crystal display panel.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic side view of a liquid crystal display module according to an embodiment of the present disclosure;

FIG. 2 is a schematic view of a planar layout structure of the LCD module shown in FIG. 1;

FIG. 3 is a schematic diagram of a partial sub-pixel arrangement of the pixel units shown in FIG. 2;

FIG. 4 is a functional block diagram of the LCD module shown in FIG. 2;

FIG. 5 is a schematic diagram illustrating a partial sub-pixel arrangement of a plurality of pixel units according to a comparative example of the present application;

FIG. 6 is a timing diagram of the LCD panel of FIGS. 2-3;

fig. 7 is a schematic view of a partial sub-pixel arrangement of a plurality of pixel units shown in fig. 2 according to a second embodiment of the present application.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

The following description of the various embodiments refers to the accompanying drawings, which are included to illustrate specific embodiments that can be implemented by the application. The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). Directional phrases used in this application, such as, for example, "upper," "lower," "front," "rear," "left," "right," "inner," "outer," "side," and the like, refer only to the orientation of the appended drawings and are, therefore, used herein for better and clearer illustration and understanding of the application and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the application.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as being fixedly connected, detachably connected, or integrally connected; may be a mechanical connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art. It should be noted that the terms "first", "second", and the like in the description and claims of the present application and in the drawings are used for distinguishing different objects and not for describing a particular order.

Furthermore, the terms "comprises," "comprising," "includes," "including," or "including," when used in this application, specify the presence of stated features, operations, elements, and/or the like, but do not limit one or more other features, operations, elements, and/or the like. Furthermore, the terms "comprises" or "comprising" indicate the presence of the respective features, numbers, steps, operations, elements, components or combinations thereof disclosed in the specification, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, elements, components or combinations thereof, and are intended to cover non-exclusive inclusions. Furthermore, when describing embodiments of the present application, the use of "may" mean "one or more embodiments of the present application. Also, the term "exemplary" is intended to refer to an example or illustration.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

Referring to fig. 1, fig. 1 is a schematic side view of a liquid crystal display module 10 according to an embodiment of the present disclosure. The lcd Module 10 includes an lcd panel 13 and a backlight Module 17 (BM), wherein the backlight Module 17 is used for providing light for display to the lcd panel 13, and the lcd panel 13 emits corresponding light according to image Data (Data) to be displayed to perform image display. The lcd module 10 further includes other components or assemblies, such as a power module, a signal processor module, a signal sensing module, and the like.

The liquid crystal display panel 13 includes an Array Substrate (AS) 131, a Color filter substrate (CF) 133, and a liquid crystal layer 132 sandwiched between the Array substrate 131 and the Color filter substrate 133. The driving elements disposed on the array substrate 131 and the color filter substrate 133 generate corresponding electric fields according to the image Data, so as to drive the liquid crystal molecules in the liquid crystal layer 132 to rotate at an angle to emit light rays with corresponding brightness, thereby performing image display.

Please refer to fig. 2, which is a schematic plan layout structure diagram of the liquid crystal display module 10 shown in fig. 1.

As shown in fig. 2, the liquid crystal display module 10 includes a data driving circuit 11, a scan driving circuit 12, a liquid crystal display panel 13, and a display control circuit 14.

A plurality of Scan lines (Scan lines) S1 to Sn extending in the first direction F1 and a plurality of Data lines (Data lines) D1 to Dm extending in the second direction F2 are provided in a grid pattern inside the liquid crystal display panel 13. The first direction F1 and the second direction F2 are perpendicular to each other, and the plurality of scan lines S1 to Sn, the plurality of data lines D1 to Dm, and the scan lines S1 to Sn are insulated from the data lines D1 to Dm.

The pixel cells 15 are provided at intersections of the plurality of scanning lines S1 to Sn and the data lines D1 to Dm. In this embodiment, the pixel units 15 are represented by P11-P1 m, P21-P2 m, … …, Pn 1-Pn, respectively.

Each pixel unit 15 includes a driving element and a liquid crystal layer 132. The liquid crystal layer 132 emits light under the driving of the driving element. In this embodiment, the driving element includes a semiconductor switch element and an energy storage element, the semiconductor switch may be a Thin Film Transistor (TFT), and the energy storage element may be a capacitor formed by a pixel electrode (not shown) and a common electrode (not shown).

The scan lines S1 through Sn are connected to the scan driving circuit 12 to receive scan signals from the scan driving circuit 12, and the Data lines D1 through Dm are connected to the Data driving circuit 11 to receive image Data or Data signals (Data) provided by the Data driving circuit 11 and held and transmitted in the form of gray scale values, and then converted into corresponding analog voltage values.

The pixel unit 15 receives the Data voltages corresponding to the gray levels in the Data signals Data provided by the Data lines D1-Dm in a predetermined time period under the control of the scan lines S1-Sn, and accordingly drives the liquid crystal layer 132 to deflect a corresponding angle, so that the received backlight emits light rays with corresponding brightness according to the deflected corresponding angle, and image display is performed by emitting the light rays with corresponding brightness according to the image Data.

The display control circuit 14 receives an original Data signal indicating image information, a clock signal CK for synchronization, a horizontal synchronization signal Hsyn, and a vertical synchronization signal Vsyn from an external signal source of the liquid crystal display module 10, and outputs a gate output control signal Cg for controlling the scanning drive circuit 12, a source output control signal Cs for controlling the Data drive circuit 11, and an adjustment Data signal Data indicating image information. In this embodiment, the display control circuit 14 performs Data adjustment processing on the original Data signal to obtain an adjusted Data signal Data, and transmits the adjusted Data signal Data to the Data control circuit 11.

The scan driving circuit 12 receives the gate output control signal Cg outputted from the display control circuit 14, and outputs a scan signal to each of the scan lines S1 to Sn. The Data driving circuit 11 receives the source output control signal Cs output from the display control circuit 14, and outputs Data signals Data for driving the elements in each pixel unit 15 in the liquid crystal display panel 13 to each of the Data lines D1 to Dm. Among them, the Data signal Data supplied to the liquid crystal display panel 13 is a Data voltage of an analog signal. The scan driving circuit 12 outputs a scan signal, outputs an image signal from the data driving circuit 11, and can apply a voltage corresponding to a data signal for driving to the driving element in the pixel unit 15 to drive the liquid crystal molecules to perform image display.

Referring to fig. 3, fig. 3 is a schematic diagram illustrating a partial sub-pixel arrangement of the plurality of pixel units 15 in fig. 2.

As shown in fig. 3, one pixel unit 15 includes three sub-pixels, and the three sub-pixels respectively emit light rays corresponding to three primary colors, that is, red light rays, green light rays and blue light rays.

In this embodiment, the three sub-pixels are respectively defined as a first color sub-pixel R, a second color sub-pixel G and a third color sub-pixel B, the plurality of sub-pixels are also arranged in a row along the first direction F1, and the plurality of sub-pixels are arranged in a row along the second direction F2.

A plurality of sub-pixels in any Kth row in the multi-row sub-pixel units share the same data line and the provided data signal and emit light rays with the same color.

A plurality of sub-pixels in any J-th row in a plurality of rows of the sub-pixel units share the same scanning line and provided scanning signals, K is a positive integer which is larger than or equal to 1 and smaller than m, and J is a positive integer which is larger than or equal to 1 and smaller than n.

More specifically, as shown in fig. 3, the pixel unit P11 includes a first color sub-pixel R11, a second color sub-pixel G11 and a third color sub-pixel B11; the pixel unit P21 includes a third color sub-pixel B11, a second color sub-pixel G21, a first color sub-pixel R21, and so on. It can be seen that, in the present embodiment, the neighboring pixel cell P11 and the pixel cell P12 share the third color sub-pixel B11, and the other neighboring pixel cells 15 also include a shared sub-pixel.

The plurality of first color sub-pixels R11-R1 m are sequentially arranged in the first row, the plurality of second color sub-pixels G11-G1 m are sequentially arranged in the second row, the plurality of third color sub-pixels B11-R1 m are sequentially arranged in the third row, and so on, and the colors of the light rays emitted by the sub-pixels in the same row are the same.

In this embodiment, in the nth row of sub-pixels, one second color sub-pixel G is disposed between any adjacent first color sub-pixel R and third color sub-pixel B, and the light emitting area of the second color sub-pixel G is smaller than the light emitting area of the first color sub-pixel R and the light emitting area of the third color sub-pixel B.

Referring to fig. 4, fig. 4 is a functional block diagram of the liquid crystal display module 10 shown in fig. 2.

As shown in fig. 4, the display control circuit 14 is configured to receive original data signals, i.e., Dv, Ck, Hsyn, and Vsyn signals (fig. 2), transmitted from the outside of the liquid crystal display module 10, convert the original data signals into analog voltage signals, and transmit the analog voltage signals to the data driving circuit 11 and the scan driving circuit 12.

The display control circuit 14 includes a storage unit 141 and an arithmetic unit 142.

The storage unit 141 is used for temporarily storing the original data received from the outside of the lcd module 10 for the algorithm unit 142.

The arithmetic unit 142 is configured to calculate an original data signal, specifically:

and defining the line in which a plurality of second color sub-pixel G units are positioned as the x-th line in the sub-pixels in the i-th to N-th lines.

The arithmetic unit 142 is configured to calculate original Data signals corresponding to a plurality of sub-pixels on the x-th row and the x-1 th row to obtain an adjustment Data signal Data, where a Data voltage corresponding to the adjustment Data signal is between Data voltages corresponding to the original Data signals of the plurality of sub-pixels on the x-th row and the x-1 th row, and when the plurality of sub-pixels on the x-th row and the x-1 th row receive the scan signal, the adjustment Data voltages corresponding to the adjustment Data signal are loaded to the plurality of sub-pixels on the x-th row and the x-1 th row, respectively. Wherein x is greater than i and less than n.

For example, when x is 4, the arithmetic unit 142 calculates original Data signals corresponding to a plurality of sub-pixels on the 4 th row and the 3 rd row to obtain an adjustment Data signal Data, a Data voltage corresponding to the adjustment Data signal is between Data voltages corresponding to the original Data signals of the plurality of sub-pixels on the 4 th row and the 3 rd row, and when the plurality of sub-pixels on the 4 th row and the 3 rd row receive the scan signal, adjustment Data voltages corresponding to the adjustment Data signal are loaded to the plurality of sub-pixels on the 4 th row and the 3 rd row, respectively.

For another example, when x is equal to 6, the arithmetic unit 142 calculates original Data signals corresponding to a plurality of sub-pixels on the 6 th row and the 5 th row to obtain an adjusted Data signal Data, a Data voltage corresponding to the adjusted Data signal is between Data voltages corresponding to the original Data signals of the plurality of sub-pixels on the 6 th row and the 5 th row, and when the plurality of sub-pixels on the 6 th row and the 5 th row receive the scan signal, the adjusted Data voltages corresponding to the adjusted Data signal are loaded to the plurality of sub-pixels on the 6 th row and the 5 th row, respectively.

The Data driving circuit 11 is connected to the display control circuit 14 and the Data lines D1-Dm, and is configured to receive the processed adjustment Data signal Data from the arithmetic unit 142, convert the adjustment Data signal Data into adjustment Data voltages, and load the adjustment Data voltages to the sub-pixels in the pixel units 15 through the Data lines D1-Dm.

The scan driving circuit 12 is connected to the display control circuit 14 and the plurality of scan lines S1-Sn, and is configured to provide scan signals to the sub-pixels in the plurality of pixel units 15 according to a predetermined period, where the scan signals are used to start the sub-pixels in the plurality of pixel units 15 to receive the adjusted data voltages.

The auxiliary memory 16 is used for storing an algorithm program for the algorithm unit 142 to calculate the adjustment data. For example, the auxiliary memory 16 may load its stored algorithm program into the algorithm unit for processing the data signal each time the liquid crystal display module is powered on, or the auxiliary memory 16 may load an updated algorithm program obtained from the outside into the algorithm unit 142.

In this embodiment, the processing procedure of the display control circuit 14 specifically for receiving the original data signal representing the image information from the external signal source is as follows:

the display control circuit 14 receives an original data signal representing image information from an external signal source of the lcd module 10 and temporarily stores the original data signal in the storage unit 141, and the algorithm unit 142 retrieves an algorithm stored in the auxiliary memory 16 to calculate the original data signal temporarily stored in the storage unit 141.

Specifically, the arithmetic unit 142 calculates original data signals corresponding to a plurality of sub-pixels in the x-th row and the x-1 th row to obtain an adjusted data signal, where a data voltage corresponding to the adjusted data signal is between data voltages corresponding to the original data signals of the plurality of sub-pixels in the x-th row and the x-1 th row.

The display control circuit 14 transmits the adjustment Data signal Data and other signals (the source output control signal Cs, the gate output control signal Cg) to the Data driving circuit 11 and the scan driving circuit 12, the Data driving circuit 11 converts the adjustment Data signal Data into an adjustment Data voltage according to the received adjustment Data signal Data, and loads the adjustment Data voltage to the sub-pixels in the pixel units 15 of the liquid crystal display panel 13 through the Data lines D1 to Dm, and the scan driving circuit 12 controls the scan signals supplied to the sub-pixels in the liquid crystal display panel 13 through the scan lines S1 to Sn according to a predetermined timing cycle according to the received adjustment Data signal Cg.

The switching elements in the plurality of sub-pixels are controlled to be turned on by the scanning signals, so as to receive the adjustment data voltages loaded by the plurality of data lines D1-Dm, and finally the array substrate 131 and the rainbow substrate 133 in the liquid crystal display panel 13 form an electric field to drive the liquid crystal molecules in the liquid crystal layer 132 to rotate by a certain angle, so as to emit light rays with corresponding brightness, and when all the sub-pixels finish the loading of the adjustment data voltages, the liquid crystal display panel 13 finishes one frame of picture display.

Referring to fig. 5, fig. 5 is a schematic view of a local sub-pixel arrangement of a plurality of pixel units 15 according to a comparative embodiment of the present application, as shown in fig. 5,

the pixel unit P11 includes a first color sub-pixel R11, a second color sub-pixel G11 and a third color sub-pixel B11; the pixel unit P21 includes a first color sub-pixel R21, a second color sub-pixel G21 and a third color sub-pixel B21; … …, and so on.

In the nth column of sub-pixels, the first color sub-pixel R, the second color sub-pixel G and the third color sub-pixel B in each pixel unit 15 are arranged periodically, and the light emitting areas of the three sub-pixels are substantially the same.

It is obvious that the pixel unit P11 and the pixel unit P12 are independent from each other, and do not share any sub-pixel.

Referring to fig. 3 to 5, the light emitting areas of the first color sub-pixel R and the third color sub-pixel B shown in fig. 3 are increased by one time as compared with the light emitting area of the sub-pixel R, B shown in fig. 5, and the light emitting area of the G sub-pixel is decreased by one time as compared with the light emitting area of the G sub-pixel shown in fig. 5, that is, in fig. 3, the sub-pixel R, B is 4 times as large as the sub-pixel G, and the sub-pixel R, B is specifically changed as follows: r, B the side length of the sub-pixel along the F1 direction is constant and the side length along the F2 direction becomes twice the side length of the standard R, B sub-pixel. The specific variation of the G sub-pixel is as follows: the side length of the G sub-pixel in the first direction F1 is constant, and the side length in the second direction F2 is one-half of the side length of the standard G sub-pixel.

Meanwhile, compared to the first color sub-pixel R and the third color sub-pixel B which are completely periodically arranged and not shared as shown in fig. 5, as shown in fig. 3, any two pixel units 15 share one sub-pixel, for example, one second color sub-pixel B11 is shared between the image pixel unit P11 and the pixel unit P12, thereby effectively saving the area occupied by one sub-pixel. Meanwhile, the number of the pixel units 15 is reduced, so that the number of the data lines is correspondingly reduced, the manufacturing complexity of the pixel units 15 in the liquid crystal display panel is effectively reduced, and the production and manufacturing cost is also effectively reduced.

In an exemplary embodiment that can be changed, R, B sub-pixel light-emitting area is increased by one time compared to R, B sub-pixel light-emitting area in the standard RGB pixel unit, and G sub-pixel light-emitting area is the same as G sub-pixel light-emitting area in the standard RGB pixel unit, or R, B sub-pixel light-emitting area is the same as R, B sub-pixel light-emitting area in the standard RGB pixel unit, and G sub-pixel light-emitting area is decreased by one time compared to G sub-pixel light-emitting area in the standard RGB pixel unit, that is, 2 times of G sub-pixel light-emitting area in R, B sub-pixel, although R, B sub-pixel light-emitting area and G sub-pixel light-emitting area can be other ratios according to specific liquid crystal display panel requirements, and the application is not limited herein.

Referring to fig. 6, fig. 6 is a timing diagram of driving the liquid crystal display panel 13 shown in fig. 2 to 3.

The specific frame display process is as follows:

when the scan line S1 receives a high-level scan signal, the semiconductor switching elements in the sub-pixels in the first row are turned on, i.e., the Thin Film Transistors (TFTs) (not shown) are turned on, the data lines D1 to Dm apply the adjusted data voltages to the sub-pixels R11 to R1m in the first row, and the sub-pixels R11 to R1m emit light, thereby completing the scanning of the sub-pixels in the first row and the application and display of the data signals.

When the scan line S2 receives a high-level scan signal, the thin film transistors TFT in the sub-pixels in the second row are turned on, the data lines D1 to Dm load the adjusted data voltages to the sub-pixels G11 to G1m in the second row, and the sub-pixels G11 to G1m emit light, thereby completing the scanning and data signal loading display of the sub-pixels in the second row.

When the scan line S3 receives a high-level scan signal, the thin film transistors TFT in the sub-pixels in the third row are turned on, the data lines D1 to Dm load the adjusted data voltages to the sub-pixels G11 to G1m in the third row, and the sub-pixels G11 to G1m emit light, thereby completing the scanning and data signal loading display of the sub-pixels in the third row.

At this time, the pixel cells P11 to P1m shown in fig. 2 complete image display. The common sub-pixels B11 to B1m are loaded with the adjusted data voltages after the internal data arithmetic processing in the display control circuit 14.

When the scan line S4 receives a high-level scan signal, the thin film transistors TFT in the sub-pixels in the fourth row are turned on, and at this time, the data lines D1 to Dm load the adjustment data voltages to the sub-pixels G21 to G2m in the fourth row, but since the sub-pixels in the fourth row are the sub-pixels G21 to G2m in the second color, the data voltages loaded by the sub-pixels G21 to G2m in the fourth row are still the adjustment data voltages of the sub-pixels B11 to B1m in the third row, that is, the adjustment data voltages loaded by the sub-pixels B11 to B1m in the fourth row are loaded by the sub-pixels G21 to G2m again, that is, that the adjustment data voltages loaded by the sub-pixels B11 to B1m in the third row are used twice, so that the sub-pixels B11 to B1m in the third row and the sub-pixels G21 to G2m in the fourth row share the same adjustment data voltage. The sub-pixels G21-G2 m emit light under the driving of the adjusted data voltage, and complete the scanning and data signal loading display of the sub-pixels G21-G2 m in the fourth row.

When the scan line S5 receives a high-level scan signal, the subpixels R21 to R2m in the fifth row load the adjusted data voltages, but the adjusted data voltages loaded by the subpixels R21 to R2m in the fifth row are still the adjusted data voltages of the subpixels G21 to G2m, and the subpixels R21 to R2m emit light, thereby completing the scanning and data signal loading display of the subpixels R21 to R2m in the fifth row.

When the scan line S6 is a high-level scan signal, the plurality of subpixels G31 to R3m in the sixth row are loaded with the adjustment data voltages, and the plurality of subpixels G31 to G3m in the sixth row are subpixels G21 to G2m in the second color, and the adjustment data voltages loaded on the plurality of subpixels G31 to G3m in the sixth row are the adjustment data voltages of the subpixels R21 to R2m, that is, the adjustment data voltages of the subpixels R21 to R2m are used in the plurality of subpixels G31 to G3m in the sixth row.

The plurality of subpixels G31-G3 m in the sixth row are loaded with the adjusted data voltages of the subpixels G21-G2 m in the fifth row, and the subpixels G31-R3 m emit light under the drive of the adjusted data voltages, so that the scanning and data signal loading display of the plurality of subpixels G31-G3 m in the sixth row are completed. According to the above display rule, when the nth scanning period is completed, a complete frame of picture is displayed on the pixel unit 15.

It should be understood that the scanning signals output by the scanning lines S1 through Sn may be low, and the invention is not limited thereto.

In the process of displaying a frame of image, that is, when the plurality of subpixels arranged in the matrix display a frame of image, the plurality of subpixels in the ith row receive corresponding scan signals, and receive data voltages loaded by the plurality of subpixels in the (i-1) th row, where i is an integer greater than 3 and less than n.

For example, if i is 4, when the sub-pixels in the 4 th row receive the corresponding scan signals, each sub-pixel in the 4 th row receives the data voltage of the sub-pixel in the same column in the 3 rd row;

when the sub-pixels in the 5 th row receive corresponding scanning signals, each sub-pixel in the 5 th row receives data voltages of the sub-pixels in the same column in the 4 th row;

when the sub-pixels in the 6 th row receive corresponding scanning signals, each sub-pixel in the 6 th row receives data voltages of the sub-pixels in the same column in the 5 th row.

Furthermore, for the sub-pixels in the i-th to n-th rows, the row in which the second color sub-pixel G units are located is defined as the x-th row, the plurality of sub-pixel units corresponding to the x-th row and the x-1-th row receive an adjustment data voltage, the adjustment data voltage is obtained by calculating the corresponding raw data signals of the plurality of sub-pixels input from the outside of the liquid crystal display panel 13 and corresponding to the x-th row and the x-1-th row, the adjustment data voltage is between the data voltages corresponding to the raw data signals of the plurality of sub-pixels in the x-th row and the x-1-th row, and when the plurality of sub-pixels in the x-th row and the x-1-th row receive the scanning signals, the adjustment data voltage is respectively applied to the plurality of sub-pixels in the x-th row and the x-1-th row.

As shown in fig. 3 to 4, the adjacent pixel units 15 in the liquid crystal display panel 13 share one first color sub-pixel R or one third color sub-pixel G, so that in the driving display process, the second color sub-pixel G and the first color sub-pixel R or the third color sub-pixel G shared in the adjacent previous row use the same adjustment data voltage after adjustment processing, thereby achieving a better image display effect when the first color sub-pixel R or the third color sub-pixel G is shared.

However, the pixel arrangement shown in fig. 5 requires 6 data lines S1-S6 to complete the display of two complete rows of pixels, and 6 rows of sub-pixels are required to emit light, which consumes one more data line and one more row of sub-pixels than the common pixel arrangement method of the present application.

Further, as can be seen from the fact that the subpixel arrangement is continued by the common pixel arrangement method in this embodiment, three rows of pixel units 15 need to use 7 data lines S1 to S7, and 7 rows of subpixels need to emit light, four rows of pixel units 15 need to use 9 data lines S1 to S9, and 9 rows of subpixels need to emit light, and so on, n rows of complete pixels need to use 2n +1 data lines S1 to S2n +1, and 2n +1 rows of subpixels need to be used. The pixel arrangement method shown in fig. 5 needs to use 3n data lines and 3n rows of sub-pixels to display n rows of complete pixels, and consumes n-1 data lines and n-1 rows of sub-pixels more than the pixel arrangement method in the present application, so the common pixel arrangement method proposed in the present application greatly saves the use of data lines in the manufacturing process of the liquid crystal display panel 13, thereby effectively reducing the production cost.

Referring to fig. 7, fig. 7 is a schematic diagram illustrating a partial sub-pixel arrangement of a plurality of pixel units shown in fig. 2 according to a second embodiment of the present application.

As shown in fig. 7, the arrangement of the pixel units is substantially the same as that in the first embodiment of fig. 4, and the specific difference is that one data line drives three columns of sub-pixels, and three scan lines scan one row of sub-pixels. In this embodiment, the connection mode of the pixel unit 15, the data line and the scan line is a Triple-gate (Triple-gate) connection mode.

The method specifically comprises the following steps: when each data line can simultaneously load the aligned data voltage to three columns of sub-pixels, each row of sub-pixels is provided with scanning signals by three scanning lines. For example, the data line D1 may simultaneously apply the adjusted data voltages to all the sub-pixels on the column on which the sub-pixels R11, R12 and R13 are located, and similarly, the data line D2 may simultaneously apply the adjusted data voltages to all the sub-pixels on the column on which the sub-pixels R14, R15 and R16 are located; the scan lines S11, S12, and S13 simultaneously supply scan signals to the first row of subpixels R11 to R1m, and the scan lines S21, S22, and S23 simultaneously supply scan signals to the second row of subpixels G11 to G1 m.

By adopting Triple-gate layout, the number of scan lines S1 can be increased to three times, i.e. increased from original S1 to S11, S12, and S13, and the number of data lines can be reduced by 1/3. This can further reduce the number of data lines. Meanwhile, the whole arrangement matrix of the RGB sub-pixels is changed into a transposed matrix of a standard RGB sub-pixel arrangement matrix, namely, the sub-pixels arranged transversely in each row are changed into longitudinal arrangement, namely, the sub-pixels of the same type are sequentially arranged at equal intervals along the direction F1, and are sequentially arranged at equal intervals along the direction F2 strictly according to the sequence of RGB.

Because the cost of the data chip is high, the use of data lines in the liquid crystal display panel can be further saved by adopting a Triple-gate layout mode in the embodiment, and further, the production cost of the liquid crystal display panel can be greatly reduced.

It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.

Claims

1. A liquid crystal display panel comprising:

a plurality of scanning lines arranged along a first direction;

a plurality of sub-pixels arranged in a matrix, the plurality of sub-pixels including a first color sub-pixel, a second color sub-pixel and a third color sub-pixel for emitting different color light, the plurality of sub-pixels being arranged in a row along the first direction, and the plurality of sub-pixels being arranged in a column along the second direction;

the display device is characterized in that a plurality of sub-pixels in any one of a plurality of columns of sub-pixels share the same data line and provided data signals and emit light rays with the same color, a plurality of sub-pixels in any one of a plurality of rows of sub-pixels share the same scanning line and provided scanning signals, one second color sub-pixel is arranged between any adjacent first color sub-pixel and any adjacent third color sub-pixel, and the light emitting area of the second color sub-pixel is smaller than the light emitting area of the first color sub-pixel and the light emitting area of the third color sub-pixel.

2. The liquid crystal display panel according to claim 1,

the first color sub-pixel emits red light, the second color sub-pixel emits green light, and the first color sub-pixel emits blue light;

the light-emitting area of the first color sub-pixel is two times or four times of the light-emitting area of the second color sub-pixel;

the light emitting area of the third color sub-pixel is two or four times the light emitting area of the second color sub-pixel.

3. The liquid crystal display panel according to any one of claims 1 to 2,

when the plurality of matrix-arranged sub-pixels display one frame of image,

4. The liquid crystal display panel according to claim 3,

if the value of i is 4, then,

when the plurality of sub-pixels in the 4 th row receive the scanning signals, each sub-pixel in the 4 th row receives the data voltage of the sub-pixel in the same column in the 3 rd row;

when the plurality of sub-pixels in the 6 th row receive the scanning signals, each sub-pixel in the 6 th row receives the data voltage of the sub-pixel in the same column in the 5 th row.

5. The liquid crystal display panel according to claim 3,

for the sub-pixels in the ith to the last rows, the row where the plurality of sub-pixels with the second color are located is defined as the x-th row, a plurality of the self-pixel units in the x-th row and the x-1 th row receive an adjusting data voltage, the adjusting data voltage is obtained by calculating a plurality of sub-pixel original data signals which are correspondingly input from the outside of the liquid crystal display panel and correspond to the x-th row and the x-1 th row, the adjusted data voltage is between data voltages corresponding to the original data signals of the sub-pixels of the x-th row and the x-1 th row, when the plurality of sub-pixels of the x-th row and the x-1 th row receive the scan signal, and the adjusting data voltage is loaded to a plurality of sub-pixels of the x-th row and the x-1 th row respectively.

6. The utility model provides a liquid crystal display module assembly, includes the liquid crystal display panel, the liquid crystal display panel includes:

a plurality of scanning lines arranged along a first direction;

7. The liquid crystal display module of claim 6,

the first color sub-pixel emits red light, the second color sub-pixel emits green light, and the third color sub-pixel emits blue light;

8. The liquid crystal display module of any of claims 6-7,

when the plurality of matrix-arranged sub-pixels display one frame of image,

9. The liquid crystal display module of claim 8,

if the value of i is 4, then,

10. The liquid crystal display module of claim 8,

the liquid crystal display module also comprises a display control circuit, a data driving circuit and a scanning driving circuit, wherein the display control circuit comprises a data storage unit and an arithmetic unit,

the data storage unit is used for temporarily storing original data signals received from the outside of the liquid crystal display module;

for the plurality of sub-pixels in the i-th to last rows, the row where the plurality of second color sub-pixels are located is defined as an x-th row, the algorithm unit is configured to calculate original data signals corresponding to the plurality of sub-pixels in the x-th row and an x-1-th row to obtain adjustment data signals, data voltages corresponding to the adjustment data signals are between data voltages corresponding to the original data signals of the plurality of sub-pixels in the x-th row and the x-1-th row, and when the plurality of sub-pixels in the x-th row and the x-1-th row receive the scanning signals, the adjustment data voltages corresponding to the adjustment data signals are loaded to the plurality of sub-pixels in the x-th row and the x-1-th row, respectively;

the data driving circuit is connected with the display control circuit and the plurality of data lines, and is used for receiving the processed adjusting data signals from the algorithm unit, converting the adjusting data signals into adjusting data voltages and loading the adjusting data voltages to the plurality of sub-pixels through the plurality of data lines;

the scanning driving circuit is connected with the display control circuit and the plurality of scanning lines and used for providing scanning signals to the plurality of sub-pixels according to a preset period, and the scanning signals are used for starting the plurality of sub-pixels to receive the adjustment data voltage.