CN114157500A - Data packet processing method, electronic device and storage medium - Google Patents
Data packet processing method, electronic device and storage medium Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1408—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic by monitoring network traffic
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
- H04L43/0829—Packet loss
Abstract
The application provides a data packet processing method, an electronic device and a computer readable storage medium, wherein the method comprises the following steps: after a target data packet is obtained, a plurality of safety detection coroutines detect the target data packet and determine forwarding information corresponding to the target data packet; each safety detection coroutine corresponds to a CPU core; and processing the target data packet according to the forwarding information. According to the scheme, the thread mechanism is replaced by the coroutine mechanism, so that the expenditure of thread creation and switching can be reduced, and the overall performance of data packet processing is improved; in addition, a CPU core is bound for each coroutine, so that a multi-core architecture can be fully utilized, and the use efficiency of the multi-core platform is improved.
Description
Technical Field
The present application relates to the field of cloud information security technologies, and in particular, to a data packet processing method, an electronic device, and a computer-readable storage medium.
Background
In the cloud computing era, as network traffic becomes complicated, the transceiving and analysis processing of data packets are basic functional requirements in the cloud security field. Since the receiving and forwarding links of the data packet have a fast Processing speed, and the analyzing and Processing links need to consume a large amount of CPU (Central Processing Unit) computing resources and have a slow speed, the analyzing and Processing links are performance bottlenecks of the data packet Processing flow.
The related art adopts a run to finish (run to completion) model Development service architecture based on a DPDK (Data Plane Development Kit). The DPRK is used for receiving the data packet, forwarding the data packet to the data security detection engine module, and processing the data packet according to the forwarding information after the forwarding information returned by the data security detection engine module is obtained. The whole process adopts a multithreading/process mode, each process/thread is bound with a core, and the work of the whole flow of the data packet processing is independently executed. After each process/thread receives the data packet from the network card, the data packet enters the processing flow of the security detection engine, each hook module registered by the security detection engine is called in the processing flow, so that forwarding information is obtained, and the data packet is forwarded or discarded according to the forwarding information.
Due to the adoption of a multi-process/current-process mode, mechanisms such as memory management, mutual exclusion access and the like need to be realized when data is processed asynchronously, and a global connection table needs to be established and maintained, so that the development difficulty is increased. In addition, the scheme has high efficiency in the data packet receiving and sending processes, has low efficiency in the safety detection link, and can cause the problem of packet loss caused by insufficient space of the network card receiving queue when the data packet is not received from the network card in time due to overlong time consumed by safety detection.
Disclosure of Invention
An object of the embodiments of the present application is to provide a data packet processing method, an electronic device, and a computer-readable storage medium, which are used to improve the overall efficiency of a data packet processing flow.
In one aspect, the present application provides a data packet processing method, which is applied to a multi-core platform, where the multi-core platform includes multiple CPU cores, and includes:
after a target data packet is obtained, a plurality of safety detection coroutines detect the target data packet and determine forwarding information corresponding to the target data packet; each safety detection coroutine corresponds to a CPU core;
and processing the target data packet according to the forwarding information.
In an embodiment, before the plurality of security detection routines detects the target data packet, the method further includes:
the data receiving coroutine receives the target data packet from a network card of the multi-core platform and uploads the target data packet to the plurality of safety detection coroutines; wherein, the data receiving coroutine corresponds to a CPU core.
In one embodiment, the plurality of security detection routines correspond to different detection types;
the detecting the target data packet by the plurality of safety detection coroutines and determining forwarding information corresponding to the target data packet comprise:
each safety detection coroutine detects the target data packet to obtain a detection result of a detection type corresponding to the safety detection coroutine;
and determining the forwarding information of the target data packet according to a plurality of detection results.
In an embodiment, the processing the target packet according to the forwarding information includes:
if the forwarding information indicates to discard the target data packet, the data release coroutine discards the target data packet; wherein, the data release coroutine corresponds to a CPU core.
In an embodiment, the processing the target packet according to the forwarding information includes:
if the forwarding information indicates to forward the target data packet, the data forwarding coroutine forwards the target data packet; the data protocol conversion program corresponds to a CPU core.
In an embodiment, before the plurality of security detection routines detects the target data packet, the method further includes:
and creating a plurality of safety detection coroutines, and binding a CPU core for each safety detection coroutine.
In an embodiment, before the data reception protocol receives the target data packet from the network card of the multi-core platform, the method further includes:
and creating the data receiving protocol and binding a CPU core for the data receiving protocol.
In an embodiment, before the data release routine discards the target packet, the method further includes:
creating the data release protocol and binding a CPU core for the data release protocol;
before the data forwarding routine forwards the target data packet, the method further includes:
and creating the data forwarding coroutine, and binding a CPU core for the data forwarding coroutine.
Further, the present application provides an electronic device, including:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to execute the above packet processing method.
In addition, the present application also provides a computer readable storage medium, which stores a computer program executable by a processor to perform the above-mentioned packet processing method.
According to the scheme, after the multi-core platform comprising a plurality of CPU cores acquires the target data packet, a plurality of safety detection coroutines of the multi-core platform can detect the target data packet and determine forwarding information corresponding to the target data packet; each safety detection coroutine corresponds to a CPU core; further, the target data packet can be processed according to the forwarding information;
the safety detection tasks which need to consume a large amount of CPU computing resources are distributed to the CPU cores, so that the CPU cores can execute the safety detection tasks corresponding to the safety detection coroutines in parallel, the processing efficiency of an analysis processing link in a data packet processing flow is improved based on the advantage of a multi-core architecture, and the problem of packet loss caused by the fact that packets cannot be received from a network card receiving queue in time is solved. In addition, the cooperative program mechanism replaces a thread mechanism, the cooperative program is lighter than a thread, and the operation cost of thread creation and switching can be reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly described below.
Fig. 1 is a schematic view of an application scenario of a data packet processing method according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 3 is a schematic flowchart of a data packet processing method according to an embodiment of the present application;
fig. 4 is a schematic diagram illustrating an architecture of a packet processing method according to an embodiment of the present application;
fig. 5 is a block diagram of a packet processing device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
Like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Fig. 1 is a schematic view of an application scenario of a data packet processing method according to an embodiment of the present application. As shown in fig. 1, the application scenario includes a client 20 and a server 30; the client 20 may be a user terminal such as a host, a mobile phone, a tablet computer, etc., and is configured to send a data packet to the server 30; the server 30 may be a server, a server cluster or a cloud computing center, and the server 30 is a multi-core platform and includes a plurality of CPU cores; the server 30 may receive the data packet sent by the client 20 and process the data packet.
As shown in fig. 2, the present embodiment provides an electronic apparatus 1 including: at least one processor 11 and a memory 12, one processor 11 being exemplified in fig. 2. The processor 11 and the memory 12 are connected by a bus 10, and the memory 12 stores instructions executable by the processor 11, and the instructions are executed by the processor 11, so that the electronic device 1 can execute all or part of the flow of the method in the embodiments described below. In an embodiment, the electronic device 1 may be the server 30 described above, and is configured to perform the packet processing method. For ease of illustration, the following description is described with a multi-core platform as the execution body.
The Memory 12 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk or optical disk.
The present application also provides a computer-readable storage medium storing a computer program executable by the processor 11 to perform the data packet processing method provided by the present application.
Referring to fig. 3, a flow chart of a packet processing method according to an embodiment of the present invention is shown, and as shown in fig. 3, the method may include the following steps 310 to 320.
Step 310: after the target data packet is obtained, a plurality of safety detection coroutines detect the target data packet and determine forwarding information corresponding to the target data packet; wherein, each security detection coroutine corresponds to a CPU core.
The scheme of the application is applied to a multi-core platform comprising a plurality of CPU cores, and the multi-core platform can be based on a DPDK architecture. The multi-core platform can split the security detection link which needs to consume a large amount of CPU computing resources, and distribute the security detection link to a plurality of CPU cores for parallel processing, so that the advantages of the multi-core architecture are fully utilized, and the performance of data security analysis is improved.
The target data packet is a data packet currently processed by the multi-core platform. A security detection routine (coroutine) is used to perform security detection tasks. Here, the security Detection task may include, but is not limited to, an IDS (Intrusion Detection System) task, an IPS (Intrusion Prevention System) task, a WAF (Web Application Firewall) task, and the like.
After the target data packet is obtained, the multi-core platform can perform parallel detection on the target data packet through a plurality of security detection routines. Here, since each security inspection protocol corresponds to one CPU core, when performing parallel inspection, a plurality of CPU cores execute inspection tasks corresponding to the security inspection protocol. Through parallel detection, forwarding information corresponding to the target data packet can be obtained, and the forwarding information can indicate that the target data packet is discarded or forwarded.
Step 320: and processing the target data packet according to the forwarding information.
After obtaining the forwarding information of the target data packet, the multi-core platform may forward or discard the target data packet.
By the aid of the measures, the safety detection tasks needing to consume a large number of CPU computing resources are distributed to the CPU cores, so that the CPU cores can execute the safety detection tasks corresponding to the safety detection coroutines in parallel, the processing efficiency of an analysis processing link in a data packet processing flow is improved based on the advantage of a multi-core architecture, and the problem of packet loss caused by the fact that packets cannot be received from a network card receiving queue in time is solved. In addition, the cooperative program mechanism replaces a thread mechanism, the cooperative program is lighter than a thread, and the operation cost of thread creation and switching can be reduced.
In an embodiment, before the multiple security detection protocols detect the target data packet, the data receiving protocol of the multi-core platform may receive the target data packet from the network card of the multi-core platform. The data receiving protocol corresponds to a CPU core and is used for receiving and transmitting data packets.
After receiving the target data packet, the data receiving protocol may upload the target data packet to the multiple security detection protocols, so that the multiple security detection protocols may detect the target data packet in parallel.
By the measures, the independent CPU core executes the data receiving task through the data receiving coroutine, and the target data packet can be received from the network card more efficiently.
In one embodiment, the multiple security inspection routines may correspond to different inspection types, with the inspection types indicating different security inspection tasks. Illustratively, the multi-core platform includes four security detection routines; one security detection protocol for executing IDS tasks, one security detection protocol for executing IPS tasks, one security detection protocol for executing WAF tasks, and one security detection protocol for executing antivirus tasks.
In step 310, each security inspection routine may inspect the target data packet, so as to obtain an inspection result of the inspection type corresponding to the security inspection routine. In this case, a plurality of detection results may be obtained, each of which may indicate whether there is an attack behavior on the target packet.
The multi-core platform can determine the forwarding information of the target data packet according to a plurality of detection results. On one hand, if all the detection results indicate that the target data packet has no attack behavior, the target data packet can be determined to have no attack behavior, and at the moment, the forwarding information is determined to be the forwarding target data packet. On the other hand, if the detection result corresponding to any one detection type exists, the target data packet is indicated to have an attack behavior, the target data packet can be determined to have the attack behavior, and at this time, the forwarding information is determined to be the discarded target data packet.
In an embodiment, in step 320, if the forwarding information indicates to discard the target packet, the data release routine of the multi-core platform may discard the target packet. The data release protocol corresponds to a CPU core, and the data release protocol is used for discarding data packets. And under the condition that the forwarding information indicates that the target data packet is discarded, the CPU core corresponding to the data release protocol can discard the target data packet.
In an embodiment, in step 320, if the forwarding information indicates that the target packet is to be forwarded, the data forwarding routine of the multi-core platform may forward the target packet. The data forwarding coroutine corresponds to a CPU core and is used for forwarding data packets. And under the condition that the forwarding information indicates that the target data packet is forwarded, the CPU core corresponding to the data forwarding coroutine can forward the target data packet.
By the measures, the independent CPU core discards the data packet through the data release coroutine, and the independent CPU core forwards the data packet through the data forwarding coroutine, so that the data packet can be efficiently processed.
In an embodiment, before performing step 310, the multi-core platform may create a plurality of security check routines and bind a CPU core to each security check routine.
The multi-core platform can establish a corresponding safety detection module for the analysis processing link, the safety detection module comprises a plurality of safety detection sub-modules, and each safety detection sub-module corresponds to a safety detection task of a detection type. And after each safety detection protocol is bound with the CPU core, subsequently, a plurality of CPU cores can execute safety detection tasks of various detection types on the data packet in parallel.
For some security detection sub-modules, their corresponding security detection tasks are related to connection information of different connections (connections). In this case, for each connection, the multi-core platform may create a corresponding security detection coroutine and bind the security detection coroutine to the CPU core.
Illustratively, the security detection module includes 5 security detection sub-modules, each performing 5 types of security detection tasks. Wherein, the 5 th safety detection task is related to the connection information of different connections. For the 1 st to 4 th safety detection sub-modules, the multi-core platform can respectively create a safety detection coroutine and bind to the CPU. For the 5 th security detection submodule, the multi-core platform may create a unique corresponding security detection coroutine for a connection and bind to the CPU each time a data packet of the connection is received. When the data packet of the connection is no longer subsequently received, the security detection routine created for the connection may be released.
For security detection tasks related to the connection. A coordination-per-connection mode is adopted, and the safety detection of each connection is independent and does not interfere with each other. At this time, a global connection table does not need to be established and maintained, and the processing efficiency can be remarkably improved when the flow of a plurality of connections is processed simultaneously.
In an embodiment, before the data reception protocol receives the target data packet from the network card, the multi-core platform may create the data reception protocol and bind a CPU core to the data reception protocol.
In this case, the CPU core bound to the data reception protocol can concentrate on the reception of the packet, thereby improving the data reception efficiency.
In an embodiment, before the data release routine discards the target packet, the multi-core platform may create the data release routine and bind a CPU core to the data release routine.
Before the data forwarding routine forwards the target data packet, the multi-core platform may create the data forwarding routine and bind the CPU core for the data forwarding routine.
Under the condition, the data release protocol and the data forwarding protocol are respectively bound with a CPU core, so that the CPU core can be concentrated on the data packet discarding or data packet forwarding work, and the data packet processing efficiency is improved.
Referring to fig. 4, which is an architectural diagram of the data packet processing method provided in an embodiment of the present application, as shown in fig. 4, the multi-core platform includes a plurality of CPU cores, and each CPU core is bound to a coroutine and is responsible for executing a data packet processing task corresponding to the coroutine. The dashed box represents a security detection module that contains multiple security detection routines that perform different detection type tasks. After the multi-core platform receives the data packet, the CPU core corresponding to the data receiving coroutine may receive the data packet from the network card and upload the data packet to the security detection module. The multiple safety detection coroutines of the safety detection module can perform safety detection on the data packet in parallel, so that the forwarding information is determined according to the detection result. When the forwarding information indicates to discard the data packet, the CPU core corresponding to the data release protocol can discard the data packet; when the forwarding information indicates to forward the data packet, the CPU core corresponding to the data forwarding coroutine may forward the data packet.
By replacing a thread mechanism with a coroutine mechanism, the overhead of thread creation and switching can be reduced, so that the overall performance of data packet processing is improved; in addition, a CPU core is bound for each coroutine, so that a multi-core architecture can be fully utilized, and the use efficiency of the multi-core platform is improved.
Fig. 5 is a block diagram of a packet processing apparatus according to an embodiment of the present invention, and as shown in fig. 5, the apparatus may include:
a detection module 510, configured to, after obtaining a target data packet, perform detection on the target data packet by multiple security detection routines, and determine forwarding information corresponding to the target data packet; each safety detection coroutine corresponds to a CPU core;
a processing module 520, configured to process the target data packet according to the forwarding information.
The implementation process of the functions and actions of each module in the device is specifically described in the implementation process of the corresponding step in the data packet processing method, and is not described herein again.
In the embodiments provided in the present application, the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Claims (10)
1. A data packet processing method is applied to a multi-core platform, wherein the multi-core platform comprises a plurality of CPU cores, and the method is characterized by comprising the following steps:
after a target data packet is obtained, a plurality of safety detection coroutines detect the target data packet and determine forwarding information corresponding to the target data packet; each safety detection coroutine corresponds to a CPU core;
and processing the target data packet according to the forwarding information.
2. The method of claim 1, wherein prior to the plurality of security detection protocols detecting the target packet, the method further comprises:
the data receiving coroutine receives the target data packet from a network card of the multi-core platform and uploads the target data packet to the plurality of safety detection coroutines; wherein, the data receiving coroutine corresponds to a CPU core.
3. The method of claim 1, wherein the plurality of security detection routines correspond to different detection types;
the detecting the target data packet by the plurality of safety detection coroutines and determining forwarding information corresponding to the target data packet comprise:
each safety detection coroutine detects the target data packet to obtain a detection result of a detection type corresponding to the safety detection coroutine;
and determining the forwarding information of the target data packet according to a plurality of detection results.
4. The method of claim 1, wherein the processing the target packet according to the forwarding information comprises:
if the forwarding information indicates to discard the target data packet, the data release coroutine discards the target data packet; wherein, the data release coroutine corresponds to a CPU core.
5. The method of claim 4, wherein the processing the target packet according to the forwarding information comprises:
if the forwarding information indicates to forward the target data packet, the data forwarding coroutine forwards the target data packet; the data protocol conversion program corresponds to a CPU core.
6. The method of claim 1, wherein prior to the plurality of security detection protocols detecting the target packet, the method further comprises:
and creating a plurality of safety detection coroutines, and binding a CPU core for each safety detection coroutine.
7. The method of claim 2, wherein prior to the data reception protocol receiving the target data packet from a network card of the multi-core platform, the method further comprises:
and creating the data receiving protocol and binding a CPU core for the data receiving protocol.
8. The method of claim 5, wherein before the data release routine discards the target packet, the method further comprises:
creating the data release protocol and binding a CPU core for the data release protocol;
before the data forwarding routine forwards the target data packet, the method further includes:
and creating the data forwarding coroutine, and binding a CPU core for the data forwarding coroutine.
9. An electronic device, characterized in that the electronic device comprises:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to perform the packet processing method of any one of claims 1 to 8.
10. A computer-readable storage medium, characterized in that the storage medium stores a computer program executable by a processor to perform the packet processing method according to any one of claims 1 to 8.
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| CN114466151A (en) * | 2022-04-11 | 2022-05-10 | 武汉中科通达高新技术股份有限公司 | Video storage system, computer equipment and storage medium of national standard camera |
| CN115220932A (en) * | 2022-07-13 | 2022-10-21 | 小米汽车科技有限公司 | Communication process execution method, device, vehicle, readable storage medium and chip |
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