CN114142751B - Three-phase CSR proportional integral resonance control method under unbalanced power grid voltage - Google Patents

Abstract

The invention discloses a three-phase CSR proportional integral resonance control method under unbalanced power grid voltage to obtain direct-current side load voltage u _o And a DC side output current i _dc The method comprises the steps of carrying out a first treatment on the surface of the Load voltage u on DC side _o And a DC side load voltage reference valueAfter subtracting to obtain voltage error signal, obtaining DC reference value component by PI controlAnd then outputs current i with direct current side _dc Comparing to obtain a current error signal, and obtaining a feedback term through the PIR controllerSimultaneously introducing an active damping loop control item for inhibiting LC resonance at an alternating current side and a power factor compensation item for ensuring stable unit power factor operation of CSR, and adding the three items into a grid side current i under a d-q synchronous rotation coordinate system _d And i _q And converted to obtain a modulated signal i _α And i _β And after passing through the wave trap, the three-phase CSR is controlled by adopting space vector pulse width modulation. The invention has the advantages of simple and efficient control algorithm, small calculated amount, capability of omitting a network side current sensor, effective reduction of system cost and the like.

Description

A three-phase CSR proportional integral resonance control method under unbalanced grid voltage

Technical field

The invention relates to the field of power grid technology, and in particular to a three-phase CSR proportional integral resonance control method under unbalanced power grid voltage.

Background technique

With the application and development of high-power converter technology, PWM rectifiers have attracted more and more attention from industry and academia. Compared with voltage source rectifier (VSR), current source rectifier (CSR) has the advantages of high reliability during DC short circuit, wide range of step-down output, no need for precharge circuit, and easy parallel operation. It is increasingly used in data center power supply systems, multi-electric aircraft power distribution systems, battery pack charging systems, renewable new energy systems and other fields.

Current research on CSR mainly focuses on three-phase grid voltage balance conditions. However, in actual systems, unbalanced grid voltage conditions are common. Under unbalanced grid voltage conditions, the double low-frequency pulsation appearing on the DC side and the third harmonic appearing on the grid side current will deteriorate the CSR performance. In view of this, Problem Domestic and foreign researchers have successively proposed some control strategies.

For example, determining the specific harmonic order of the grid current suppression term in the cost function proposed by model predictive control reduces the use of sensors and enables CSR to maintain a high degree of sinusoidal grid current under unbalanced grid voltage conditions. However, this The control algorithm is relatively complex and requires a large amount of calculation.

Contents of the invention

In view of the shortcomings of the above-mentioned existing technologies, the technical problem to be solved by the present invention is: how to provide a control algorithm that is simple and efficient, has a small amount of calculation, and at the same time can omit the grid-side current sensor and effectively reduce the system cost under unbalanced grid voltage. Three-phase CSR proportional integral resonance control method.

In order to solve the above technical problems, the present invention adopts the following technical solutions:

A three-phase CSR proportional integral resonance control method under unbalanced grid voltage, which is characterized by adopting the following steps:

S1. Obtain the DC side load voltage u _o and DC side output current i _dc ;

S2. Voltage outer loop control: compare the DC side load voltage u _o with the DC side load voltage reference value The voltage error signal is obtained by subtraction, and the DC current reference component is obtained by controlling the voltage error signal through PI/>

S3. Current inner loop control: convert the DC current reference value component into Compare with the DC side output current i _dc to obtain the current error signal, which is obtained through the PIR controller/> Will/> The grid-side currents i _d and i _q under the dq synchronous rotating coordinate system are added as feedback items;

S4. Convert _id and i _q through coordinate conversion to obtain modulation signals i _α and i _β in two-phase stationary coordinates, and use space vector pulse width modulation to control the current source PWM rectifier.

As an optimization, before step S4, the power factor compensation term is added to the grid-side currents _id and _iq under the dq synchronous rotating coordinate system. and/>

In the formula: C _ac is the AC side filter capacitor, u _q and u _d are the AC side filter capacitor voltage in the dq synchronous rotating coordinate system.

As a further optimization, before step S4, the active damping loop control term is added to the grid-side currents _id and _iq under the dq synchronous rotation coordinate system. and/> The grid-side currents i _d and i _q under the dq synchronous rotating coordinate system are obtained respectively:

in, and/> The AC side capacitance voltage u _q and u _d under the dq synchronous rotation coordinate are filtered by a high-pass filter and multiplied by the active damping feedback gain to obtain:

In the formula: K _Cv is the active damping feedback gain;

The expression of the high-pass filter is:

In the formula: ω _h is the cutoff frequency of the high-pass filter.

As an optimization, the PIR controller is:

In the formula: k _p , k _i , k _r are proportional, integral, and resonance gain coefficients respectively.

In the step S3, the transfer function of the current inner loop control is:

In the formula: a ₄ =K _m k _p R _L C _dc ; a ₃ =K _m k _p +K _m (k _i +k _r )R _L C _dc ; a ₂ =K _m (k _i +k _r )+ K _m 4ω ² k _p R _L C _dc ; a ₁ =K _m (4ω ² k _p +4ω ² k _i R _L C _dc ); a ₀ =K _m 4ω ² k _i ; b ₅ =R _L L _dc C _dc ; b ₄ =L _dc ; b ₃ = 4ω ² R _L L _dc C _dc + R _L ; b ₂ = 4ω ² L _dc ; b ₁ = 4ω ² R _L ; b ₀ = 0;

Among them, K _m is the system voltage gain, R _L is the load resistance, C _dc is the DC side capacitance, and L _dc is the DC side inductance.

Further, in step S4, a trap is used to eliminate the third harmonic in the modulated signals i _α and i _β . The trap is:

In the formula: K ₁ is the controller coefficient.

Further, in step S4, the space vector pulse width modulation adopts a twelve-sector modulation strategy, and the vector sequence of each sector is a bilaterally symmetric current vector sequence.

In summary, the present invention has the advantages of simple and efficient control algorithm, small calculation amount, and can eliminate the need for grid-side current sensors and effectively reduce system costs.

Description of drawings

Figure 1 is a topology diagram of a current source PWM rectifier.

Figure 2 is a three-phase CSR control strategy block diagram.

Figure 3 is the single-phase (a-phase) vector diagram of the CSR input side under non-unity power factor operation.

Figure 4 is the single-phase (a-phase) vector diagram of the CSR input side under unit power factor operation.

Figure 5 shows the capacitor voltage feedback active damping strategy diagram.

Figure 6 is the Bode diagram of the AC side LC filter.

Figure 7 is a block diagram of the CSR system control loop.

Figure 8 is the current inner loop control block diagram.

Figure 9 is the Bode diagram of the current open-loop transfer function under different kr.

Figure 10 is the Bode diagram of the current open and closed loop transfer function.

Figure 11 is a schematic diagram of 12-sector division.

Figure 12 is a Bode diagram of the trap designed in the present invention.

Figure 13 is a schematic diagram of three-phase unbalanced grid voltage.

Figure 14 shows the a-phase grid voltage, grid-side current and DC-side load voltage under traditional double-closed-loop simulation.

Figure 15 shows the grid-side current harmonic analysis diagram under traditional double-closed-loop simulation.

Figure 16 shows the a-phase grid voltage, grid-side current and DC-side load voltage under simulation of the solution of the present invention.

Figure 17 is a grid-side current harmonic analysis diagram under simulation of the solution of the present invention.

Figure 18 is a diagram of active power, reactive power and their power factor under simulation of the scheme of the present invention.

Figure 19 shows the dynamic response simulation results of the method of the present invention.

Figure 20 is a model-based code generation control block diagram.

Figure 21 shows the three-phase unbalanced grid voltage.

Figure 22 shows the a-phase grid voltage, grid-side current and DC-side load voltage under the CSR experiment during traditional double-closed-loop control.

Figure 23 shows the grid-side current harmonic analysis diagram under CSR experiment under traditional double closed-loop control.

Figures 24 to 26 are diagrams of CSR experimental results when controlled by the method of the present invention.

Figure 27 is the grid-side current harmonic analysis diagram when u*o=100V.

Figure 28 is a schematic diagram of the dynamic response experimental results.

Detailed ways

The present invention will be further described in detail below with reference to examples.

In this embodiment, a mathematical model of CSR in a three-phase stationary coordinate system is first established, and the reasons why there are double low-frequency pulsations on the DC side and third harmonics on the AC side when the grid voltage is unbalanced are analyzed. It is proposed that the DC side adopts double closed-loop control, in which the current inner loop is directly controlled by a proportional integral resonance (PIR) controller to suppress the double low-frequency pulsation on the DC output side; an AC side capacitor current compensation method is used to eliminate the AC side The influence of capacitor current on the system power factor is also studied. At the same time, active damping control of capacitor voltage feedback on the AC side is introduced to suppress the LC parallel resonance on the AC side; a trap is designed to eliminate the third harmonic in the modulation link and achieve a high degree of sinusoidalization of the grid-side current; finally The method proposed in this embodiment is verified through simulation and experiment.

1. Three-phase CSR system working analysis

The topology of the three-phase current source PWM rectifier is shown in Figure 1. Among them, e _k is the grid voltage, i _k is the grid side current, i _sk is the AC side current of the rectifier, k = a, b, c; L _ac and C _ac are the filter inductance and capacitance of the AC side of the rectifier respectively, L _dc and C _dc are the DC side inductance and capacitance respectively, D is the freewheeling diode, R _L is the load resistance, u _dc and i _dc are the DC side output voltage and current respectively, u _o and i _o are the load voltage and current respectively.

Establish a mathematical model of CSR in a three-phase stationary coordinate system and obtain it according to Kirchhoff's voltage and current law:

In the formula: u _ck is the AC side filter capacitor voltage, and σ _k is the switching function.

The unbalanced grid voltage can be expressed as:

In the formula: E _p and E _n are the amplitudes of the positive sequence component and the negative sequence component respectively; ω is the fundamental angular frequency of the grid voltage; α _p and α _n are the initial phase angles of the positive sequence component and the negative sequence component respectively.

The three-phase grid voltage is transformed through Park transformation to obtain the voltages ed _and e _q under the dq synchronous rotation coordinate. The grid-side current is transformed into i _d and i _q through Park. Then the grid-side power can be expressed as:

The instantaneous power expression on the grid side is:

In the formula:

In the formula: are the positive sequence and negative sequence components of voltage respectively;/> are the positive sequence and negative sequence components of the current respectively.

It can be seen from equation (4) that under unbalanced grid voltage, both grid-side active and reactive power contain second harmonic components. Ignoring the system loss, it can be seen from the system power conservation that the DC side voltage and current will also have second harmonic components. Ignoring the influence of DC side capacitance, the DC side output voltage and current can be expressed as:

In the formula: U _dc is the average value of the DC side voltage, u _dc1 and u _dc2 are the amplitudes of the cosine and sinusoidal components of the secondary voltage harmonics respectively; I _dc is the average value of the DC side current, i _dc1 and i _dc2 are the secondary currents respectively. Harmonic cosine and sine component amplitudes.

In the steady state, only the fundamental wave quantity of the switching function is considered:

σ _k (t)=msin(ωt+β) (6)

In the formula: m is the modulation factor, 0≤m≤1, and β is the initial phase angle of the fundamental wave.

Further, the expression of the grid-side current can be obtained as:

It can be seen from equation (7) that the second harmonic of the DC side output current will cause the grid side current to contain the third harmonic.

2. CSR control strategy under unbalanced grid voltage

At present, under the condition of three-phase unbalanced grid voltage, the common control strategy of CSR is to improve the grid-side current waveform by suppressing the negative sequence component of the grid-side current from the two perspectives of separation of positive and negative sequence of grid voltage and constant active power on the input side. , while removing the low-frequency pulsation on the DC side. However, this control strategy needs to extract the positive and negative sequence components of the grid voltage, and extraction through methods such as phase-locked loops is complicated and computationally intensive.

To address this problem, this embodiment proposes a new control scheme that does not require extracting the positive and negative sequence components of the grid voltage. As shown in Figure 2, the second-frequency component on the DC output side is directly suppressed by designing a control loop, and then according to Equation (7) It can be seen that when the second frequency component of the DC side is attenuated, the third harmonic of the grid-side current will also be reduced, thereby achieving a high degree of sinusoidalization of the grid-side current.

The control principle is as follows: DC side load voltage u _o and DC side load voltage reference value The voltage error signal is obtained by subtraction, and the DC current reference value component is obtained after PI control/> Continue to compare with the DC side output current i _dc to obtain the current error signal, which is obtained through the PIR controller/> Achieve the suppression of double frequency pulsation on the DC side.

The function of the three-phase CSR grid-side LC is to filter the harmonics of the grid-side current. However, due to the influence of the filter capacitor current, a phase difference will occur in the grid-side voltage and current, resulting in the system not being able to operate at unit power factor.

As shown in Figure 3, taking phase a as an example, e _a and _ia represent the grid side voltage and current, _isa represents the AC side current, u _la represents the voltage at both ends of the AC side filter inductor, u _{ca and ica} represent the AC side. The voltage and current at both ends of the filter capacitor, and the input power factor angle between the grid-side voltage and current when the CSR is operating at non-unity power factor are represented by δ, and the angle between the grid-side voltage and the AC-side current is represented by express. It can be seen from Figure 4 that in order to improve the system input power factor and enable the system to operate at unit power factor, it needs to be increased/> , reduce δ. From the operating principle of three-phase CSR, we can get:

In the formula: _Em represents the effective value of the grid side voltage.

It can be seen from equation (8) that when U _dc and _Em remain unchanged, increasing the modulation factor m can increase . Therefore, this embodiment designs a compensation current method, which increases _isa by reducing i _ca , thus increasing m and/> , to improve the system input power factor. From formula (1), we can get the CSR in dq coordinates:

Right now:

In order to reduce the impact of system noise, the differential term in the above equation (10) can be ignored, that is, i _cd =-ωC _ac u _q , i _cq =ωC _ac u _d , then when the compensation current is designed It can effectively reduce the influence of the filter capacitor current i _ca and at the same time improve the system input power factor.

At the same time, the three-phase CSR is also susceptible to the influence of PWM harmonics or system step response, causing parallel resonance in the grid-side LC circuit. To address this problem, this embodiment introduces a high-pass filter to obtain the harmonic component of the AC side filter capacitor near the resonant frequency, and effectively suppresses the resonance through the capacitor voltage feedback active damping loop. The control block diagram is shown in Figure 5, where K _Cv represents the corresponding feedback gain.

The HPF transfer function is taken as s/(s+ω _h ), and the transfer function of the grid side current relative to the AC side current is:

In the formula: A ₁ =1, A ₀ =ω _h ; B ₃ =L _ac C _ac , B ₂ =K _Cv L _ac +L _ac C _ac ω _h , B ₁ =1, B ₀ =ω _h .

The system damping coefficient and oscillation frequency can be changed by reasonably setting the feedback gain. As shown in Figure 6, when the feedback gain K _Cv is increased within the range of (0, 0.65), the LC resonance peak will gradually attenuate and gradually exhibit over-damping characteristics. Comprehensive consideration, choosing K _Cv = 0.25 can satisfy resonance suppression without causing controller output saturation.

Introduce power factor compensation term and/> and active damping loop control items/> and/> Combined, we get:

The modulated signals i _α and i _β in the two-phase stationary coordinates are obtained through coordinate transformation.

3. Loop controller design

The three-phase CSR DC side adopts a double closed-loop control strategy, as shown in Figure 7, where G _v (s) and G _i (s) are the voltage outer loop PI controller and the current inner loop PIR controller respectively, and K _m is the system voltage. For gain, take K _m =1.5E _m .

The PIR controller is a resonant controller connected in parallel to the PI controller. In the PIR controller, PI is used to track and control the DC signal, and R is used to track and control the low-frequency pulsation signal. This achieves seamless tracking of the DC signal and the low-frequency pulsation signal at the same time. It is worth noting that in the design of the PIR controller in this embodiment, the control goal of R is to achieve seamless tracking of the double frequency component on the DC side, so the value of the corresponding component in R should be twice the fundamental wave of the grid voltage. Angular frequency, which is 2ω. At this time the PIR controller expression:

In the formula: k _p , k _i , k _r are proportional, integral, and resonance gain coefficients respectively.

The current inner loop control block diagram is shown in Figure 8:

Using Mason's formula, the open-loop transfer function of the current inner loop is:

After sorting out formula (14), we can get:

In the formula: a ₄ =K _m k _p R _L C _dc ; a ₃ =K _m k _p +K _m (k _i +k _r )R _L C _dc ; a ₂ =K _m (k _i +k _r )+ K _m 4ω ² k _p R _L C _dc ; a ₁ =K _m (4ω ² k _p +4ω ² k _i R _L C _dc ); a ₀ =K _m 4ω ² k _i ; b ₅ =R _L L _dc C _dc ; b ₄ =L _dc ; b ₃ =4ω ² R _L L _dc C _dc +R _L ; b ₂ =4ω ² L _dc ; b ₁ =4ω ² R _L ; b ₀ =0.

After determining the k _p and k _i parameters in the PIR controller, substitute them into equation (15). When k _r takes different values, the Bode diagram of the current open-loop transfer function is obtained, as shown in Figure 9.

It can be seen that as k _r increases, the system's ability to track the double frequency becomes stronger, and the entire control system can suppress the double frequency pulsation on the DC side. However, excessive k _r will affect other frequencies. In order To ensure the overall performance of the system, k _r is selected as 100 based on comprehensive considerations.

The final Bode diagram of the open and closed loop transfer function of the current inner loop is shown in Figure 10. At this time, its phase margin is 87.3°, the cutoff frequency is 1910Hz, and the system bandwidth is 2100Hz, which is approximately 1/10 of the switching frequency, which meets the system performance Require.

4. System modulation strategy

SVM is the most commonly used modulation method for CSR. The switch status and sector division of traditional six-sector modulation are shown in Table 1.

Table 1 Switch status and sector division

However, the traditional six-sector modulation strategy has the disadvantage of high system switching power loss. To address this problem, this embodiment adopts a twelve-sector modulation strategy, and its space vector distribution is shown in Figure 11. As shown in Table 2, the use of bilaterally symmetrical current vector sequences can reduce the average switching voltage of the system, thereby reducing power loss and improving three-phase CSR operating efficiency.

Table 2 Current space vector sequence of each sector

It can be seen from the above that because the current inner loop output signal has double frequency pulsation, the modulated signals i _α and i _β obtained through coordinate transformation will contain third harmonics, and a trap can be used to eliminate the third harmonics. At this time, the value of the corresponding component of the notch should be three times the fundamental angular frequency of the grid voltage, that is, 3ω, and its expression is:

In the formula: K ₁ is the controller coefficient.

The Bode diagram corresponding to the notch filter is shown in Figure 12. It can be seen that the notch filter can significantly attenuate the input signal near 3ω, that is, 150Hz, but has no effect at other frequencies.

5. Analysis of simulation and experimental results

5.1. Simulation verification

A three-phase CSR simulation model was built based on Matlab/Simulink to analyze the steady-state and dynamic operating performance of the system to verify the correctness of the proposed method. The voltage parameters of the three-phase unbalanced power grid are e _a =156∠0°, e _b =131∠-115°, e _c =131∠125°. The voltage waveform is shown in Figure 13, and the system simulation parameters are shown in Table 3:

Table 3 Main parameters of CSR

When the traditional double closed loop is used, the simulation results during steady-state operation of the system are shown in Figures 14 and 15, where the load reference voltage is 100V.

It can be seen that although the grid voltage and the grid-side current remain in the same phase, they cannot suppress the double frequency pulsation of the DC side load voltage. At the same time, the grid-side current total harmonic distortion (THD) is 6.35%. Does not meet GB-T/14549-1993 and IEEE519 standards.

Figures 16 to 18 show the simulation results when the current inner loop adopts PIR control. The system grid voltage and grid-side current remain in the same phase, the active power remains constant, and the reactive power has a small double frequency pulsation. In this stage The system power factor reaches above 0.985, so the double frequency pulsation of the DC side load voltage is effectively suppressed; the grid side current THD is 2.23%, which meets the GB-T/14549-1993 and IEEE519 standards.

Figure 19 shows the simulation waveform of the load step change from 5.6Ω to 11.2Ω. The results show that the grid-side current has no obvious distortion during the mutation process, and the DC-side load voltage can complete tracking of the given reference value within 20ms, verifying that the system has good dynamic performance.

5.2. Experimental verification

In order to verify the feasibility of the control strategy proposed in this embodiment, a CSR experiment platform was built, as shown in Figure 20. The power switch tube and series diode use Infineon FF100R12RT4 and Essence MEA75-12DA respectively, the control chip uses Texas Instruments TMS320F28335, and the logic conversion unit uses Xilinx XC95288. The generation and downloading process of the control code is automatically completed through Matlab and Composer Studio (CCS V5), and the experimental parameters are the same as the simulation parameters.

The programmable power supply Chroma-61702 is used to simulate the unbalanced state of the grid voltage. The grid voltage waveform is shown in Figure 21.

When traditional double-closed-loop control is used, the waveforms of phase A grid voltage, grid-side current, and DC-side load voltage during steady-state operation of the system are shown in Figure 22 and Figure 23. It can be seen that although the grid voltage and grid-side current remain in the same phase, However, it is impossible to suppress the double frequency pulsation of the DC side load voltage, and the grid side current THD value reaches 7.92%, which is basically consistent with the simulation results.

Figures 24 to 26 show the experimental results of CSR steady-state operation under different reference voltages when the current inner loop adopts PIR control. Among them, e _a =156V in Figure 24, In Figure 25, e _a =156V,/> In Figure 26, e _a =156V,/>

It can be seen that under different operating conditions, the system A-phase grid voltage and grid-side current can maintain the same phase. The DC-side load voltage can accurately and quickly track the reference voltage value, and at the same time, the double-frequency pulsation of the DC-side load voltage can be effectively suppressed. , the experiment shows that the control strategy proposed in this embodiment has good steady-state performance for three-phase CSR under different output powers under the three-phase power grid voltage unbalanced condition.

The proposed control strategy is at e _a =156V, The grid-side current harmonic analysis is shown in Figure 27, which is basically consistent with the simulation results. The grid-side current THD is only 2.78%, which meets the GB-T/14549-1993 and IEEE519 standards, thus verifying the control strategy proposed in this embodiment. and the correctness of controller parameter design.

The experimental results of the grid voltage, grid-side current and DC-side load voltage obtained with a step change in load from 5.6Ω to 11.2Ω are shown in Figure 28.

It can be seen that it is consistent with the simulation results. The DC side load voltage can complete the tracking of the given value within 20ms, and the grid side current has no obvious distortion during the mutation process. The experimental results show that this implementation works under the unbalanced condition of the three-phase grid voltage. The control strategy proposed in the example has good dynamic performance for three-phase CSR.

This embodiment proposes a PIR control strategy based on the DC side current inner loop and introduces a fixed frequency notch to solve the problem of double frequency pulsation on the DC side and three grid side currents in the three-phase CSR system when the grid voltage is unbalanced. Harmonic issues. The use of capacitor current compensation solves the impact of grid-side capacitor current on power factor and effectively improves the system power factor. Based on simulation and experimental verification, the following conclusions are drawn:

1) In the traditional DC double-closed-loop structure, when the grid voltage is unbalanced, the second-frequency pulsation on the DC side is obvious, the third harmonic of the grid-side current is large, and the power factor is low.

2) Under three different output powers, the DC side pulsation can be well suppressed, and the grid side current THD value is less than 3%, achieving unit power factor operation. At the same time, the adjustment time under load mutation conditions is less than 20ms, with Good dynamic performance.

3) Compared with the traditional control scheme, the method proposed in this embodiment does not require the calculation of positive and negative sequence components, and the algorithm is simple and efficient. At the same time, it eliminates the need for grid-side current sensors, effectively reducing system costs.

The above are only preferred embodiments of the present invention, and are not limited to the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention shall be included in the scope of the present invention. within the scope of protection.

Claims (5)

1. A three-phase CSR proportional-integral resonance control method under unbalanced power grid voltage is characterized by comprising the following steps:

s1, obtaining direct-current side load voltage u _o And a DC side output current i _dc ；

S2, voltage outer loop control: load voltage u on DC side _o And a DC side load voltage reference valueSubtracting to obtain a voltage error signal, and obtaining a direct current reference value component by PI control of the voltage error signal>

S3, current inner loop control: to direct current reference value componentAnd direct current side output current i _dc Comparing to obtain a current error signal, obtaining +.>Will->Adding the net side current i under d-q synchronous rotation coordinate system as feedback item _d And i _q ；

S4, will i _d And i _q Obtaining a modulation signal i under two-phase stationary coordinates through coordinate conversion _α And i _β After passing through the wave trap, the current source type PWM rectifier is controlled by adopting space vector pulse width modulation;

before the step S4, the net side current i under the d-q synchronous rotation coordinate system _d And i _q Adding power factor compensation termAnd->

Wherein: c (C) _ac Is an alternating current side filter capacitor, u _q And u _d The voltage of the filter capacitor at the alternating current side under the d-q synchronous rotation coordinate system;

before the step S4, the net side current i under the d-q synchronous rotation coordinate system _d And i _q Adding active damping loop control itemAnd->Obtaining the net side current i under d-q synchronous rotation coordinate system _d And i _q The method comprises the following steps of:

wherein,and->AC side under d-q synchronous rotation coordinatesCapacitor voltage u _q And u _d Filtering by high-pass filter and then the source damping feedback gain is multiplied to obtain:

wherein: k (K) _Cv Is an active damping feedback gain;

the expression of the high-pass filter is:

wherein: omega _h Is a high pass filter cut-off frequency.

2. The method for three-phase CSR proportional-integral-resonance control under unbalanced grid voltage of claim 1, wherein the PIR controller is:

wherein: k (k) _p 、k _i 、k _r Respectively proportional, integral, resonant gain coefficients.

3. The method for controlling three-phase CSR proportional-integral resonance under unbalanced network voltage according to claim 2, wherein in step S3, the transfer function of the current inner loop control is:

wherein: a, a ₄ ＝K _m k _p R _L C _dc ；a ₃ ＝K _m k _p +K _m (k _i +k _r )R _L C _dc ；a ₂ ＝K _m (k _i +k _r )+K _m 4ω ² k _p R _L C _dc ；a ₁ ＝K _m (4ω ² k _p +4ω ² k _i R _L C _dc )；a ₀ ＝K _m 4ω ² k _i ；b ₅ ＝R _L L _dc C _dc ；b ₄ ＝L _dc ；b ₃ ＝4ω ² R _L L _dc C _dc +R _L ；b ₂ ＝4ω ² L _dc ；b ₁ ＝4ω ² R _L ；b ₀ ＝0；

Wherein K is _m For the system voltage gain, R _L Is a load resistor, C _dc Is a direct-current side capacitor L _dc Is a direct current side inductance.

4. The method for three-phase CSR proportional-integral-resonance control at unbalanced network voltages of claim 1, wherein the trap is used to cancel the modulated signal i _α And i _β The trap is:

wherein: k (K) ₁ Is the controller coefficient.

5. The method for controlling three-phase CSR proportional-integral resonance under unbalanced network voltage according to claim 1, wherein in step S4, the space vector pulse width modulation adopts a twelve-sector modulation strategy, and the vector sequence of each sector is a bilateral symmetry current vector sequence.