CN114139693A - Data processing method, medium, and electronic device for neural network model - Google Patents
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Abstract
The application relates to the field of artificial intelligence, and provides a data processing method and medium of a neural network model and electronic equipment. The method comprises the following steps: detecting a first type of operation on an operand in the process of running a neural network model, wherein the first type of operation comprises the operation of solving the inverse after solving the exponentiation exponent of the operand; selecting operation result values of a plurality of multiplication factors corresponding to the operation of solving the reciprocal after solving the exponentiation exponent of the operand from the multiplication factor result set; and multiplying the obtained operation result values of the multiplication factors to obtain an operation result of the first type of operation on the operand. According to the method, the electronic equipment can obtain the operation result of the first type of operation through searching and multiplication operation, the calculation speed of the electronic equipment on the first type of operation is increased, and the speed of the electronic equipment for operating the neural network model is increased.
Description
Technical Field
The present application relates to the field of artificial intelligence, and in particular, to a data processing method, medium, and electronic device for a neural network model.
Background
With the rapid development of Artificial Intelligence (AI), neural network models are increasingly widely applied in the field of artificial intelligence. To increase the operation speed of the neural network, various operations in the neural network model, such as normalization, convolution, and the like, are generally implemented by fixed-point operations. However, an arithmetic Unit, such as a Neural-Network Processing Unit (NPU), for operating a Neural Network model cannot directly implement fixed-point operations of non-linear operations through hardware, such as an operation of exponentiation of an operand and then reciprocal (e.g., reciprocal of square root), and when the NPU calculates the operation process in the Neural Network model, it needs to use other methods, such as newton's method and taylor series expansion, to implement the solution of the operation. However, the calculation process by the Newton method needs continuous iterative solution, the speed is low, a large amount of hardware resources of the NPU are occupied, and the speed of the electronic equipment for operating the neural network model is reduced; the Taylor series expansion method has low precision, and the running precision of the neural network model cannot be ensured.
Disclosure of Invention
In view of this, an embodiment of the present application provides a data processing method for a neural network model, in which an operation of exponentiating an operand and then obtaining an inverse is converted into an operation of multiplying a plurality of multiplication factors, an operation result corresponding to the plurality of multiplication factors is obtained by looking up a table, and the obtained operation result is multiplied to obtain an operation result of the operation of exponentiating the operand and then obtaining an inverse, so that an operation speed of an electronic device on the operation is increased, and an operation speed of the neural network model is increased.
In a first aspect, an embodiment of the present application provides a data processing method for a neural network model, which is applied to an electronic device, and includes: detecting a first type of operation on an operand in the process of running a neural network model, wherein the first type of operation comprises the operation of solving the inverse after solving the exponentiation exponent of the operand; selecting operation result values of a plurality of multiplication factors corresponding to operation of exponentiation and then reciprocal of an operand from a multiplication factor result set, wherein the operation result of exponentiation and then reciprocal of the operand is the same as the multiplication result multiplied by the plurality of multiplication factors, and different operation result values of different operands corresponding to the multiplication factors are stored in the multiplication factor result set in advance; and multiplying the obtained operation result values of the multiplication factors to obtain an operation result of the first type of operation on the operand.
That is, in the embodiment of the present application, the operation of converting the operation of raising an exponent of an operand and then raising an inverse number to an equivalent operation of multiplying a plurality of multiplication factors is performed, different operation result values of different operands corresponding to respective multiplication factors are stored in a multiplication factor result set in advance, the operation result value of each multiplication factor is queried from the multiplication factor result set, and the queried operation result value is multiplied to obtain the operation result of raising an exponent of an operand and then raising an inverse number.
By the method provided by the embodiment of the application, the electronic equipment can obtain the operation result of the exponentiation and reciprocal operation on the operand through searching and multiplication operation, and the operation speed of calculating the reciprocal after the exponentiation of the operand calculated by the electronic equipment is increased, so that the operation precision of the neural network model is ensured, and the operation speed of the electronic equipment on the neural network model is increased.
In one possible implementation of the first aspect, the method further includes: according to the preset high N of binary number corresponding to operand2Numerical value A and preset low N of bit binary number1A value B of the binary digit, a plurality of multiplicative factors being determined, and at least one of the multiplicative factors being associated with the value a and at least one of the multiplicative factors being associated with the value B.
In one possible implementation of the first aspect, the selecting, from the multiplicative factor result set, operation result values of a plurality of multiplicative factors corresponding to an operation of exponentiating an operand and then inverting the operand includes: a plurality of index values of the operand are calculated based on the binary number of the operand, and operation result values of a plurality of multiplication factors are selected from the multiplication factor result set based on the plurality of index values.
In one possible implementation of the first aspect, the index value of the multiplicative factor associated with the value a is determined based on the value a, and the index value of the multiplicative factor associated with the value B is determined based on the value B.
That is, the index value corresponding to each multiplication factor is determined according to the variable of the multiplication factor which changes with the change of the operand. For example, at a certain multiplication factor
The value A and the value B in (1) change with the change of the operand, and the index value of the multiplication factor is determined by the value A and the value B.
In a possible implementation of the first aspect, in the multiplication factor result set, the multiplication factors correspond to operation result values of different operands, and there is a one-to-one correspondence between the index values of the different operands corresponding to the multiplication factors.
That is, the values corresponding to the multiplication factors stored in the multiplication factor result set correspond to the index values one by one, and the number of the index values is the same as the number of the operation result values of the corresponding multiplication factors.
In a possible implementation of the first aspect, the multiplication factor result set is stored in the form of a look-up table or a database.
In a possible implementation of the first aspect, the precision of the operation result of each multiplicative factor in the multiplicative factor result set is determined by the precision requirement of the neural network model.
That is, the precision of the operation result value of each multiplication factor in the multiplication factor result set is determined by the precision requirement of the neural network model, and the higher the precision requirement of the neural network model is, the higher the precision of the operation result value of each multiplication factor is, the more the number is, and the more the corresponding index value is.
In the embodiment of the present application, the number of operation result values of each multiplication factor (that is, the size of the multiplication factor result set) may be determined according to the precision requirement of the neural network model, so that the number of operation result values of each multiplication factor (that is, the size of the multiplication factor result set) may be reduced under the condition that the precision requirement is met, thereby increasing the speed of obtaining the operation result values of each multiplication factor from the multiplication factor result set, and further increasing the operation speed of the neural network model.
In one possible implementation of the first aspect, the multiplication operation by which the plurality of multiplication factors equivalent to the first type of operation are multiplied is defined by the following formula:
wherein Y is an operand, N is a power exponent in an operation of solving the reciprocal after solving the power exponent of the operand, and A is a preset high N of a binary number corresponding to Y2The value of a binary digit of a bit, B being a predetermined lower N of the binary digit corresponding to Y1The value of the binary number of the bit,
is a multiplication factor, N1And N2The sum of (a) is the same as the number of bits of the binary number corresponding to Y.
In one possible implementation of the first aspect, the multiplication factor result set includes a first lookup table and a second lookup table, where:
the first lookup table is used for storing multiplication factors
The operation result value of (1);
a second lookup table for storing multiplication factors
The operation result value of (1).
In the embodiment of the present application, the multiplication factor
Is not accompanied byThe number of operands Y varies, so that the multiplication factors can be stored separately
Without being stored by a look-up table or database. So that the first lookup table is used to store the multiplication factor
The operation result value of (1); storing multiplication factors using a second lookup table
The operation result value of (1).
In a possible implementation of the first aspect, the multiplication factor is
The high N of the binary number corresponding to the first index value by the value A3Determination of the value of bit correspondence, where N3Determined by the accuracy requirements of the neural network model.
In the embodiment of the application, N is determined by the precision requirement of the neural network model3So that the number of operation result values/one index value of each multiplication factor can be reduced under the condition of meeting the precision requirement of the neural network model, thereby improving the obtaining of the multiplication factors from the first lookup table
The speed of the operation result value of (2) and further the operation speed of the neural network model is improved.
In one possible implementation of the first aspect, the selecting, from the multiplicative factor result set, operation result values of a plurality of multiplicative factors corresponding to an operation of exponentiating an operand and then inverting the operand includes: high N of binary number corresponding to value A3Determining a first index value according to the value corresponding to the bit, and acquiring a multiplication factor from a first lookup table based on the determined first index value
The operation result value of (1).
In a possible implementation of the first aspect, the multiplication factor is
The corresponding second index value is determined based on the following formula: b-a-N1(ii) a Where a is the significand of the binary number corresponding to the value A and B is the significand of the binary number corresponding to the value B.
In the embodiment of the present application, the number of the second index values is N1+N2The number of second index values is reduced, thereby reducing the length of the second lookup table and improving the acquisition of multiplication factors from the second lookup table
The speed of the operation result value of the neural network model is further improved.
In one possible implementation of the first aspect, the selecting, from the multiplicative factor result set, operation result values of a plurality of multiplicative factors corresponding to an operation of exponentiating an operand and then inverting the operand includes: determining a second index value according to the significant digit of the binary number corresponding to the value A and the significant digit of the binary number corresponding to the value B, and acquiring the multiplication factor from a second lookup table based on the second index value
The operation result value of (1).
In a second aspect, the present application provides a readable medium containing instructions therein, which when executed by a processor of an electronic device, cause the electronic device to implement the above-mentioned first aspect and any of its various possible implementations of the provided data processing method of the neural network model.
In a third aspect, an embodiment of the present application provides an electronic device, including: a memory to store instructions for execution by one or more processors of an electronic device; and a processor, which is one of the processors of the electronic device, for executing instructions to cause the electronic device to implement the data processing method of the neural network model of the first aspect and any of its various possible implementations provided above.
Drawings
FIG. 1 illustrates a schematic structural diagram of a neural network model, according to some embodiments of the present application;
FIG. 2A is a diagram illustrating an operation of performing an inverse power operation on an operand Y by looking up a table according to some embodiments of the present application;
FIG. 2B is a diagram illustrating another operation of performing a power-reciprocal operation on an operand Y by using a table lookup, according to some embodiments of the present disclosure;
FIG. 3 illustrates a flow diagram of a data processing method of a neural network model, according to some embodiments of the present application;
FIG. 4 illustrates a pair of operands δ according to some embodiments of the present application2+ epsilon is the process diagram of inverse power operation;
FIG. 5 illustrates a graph of the results of a normalization operation on the input image 20, according to some embodiments of the present application;
fig. 6 illustrates a schematic structural diagram of an electronic device 100, according to some embodiments of the present application.
Detailed Description
Illustrative embodiments of the present application include, but are not limited to, data processing methods, media, and electronic devices of a neural network model.
The technical solutions of the embodiments of the present application are described in detail below with reference to the accompanying drawings.
Fig. 1 illustrates a schematic structural diagram of a neural network model, according to some embodiments of the present application. As shown in fig. 1, the neural network model 10 includes a normalization layer 11, a convolution layer 12, and a similarity calculation layer 13 for evaluating the similarity of the input image 20 and the input image 30. The convolutional layer 12 is used for extracting features of the input image 20 and the input image 30, and the similarity calculation layer is used for calculating the similarity between the input image 20 and the input image 30 according to the features of the input image 20 and the input image 30 extracted by the convolutional layer 12.
Wherein, the normalization layer 11 can perform normalization calculation on the realization image through the following formula (1):
in equation (1): x is the number ofijRepresenting the gray value of the pixel of the ith row and the jth column in the image; zijRepresenting the value of the ith row and the jth column in the data after the image is normalized; μ represents the average of the gray values of each pixel in the image, δ represents the standard deviation of the gray values of each pixel in the image, and ε is a small number greater than 0 to avoid the denominator of 0 in equation (1).
As shown in the formula (1), the process of normalizing the image includes the operation of exponentiation of an operand and then reciprocal
As described above, the operation unit for operating the neural network model, for example, the NPU, needs to implement an operation (hereinafter, referred to as power reciprocal operation) of performing exponentiation on an operand and then performing reciprocal calculation by using a newton method, taylor series expansion, and the like, but the process of calculating the power reciprocal by using the newton method needs to continuously perform iterative solution, which is slow in speed and occupies a large amount of hardware resources of the NPU, thereby reducing the speed of the electronic device for operating the neural network model; and the accuracy of solving the power reciprocal through the Taylor series expansion is low, so that the accuracy of the neural network model cannot be ensured.
It is understood that the inverse power operation can be defined by the following equation (2):
in formula (2), Y is an operand to perform a reciprocal power operation, and Y > 0; n is the exponent of the inverse power operation.
It is understood that normalization layer 11 normalizes the image based on the normalization method shown in formula (1) is only an example, and in other embodiments, normalization layer 11 may also normalize the image (or other types of data) in other manners, such as bn (batch norm), in (instant norm), gn (group norm), ln (layer norm), and the like, and the embodiments of the present application are not limited thereto.
It is understood that the structure of the neural network model 10 shown in fig. 1 is only an example, and in other embodiments, the method provided by the embodiment of the present application is also applicable to any neural network model including inverse power operation shown in formula (2), and is not limited herein.
In order to solve the above problem, an embodiment of the present application provides a data processing method for a neural network model. Specifically, the inverse power operation on the operand may be converted into an operation by which a plurality of multiplication factors are multiplied, and operation results corresponding to at least part of the multiplication factors are stored in a corresponding lookup table (multiplication factor result set) in advance. The corresponding index value can be determined by using some characteristic data of the operand, so as to look up the operation result corresponding to each multiplication factor from the lookup table according to the index value. And then multiplying the operation results corresponding to the multiplication factors to obtain the operation result of the power reciprocal operation of the operand. By the method provided by the embodiment of the application, the electronic equipment can obtain the operation result of the power reciprocal operation on the operand through table lookup and multiplication operation, so that the speed of the electronic equipment for calculating the power reciprocal operation is increased, the operation precision of the neural network model is ensured, and the speed of the electronic equipment for operating the neural network model is increased.
In particular, the inverse power operation may be converted to a product of a plurality of multiplicative factors. For example, for the inverse power operation in the above equation (2)
Assume that the number of bits of the binary number of operand Y is N1+N2From low to high, the 0 th to the Nth1+N2-1 position, and high N of Y2Low N with A, Y1The bit is a number B of bits,the operand Y can be represented by equation (3):
it is understood that the foregoing N1、N2Is a positive integer, e.g. N may be taken1＝N 216; in some embodiments, N may also be taken1＝16，N 232; in other embodiments, other N may be determined based on the number of bits of operand Y, the accuracy requirements of the neural network model, and the like1And N2The value of (b) is not limited herein.
Combining the formula (2), the formula (3) and the exponential algorithm, the inverse power operation can be converted into the product of three multiplication factors shown in the formula (4):
in equation (4), e is a natural constant, and in some embodiments, may be 2.718281828459045.
It is understood that in the formula (4), when the inverse power operation and the neural network model are determined, the multiplication factor
Being constant, without storing multiplication factors by separate look-up tables
The operation result of (1). Thus, different multiplication factors corresponding to a may be stored by the first look-up table
Storing different multiplication factors corresponding to A, B by a second lookup table
Operation ofAnd (6) obtaining the result. The electronic equipment can acquire the high N of the operand Y in the process of calculating the inverse power operation shown in the formula (2)2Bit (A) and Low N1Bit (B) and obtaining the multiplication factor from the first lookup table and the second lookup table
Multiplication factor
The result of the operation of (2), and then multiplying factor
Multiplication factor
Multiplication factor
The operation result of the power reciprocal operation on the operand Y can be determined by multiplying the operation results of (a) and (b).
It will be appreciated that in some embodiments, the multiplication factor is due to
The operation result of (2) is not changed along with the change of the value of the operand, so that the operation result can be preset in a memory of the electronic equipment, so that the electronic equipment can directly obtain the multiplication factor from the memory in the process of performing power-reciprocal operation on the operand
The operation result of (1).
As mentioned before, some characteristic data of the operand, which may comprise at least a part of the number of bits of the binary number of the operand and/or characteristics of at least a part of the number of bits, may be used to determine the corresponding index value. For example, for the above equation (4), the multiplication factor can be seen
And high N of the operand2Bit (A) is correlated so that at least some of A can be counted, e.g., a high N of A3The number corresponding to the bit is used as multiplication factor
The index value of (c). Similarly, in the formula (4), the multiplication factor
High N of simultaneous sum operands2Bit (A) and a low N of the operand1The bits (B) being related, so that the characteristic of at least part of the number of bits of A and B, e.g. the difference between the significant digits of A and B, can be used as a multiplication factor
The index value of (c). The significant digit refers to a digit from 0 bit to the least significant bit of a binary number of a or B, for example, 0000000000001110 has a significant digit of 4.
It is understood that in other embodiments, other characteristic data of the operand may be used to determine the corresponding index value, and is not limited herein.
It will be appreciated that in some embodiments, if A is stored in the first lookup table with the multiplication factor
The one-to-one correspondence relationship can cause the length of the first lookup table to be too large, and the time and the hardware resource occupation of the electronic equipment in the table lookup process of the first lookup table are increased. For example, in the case where the binary number of A includes 16 bits, the value of A is 216It is possible, that is, if A and the multiplication factor are stored in the first look-up table
The length of the first lookup table is 216The occupied storage space is large, and the method is not beneficial to quickly determining the multiplication factor corresponding to A from the first lookup table
The operation result of (1).
To reduce the length of the first lookup table, in some embodiments, the length of the first lookup table may be determined according to the requirement of the neural network model for the accuracy of operation, the higher the requirement of the neural network model for the accuracy of operation, the larger the length of the first lookup table. For example, the accuracy requirement of the neural network model is N3(N3≤N2) Bit, then the length of the first lookup table may be
For example, for most neural network models, N3May be 8, i.e. the first lookup table stores the first index value I1Taking corresponding multiplication factors from 0 to 255
The operation result of (1). Due to multiplication factors
High N with operation number Y2The bit A changes and thus the first index value I can be determined from A1So as to be based on the first index value I1Obtaining multiplication factors when A takes different values from a first lookup table
And (5) corresponding operation results. For example, the electronic device may be according to A and N3Determining A and I1Corresponding relation of (A), e.g. first N of binary number of A3The bits are characteristic data, and the number corresponding to the characteristic data is used as the first index value I1Specifically, for example, when a is 0000000110000001, the first 8 bits of a are taken as the first index value I1I.e. I1Is binary number 00000001, i.e. decimal number 1.
It is understood that in other embodiments, N3Other values, such as 4, 16, 32, etc., may be used, and are not limited herein.
Can clean upIn other embodiments, A and the index value I may be defined in other manners1The corresponding relationship of (a) is not limited herein.
By constructing the first lookup table through the method provided by the embodiment of the application, the length of the first lookup table can be effectively reduced while the running precision of the neural model is ensured, so that the multiplication factor obtained by the electronic equipment from the first lookup table is improved
And further, the speed of the electronic equipment for running the neural network model is improved.
It will be appreciated that in some embodiments, the multiplication factor and the storage (A, B) in the second lookup table may be stored (A, B)
The one-to-one correspondence relationship can cause the length of the second lookup table to be too large, and the time and the occupation amount of hardware resources of the electronic equipment in the table lookup process of the second lookup table are increased. For example, when the binary numbers of A, B all include 16 bits, A, B takes on values of 216It is possible, therefore, to store the (A, B) and multiplication factors in the first look-up table
The length of the second lookup table is 232It takes up a lot of useful memory space and is not conducive to quickly determining A, B the corresponding multiplication factor from the second lookup table
The operation result of (1).
To reduce the length of the second lookup table, in some embodiments, due to a multiplicative factor
Is generally a small number, has little influence on the result of the inverse power operation, and thus can be calculated by N1+N2+1 is the length of the second lookup table, andN1-N2to 0 is the second index value I of the second lookup table2That is to say, the second lookup table stores the second index value I2Is taken as-N1-N2Multiplication factor corresponding to 0
The operation result of (1). Due to the above multiplication factor
High N with operation number Y2Bit A, low N of operand Y1The bit B varies and thus the second index value I can be determined from A and B2So as to be based on the second index value I2Obtaining A, B a multiplication factor for different values from a second lookup table
And (5) corresponding operation results. For example, the significance of A and B may be used as characteristic data, and the second index value I may be determined based on the characteristic data2. Specifically, assuming that the significand of A is a and the significand of B is B, the index value I2Can be according to formula I2＝b-a-N1To be determined.
It will be appreciated that in other embodiments, the length of the second look-up table may be determined in other ways, for example, the length of the second look-up table may be increased, for example by N, depending on the accuracy of the neural network model1+N2The length of the second lookup table is determined by a multiple of +1, which is not limited herein.
It is understood that in other embodiments, N may be defined in other ways1、N2And an index value I2The corresponding relationship of (a) is not limited herein.
The method provided by the embodiment of the application is used for constructing the second lookup table, so that the length of the second lookup table can be effectively reduced, and the electronic equipment can be improved to obtain the multiplication factor from the second lookup table
The speed of the operation result of the method is increased, and the speed of the electronic equipment for operating the neural network model is further increased.
It is understood that, in some embodiments, the first lookup table and the second lookup table may be preset in the electronic device, may be obtained by the electronic device from another electronic device (e.g., a server), and may be deployed by a developer in the electronic device along with the neural network model, which is not limited herein.
Based on the calculation method of the inverse power operation and the construction method of the first lookup table and the second lookup table, if the inverse power operation is detected in the process of operating the neural network model by the electronic equipment, the high N of the operand Y is obtained2Bit (A), Low N1Bit (B) upon determining a first index value I based on A1And obtaining I from the first lookup table1Corresponding multiplication factor
Based on A and B, determining a second index value I2And according to I2Obtaining I from the second lookup table2Corresponding multiplication factor
The result of the operation of (2), then the multiplication factor is calculated
Multiplication factor
Multiplication factor
And the product of the corresponding operation result can obtain the power reciprocal operation result of the operand Y, and finally, the neural network model is continuously operated based on the operation result. By the method provided by the embodiment of the application, when the electronic equipment detects the inverse power operation in the process of running the neural network model, the inverse power operation can be obtained through two times of table look-up operations and three times of multiplication operationsThe operation result of reciprocal operation improves the speed of calculating power reciprocal operation of the electronic equipment, thereby ensuring the operation precision of the neural network model and improving the speed of operating the neural network model by the electronic equipment.
It is to be understood that the foregoing operation of converting the inverse power operation into multiplication by multiple multiplication factors shown in formula (4) is only an example, and in other embodiments, the operation of converting into multiplication by multiple multiplication factors in other forms may also be used, and is not limited herein. For example, referring to FIG. 2B, the binary number of operand Y may be divided into a high N4Bit (C), middle N2Bit (A) and Low N1Bit (B), then operand Y may be expressed as:
combining equation (5) and the derivation method of equation (4), it can be seen that the inverse power operation shown in equation (2) is performed on the operand Y to convert the operand Y into an operation of multiplying three multiplication factors shown in equation (6):
in equation (6), the multiplication factor
Does not change with the change of the operand value, so that the storage multiplication factor can be determined by referring to the construction process of the first lookup table
Corresponding to the lookup table of the operation result, and determining the multiplication factor by referring to the construction process of the second lookup table
A lookup table of corresponding operation results to facilitate the electronic device to operate the inverse power operation in the neural network model according to the high of the operandN4Bit (C) determines the corresponding index value and looks up the multiplication factor in a first look-up table
The operation result of (1); based on high N4Bit (C), middle N2Bit (A) and Low N1Bit (B) corresponding index value and looking up multiplication factor in a second lookup table
The operation result of (1). Then multiplying factor
Multiplication factor
And multiplication factor
Multiplying the corresponding operation results to obtain
The operation result of (1).
The following describes in detail the technical solution of the embodiment of the present application based on the calculation principle of the inverse power operation shown in the above formula (4) and the construction method of the above first lookup table and second lookup table, in combination with the scenario shown in fig. 1.
FIG. 3 illustrates a flow diagram of a data processing method of a neural network model, according to some embodiments of the present application. The main execution body of the method is an electronic device, as shown in fig. 3, the process includes the following steps:
s301: inverse power operations in the neural network model 10 are detected. That is, the electronic device detects the inverse power operation during the operation of the neural network model 10, that is, the inverse power operation is calculated by the method provided in the embodiment of the present application.
For example, in a normalization layer where the electronic device is running the neural network model 10, the input image 20 and the input image are normalized based on the foregoing formula (1)30 normalization, reciprocal power operation can be detected
The electronic device triggers the method provided by the embodiment of the present application after detecting the inverse power operation.
S302: the upper m bits and the lower n bits of the binary number of the operand are obtained. I.e. the electronic device acquires the number of operations to be operated (e.g. delta as mentioned above)2+ epsilon) in order to determine a first index value I for a lookup from a first lookup table and a second lookup table1And a second index value I2。
For example, FIG. 4 illustrates calculations performed during normalization of the input image 20 shown in FIG. 1, according to some embodiments of the present application
Schematic process diagram of (1). Wherein delta2+ ε is 17729394, which is the operand for the inverse power operation 17729394. The electronic device may fetch the upper 16 bits a of the operand: 0000000100001110 and the lower 16 th bit B: 1000011101110010, for determining the index value to be looked up in the first and second lookup tables (i.e. m 16, n 16).
It will be appreciated that δ may be determined by taking the standard deviation of the data matrix corresponding to the input image 20 shown in FIG. 5, and that ε may be taken to be 1 to ensure that the operand δ is the same2+ ε is greater than 0.
It should be understood that m-16 and n-16 are just examples, and in other embodiments, m and n may also take other values, which is not limited in the embodiments of the present application.
It will be appreciated that in some embodiments, the values of m and n may be preset in the memory of the electronic device according to the number of bits of the operands and the accuracy requirements of the neural network model.
It will be appreciated that in some embodiments, where data is stored in binary form in an electronic device, the electronic device may retrieve the upper m bits and the lower n bits of the binary number of the operand directly from a memory of the electronic device (e.g., a memory of the electronic device, an external memory, a register in a processor of the electronic device).
S303: determining a first index value I based on the upper m bits of a binary number of an operand1And obtaining a first index value I from the first lookup table1Corresponding multiplication factor
The operation result of (1).
I.e. the electronic device determines the first index value I to look up from the first look-up table based on the upper m bits of the binary number of the operand obtained1And through I1Obtaining I in a first lookup table1Corresponding multiplication factor
The operation result of (1). For example, as described above, the first index value I may be a number corresponding to the upper 8 bits of a1Referring to fig. 4, a number (decimal 1) corresponding to the upper 8 bits (00000001) of a may be used as the first index value I1And obtaining I from the first lookup table1Corresponding multiplication factor
0000111110010100.
It is understood that, in other embodiments, the method for determining the first index value may adopt other methods according to the method for constructing the first lookup table, and the embodiments of the present application are not limited thereto
S304: determining a second index value I based on the upper m bits and the lower n bits of the binary number of the operand2And obtaining a second index value I from a second lookup table2Corresponding multiplication factor
The operation result of (1).
I.e. the electronic device determines the second index value I to look up from the second look-up table based on the upper m bits a and the lower n bits B of the binary number of the operand2And via a second cableIndex I2Obtaining a second index value I in a second lookup table2Corresponding multiplication factor
The operation result of (1). For example, as previously described, the second index value I may be determined based on the significands of the upper m bits and the lower n bits of the binary number of the operand2Assuming that the significand of A is a and the significand of B is B, the second index value I2Can be according to formula I2＝b-a-N1Referring to FIG. 4, if the significant digit of A is 9 and the significant digit of B is 11, then I211-9-16-14. The electronic equipment is according to I2-14 obtaining a second index value I from a second look-up table2Corresponding multiplication factor
1111111111111110.
It is understood that, in other embodiments, the method for determining the second index value may adopt other methods according to the method for constructing the second lookup table, and the embodiments of the present application are not limited thereto.
S305: based on multiplication factors
Operation result of (2) and multiplication factor
Determines the inverse power operation on the operand.
That is, the electronic equipment acquires the multiplication factor
Operation result of (2) and multiplication factor
After the operation result of (4), the calculation is performed according to the root equation
The operation result of (1). For example, referring to FIG. 4, the electronic device may retrieve the multiplication factor from memory
Corresponding operation result is 0000000100000000, and the product of 0000000100000000, 0000111110010100 and 1111111111111110 is calculated to obtain the inverse power operation
0000000000010000.
It will be appreciated that due to the multiplication factor
The operation result of (2) is not changed along with the change of the operand, so that the operation result can be preset in a memory of the electronic device, so that the electronic device can directly obtain the multiplication factor from the memory in the process of performing the power-reciprocal operation on the operand
The operation result of (1).
S306: and continuing to operate the neural network model based on the power reciprocal operation result.
That is, after determining the operation result of the inverse power operation, the electronic device continues to operate the neural network model to realize the related function. For example, for the scenario shown in FIG. 1, the electronic device is determining
After the operation result of (3), the data corresponding to the input image 20 is normalized based on the formula (1), and the normalized operation result matrix D shown in fig. 5 is obtained, and the result is transferred to the convolutional layer 12. The electronic device may also perform normalization operation on the input image 30 based on the methods provided in the above steps to obtain a normalization operation result of the input image 30, and transmit the result to the convolutional layer 12. The convolution layer 12 performs feature extraction on the normalization result, and then transmits the data after feature extraction to the similarity meterThe calculation layer 13 calculates the similarity between the input image 20 and the input image 30 by the similarity calculation layer 13.
It is to be appreciated that, in some embodiments, the convolutional layer 12 may perform feature extraction on the normalized operation result of the input image 20 or the input image 30 based on the following formula (7):
in equation (7), the matrix D is the normalized operation result of the input image 20 or the input image 30, and has a size of M × M (380 × 380), the matrix E is a convolution kernel and has a size of N × N, the convolution step is k, Z (M, N) is an element in the mth row and nth column of the convolution result matrix Z, and the convolution of the matrix D and the convolution kernel C can be denoted as Z ═ D × E.
In the formula (7), m and n satisfy the following relational expression:
wherein
For rounding-down, i.e.
Is the largest integer less than U. Due to M-N<M and k are positive integers, see
That is to say that the size of the convolution result Z is always smaller than or equal to the size of the matrix D.
Assume that the convolution kernel E is a 3 x 3 matrix as follows:
thus, the matrix Z after the feature extraction of the input image 20 by the convolutional layer 12 is:
it can be understood that the manner of extracting the features of the normalized result matrix of the input image 30 by the convolutional layer 12 is similar to the above process, and is not described herein again.
After the electronic device extracts features of the input image 20 and the input image 30 through the convolutional layer to obtain corresponding matrices, the similarity of the input image 20 and the input image 30 can be determined through the similarity calculation layer.
It is understood that, in other embodiments, the convolutional layer 12 may also perform feature extraction on the input images 20 and 30 in other forms, and the embodiments of the present application are not limited thereto.
For example, in some embodiments, the similarity calculation layer 13 may determine the similarity between the input image 20 and the output image 30 by extracting features of the input image 20 and the input image 30 by the convolutional layer to obtain a correlation coefficient between corresponding matrices. Specifically, in some embodiments, the similarity calculation layer 13 may determine the similarity of the input image 20 and the input image 30 according to the following formula (8).
In the formula (7), Z1Data after feature extraction of the input image 20 for the convolutional layer 12, Z2Cov (Z) which is data obtained by extracting features of the input image 30 for the convolutional layer 121,Z2) Is Z1And Z2The covariance of (a) of (b),
is Z1Is determined by the average value of (a) of (b),
is Z2Average value of (a). It can be understood that R (Z)1,Z2) The larger the absolute value of (A), the tableThe higher the similarity between the input image 20 and the input image 30. For example, in some embodiments, R (Z) is calculated1,Z2) Is 0.778, i.e., the similarity between the input image 20 and the input image 30 is 0.778.
It is understood that in other embodiments, the similarity calculation layer 13 may also determine the similarity between the input image 20 and the input image 30 based on the data obtained by extracting the features of the input image 20 and the input image 30 by the convolutional layer 12, which is not limited herein.
It is understood that the execution sequence of the steps S301 to S306 is only an example, in other embodiments, other sequences may also be adopted, and partial steps may also be combined or split, which is not limited in this embodiment. For example, the electronic device first obtains the upper m bits of the binary number of the operand to determine the first index value I1And obtaining a first index value I from the first lookup table1Corresponding multiplication factor
The operation result of (1); the lower n bits of the binary number of the operand are retrieved, and a second index value I is determined based on the upper m bits and the lower n bits of the binary number of the operand2And obtaining a second index value I from a second lookup table2Corresponding multiplication factor
The operation result of (1).
According to the method provided by the embodiment of the application, in the process of running the neural network model, if the power-reciprocal operation is detected, the operation result of the power-reciprocal operation can be obtained through two times of table look-up operation and three times of multiplication operation, so that the speed of the electronic equipment for calculating the power-reciprocal operation is increased, the running precision of the neural network model is ensured, and the speed of the electronic equipment for running the neural network model is increased.
It is understood that the foregoing data processing method of the neural network model provided in the embodiment of the present application is described by taking the normalization layer 11 in the neural network model 10 as an example, and the method can be applied to any neural network model including inverse power operation shown in formula (2), and the embodiment of the present application is not limited thereto.
It can be understood that the data processing method of the neural network model provided in the embodiment of the present application may be applied to any electronic device capable of operating the neural network model, including but not limited to a mobile phone, a wearable device (e.g., a smart watch, etc.), a tablet computer, a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a Personal Digital Assistant (PDA), an Augmented Reality (AR)/Virtual Reality (VR) device, and the like, and the embodiment of the present application is not limited. To facilitate understanding of the technical solution of the embodiment of the present application, an electronic device 100 is taken as an example to describe a structure of an electronic device to which the data processing method of the neural network model provided in the embodiment of the present application is applied.
Further, fig. 6 illustrates a schematic structural diagram of an electronic device 100, according to some embodiments of the present application. As shown in fig. 6, electronic device 100 includes one or more processors 101, a system Memory 102, a Non-Volatile Memory (NVM) 103, a communication interface 104, an input/output (I/O) device 105, and system control logic 106 for coupling processor 101, system Memory 102, NVM 103, communication interface 104, and input/output (I/O) device 105. Wherein:
the processor 101 may include one or more Processing units, for example, Processing modules or Processing circuits that may include a central Processing Unit (cpu), (central Processing Unit), an image processor (gpu), (graphics Processing Unit), a digital Signal processor (dsp), (digital Signal processor), a microprocessor MCU (Micro-programmed Control Unit), an AI (Artificial Intelligence) processor, or a Programmable logic device fpga (field Programmable Gate array), a Neural Network Processor (NPU), and the like, may include one or more single-core or multi-core processors. In some embodiments, the NPU may be used to run neural networks provided by embodiments of the present applicationThe instruction corresponding to the data processing method of the network model acquires the multiplication factor from the first lookup table according to the high m bits of the binary number of the operand
Obtaining a multiplication factor from the second lookup table according to the upper m bits and the lower n bits of the binary number of the operand
Based on the multiplication factor
Operation result of (2) and multiplication factor
Determines the operation result of the inverse power operation on the operand.
The system Memory 102 is a volatile Memory, such as a Random-Access Memory (RAM), a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM), and the like. The system memory is used for temporarily storing data and/or instructions, for example, in some embodiments, the system memory 102 may be used for storing a first lookup table, a second lookup table, and the foregoing
The operation result of (1).
Non-volatile memory 103 may include one or more tangible, non-transitory computer-readable media for storing data and/or instructions. In some embodiments, the non-volatile memory 103 may include any suitable non-volatile memory such as flash memory and/or any suitable non-volatile storage device, such as a Hard Disk Drive (HDD), Compact Disc (CD), Digital Versatile Disc (DVD), Solid-State Drive (SSD), and the like. In some embodiments, the non-volatile memory 103 may also be a removable storage medium,such as Secure Digital (SD) memory cards, and the like. In other embodiments, the non-volatile memory 103 may be used to store the first lookup table, the second lookup table, and the aforementioned multiplication factor
The operation result of (1).
In particular, system memory 102 and non-volatile storage 103 may each include: a temporary copy and a permanent copy of instruction 107. The instructions 107 may include: when executed by at least one of the processors 101, causes the electronic device 100 to implement the data processing method of the neural network model provided by the embodiments of the present application.
The communication interface 104 may include a transceiver to provide a wired or wireless communication interface for the electronic device 100 to communicate with any other suitable device over one or more networks. In some embodiments, the communication interface 104 may be integrated with other components of the electronic device 100, for example the communication interface 104 may be integrated in the processor 101. In some embodiments, the electronic device 100 may communicate with other devices through the communication interface 104, for example, the electronic device 100 may obtain the neural network model and the first lookup table and the second lookup table corresponding to the neural network model from other electronic devices through the communication interface 104.
Input/output (I/O) devices 105 may include input devices such as a keyboard, mouse, etc., output devices such as a display, etc., and a user may interact with electronic device 100 through input/output (I/O) devices 105.
System control logic 106 may include any suitable interface controllers to provide any suitable interfaces with other modules of electronic device 100. For example, in some embodiments, system control logic 106 may include one or more memory controllers to provide an interface to system memory 102 and non-volatile memory 103.
In some embodiments, at least one of the processors 101 may be packaged together with logic for one or more controllers of the System control logic 106 to form a System In Package (SiP). In other embodiments, at least one of the processors 101 may also be integrated on the same Chip with logic for one or more controllers of the System control logic 106 to form a System-on-Chip (SoC).
It is understood that the configuration of electronic device 100 shown in fig. 6 is merely an example, and in other embodiments, electronic device 100 may include more or fewer components than shown, or some components may be combined, some components may be split, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
Embodiments of the mechanisms disclosed herein may be implemented in hardware, software, firmware, or a combination of these implementations. Embodiments of the application may be implemented as computer programs or program code executing on programmable systems comprising at least one processor, a storage system (including volatile and non-volatile memory and/or storage elements), at least one input device, and at least one output device.
Program code may be applied to input instructions to perform the functions described herein and generate output information. The output information may be applied to one or more output devices in a known manner. For purposes of this Application, a processing system includes any system having a Processor such as, for example, a Digital Signal Processor (DSP), a microcontroller, an Application Specific Integrated Circuit (ASIC), or a microprocessor.
The program code may be implemented in a high level procedural or object oriented programming language to communicate with a processing system. The program code can also be implemented in assembly or machine language, if desired. Indeed, the mechanisms described in this application are not limited in scope to any particular programming language. In any case, the language may be a compiled or interpreted language.
In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried by or stored on one or more transitory or non-transitory machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors. For example, the instructions may be distributed via a network or via other computer readable media. Thus, a machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer), including, but not limited to, floppy diskettes, optical disks, Read-Only memories (CD-ROMs), magneto-optical disks, Read-Only memories (ROMs), Random Access Memories (RAMs), Erasable Programmable Read-Only memories (EPROMs), Electrically Erasable Programmable Read-Only memories (EEPROMs), magnetic or optical cards, flash Memory, or tangible machine-readable memories for transmitting information (e.g., carrier waves, infrared digital signals, etc.) using the Internet to transmit information in an electrical, optical, acoustical or other form of propagated signals. Thus, a machine-readable medium includes any type of machine-readable medium suitable for storing or transmitting electronic instructions or information in a form readable by a machine (e.g., a computer).
In the drawings, some features of the structures or methods may be shown in a particular arrangement and/or order. However, it is to be understood that such specific arrangement and/or ordering may not be required. Rather, in some embodiments, the features may be arranged in a manner and/or order different from that shown in the illustrative figures. In addition, the inclusion of a structural or methodical feature in a particular figure is not meant to imply that such feature is required in all embodiments, and in some embodiments, may not be included or may be combined with other features.
It should be noted that, in the embodiments of the apparatuses in the present application, each unit/module is a logical unit/module, and physically, one logical unit/module may be one physical unit/module, or may be a part of one physical unit/module, and may also be implemented by a combination of multiple physical units/modules, where the physical implementation manner of the logical unit/module itself is not the most important, and the combination of the functions implemented by the logical unit/module is the key to solve the technical problem provided by the present application. Furthermore, in order to highlight the innovative part of the present application, the above-mentioned device embodiments of the present application do not introduce units/modules which are not so closely related to solve the technical problems presented in the present application, which does not indicate that no other units/modules exist in the above-mentioned device embodiments.
It is noted that in the examples and specification of this patent, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the use of the verb "comprise a" to define an element does not exclude the presence of another, same element in a process, method, article, or apparatus that comprises the element.
While the present application has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application.
Claims (15)
1. A data processing method of a neural network model is applied to electronic equipment and is characterized by comprising the following steps:
detecting a first type of operation on an operand in the process of running the neural network model, wherein the first type of operation comprises an operation of exponentiating an exponent and then reciprocal the operand;
selecting operation result values of a plurality of multiplication factors corresponding to the operation of exponentiation exponent and reciprocal calculation of the operand from the multiplication factor result set,
the operation result of calculating the reciprocal after exponentiation of the operand is the same as the multiplication result multiplied by the multiplication factors, and different operation result values of different operands corresponding to the multiplication factors are stored in the multiplication factor result set in advance;
and multiplying the obtained operation result values of the multiplication factors to obtain an operation result of the first type of operation on the operand.
2. The method of claim 1, further comprising:
according to the preset high N of the binary number corresponding to the operand2Numerical value A and preset low N of bit binary number1A value B of a binary number of bits, determining the plurality of multiplication factors, and
at least one of the plurality of multiplications is associated with the value a and at least one of the multiplications is associated with the value B.
3. The method of claim 2, wherein selecting the operation result values of a plurality of multiplicative factors corresponding to an operation of exponentiating an exponent and then inverting the operand from the multiplicative factor result set comprises:
calculating a plurality of index values of the operand based on the binary number of the operand, and selecting an operation result value of the plurality of multiplication factors from the multiplication factor result set based on the plurality of index values.
4. The method of claim 3, wherein the index value of the multiplicative factor associated with the value A is determined based on the value A and the index value of the multiplicative factor associated with the value B is determined based on the value B.
5. The method of claim 3, wherein in the multiplicative factor result set, the multiplicative factor corresponds to the operation result values of different operands, and there is a one-to-one correspondence between the index values of the different operands corresponding to the multiplicative factor.
6. The method of claim 5, wherein the multiplicative factor result set is stored in the form of a look-up table or a database.
7. The method of any one of claims 1 to 6, wherein the precision of the operation result of each multiplicative factor in the multiplicative factor result set is determined by the precision requirements of the neural network model.
8. The method of claim 1, wherein the multiplication operation by which the plurality of multiplication factors equivalent to the first type of operation are multiplied is defined by the following equation:
y is the operand, N is the exponent in the operation of solving the reciprocal after solving the exponent of the operand, A is the preset high N of the binary number corresponding to Y2The value of a binary digit of a bit, B being a predetermined lower N of the binary digit corresponding to Y1The value of the binary number of the bit,
for said multiplication factor, N1And N2The sum of (a) is the same as the number of bits of the binary number corresponding to Y.
9. The method of claim 8, wherein the multiplication factor result set comprises a first lookup table and a second lookup table, wherein:
the first lookup table is used for storing the multiplication factor
The operation result value of (1);
the second lookup table is used for storing the multiplication factor
The operation result value of (1).
10. The method of claim 9, wherein the multiplicative factor is
The corresponding first index value is the high N of the binary number corresponding to the numerical value A3Determination of the value of bit correspondence, where N3Determined by the accuracy requirements of the neural network model.
11. The method of claim 10, wherein selecting the operation result values of a plurality of multiplicative factors corresponding to an operation of exponentiating an exponent and then inverting the operand from the multiplicative factor result set comprises:
according to the high N of the binary number corresponding to the numerical value A3Determining the first index value according to the corresponding numerical value of the bit, and obtaining the multiplication factor from the first lookup table based on the determined first index value
The operation result value of (1).
12. The method according to any of claims 9 to 11, wherein the multiplicative factor is
The corresponding second index value is determined based on the following formula: b-a-N1(ii) a Wherein a is the significant digit of the binary number corresponding to the value a, and B is the significant digit of the binary number corresponding to the value B.
13. The method of claim 12, wherein selecting the operation result values of a plurality of multiplicative factors corresponding to an operation of exponentiating an exponent and then inverting the operand from the multiplicative factor result set comprises:
according to the value A corresponding to twoDetermining a second index value according to the significant digits of the binary digits and the significant digits of the binary digits corresponding to the value B, and acquiring the multiplication factor from the second lookup table based on the second index value
The operation result value of (1).
14. A readable medium containing instructions therein, which when executed by a processor of an electronic device, cause the electronic device to implement the data processing method of the neural network model of any one of claims 1 to 13.
15. An electronic device, comprising:
a memory to store instructions for execution by one or more processors of an electronic device;
and a processor, which is one of the processors of the electronic device, for executing the instructions to cause the electronic device to implement the data processing method of the neural network model according to any one of claims 1 to 13.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114612996A (en) * | 2022-03-31 | 2022-06-10 | 安谋科技（中国）有限公司 | Method for operating neural network model, medium, program product, and electronic device |
| CN114611685A (en) * | 2022-03-08 | 2022-06-10 | 安谋科技（中国）有限公司 | Feature processing method, medium, device, and program product in neural network model |
| CN114885094A (en) * | 2022-03-25 | 2022-08-09 | 北京旷视科技有限公司 | Image processing method, image processor, image processing module and equipment |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105892991A (en) * | 2015-02-18 | 2016-08-24 | 恩智浦有限公司 | Modular multiplication using look-up tables |
| CN107729990A (en) * | 2017-07-20 | 2018-02-23 | 上海寒武纪信息科技有限公司 | Support the device and method for being used to perform artificial neural network forward operation that discrete data represents |
| CN109358900A (en) * | 2016-04-15 | 2019-02-19 | 北京中科寒武纪科技有限公司 | The artificial neural network forward operation device and method for supporting discrete data to indicate |
| US20200160165A1 (en) * | 2018-06-26 | 2020-05-21 | Vishal Sarin | Methods and systems of operating a neural circuit in a non-volatile memory based neural-array |
| EP3671572A1 (en) * | 2018-12-21 | 2020-06-24 | Fujitsu Limited | Information processing apparatus, neural network program, and processing method for neural network |
| CN111857650A (en) * | 2020-08-04 | 2020-10-30 | 南京大学 | Hardware computing system for realizing arbitrary floating point type operation based on mirror image lookup table and computing method thereof |
| KR20200135129A (en) * | 2019-05-22 | 2020-12-02 | 주식회사 크립토랩 | Apparatus for processing modular multiply operation and methods thereof |
| WO2020258527A1 (en) * | 2019-06-25 | 2020-12-30 | 东南大学 | Deep neural network hardware accelerator based on power exponent quantisation |
| US20210064976A1 (en) * | 2019-09-03 | 2021-03-04 | International Business Machines Corporation | Neural network circuitry having floating point format with asymmetric range |
| CN113296732A (en) * | 2020-06-16 | 2021-08-24 | 阿里巴巴集团控股有限公司 | Data processing method and device, processor and data searching method and device |
| CN113673701A (en) * | 2021-08-24 | 2021-11-19 | 安谋科技（中国）有限公司 | Method for operating neural network model, readable medium and electronic device |
-
2021
- 2021-12-03 CN CN202111470544.0A patent/CN114139693B/en active Active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105892991A (en) * | 2015-02-18 | 2016-08-24 | 恩智浦有限公司 | Modular multiplication using look-up tables |
| CN109358900A (en) * | 2016-04-15 | 2019-02-19 | 北京中科寒武纪科技有限公司 | The artificial neural network forward operation device and method for supporting discrete data to indicate |
| CN107729990A (en) * | 2017-07-20 | 2018-02-23 | 上海寒武纪信息科技有限公司 | Support the device and method for being used to perform artificial neural network forward operation that discrete data represents |
| CN107807819A (en) * | 2017-07-20 | 2018-03-16 | 上海寒武纪信息科技有限公司 | A kind of device and method for being used to perform artificial neural network forward operation for supporting that discrete data represents |
| CN110688158A (en) * | 2017-07-20 | 2020-01-14 | 上海寒武纪信息科技有限公司 | Computing device and processing system of neural network |
| US20200160165A1 (en) * | 2018-06-26 | 2020-05-21 | Vishal Sarin | Methods and systems of operating a neural circuit in a non-volatile memory based neural-array |
| EP3671572A1 (en) * | 2018-12-21 | 2020-06-24 | Fujitsu Limited | Information processing apparatus, neural network program, and processing method for neural network |
| KR20200135129A (en) * | 2019-05-22 | 2020-12-02 | 주식회사 크립토랩 | Apparatus for processing modular multiply operation and methods thereof |
| WO2020258527A1 (en) * | 2019-06-25 | 2020-12-30 | 东南大学 | Deep neural network hardware accelerator based on power exponent quantisation |
| US20210064976A1 (en) * | 2019-09-03 | 2021-03-04 | International Business Machines Corporation | Neural network circuitry having floating point format with asymmetric range |
| CN113296732A (en) * | 2020-06-16 | 2021-08-24 | 阿里巴巴集团控股有限公司 | Data processing method and device, processor and data searching method and device |
| CN111857650A (en) * | 2020-08-04 | 2020-10-30 | 南京大学 | Hardware computing system for realizing arbitrary floating point type operation based on mirror image lookup table and computing method thereof |
| CN113673701A (en) * | 2021-08-24 | 2021-11-19 | 安谋科技（中国）有限公司 | Method for operating neural network model, readable medium and electronic device |
Non-Patent Citations (3)
| Title |
|---|
| FAIRBANK, M等: "Efficient Calculation of the Gauss-Newton Approximation of the Hessian Matrix in Neural Networks", NEURAL COMPUTATION, vol. 24, no. 3, 5 March 2012 (2012-03-05), pages 607 - 610 * |
| 苏毅;王正勇;卿粼波;何小海;: "JPEG高速编码芯片的设计", 成都信息工程学院学报, no. 02, 15 April 2008 (2008-04-15), pages 162 - 164 * |
| 赵罡;王超;于红亮;: "基于神经网络和遗传算法的公差优化设计", 北京航空航天大学学报, no. 05, 15 May 2010 (2010-05-15), pages 518 - 523 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114611685A (en) * | 2022-03-08 | 2022-06-10 | 安谋科技（中国）有限公司 | Feature processing method, medium, device, and program product in neural network model |
| CN114885094A (en) * | 2022-03-25 | 2022-08-09 | 北京旷视科技有限公司 | Image processing method, image processor, image processing module and equipment |
| CN114885094B (en) * | 2022-03-25 | 2024-03-29 | 北京旷视科技有限公司 | Image processing method, image processor, image processing module and device |
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