CN114123938A - Adjustable driving control circuit - Google Patents
Adjustable driving control circuit Download PDFInfo
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- CN114123938A CN114123938A CN202111271101.9A CN202111271101A CN114123938A CN 114123938 A CN114123938 A CN 114123938A CN 202111271101 A CN202111271101 A CN 202111271101A CN 114123938 A CN114123938 A CN 114123938A
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- 239000003990 capacitor Substances 0.000 claims description 9
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- 102220642281 PTB domain-containing engulfment adapter protein 1_D13A_mutation Human genes 0.000 claims 1
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- 230000009286 beneficial effect Effects 0.000 description 1
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- 230000007547 defect Effects 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
- H02P29/02—Providing protection against overload without automatic interruption of supply
- H02P29/032—Preventing damage to the motor, e.g. setting individual current limits for different drive conditions
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
- H02P7/03—Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors
- H02P7/04—Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors by means of a H-bridge circuit
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
- H02P7/03—Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors
- H02P7/05—Arrangements for regulating or controlling the speed or torque of electric DC motors for controlling the direction of rotation of DC motors by means of electronic switching
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
- H02P7/06—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current
- H02P7/18—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power
- H02P7/24—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices
- H02P7/28—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Motors That Do Not Use Commutators (AREA)
- Electronic Switches (AREA)
Abstract
The invention discloses an adjustable drive control circuit, belonging to the field of motor drive circuits, which reduces the voltage peak value when a motor is started under the condition of not wasting power supply energy and prevents the damage to a system, and the adjustable drive control circuit comprises: the motor, the first drive circuit, the second drive circuit, the first delay circuit, the second delay circuit, the first key circuit and the second key circuit, wherein the first key circuit and the second key circuit comprise key switches, the key switches are closed to enable the current of a power supply V1 to enter the first delay circuit or the second delay circuit, the levels of M1+ IN and M1Ho1 or the levels of M1-IN and M1Ho2 are changed, the on-off of MOS tubes Q2, Q3, Q7 and Q8 are controlled, when the motor rotates forwards, the current flows IN through the MOS tube Q2 and flows out through the MOS tube Q8, when the motor rotates backwards, the current flows IN through the MOS tube Q3 and flows out through the MOS tube Q7, when the motor is static, the MOS tubes Q2 and Q3 are disconnected, and the MOS tubes Q7 and Q8 are opened.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the field of motor drive circuits, in particular to an adjustable drive control circuit.
[ background of the invention ]
The motor starting instant voltage is power voltage, at the moment, because the motor has no back electromotive force, the impedance of the motor starting instant is low, the current is large, and if the large current is not processed, irreversible damage can be caused to a system. At present, in order to deal with high starting voltage, a common method is series resistance starting, and the starting current of the motor is reduced by reducing the power supply voltage of the motor. The method can also consume power supply energy when the motor normally runs, reduces the working voltage of the motor and has low power supply use efficiency.
[ summary of the invention ]
The invention aims to overcome the defects of the prior art and provide the adjustable drive control circuit, so that the voltage peak value of the motor during starting is reduced under the condition of not wasting power supply energy, and the system is prevented from being damaged.
In order to solve the technical problems, the invention adopts the following technical scheme:
an adjustable drive control circuit comprising: a motor; the first driving circuit controls the motor to rotate forwards, outputs a voltage M1Ho1 to the MOS transistor Q2, and outputs a voltage M1Lo1 to the MOS transistor Q7; the second driving circuit controls the motor to rotate reversely, and outputs a voltage M1Ho2 to the MOS tube Q3 and a voltage M1Lo2 to the MOS tube Q8; the first delay circuit is connected with the first driving circuit, the second delay circuit is connected with the second driving circuit, and the first delay circuit and the second delay circuit are respectively used for limiting the power of the first driving circuit and the second driving circuit when the motor is started and recovering the power of the first driving circuit and the second driving circuit within a set time after the motor is started; the first key circuit is connected with the first driving circuit and the first delay circuit, and the second key circuit is connected with the second driving circuit and the second delay circuit and is respectively used for inputting a voltage M1+ IN to the first driving circuit and inputting a voltage M1-IN to the second driving circuit; the first key circuit and the second key circuit are connected with a power supply V1 and comprise key switches, the key switches are closed to enable current of the power supply V1 to enter the first delay circuit or the second delay circuit, the levels of M1+ IN and M1Ho1 or the levels of M1-IN and M1Ho2 are changed, the on-off of MOS transistors Q2, Q3, Q7 and Q8 is controlled, when the motor rotates forwards, current flows IN through the MOS transistor Q2 and flows out through the MOS transistor Q8, when the motor rotates backwards, current flows IN through the MOS transistor Q3 and flows out through the MOS transistor Q7, when the motor is static, the MOS transistors Q2 and Q3 are disconnected, and the MOS transistors Q7 and Q8 are opened.
On the basis of the scheme, the first key circuit comprises a first output circuit and a second output circuit which are connected with the first drive circuit, when the motor is static, the first output circuit is switched on, the second output circuit is switched off so as to input low-level M1+ IN to the first drive circuit, and when the motor rotates forwards, the first output circuit is switched off, the second output circuit is switched on so as to input high-level M1+ IN to the first drive circuit.
On the basis of the scheme, the first output circuit comprises a triode Q5, the b pole of a triode Q5 is connected with a power supply V1 and a second output circuit, the c pole is connected with the first driving circuit, the second output circuit is conducted, the voltage of the 5b pole of the triode Q b is pulled down to turn off the triode Q5, and the voltage of the second output circuit is input to the first driving circuit through a first delay circuit to form a high-level M1+ IN.
On the basis of the scheme, the first output circuit comprises a diode D7, a diode D5, a triode Q1 and a triode Q9, wherein the negative electrode of the diode D7 is connected with a key switch, the positive electrode of the diode D7 is connected with the b electrode of the triode Q1, the e electrode and the b electrode of the triode Q1 are connected with a power supply V1, the c electrode of the triode Q1 is connected with the positive electrode of the diode D5 and the b electrode of the triode Q9, the c electrode of the triode Q9 is connected with the b electrode of the triode Q5, the negative electrode of the diode D5 is connected with a first delay circuit, and voltage dividing resistors are arranged between the diode D7 and the b electrode of the triode Q1, between the b electrode of the triode Q1 and the power supply V1, between the c electrode of the triode Q1 and the b electrode of the triode Q9, and between the b electrode of the triode Q9 and a ground wire.
On the basis of the scheme, the first delay circuit comprises an APC chip U1, a VIN interface of the APC chip U1 is connected with R2 and C2 circuits which are arranged in parallel, a positive electrode of a resistor R2 is connected with a resistor R1, a resistor R1 is connected with the first key circuit, and a PWM interface of the APC chip U1 is connected with the first driving circuit.
On the basis of the scheme, the first delay circuit comprises a timer chip U4, a pin 3 of the timer chip U4 is connected with the first driving circuit, a pin 2 and a pin 6 are connected with a capacitor C11, and the first delay circuit further comprises a charging circuit for charging the C11 and used for adjusting the voltage of the pin 2 and the pin 6 and changing the level of the output of the pin 3.
On the basis of the above scheme, the first driving circuit includes a half-bridge chip U2, a Hin interface of the half-bridge chip U2 is connected to the first delay circuit and the first key circuit, an Hout interface of the half-bridge chip U2 outputs a voltage M1_ Ho1 and a voltage M1_ Lo1, the Hout interface is connected to resistors R15 and R16 to output a voltage M1Ho1 to the MOS transistor Q2, the Lout interface is connected to resistors R21 and R29 to output a voltage M1Lo1 to the MOS transistor Q7, two ends of the resistor R15 are connected in parallel to a diode D3, a negative electrode of the diode D3 is connected to the Hout interface and a positive electrode of the diode R16, two ends of the resistor R21 are connected in parallel to a diode D9, and a negative electrode of the diode D9 is connected to the Lout interface and the positive electrode of the diode R29.
On the basis of the above scheme, the first driving circuit further includes a power supply V2 and a bootstrap diode D1, the power supply V2 is connected to the VCC interface of the half-bridge chip U2 and the anode of the bootstrap diode D1, the cathode of the bootstrap diode D1 is connected to the Vhd interface of the half-bridge chip U2, and a bootstrap capacitor C8 is connected between the Vhd interface and the Vhs interface, so as to increase the voltage of M1_ Ho 1.
On the basis of the above scheme, the first driving circuit includes a resistor R50 connected with a MOS transistor Q15, a resistor R39 connected with a MOS transistor Q11, and a triode Q13A, the first delay circuit is connected with the b pole of the triode Q13A, the e pole of the triode Q13A is grounded, and a resistor R44 and a c pole of the triode Q39 are connected between the e pole and the b pole, two ends of the resistor R50 are connected with a diode D18 in parallel, the anode of the diode D18 is connected with the MOS transistor Q15, the cathode of the diode D18 is connected with the first delay circuit, two ends of the resistor R39 are connected with a diode D12 in parallel, the anode of the diode D12 is connected with the MOS transistor Q11, and the cathode of the diode D12 is connected with the c pole of the triode Q13A.
On the basis of the above scheme, the first and second driving circuits, the first and second delay circuits, and the first and second key circuits include the same electronic components and circuit arrangement.
The invention has the beneficial effects that:
the adjustable driving control circuit disclosed by the invention has the advantages that the voltage peak value of the motor during starting is reduced by arranging the delay circuit, so that the current value generated at the moment of starting the motor is reduced, the system is protected from being damaged, the voltage value is recovered at the preset time of starting the motor, the motor can normally work, the system can be protected, and meanwhile, the energy of a power supply cannot be wasted.
These features and advantages of the present invention will be disclosed in more detail in the following detailed description and the accompanying drawings.
[ description of the drawings ]
The invention is further described below with reference to the accompanying drawings:
FIG. 1 is a circuit diagram A of a driving control circuit according to an embodiment of the present invention;
FIG. 2 is a circuit diagram A of a first key circuit according to an embodiment of the present invention;
FIG. 3 is a circuit diagram A of a first delay circuit according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of a first driving circuit according to an embodiment of the present invention;
FIG. 5 is a circuit diagram of the first key circuit after being connected to the first driving circuit according to the embodiment of the present invention;
FIG. 6 is a circuit diagram of a second key circuit connected to a second driving circuit according to an embodiment of the present invention;
FIG. 7 is a circuit diagram B of a first delay circuit according to an embodiment of the present invention;
fig. 8 is a circuit diagram B of the driving control circuit according to the embodiment of the present invention.
[ detailed description ] embodiments
The technical solutions of the embodiments of the present invention are explained and illustrated below with reference to the drawings of the embodiments of the present invention, but the following embodiments are only preferred embodiments of the present invention, and not all embodiments. Based on the embodiments in the implementation, other embodiments obtained by those skilled in the art without any creative effort belong to the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be considered as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, unless otherwise specified, "a plurality" means two or more unless explicitly defined otherwise.
In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
Referring to fig. 1 to 6, an embodiment of the present invention discloses an adjustable driving control circuit, including: the motor, the first drive circuit that controls the motor forward rotation, the second drive circuit that controls the motor reverse rotation, MOS pipe Q2, Q3, Q7, Q8, the first drive circuit outputs voltage M1Ho1 to MOS pipe Q2, outputs voltage M1Lo1 to MOS pipe Q7, the second drive circuit outputs voltage M1Ho2 to MOS pipe Q3, and outputs voltage M1Lo2 to MOS pipe Q8, when the motor forward rotation, the current flows in through MOS pipe Q2 and flows out through MOS pipe Q8, when the motor reverse rotation, the current flows in through MOS pipe Q3 and flows out through MOS pipe Q7, when the motor is static, MOS pipe Q2 and MOS pipe Q3 are disconnected, MOS pipe Q7 and MOS pipe Q8 are opened.
The driving control circuit further comprises a first delay circuit, a second delay circuit, a first key circuit and a second key circuit, the first delay circuit is connected with the first driving circuit, the second delay circuit is connected with the second driving circuit, the first key circuit is simultaneously connected with the first driving circuit and the first delay circuit, and the second key circuit is simultaneously connected with the second driving circuit and the second delay circuit.
The first delay circuit is used for limiting the power of the first driving circuit when the motor is started in the forward direction and recovering the power of the first driving circuit within a set time after the motor is started; the second delay circuit is used for limiting the power of the second driving circuit when the motor is started reversely and recovering the power of the second driving circuit within the set time after the motor is started.
The first key circuit is used for inputting voltage M1+ IN to the first drive circuit, the second key circuit is used for inputting voltage M1-IN to the second drive circuit, the first key circuit and the second key circuit comprise key switches, the key switches are closed to enable current of a power supply V1 to enter the first delay circuit or the second delay circuit, the levels of the M1+ IN and the M1Ho1 or the levels of the M1-IN and the M1Ho2 are changed, the on-off of MOS (metal oxide semiconductor) tubes Q2, Q3, Q7 and Q8 is controlled, after the key switch K1 of the first key circuit is pressed, the motor rotates forwards, and after the key switch K2 of the second key circuit is pressed, the motor rotates backwards.
The adjustable driving control circuit disclosed by the invention has the advantages that the voltage peak value of the motor during starting is reduced by arranging the delay circuit, so that the current value generated at the moment of starting the motor is reduced, the system is protected from being damaged, the voltage value is recovered at the preset time of starting the motor, the motor can normally work, the system can be protected, and meanwhile, the energy of a power supply cannot be wasted.
The first driving circuit and the second driving circuit, the first delay circuit and the second delay circuit, and the first key circuit and the second key circuit include the same electronic components and circuit arrangement, but the names of the electronic components are different, and the first driving circuit, the first delay circuit, and the first key circuit are described below.
The first key circuit comprises a first output circuit and a second output circuit which are connected with the first drive circuit, when the motor is static, the first output circuit is switched on, the second output circuit is switched off to input low-level M1+ IN to the first drive circuit, when the motor rotates forwards, the first output circuit is switched off, the second output circuit is switched on to input high-level M1+ IN to the first drive circuit, the first output circuit comprises a triode Q5, the b pole of the triode Q5 is connected with a power supply V1 and the second output circuit, the c pole is connected with the first drive circuit, the second output circuit is switched on to pull down the voltage of the Q5b pole of the triode to turn off the triode Q5, the voltage of the second output circuit is input high-level M1+ IN to the first drive circuit through a first delay circuit, the first output circuit comprises a diode D7, a diode D5, a triode Q1 and a triode Q9, the negative pole of the diode D7 is connected with the key switch, The positive pole of the transistor Q1 is connected with the b pole of the transistor Q1, the e pole and the b pole of the transistor Q1 are connected with the power supply V1, the c pole of the transistor Q1 is connected with the positive pole of the diode D5 and the b pole of the transistor Q9, the c pole of the transistor Q9 is connected with the b pole of the transistor Q5, the negative pole of the diode D5 is connected with the first delay circuit, and voltage dividing resistors are arranged between the diode D7 and the b pole of the transistor Q1, between the b pole of the transistor Q1 and the power supply V1, between the c pole of the transistor Q1 and the b pole of the transistor Q9, and between the b pole of the transistor Q9 and the ground wire.
The first delay circuit comprises an APC chip U1, a VIN interface of the APC chip U1 is connected with R2 and C2 circuits which are arranged in parallel, a positive electrode of a resistor R2 is connected with a resistor R1, a resistor R1 is connected with a first key circuit, and a PWM interface of the APC chip U1 is connected with a first driving circuit. The R2 and C2 circuits have a time delay function, and can reduce PWM at the time of starting and restore PWM after continuous operation for a period of time.
The first driving circuit comprises a half-bridge chip U2, a Hin interface of a half-bridge chip U2 is connected with a first delay circuit and a first key circuit, an Hout interface output voltage M1_ Ho1 and a Lout interface output voltage M1_ Lo1 of a half-bridge chip U2 are connected with resistors R15 and R16 through an Hout interface to output a voltage M1Ho1 to an MOS tube Q2, a Lout interface is connected with resistors R21 and R29 through an Lout interface to output a voltage M1Lo1 to an MOS tube Q7, two ends of a resistor R15 are connected with a diode D3 in parallel, a negative electrode of the diode D3 is connected with the ut Hot interface and a positive electrode of the resistor R16, two ends of the resistor R21 are connected with a diode D9 in parallel, and a negative electrode of the diode D9 is connected with a Lout interface and a positive electrode of the resistor R29.
IN an initial state, the motor is IN a closed state, at this time, the power supply V1 is connected to the b-stage of the triode Q5, a voltage exists at the c-stage, the voltage of M1+ IN is equal to the c-pole voltage of the triode Q5, the triode Q1 is a PNP triode, at this time, the triode Q1 is not turned on, the voltage of the power supply V1 cannot enter the first delay circuit, the M1+ IN is at a low level, the M1_ Ho1 is at a low level, the M1_ Lo1 is at a high level, the M1_ Ho1 is turned on through the resistor R15 and the resistor R16, the M1Ho1 is at a low level, the MOS transistor Q2 is turned off, the M1_ Lo1 is turned on through the resistor R21 and the resistor R29, the M1Lo1 is at a high level, and the MOS transistor Q7 is turned on.
Similarly, IN the second driving circuit, M1-IN is at low level, at this time, M1_ Ho2 is at low level, M1_ Lo2 is at high level, M1_ Ho2 passes through a resistor R18 and a resistor R19, M1Ho2 is at low level, the MOS transistor Q3 is turned off, M1_ Lo2 passes through a resistor R25 and a resistor R30, M1Lo2 is at high level, the MOS transistor Q8 is turned on, at this time, potentials at two ends of the motor are equal, and the motor is stationary.
After the key switch K1 of the first key circuit is pressed, the voltage of the power source V1 flows into the ground terminal through the key switch K11 after passing through the resistor R3, the resistor R11 and the diode D11, the voltage M11+ at the resistor R11 is pulled through the diode D11, the resistors R11 and R11 divide the voltage, so that the transistor Q11 is turned on, the c-voltage of the transistor Q11 enters the first delay circuit through the diode D11, a PWM signal is generated and is connected to the Hin interface and the Lin interface of the half-bridge chip U11, the c-voltage of the transistor Q11 is divided through the resistors R11 and R11, the transistor Q11 is turned on, the b-voltage of the transistor Q11 is pulled down, so that the transistor Q11 enters the cut-off region and is turned off, at this time, only the PWM connection resistor R11 of the first delay circuit generates the M11+ voltage, the M MI + is high level, the M11 _ Ho _ M11 is the high level, the M11 is the Ho _ M _ 11, the Ho _ M _ 11 and the Ho _ M _ 11 is the high level, the resistor R11 and the Ho _ 11, the h _ 11 is the high level 11, MOS pipe Q2 is turned on, M1_ Lo1 passes through resistor R21 and resistor R29, M1Lo1 is at low level, MOS pipe Q7 is turned off, and the motor rotates in the forward direction.
When the key switch K1 is released, the c pole of the triode Q1 is disconnected, the first delay circuit has no input voltage, the triode Q9 is disconnected, the triode Q5 is connected, the M1+ IN is pulled down by the triode Q5 to be changed into a low level, and at the moment, the motor stops moving.
The diode D3 and the resistor R15 can accelerate the turn-off of the MOS transistor Q2, the diode D9 and the resistor R21 can accelerate the turn-off of the MOS transistor Q7, after the key switch K1 is released, at the moment, M1Ho1 is at a high level, M1_ Ho1 is at a low level, and current passes through the circuit R16 and the diode D3 from the MOS transistor Q2, so that the grid voltage of the MOS transistor Q2 is reduced, and the turn-off speed of the MOS transistor Q2 is accelerated; the diode D9 and the resistor R21 accelerate the turn-off of the MOS transistor Q7.
Similarly, when the key switch K2 IN the second key circuit is pressed, the level of M1-IN is changed to high level, so that M1-IN becomes high level, at this time, M1_ Ho2 becomes high level, M1_ Lo2 becomes low level, M1_ Ho2 passes through the resistor R18 and the resistor R19, M1Ho2 becomes high level, the MOS transistor Q3 is turned on, M1_ Lo2 passes through the resistor R25 and the resistor R30, M1Lo2 becomes low level, the MOS transistor Q8 is turned off, and the motor rotates reversely.
When the key switch K2 is released, the voltage of M1-IN is pulled down, and the motor is stopped.
Because the electronic components of the first driving circuit, the second driving circuit, the first key circuit, the second key circuit, the first delay circuit and the second delay circuit are the same, when the motor rotates reversely, the working state change of each electronic component can be obtained by contrasting the circuit diagrams of the first driving circuit, the second driving circuit, the first key circuit, the second key circuit, the first delay circuit and the second delay circuit according to the working state change of the electronic component when the motor rotates forwardly, and therefore, the description is not fully made.
Referring to fig. 7 and 8, in another embodiment of the present invention, different first and second delay circuits, and first and second driving circuits are disclosed, unlike the above-described embodiments.
The first delay circuit and the second delay circuit include the same electronic components and wiring arrangement, and the first delay circuit will be described below.
The first delay circuit comprises a timer chip U4, a pin 3 of the timer chip U4 is connected with the first drive circuit, pins 2 and 6 are connected with a capacitor C11, the first delay circuit also comprises a charging circuit for charging C11, the voltage of the pins 2 and 6 is adjusted, the level of the output of the pin 3 is changed, the circuit further comprises diodes D16 and D15, a resistor R45 connected with diodes D16 and D15, and a capacitor C48 connected with a resistor R48 in parallel with the resistor R48, the resistor R48 and the resistor R48 are connected with the pole b of the triode Q48, the pole C of the triode Q48 is connected with the anodes of the diodes D48 and D48, the resistors R48, R48 and the diode D48 are arranged in the first delay circuit, the current of the power supply V48 passes through the R48, the R48 and the diode D48 and then is connected with the capacitor C48, the current passes through the diode D48 and then enters the pins 2 and 6 of the timer chip U48, the resistors R48, R48 are connected with the cathodes of the diodes D48 and D48, and the pole C of the transistor Q48 is further connected with the pin 2 and the capacitor C48 of the timer chip U48.
In an initial state, the capacitor C11 is charged through the resistors R33 and R37, the voltage of the pin 2 and the pin 6 of the timer chip U4 is less than 1/3VCC, the output of the pin 3 is at a high level, and when the voltage of the pin 2 and the pin 6 is more than 1/3VCC and less than 2/3VCC, the output of the pin 3 keeps consistent with the previous level; the 3-pin output is low when the 2-pin and 6-pin voltages >2/3 VCC. When the diode D15 or the diode D16 is inputted with a high level, the transistor Q14 is turned on through the resistors R45 and R48 to pull down the voltage of the pin 2, so that the pin 3 always outputs a high level.
In order to cooperate with the first driving circuit of this embodiment, names of electronic components of the first key circuit in this embodiment are also modified accordingly, and the first key circuit in fig. 2 may be implemented, and in addition, a circuit connecting the c-pole of the transistor Q17 and the first delay circuit is deleted from the first key circuit.
The first driving circuit comprises a resistor R50 connected with a MOS transistor Q15, a resistor R39 connected with a MOS transistor Q11 and a triode Q13A, wherein the first delay circuit is connected with a resistor R41, a resistor R41 is connected with the b pole of the triode Q13A, the e pole of the triode Q13A is grounded and is connected with a resistor R44 and the b pole, the c pole is connected with the resistor R39, two ends of the resistor R50 are connected with a diode D18 in parallel, the anode of the diode D18 is connected with the MOS transistor Q15, the cathode of the diode D18 is connected with the first delay circuit, two ends of the resistor R39 are connected with a diode D12 in parallel, the anode of the diode D12 is connected with the MOS transistor Q11, and the cathode of the diode D12 is connected with the c pole of the triode Q13A.
When a key switch K3 in the first key circuit is turned off, a triode Q19A is turned on, a MOS transistor Q15 is turned off, after the key switch K3 is pressed, a triode Q17 is turned on, the triode Q19A is turned off, a pin 3 of a first delay circuit timer chip U4 outputs VO1, the grid voltage of the MOS transistor Q15 is increased to turn on Q15, the voltage is divided by resistors R41 and R44 to turn on a triode Q13A, and the grid voltage of the MOS transistor Q11 is pulled down to turn off Q11.
The invention can solve the problem of overlarge current when the motor is started, adopts a simple conventional circuit, does not need software programming, reduces the starting current of the motor, improves the operation efficiency, reduces the power requirement at the moment of starting the power panel in the system, reduces the starting impact torque of a transmission mechanism of the motor, and reduces the heat productivity when the motor is started and commutated.
While the invention has been described with reference to specific embodiments thereof, it will be understood by those skilled in the art that the invention is not limited thereto, and may be embodied in many different forms without departing from the spirit and scope of the invention as set forth in the following claims. Any modification which does not depart from the functional and structural principles of the present invention is intended to be included within the scope of the claims.
Claims (10)
1. An adjustable drive control circuit, comprising:
a motor; and the number of the first and second groups,
the first driving circuit controls the motor to rotate forwards, outputs a voltage M1Ho1 to the MOS transistor Q2, and outputs a voltage M1Lo1 to the MOS transistor Q7; and the number of the first and second groups,
the second driving circuit controls the motor to rotate reversely, and outputs a voltage M1Ho2 to the MOS tube Q3 and a voltage M1Lo2 to the MOS tube Q8; and the number of the first and second groups,
the first delay circuit is connected with the first driving circuit, the second delay circuit is connected with the second driving circuit, and the first delay circuit and the second delay circuit are respectively used for limiting the power of the first driving circuit and the second driving circuit when the motor is started and recovering the power of the first driving circuit and the second driving circuit within a set time after the motor is started; and the number of the first and second groups,
the first key circuit is connected with the first driving circuit and the first delay circuit, and the second key circuit is connected with the second driving circuit and the second delay circuit and is respectively used for inputting voltage M1+ IN to the first driving circuit and inputting voltage M1-IN to the second driving circuit;
the first key circuit and the second key circuit are connected with a power supply V1 and comprise key switches, the key switches are closed to enable current of the power supply V1 to enter the first delay circuit or the second delay circuit, the levels of M1+ IN and M1Ho1 or the levels of M1-IN and M1Ho2 are changed, the on-off of MOS transistors Q2, Q3, Q7 and Q8 is controlled, when the motor rotates forwards, current flows IN through the MOS transistor Q2 and flows out through the MOS transistor Q8, when the motor rotates backwards, current flows IN through the MOS transistor Q3 and flows out through the MOS transistor Q7, when the motor is static, the MOS transistors Q2 and Q3 are disconnected, and the MOS transistors Q7 and Q8 are opened.
2. The adjustable drive control circuit according to claim 1, wherein the first button circuit comprises a first output circuit and a second output circuit connected to the first driving circuit, the first output circuit is turned on and the second output circuit is turned off to input a low level M1+ IN to the first driving circuit when the motor is at rest, and the first output circuit is turned off and the second output circuit is turned on to input a high level M1+ IN to the first driving circuit when the motor is rotating forward.
3. The adjustable driving control circuit according to claim 2, wherein the first output circuit comprises a transistor Q5, a b-pole of the transistor Q5 is connected to the power supply V1 and a second output circuit, and a c-pole of the transistor Q5 is connected to the first driving circuit, the second output circuit turns on to pull down a voltage of a Q5b pole of the transistor Q5 so as to turn off the transistor Q5, and the voltage of the second output circuit inputs a high level of M1+ IN to the first driving circuit through the first delay circuit.
4. The adjustable driving control circuit according to claim 3, wherein the first output circuit comprises a diode D7, a diode D5, a transistor Q1 and a transistor Q9, wherein a cathode of the diode D7 is connected with the key switch, an anode of the diode D7 is connected with a b pole of the transistor Q1, an e pole and a b pole of the transistor Q1 are connected with the power supply V1, a c pole of the diode D5 is connected with a b pole of the transistor Q9, a c pole of the transistor Q9 is connected with a b pole of the transistor Q5, a cathode of the diode D5 is connected with the first delay circuit, and voltage dividing resistors are respectively arranged between the diode D7 and the b pole of the transistor Q1, between the b pole of the transistor Q1 and the power supply V1, between the c pole of the transistor Q1 and the b pole of the transistor Q9, and between the b pole of the transistor Q9 and a ground line.
5. The adjustable driving control circuit according to claim 1, wherein the first delay circuit comprises an APC chip U1, a VIN interface of the APC chip U1 is connected to R2 and C2 circuits arranged in parallel, a positive electrode of a resistor R2 is connected to a resistor R1, a resistor R1 is connected to the first key circuit, and a PWM interface of the APC chip U1 is connected to the first driving circuit.
6. The adjustable driving control circuit according to claim 1, wherein the first delay circuit comprises a timer chip U4, the 3-pin of the timer chip U4 is connected to the first driving circuit, and the 2-pin and 6-pin are connected to a capacitor C11, and the first delay circuit further comprises a charging circuit for charging the C11, so as to adjust the voltage of the 2-pin and 6-pin and change the level of the 3-pin output.
7. The adjustable driving control circuit according to claim 1, wherein the first driving circuit comprises a half-bridge chip U2, a Hin interface of the half-bridge chip U2 is connected to the first delay circuit and the first key circuit, a Hout interface output voltage M1_ Ho1 of the half-bridge chip U2, a Lout interface output voltage M1_ Lo1, a Hout interface connection resistor R15, R16 are connected to output a voltage M1Ho1 to the MOS transistor Q2, a Lout interface connection resistor R21, R29 are connected to output a voltage M1Lo1 to the MOS transistor Q7, two ends of the resistor R15 are connected in parallel to a diode D3, a negative electrode of the diode D3 is connected to the Hout interface and a positive electrode of the resistor R16, two ends of the resistor R9 are connected in parallel to a diode D9, and a negative electrode of the diode D9 is connected to the Lout interface and a positive electrode of the diode R29.
8. The adjustable driving control circuit according to claim 7, wherein the first driving circuit further comprises a power supply V2 and a bootstrap diode D1, the power supply V2 is connected to the VCC interface of the half-bridge chip U2 and the anode of the bootstrap diode D1, the cathode of the bootstrap diode D1 is connected to the Vhd interface of the half-bridge chip U2, and a bootstrap capacitor C8 is connected between the Vhd interface and the Vhs interface for increasing the voltage of M1_ Ho 1.
9. The adjustable driving control circuit according to claim 1, wherein the first driving circuit comprises a resistor R50 connected to the MOS transistor Q15, a resistor R39 connected to the MOS transistor Q11, and a transistor Q13A, the first delay circuit is connected to the b-pole of the transistor Q13A, the e-pole of the transistor Q13A is grounded and connected to the b-pole through a resistor R44 and a c-pole connecting resistor R39, a diode D18 is connected in parallel to two ends of the resistor R50, a diode D18 is connected to the MOS transistor Q15 at the positive pole, and a diode D12 is connected to two ends of the resistor R39 in parallel, a diode D12 is connected to the Q11 at the positive pole, and a diode D13A at the negative pole.
10. The adjustable drive control circuit according to any one of claims 1 to 9, wherein the first and second drive circuits, the first and second delay circuits, and the first and second key circuits comprise the same electronic components and wiring arrangement.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111271101.9A CN114123938A (en) | 2021-10-29 | 2021-10-29 | Adjustable driving control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111271101.9A CN114123938A (en) | 2021-10-29 | 2021-10-29 | Adjustable driving control circuit |
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| CN114123938A true CN114123938A (en) | 2022-03-01 |
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| CN114665791A (en) * | 2022-03-11 | 2022-06-24 | 成都飞机工业（集团）有限责任公司 | Direct current motor forward and reverse rotation delay protection circuit |
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