CN114113495A - High-precision low-power-consumption fully-integrated portable electronic nose - Google Patents
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Abstract
The invention discloses a high-precision low-power consumption fully-integrated portable electronic nose, which comprises: the sensor array is used for realizing the detection of the target gas; the interface circuit is used for controlling the sensor array to detect the target gas according to the current working mode and collecting and processing related sensor signals; the odor recognition unit includes: and the multilayer perceptron adopts a multiplexing pipeline structure and classifies and identifies the sensor signals processed by the interface circuit. The portable electronic nose provided by the invention solves the problem of poor selectivity of an MOS gas sensor, can expand data required by odor identification, can be well applied to the fields of high precision and low power consumption, can be realized on one chip, increases the portability compared with the traditional odor identification system, and innovates the hardware realization of the odor classification of a multilayer perceptron, so that the data throughput rate and the chip area are well balanced.
Description
Technical Field
The invention relates to the field of semiconductor integrated circuits, in particular to a high-precision low-power-consumption fully-integrated portable electronic nose.
Background
With the rapid development of artificial intelligence and sensing technology, the demands for bionic olfaction by using portable devices are increasingly wide, such as gas quality monitoring, disease diagnosis, harmful gas monitoring, indoor atmosphere detection and the like, so people urgently need a high-precision low-power-consumption portable electronic nose to realize the bionic olfaction.
Early Electronic noses used a combination of gas detection circuit built with discrete board level devices and odor identification at the PC side, such as in the literature, "Discrimination of Aromas in Beer with Electronic Nose". The gas detection circuit built by using the discrete board-level devices has the problems of high power consumption and poor portability, and if the odor classification can be realized only by matching with a PC, the size of the whole device is larger. Later, a mode of constructing a Gas detection circuit by adopting An ASIC chip and wirelessly transmitting odor identification data to a PC (personal computer) end for identification by using a Bluetooth module in the ASIC appears, for example, a document of An Energy-Efficient Multimode Gas-Sensor System With Learning-Based Optimization and Self-Calibration Schemes. However, the external PC still needs to be fitted, and the requirement for portability of people is not always satisfied. Some people can realize smell recognition in the FPGA by using known data, but the smell acquisition module is omitted, and the smell recognition module is not a complete portable electronic nose.
Therefore, how to provide a high-precision low-power-consumption fully-integrated portable electronic nose is a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
The invention aims to provide a high-precision low-power-consumption fully-integrated portable electronic nose, which can be realized on one chip, can expand data required by odor identification, and can be well applied to the fields of high precision and low power consumption.
The purpose of the invention is realized by the following technical scheme:
a high-precision low-power consumption fully-integrated portable electronic nose comprises: the device comprises a sensor array, an interface circuit and a smell identification unit; wherein:
the sensor array is used for realizing the detection of target gas;
the interface circuit is used for controlling the sensor array to detect the target gas according to the current working mode and collecting and processing related sensor signals;
the scent recognition unit includes: and the multilayer perceptron adopts a multiplexing pipeline structure and classifies and identifies the sensor signals processed by the interface circuit.
According to the technical scheme provided by the invention, the problem of poor selectivity of the MOS gas sensor is solved, the data required by odor identification can be expanded, the method can be well applied to the fields of high precision and low power consumption, the whole electronic nose can be realized on one chip, the portability is improved compared with the traditional odor identification system for detecting the identification of a PC (personal computer) end by a hardware end, and the innovation is carried out on the hardware realization of the odor classification of the multilayer perceptron, so that the good balance is achieved on the data throughput rate and the chip area.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic diagram of a high-precision low-power fully integrated portable electronic nose according to an embodiment of the present invention;
fig. 2 is a modulator structure of a CIFF structure of an incremental sigma-delta ADC according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a digital control module in an interface circuit according to an embodiment of the present invention;
FIG. 4 is a digital filter of an incremental sigma-delta ADC provided in accordance with an embodiment of the present invention;
FIG. 5 is a schematic diagram of ADC calibration provided by an embodiment of the present invention;
FIG. 6 is a schematic diagram of a multi-layered sensor implementation according to an embodiment of the present invention;
FIG. 7 is a diagram illustrating a hardware architecture of a multi-layered perceptron according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a compute engine provided by an embodiment of the present invention;
FIG. 9 is a schematic diagram of a pipeline for hardware implementation without regard to architectural multiplexing according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of a hardware implementation pipeline considering structure multiplexing according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a pipeline for implementing structure multiplexing by dividing a weight matrix into two parts according to an embodiment of the present invention;
fig. 12 is a schematic diagram of data flow for implementing structural multiplexing by dividing a weight matrix into two parts according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
The terms that may be used herein are first described as follows:
the terms "comprising," "including," "containing," "having," or other similar terms of meaning should be construed as non-exclusive inclusions. For example: including a feature (e.g., material, component, ingredient, carrier, formulation, material, dimension, part, component, mechanism, device, process, procedure, method, reaction condition, processing condition, parameter, algorithm, signal, data, product, or article of manufacture), is to be construed as including not only the particular feature explicitly listed but also other features not explicitly listed as such which are known in the art.
The invention provides a high-precision low-power consumption fully integrated portable electronic nose which is described in detail below. Details which are not described in detail in the embodiments of the invention belong to the prior art which is known to the person skilled in the art. Those not specifically mentioned in the examples of the present invention were carried out according to the conventional conditions in the art or conditions suggested by the manufacturer. The instruments used in the examples of the present invention are not indicated by manufacturers, and are all conventional products that can be obtained by commercial purchase.
As shown in fig. 1, a high-precision low-power consumption fully integrated portable electronic nose mainly comprises: the device comprises a sensor array, an interface circuit and a smell identification unit; wherein:
the sensor array is used for realizing the detection of target gas;
the interface circuit is used for controlling the sensor array to detect the target gas according to the current working mode and collecting and processing related sensor signals;
the scent recognition unit includes: and the multilayer perceptron adopts a multiplexing pipeline structure and classifies and identifies the sensor signals processed by the interface circuit.
The portable electronic nose provided by the embodiment of the invention can be realized on one chip, can be well applied to the fields of high precision and low power consumption, increases the portability compared with the traditional smell recognition system for detecting the recognition of a PC (personal computer) end by a hardware end, and innovates the hardware realization of the smell classification of a multilayer perceptron, so that the data throughput rate and the chip area are well balanced.
For ease of understanding, the following detailed description is made separately for each of the parts of the portable electronic nose.
Firstly, a sensor array.
In an embodiment of the present invention, the sensor array includes: the MEMS gas sensor array comprises a plurality of MEMS MOS gas sensors made of different gas-sensitive materials and is used for realizing the detection of target gas; wherein, MEMS MOS gas sensor includes: gas sensitive materials and heating resistors; the gas sensitive material reacts with the target gas and then reacts with the concentration of the target gas through the resistance value, and the heating resistor provides required temperature for the reaction of the gas sensitive material and the target gas.
Interface circuit
Referring also to fig. 1, the interface circuit mainly includes: the device comprises a resistance voltage division circuit, a low-pass filter, an incremental sigma-delta ADC analog circuit part, a power supply management module, an EEPROM, a clock module, a power-on reset module, a micro-hotplate heater and a digital control circuit.
1. And a power management module.
In the embodiment of the invention, the power management module internally comprises a plurality of LDOs (low dropout regulators) and bandgaps (bandgap references) for providing required voltages for each part in the interface circuit and the odor identification unit.
2. And a clock module.
In the embodiment of the invention, the clock module is connected with the digital control circuit and used for providing a clock signal of the digital control circuit.
3. And a power-on reset module.
In the embodiment of the invention, the power-on reset module is connected with the digital control circuit and is used for providing a power-on reset signal for the digital control circuit.
4. Resistance bleeder circuit.
In the embodiment of the invention, the resistance voltage division circuit is directly connected with the gas-sensitive resistor of a single MEMS gas sensor in the gas sensor array through the multiplexer, so that the change of the gas-sensitive resistor is converted into the change of voltage.
5. A low pass filter.
In the embodiment of the invention, the low-pass filter is connected with the resistance voltage division circuit and the incremental sigma-delta ADC, and can remove the frequency higher than a certain frequency in the input signal so as to avoid aliasing of a high-frequency signal into the working frequency band of the A/D.
6. And the incremental sigma-delta ADC analog circuit part.
In the embodiment of the invention, the analog circuit part of the incremental sigma-delta ADC is connected with the output of the low-pass filter and the input of the digital control circuit. The method has the characteristics of high precision and one-to-one correspondence of input and output, and is particularly suitable for acquisition of sensor array signals.
Illustratively, a second order incremental sigma-delta ADC of cascaded-type (CIFF) architecture of a distributed feedback integrator as shown in fig. 2 may be used, which ensures that the present invention can be applied in high precision fields. In the structure shown in fig. 2, the sample holder and the modulator belong to an analog circuit part of an incremental sigma-delta ADC, and the quantizer belongs to a part of the modulator, and mainly converts an analog signal into a digital signal; the last digital filter belongs to a digital circuit part, which will be explained in detail later.
The resistance voltage dividing circuit, the low-pass filter and the incremental sigma-delta ADC analog circuit part are sequentially connected with the digital control circuit, resistance changes in sensor signals are converted into voltage changes through the resistance voltage dividing circuit, analog-to-digital conversion is carried out through the incremental sigma-delta ADC after the voltage changes are filtered by the low-pass filter, and voltage information on the gas-sensitive resistor of the corresponding sensor is output to the digital control circuit.
7、EEPROM。
In the embodiment of the invention, the EEPROM is connected with the digital control circuit, and after the digital control circuit is electrified, the digital control circuit reads the relevant configuration information from the interior of the EEPROM. The description about the configuration information is further detailed in the following digital control circuit.
8. A micro-hotplate heater.
In the embodiment of the invention, one end of the micro-hotplate heater is connected with the heating resistor in the sensor array, the other end of the micro-hotplate heater is connected with the digital control circuit, and the digital control circuit outputs heating voltage to the related heating resistor.
In the embodiment of the invention, the micro-hotplate heater is connected with a heating resistor in an MEMS gas sensor array and a digital control circuit. The MEMS gas sensor can be equivalent to a circuit consisting of a gas sensitive resistor and a heating resistor. When the gas sensor is exposed in the environment of gas to be measured, the gas sensitive resistor reacts with the gas to be measured, so that the resistance value of the gas sensitive resistor changes. The above-mentioned change process is usually carried out at a high temperature, and therefore a heating resistor is required to provide a certain temperature. The micro-hotplate controls the temperature of the heating resistor, adopts a programmable pulse width modulation technology to heat, and adjusts the working state of the micro-hotplate heater by comparing the heating resistor with a reference resistor. The heating voltage of the micro-hotplate can be dynamically adjusted by a digital control circuit through controlling a voltage management module.
9. A digital control circuit.
In the embodiment of the invention, the digital control circuit is provided with an interface for communicating with external equipment (MASTER), the current working mode is selected according to the instruction of the external equipment, and all parts of the interface circuit are controlled to cooperatively finish the acquisition and processing of related sensor signals.
The digital control circuit is one of the core technologies of the present invention, and as shown in fig. 3, the digital control circuit mainly includes: a digital filter, an ADC calibration module, an ADC control module, an EEPROM control module, a PWM heater control module, an I2C communication module, and a system control module.
1) A digital filter.
In the embodiment of the invention, the digital filter is used for digitally filtering the output signal of the analog circuit part of the incremental sigma-delta ADC.
The digital filter is connected with the incremental sigma-delta ADC analog circuit part, high-frequency signals output by the incremental sigma-delta ADC analog circuit part are filtered, effective signals are reserved, and the oversampling frequency is reduced to the Nyquist frequency by utilizing a down-sampling technology.
In the embodiment of the present invention, the digital filter inside the digital control circuit belongs to the digital circuit part of the incremental sigma-delta ADC, that is, the digital filter is connected to the analog circuit part of the incremental sigma-delta ADC to form the complete incremental sigma-delta ADC, as shown in fig. 2 and fig. 3, wherein the digital filter is the same device. Considering that the digital filter belongs to a digital circuit part, it is divided into a part of a digital control circuit.
For the digital filter of the incremental Sigma-Delta ADC, only cascaded adders are needed, wherein the cascaded number of the adders is equal to the number of the corresponding modulator. The cascade adder as a filter has simple structure, and greatly simplifies the design of the filter.
After M clock cycles, the output V of the second stage integrator of the modulator is shown in fig. 22Can be expressed as:
wherein, VinRepresenting discrete signals after passing through the sample-and-hold unit, VREFFor reference voltage, d represents the quantizer output (output 0 or 1) in the modulator, l is an intermediate variable, and i is the number of clock cycles.
Since the sigma-delta ADC adopts the oversampling technology, V can be consideredinContinuously changing in M clock cycles, wherein the quantization error q is as follows:
the quantization of the input signal by the system results in:
for example, the structure shown in fig. 4 using a cascaded adder as a digital filter may be adopted, where D is the output of the digital filter and can be expressed as:
the Sigma-delta modulator adopts a fully differential structure to improve the anti-interference capability. For simplicity of design, the cascade adder is improved, so that the first-stage adder performs 1 adding operation when the output of the modulator is at a high level, and the first-stage adder is kept unchanged when the output of the modulator is at a low level; the quantization result of the digital filter on the input signal can be rewritten as:
where M represents the current total number of clock cycles, VREFIs a reference voltage, VoIs a quantized voltage;
the above equation is transformed and the quantization result is expressed as:
wherein the content of the first and second substances,
DOUTrepresenting the output of the digital filter.
It will be understood by those skilled in the art that the output of an incremental sigma-delta ADC is a series of 1 or 0 bits without a digital filter, and D with a digital filter, but these do not directly represent the analog voltage detected by the ADC, and the analog voltage value measured at this time can be obtained by converting through the above formula.
2) And an ADC calibration module.
In the embodiment of the invention, the ADC calibration module is connected with the digital filter and the system control module and is used for calibrating the output of the digital filter or not calibrating the output of the digital filter according to the currently set mode; and calibrating the output of the digital filter by combining the configuration information from the EEPROM during calibration.
In the embodiment of the invention, the information corresponding to the currently set mode comes from a system control module, comprises two modes of calibration and non-calibration, and can select whether to calibrate the signal from the Sigma-Delta ADC according to the requirement, so that the results before and after calibration can be conveniently compared.
In the embodiment of the present invention, the configuration information related during calibration mainly includes: an offset calibration value and a gain calibration value. The principle of the ADC calibration block is illustrated as follows: the analog value and the voltage value of the incremental sigma-delta ADC are shown in fig. 5, and several points on the actual AtoD curve (marked by numeral 1) are obtained by testing, and then offset and gain calibration is performed on the AtoD characteristic curve of the ADC by combining the AtoD data (marked by numeral 2) of the ideal ADC. An offset register and a gain register are defined within the ADC calibration module. The offset register is used for storing offset calibration values of the ADC, and the gain register is used for storing gain calibration coefficients of the ADC. The calibration parameters are stored in the EEPROM, and after the power-on, the calibration parameters are read from the EEPROM through the EEPROM control module for calibration.
3) And an ADC control module.
In the embodiment of the present invention, the ADC control module is connected to the digital filter, the ADC calibration module, and the system control module, and is configured to switch a sampling channel of the sensor array according to a current working mode transmitted by the system control module, provide a reset signal for the incremental sigma-delta ADC, and package an output of the ADC calibration module and transmit the packaged output to the system control module.
4) And an EEPROM control module.
In the embodiment of the invention, the EEPROM control module is connected with the EEPROM and used for reading configuration information from the EEPROM and transmitting the configuration information to the system control module after being electrified.
In this embodiment of the present invention, the configuration information includes: a clock calibration value, an offset calibration value, and a gain calibration value. And the offset calibration value and the gain calibration value are transmitted to an ADC calibration module by the system control module, and the ADC calibration module calibrates the output of the digital filter by using the offset calibration value and the gain calibration value.
The internal storage clock calibration value is used for avoiding the problem of clock offset caused by temperature influence and the difference of chip clock frequency on the same wafer caused by the influence of a process corner, and the clock trimming circuit can be controlled by the clock calibration value.
The EEPROM control module adopts power-on self-reading, and can meet the requirement that the system information needs to be reconfigured from the outside without power-on reset every time.
5) And a PWM heater control module.
In the embodiment of the invention, the PWM heater control module is connected with the micro-hotplate heater and used for outputting heating voltage and a corresponding PWM waveform signal to the micro-hotplate heater according to a control signal of the system control module.
In the embodiment of the invention, the PWM heater control module is internally provided with a decoder circuit, the LDOs with the number equal to that of the sensors are controlled by a switch to supply power and heat to the corresponding sensors according to the input heating enabling signals, and the PWM waveform signals control the voltage selection of the LDOs. The PWM waveform signal is realized by firstly dividing the frequency of a system clock, using an N-bit data register to represent the PWM waveform signal, wherein the high N/2 bit of the data register represents the number of the divided clock occupied by the PWM waveform when the PWM waveform is low, and the low N/2 bit represents the number of the divided clock occupied by the PWM waveform when the PWM waveform is high.
For example, it may be set that: 1) each LDO has 16 heating voltages of 0.8V-2.3V, and the step is 0.1V; 2) n-8.
6) I2C communication module.
In the embodiment of the present invention, the I2C communication module is configured to implement communication between an external device and the system control module; the I2C bus is very suitable for short-distance low-speed inter-chip communication, and the protocol only needs two serial lines, thereby saving area. The serial data line is a bidirectional port, the design concept solves the problem in a digital control circuit, digital signals are transmitted to a control system along the positive direction, and the software addressing mode is adopted, so that the digital control circuit has great advantages in peripheral expansion of the system.
7) And a system control module.
The system control module is respectively connected with the ADC control module, the ADC calibration module, the EEPORM control module, the PWM heater control module, the odor identification unit and the I2C communication module; the system control module is connected with the ADC control module and informs the ADC control module of the working mode, so that the ADC control module finishes channel mode selection and receives packed data required by the corresponding working mode; the ADC calibration module is connected with the control module and transmits the related configuration information and the information of whether to calibrate to the ADC calibration module; the EEPROM control module is connected with the EEPROM control module, and writes initial configuration information into the EEPROM through the EEPROM control module and performs power-on self-reading; the PWM heater control module is connected with the PWM heater control module and controls the PWM heater control module to output heating voltage and corresponding PWM waveform signals; the odor identification unit module is connected with the odor detection module to transmit the processed sensor signals and signals for identifying whether odor classification is needed or not; the interface between the I2C communication module and the external device is mainly divided into external read operation and external write operation.
For power considerations and to make the electronic nose suitable for more scenarios, the present invention sets four modes of operation:
the first one is: single-channel measurement is carried out once on the given heating temperature; under the working mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to the heating resistor of the selected gas sensor in the gas sensor array; after the relevant gas sensors are stabilized, the incremental sigma-delta ADC is reset through the ADC control module to perform single sampling on the selected gas sensors, and the acquired data are sent to a register correspondingly stored in the system control module through the digital filter, the ADC calibration module and the ADC control module. This mode is mainly suitable for some scenarios that require a single measurement.
The second method is as follows: setting heating temperature and measuring in a single channel repeatedly; under the working mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to the heating resistor of the selected gas sensor in the gas sensor array; after the relevant gas sensors are stable, applying a reset signal to the incremental sigma-delta ADC through the ADC control module after the single data is acquired by the incremental sigma-delta ADC, and continuously sampling the selected gas sensors; sending the collected data to a register correspondingly stored by a system control module through a digital filter, an ADC calibration module and an ADC control module; the mode is mainly suitable for some scenes needing gas monitoring.
The third is: giving a heating temperature multi-channel polling mode; in the mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to all gas sensor heating resistors in the gas sensor array; after the relevant gas sensors are stabilized, applying a reset signal to the incremental sigma-delta ADC through the ADC control module after the incremental sigma-delta ADC collects single data, changing a sampling channel, sampling the gas sensors corresponding to the changed channel, and sequentially reciprocating; sending the collected data to a register correspondingly stored by a system control module through a digital filter, an ADC calibration module and an ADC control module; the mode is mainly suitable for solving the problem of poor selectivity of a single gas sensor and utilizing a sensor array to acquire data.
The fourth method is as follows: a variable heating temperature multichannel polling expansion odor identification data mode; in the mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to all gas sensor heating resistors in the gas sensor array; after the relevant gas sensors are stabilized, applying a reset signal to the incremental sigma-delta ADC through the ADC control module after the incremental sigma-delta ADC collects single data, changing a sampling channel, sampling the gas sensors corresponding to the changed channel, and sequentially reciprocating; after traversing all the sensors in the sensor array for one time, changing the heating voltage and the PWM waveform signal, and traversing for one time after the gas sensors are stabilized; the steps are repeated in this way, and data are acquired for the gas sensor arrays at different temperatures; because the response curves of the same sensor to the same type of gas with the same concentration are different at different temperatures, the expanded odor identification data can be collected in a polling mode by changing the heating temperature. The pattern is primarily to provide the required identification data for the scent recognition unit. The collected data are sent to a register correspondingly stored by the system control module through the digital filter, the ADC calibration module and the ADC control module and are transmitted to the odor identification unit.
The specific working mode can be selected by a user according to actual conditions or requirements, the selected working mode is transmitted to the portable electronic nose through the external equipment through the I2C communication module, the related heating voltage and the PWM waveform signal are transmitted to the system control module through the I2C communication module under each working mode, and then the micro-hotplate heater is controlled through the PWM heater control module.
And thirdly, an odor identification unit.
In the embodiment of the present invention, the first and second substrates,
odor recognition is performed using data information from the interface circuit. The odor recognition mode adopts a multilayer perceptron (MLP), and the MLP is proved to solve a complex nonlinear mapping relation and improve the classification accuracy.
The parameter training of the MLP is realized at a software end, and the portable electronic nose chip provided by the invention only needs to realize the forward propagation of the MLP; in an embodiment of the invention, the multilayer perceptron comprises a multilayer feedforward neural network. For a current hidden layer in the multi-layer feedforward neural network, the number of neurons is set to be S, the weight number of each neuron is set to be R, and then the weight matrix of the current hidden layer is expressed as follows:
wherein, a single w in the matrix represents a single weight of a single neuron, a first number in the corner mark is a neuron serial number, and a second number is a weight serial number; the number of weights per neuron, R, is equal to the number of elements of the input vector; if the current hidden layer is the first layer, the input vector is the vector input to the multi-layer feedforward neural network, and if the current hidden layer is not the first layer, the input vector is the output vector of the previous hidden layer.
And after multiplying the weight matrix of the current hidden layer by the input vector and adding the weight matrix to the offset vector, activating through an activation function to obtain an output vector of the current hidden layer, wherein the expression is as follows:
n＝I·p+b
a＝f(n)
wherein p represents an input vector, b represents an offset vector, n represents a vector obtained by multiplying the weight matrix of the current hidden layer by the input vector and adding the weight matrix to the offset vector, f represents an activation function, and a represents an output vector of the current hidden layer.
Take the three-layer feedforward neural network shown in fig. 6 as an example.
The first hidden layer consists of s neurons, each with R weights, which can be represented as a weight matrix as shown in I:
the input vector P has R elements:
P＝[p1，p2，...，pR]T
the input weight matrix is multiplied by the input vector and the offset vector is added to form a vector n as shown in1：
n1＝I·P+b1
Hidden layer a1The output of (a) is the value of the activation function on which:
a1＝f1(n1)
wherein the content of the first and second substances,
t is the transposed symbol.
The same second layer hidden layer is composed of k neurons, each neuron has s weights, and the weight matrix form and the calculation process are as follows:
n2＝L·a1+b2
a2＝f2(n2)
in the output layer, it is composed of m neurons, each neuron has k weights, and the weight matrix form and calculation process are as follows:
n3＝G·a2+b3
a3＝f3(n3)
in order to increase the calculation speed, the invention adopts a hardware structure as shown in fig. 7, and adopts parallel calculation for the forward propagation of each neuron. Each PE (compute engine) consists of an SRAM storing neuron weights and several multiplier adders as shown in fig. 8.
In addition, the structure can adopt a pipeline design as shown in FIG. 9, and the throughput is increased.
However, if the pipeline is designed according to fig. 9, completely for the structure shown in fig. 7, although the calculation speed will be fast, the data throughput will also be improved. However, for this structure, if the number of layers of the neural network is large and each layer requires many neurons, a large number of PE units are required to support the structure, which results in a large chip area overhead.
The present invention improves this by multiplexing PEs. A pipeline design structure as shown in fig. 10 is employed. As shown in fig. 11, the data fetching includes two steps in series: 1. weighting to SRAM3 from FLASH; 2. weights are taken and updated from SRAM 3.
BLOCK executes, which is to structure-multiplex PEs in parallel in the same column as shown in fig. 7.
The multiplexing process is explained in detail below:
for forward propagation of multi-layered perceptrons, most of the computations are embodied in matrix multiplication, such as weight matrix multiplication by input vector matrix. The core idea of the structural multiplexing is that for the above matrix multiplication, it is substantial that a row vector of the weight matrix is multiplied by a column vector of the input vector, and it can be considered that a parallel multiplication of all rows of the weight matrix and the input vector column is decomposed into a parallel multiplication of a plurality of rows of the weight matrix and the input vector column, and after the multiplication operation is performed, a parallel multiplication of the rest of the rows of the weight matrix and the input vector is performed. The more the above decomposition, the smaller the chip area, and of course, the slower the calculation speed.
The structure shown in fig. 11 and 12 multiplexes half of the PEs once, which can save half of the PEs and greatly reduce the chip area. Dividing all rows of the weight matrix into two parts, taking the first layer of hidden layer as an example, if the layer has a total even number of neurons then the first part comprises 1 to
The weight matrix of the row, the second part is
To the weight matrix of s rows, calculate the layer requirements
And a PE unit writing the partial calculation result into SRAM1 (first SRAM). If the layer has a total odd number of neurons then the first portion comprises 1 to
A row, the second part being
To s line, require
And a PE unit writing the partial calculation result into SRAM2 (second SRAM). Because it is odd, the weight rows in the second portion are complemented by an all zero row, which is not written to SRAM2 after the all zero row is calculated. The values stored in SRAM1 and SRAM2 are the result of the calculation of the weight matrix and the input vector.
Taking the first hidden layer calculation as an example, let S be an even number, and the input weight matrix is:
can be divided into I1And I2Wherein:
the first layer hidden layer input weight matrix is multiplied by the input vector and added with the offset vector to form a vector n shown as the following formula1：
n1＝I·P+b1
And can be represented as:
n1＝[I1·P+b1，I2·P+b1]T
will I1·P+b1The calculation result of (A) is stored in SRAM1, and I is2·P+b1The calculation result of (c) is stored in the SRAM 2. In the traditional scheme, the I.P is calculated simultaneously, a large number of PE units are wasted, and the invention divides the I.P into I1·P+b1And I2·P+b1This saves half of the PE usage.
According to the actual requirement, further multiplexing can be performed according to the structural multiplexing idea, for example, dividing the weight matrix row into three parts.
In order to be able to use the multiplexing process to reduce the chip area without thereby reducing the computation speed too much. In the multiplexing process, the pipeline operation is added again in consideration of the execution sequence, so that the throughput rate of the whole data is increased.
As shown in fig. 11 and 12, BLOCK performs the process: the input is updated firstly, namely the value in the SRAM1 and the value in the SRAM2 are taken out to the input vector input in the PE, because the weight (weight matrix) is taken from the FLASH to the SRAM3 (third SRAM) before the BLOCK is executed, and the weight is taken from the SRAM3 and updated to the PE array, the PE calculation of the first part of weight matrix row is carried out next, the weight to be calculated in the second part can be taken from the SRAM3 and updated to the PE in the calculation process, a plurality of D triggers are arranged before the PE input end at the moment in time, the updated weight value is updated to the D end only, and the updated weight value is updated to the Q end, namely the PE multiplier input position at the next moment of the pipeline, namely when the PE calculation is finished. The first part can execute PE calculation at the same time after the calculation is finished and the result is stored in the SRAM1, and the second part can execute the PE calculation after the PE calculation is finished and the result is stored in the SRAM 2. This is a complete BLOCK implementation.
The data fetch of the next stage can start from the PE calculation of the second part in the BLOCK execution process of the previous stage, further saving the calculation time.
The pipeline process is described in detail by taking the first hidden layer and the second hidden layer as an example. For the first hidden layer, the weight is taken from the FLASH to the SRAM3, the weight required by the first hidden layer is taken from the SRAM3 and updated to the D terminal of the D flip-flop before the PE input, where "take and update" indicates two operations, the take operation is to read the corresponding weight, and the update operation is to update the D terminal of the D flip-flop by using the read weight. The update input applies the input vector P to the multiplier in each PE unit, and then I is performed using the PE unit that saves the first half of the input vector1·P+b1And (4) calculating. During PE computation, the computation I can be calculated2·P+b1Weight value of (I)2And updating the D end of the D trigger before the PE input. The weight I is taken and updated from the SRAM3 after the PE calculation is finished2And after the parallel operation is finished. Will I1·P+b1The calculation result of (A) is stored in SRAM1, and I is performed simultaneously2·P+b1The PE calculation of (2). In I1·P+b1The calculation results of (a) are stored in SRAM1, and I2·P+b1After the parallel computation of (A), the first step of2·P+b1The calculation result of (c) is stored in the SRAM 2.
In execution I2·P+b1In the process of PE calculation and storing the result in SRAM2, the weight value can be taken from FLASH to SRAM3, and the weight value required by the second hidden layer can be taken from SRAM3 and updated to the D terminal of the D flip-flop before PE input.
While the first hidden layer performs the activation function calculation using the values in SRAM1 and SRAM2, BLOCK execution of the second hidden layer is performed simultaneously.
And activating a function hardware module (Activation), and dynamically selecting to use according to the simulation of the software end, such as sigmod, Relu, softmax and the like.
The scheme of the embodiment of the invention mainly has the following beneficial effects:
1) the electronic nose provided by the invention innovates the hardware realization of the smell classification of the multilayer perceptron, so that the data throughput rate and the chip area are well balanced.
2) The electronic nose provided by the invention is monolithically integrated, all modules can be realized on one chip based on the MOS fusion technology, and the portability is really realized. In addition, the electronic nose is self-consistent and can work without the help of external experimental instruments.
3) The invention supports the related operation of the MEMS gas sensor array, can utilize the micro-hotplate to perform specific heating on the sensor individual, expands the smell data, preprocesses the expanded smell data, and meets the requirement of smell identification on the data.
4) The invention utilizes the second-order incremental sigma-delta ADC and designs a corresponding digital filter and an ADC calibration module for the second-order incremental sigma-delta ADC, so that the second-order incremental sigma-delta ADC can be applied to the high-precision field.
5) The micro-heating plate has multiple working modes, adopts PWM heating, can dynamically adjust waveform parameters of the micro-heating plate, such as heating voltage and the like, further reduces power consumption, and can be applied to the field of low power consumption.
It will be clear to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely used as an example, and in practical applications, the above function distribution may be performed by different functional modules according to needs, that is, the internal structure may be divided into different functional modules to perform all or part of the above described functions.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A high-precision low-power consumption fully-integrated portable electronic nose is characterized by comprising: the device comprises a sensor array, an interface circuit and a smell identification unit; wherein:
the sensor array is used for realizing the detection of target gas;
the interface circuit is used for controlling the sensor array to detect the target gas according to the current working mode and collecting and processing related sensor signals;
the scent recognition unit includes: and the multilayer perceptron adopts a multiplexing pipeline structure and classifies and identifies the sensor signals processed by the interface circuit.
2. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 1, characterized in that said sensor array comprises: the MEMS gas sensor array comprises a plurality of MEMS MOS gas sensors made of different gas-sensitive materials and is used for realizing the detection of target gas;
wherein, MEMS MOS gas sensor includes: gas sensitive materials and heating resistors; the gas sensitive material reacts with the target gas and then reacts with the concentration of the target gas through the resistance value, and the heating resistor provides required temperature for the reaction of the gas sensitive material and the target gas.
3. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 1, wherein said interface circuit comprises: the device comprises a resistance voltage division circuit, a low-pass filter, an incremental sigma-delta ADC analog circuit part, a power management module, an EEPROM, a micro-hotplate heater and a digital control circuit;
the power management module is used for providing required voltage for each part in the interface circuit and the odor identification unit;
the resistance voltage dividing circuit, the low-pass filter and the incremental sigma-delta ADC analog circuit part are sequentially connected with the digital control circuit, the resistance voltage dividing circuit converts the change of resistance in a sensor signal into the change of voltage, the analog-to-digital conversion is carried out through the incremental sigma-delta ADC analog circuit part after the change of resistance is filtered by the low-pass filter, and the voltage information on the gas-sensitive resistor of the corresponding sensor is output to the digital control circuit;
the EEPROM is connected with the digital control circuit, and after the digital control circuit is electrified, the digital control circuit reads related configuration information from the interior of the EEPROM;
one end of the micro-hotplate heater is connected with the heating resistor in the sensor array, the other end of the micro-hotplate heater is connected with the digital control circuit, and heating voltage is output to the related heating resistor under the control of the digital control circuit;
the digital control circuit is provided with an interface for communicating with external equipment, selects the current working mode according to the instruction of the external equipment, and controls all parts of the interface circuit to cooperatively finish the acquisition and processing of related sensor signals.
4. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 3, wherein said digital control circuit comprises: the device comprises a digital filter, an ADC calibration module, an ADC control module, an EEPROM control module, a PWM heater control module, an I2C communication module and a system control module; wherein:
the digital filter is used for digitally filtering the output signal of the incremental sigma-delta ADC analog circuit part; the digital filter and the incremental sigma-delta ADC analog circuit part form a complete incremental sigma-delta ADC;
the ADC calibration module is used for calibrating the output of the digital filter according to the currently set mode or not calibrating the output of the digital filter; wherein, the output of the digital filter is calibrated in combination with the configuration information from the EEPROM during calibration;
the ADC control module is used for switching the sampling channels of the sensor array according to the current working mode transmitted by the system control module, providing a reset signal for the incremental sigma-delta ADC, and transmitting the output of the ADC calibration module to the system control module after being packaged;
the EEPROM control module is connected with the EEPROM and used for reading configuration information from the EEPROM and transmitting the configuration information to the system control module after being electrified;
the PWM heater control module is connected with the micro-hotplate heater and used for outputting heating voltage and corresponding PWM waveform signals to the micro-hotplate heater according to control signals of the system control module;
the I2C communication module is used for realizing the communication between an external device and the system control module;
the system control module is respectively connected with the ADC control module, the ADC calibration module, the EEPORM control module, the PWM heater control module, the odor identification unit and the I2C communication module; the system control module is connected with the ADC control module and informs the ADC control module of the working mode, so that the ADC control module finishes channel mode selection and receives packed data required by the corresponding working mode; the ADC calibration module is connected with the control module and transmits the related configuration information and the information of whether to calibrate to the ADC calibration module; the EEPROM control module is connected with the EEPROM control module, and writes initial configuration information into the EEPROM through the EEPROM control module and performs power-on self-reading; the PWM heater control module is connected with the PWM heater control module and controls the PWM heater control module to output heating voltage and corresponding PWM waveform signals; the odor identification unit module is connected with the odor detection module to transmit the processed sensor signals and signals for identifying whether odor classification is needed or not; and the communication module is connected with the I2C communication module and is connected with the external device in a communication way.
5. The fully integrated portable electronic nose with high precision and low power consumption according to claim 4, wherein the digital filter digitally filters the incremental sigma-delta ADC output signal comprises: filtering out a high-frequency signal output by the sigma-delta ADC, reserving an effective signal, and reducing the oversampling frequency to the Nyquist frequency by using a down-sampling technology; wherein:
the cascade adder is used as a digital filter structure, the first-stage adder performs 1 adding operation when the output of the modulator is at a high level, and the first-stage adder remains unchanged when the output of the modulator is at a low level; the quantization result of the digital filter on the input signal is represented as:
where M represents the current total number of clock cycles, VREFIs a reference voltage, VoFor quantized voltages, d represents the quantizer output, and l is an intermediate variable;
the above equation is transformed and the quantization result is expressed as:
wherein the content of the first and second substances,
DOUTrepresenting the output of the digital filter.
6. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 4, characterized in that said configuration information comprises: a clock calibration value, an offset calibration value and a gain calibration value;
wherein the clock calibration value is used for correcting the clock; the offset calibration value and the gain calibration value are transmitted to an ADC calibration module by the system control module, and the ADC calibration module calibrates the output of the digital filter by using the offset calibration value and the gain calibration value.
7. A high-precision low-power-consumption fully-integrated portable electronic nose as claimed in claim 4, wherein the PWM heater control module is internally provided with a decoder circuit, the LDOs equal to the number of the sensors are controlled by switches to supply power and heat to the corresponding sensors according to the input heating enable signal, and the PWM waveform signal controls the voltage selection of the LDOs;
the PWM waveform signal is realized by firstly dividing the frequency of a system clock, using an N-bit data register to represent the PWM waveform signal, wherein the high N/2 bit of the data register represents the number of the divided clock occupied by the PWM waveform when the PWM waveform is low, and the low N/2 bit represents the number of the divided clock occupied by the PWM waveform when the PWM waveform is high.
8. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 4, characterized in that the working modes include four modes:
the first one is: single-channel measurement is carried out once on the given heating temperature; under the working mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to the heating resistor of the selected gas sensor in the gas sensor array; after the relevant gas sensors are stabilized, resetting the incremental sigma-delta ADC through the ADC control module to perform single sampling on the selected gas sensors, and sending the acquired data to a register correspondingly stored by the system control module through the digital filter, the ADC calibration module and the ADC control module;
the second method is as follows: setting heating temperature and measuring in a single channel repeatedly; under the working mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to the heating resistor of the selected gas sensor in the gas sensor array; after the relevant gas sensors are stable, applying a reset signal to the incremental sigma-delta ADC through the ADC control module after the single data is acquired by the incremental sigma-delta ADC, and continuously sampling the selected gas sensors; sending the collected data to a register correspondingly stored by a system control module through a digital filter, an ADC calibration module and an ADC control module;
the third is: giving a heating temperature multi-channel polling mode; in the mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to all gas sensor heating resistors in the gas sensor array; after the relevant gas sensors are stabilized, applying a reset signal to the incremental sigma-delta ADC through the ADC control module after the incremental sigma-delta ADC collects single data, changing a sampling channel, sampling the gas sensors corresponding to the changed channel, and sequentially reciprocating; sending the collected data to a register correspondingly stored by a system control module through a digital filter, an ADC calibration module and an ADC control module;
the fourth method is as follows: a variable heating temperature multichannel polling expansion odor identification data mode; in the mode, the micro-hotplate heater is controlled by the PWM heater control module to supply required heating voltage to all gas sensor heating resistors in the gas sensor array; after the relevant gas sensors are stabilized, applying a reset signal to the incremental sigma-delta ADC through the ADC control module after the incremental sigma-delta ADC collects single data, changing a sampling channel, sampling the gas sensors corresponding to the changed channel, and sequentially reciprocating; after traversing all the sensors in the sensor array for one time, changing the heating voltage and the PWM waveform signal, and traversing for one time after the gas sensors are stabilized; the steps are repeated in this way, and data are acquired for the gas sensor arrays at different temperatures; and sending the collected data to a register correspondingly stored by the system control module through the digital filter, the ADC calibration module and the ADC control module, and transmitting the data to the odor identification unit.
9. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 1, wherein the multilayer perceptron comprises a multilayer feedforward neural network;
for a current hidden layer in the multi-layer feedforward neural network, the number of neurons is set to be S, the weight number of each neuron is set to be R, and then the weight matrix of the current hidden layer is expressed as follows:
wherein, a single w in the matrix represents a single weight of a single neuron, a first number in the corner mark is a neuron serial number, and a second number is a weight serial number; the number of weights per neuron, R, is equal to the number of elements of the input vector; if the current hidden layer is the first layer, the input vector is the vector input to the multi-layer feedforward neural network, and if the current hidden layer is not the first layer, the input vector is the output vector of the previous hidden layer;
and after multiplying the weight matrix of the current hidden layer by the input vector and adding the weight matrix to the offset vector, activating through an activation function to obtain an output vector of the current hidden layer, wherein the expression is as follows:
n＝I·p+b
a＝f(n)
wherein p represents an input vector, b represents an offset vector, n represents a vector obtained by multiplying the weight matrix of the current hidden layer by the input vector and adding the weight matrix to the offset vector, f represents an activation function, and a represents an output vector of the current hidden layer.
10. A high-precision low-power consumption fully-integrated portable electronic nose according to claim 1 or 9, characterized in that the multilayer perceptron adopts a multiplexed pipeline structure comprising:
the forward propagation of each neuron in a multilayer feedforward neural network of the multilayer perceptron adopts parallel computation, each neuron multiplies an input vector by a computation engine computation weight and adds the input vector with a bias vector, and a computation result computed by the computation engine is activated by an activation function hardware module;
the multiplexing principle is described as: splitting the weight matrix of the hidden layer neuron into two parts, multiplexing the two parts by a calculation engine, storing a calculation result of the first part after calculation by the calculation engine into a first SRAM, and storing a calculation result of the second part after calculation by the calculation engine into a second SRAM;
introducing a pipeline structure on the basis of multiplexing, taking a weight matrix of a current hidden layer neuron from a FLASH to a third SRAM, taking and updating a first part of weight matrix from the third SRAM to a D end of a D trigger before input of a calculation engine, applying an input vector to a multiplier of each calculation engine, firstly calculating by using the first part of weight matrix through the calculation engine in a mode of multiplexing the calculation engine, and taking and updating a second part of weight matrix from the third SRAM to the D end of the D trigger before input of the calculation engine in the calculation process; after the first part is calculated, the calculation result is stored into a first SRAM, and after the second part is calculated, the calculation result is stored into a second SRAM; and in the process of carrying out the second part of calculation and storing the calculation result into the second SRAM, taking down the weight matrix of the neuron of the next hidden layer from the FLASH to the third SRAM, taking up and updating the first part of weight matrix from the third SRAM to the D end of the D trigger before the input of the calculation engine, and starting the calculation of the next hidden layer.
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