CN114093923A - Display substrate, manufacturing method thereof and display device - Google Patents
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
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Abstract
The display substrate, the manufacturing method thereof and the display device provided by the disclosure comprise: a substrate base plate; a plurality of light emitting devices arranged in an array on the substrate base; the driving transistors are positioned between the layer where the light-emitting devices are positioned and the substrate base plate, and are electrically connected with the light-emitting devices; the plurality of photosensitive transistors and the plurality of driving transistors are arranged on the same layer, each photosensitive transistor is located in at least partial gap of each driving transistor, and the photosensitive transistors are used for collecting reflected light of grains.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display substrate, a manufacturing method thereof, and a display device.
Background
With the rapid development of the information industry, biometric identification technology is more and more widely applied, and particularly, because different users have different fingerprints, the user identity can be conveniently confirmed, so that the fingerprint identification function becomes the standard configuration of mobile phones. The fingerprint identification technology is divided into fingerprint identification under the screen and in-screen (in-cell) fingerprint identification, wherein, fingerprint identification under the screen is realized by pasting the fingerprint identification module in the display screen below, and fingerprint identification in the screen is realized by directly integrating a photosensitive device (Sensor) into the display screen, so the fingerprint identification in the screen can make the mobile phone lighter and thinner. With the gradual development of flagship mobile phones towards curved screens and folding screens, organic electroluminescent display screens (OLED) also become the choice of most flagship mobile phones. Therefore, the technology of fingerprint identification in the OLED screen is an important research direction for identifying and unlocking the mobile phone in the future.
Disclosure of Invention
The embodiment of the disclosure provides a display substrate, a manufacturing method thereof and a display device, which are used for reducing the mask process times of in-screen fingerprint identification so as to reduce the cost and improve the productivity.
Therefore, an embodiment of the present disclosure provides a display substrate, including:
a substrate base plate;
a plurality of light emitting devices arranged in an array on the substrate base plate;
the driving transistors are positioned between the layer where the light-emitting devices are positioned and the substrate base plate, and are electrically connected with the light-emitting devices;
the photosensitive transistors are arranged on the same layer with the driving transistors, are positioned in at least partial gaps of the driving transistors and are used for collecting reflected light of grains.
In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, the active layer of the phototransistor is located between the layer where the gate of the phototransistor is located and the substrate;
the gate of the phototransistor includes first metal portions, each of the first metal portions includes at least one first light-transmitting hole, and an orthographic projection of the at least one first light-transmitting hole on the substrate base plate is located within an orthographic projection of the channel region of the phototransistor on the substrate base plate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the gate of the phototransistor further includes a first transparent conductive portion, the first transparent conductive portion is located between the layer where the first metal portion is located and the substrate, and an orthographic projection of the first transparent conductive portion on the substrate is substantially overlapped with an orthographic projection of the first metal portion on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the gate of the driving transistor includes a second metal portion, and the second metal portion is disposed on the same layer as the first metal portion.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the gate of the driving transistor further includes a second transparent conductive portion, and the second transparent conductive portion is disposed in the same layer as the first transparent conductive portion.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, each of the first metal parts includes: one first light hole, two of arranging along the line direction first light hole, two of arranging along the column direction first light hole is four of array arrangement first light hole, perhaps, is four first light hole of rhombus arrangement.
In some embodiments, the display substrate provided in the embodiments of the present disclosure further includes at least one light-shielding layer, where the at least one light-shielding layer is located on a side of the active layer of the phototransistor away from the substrate;
each light shielding layer comprises a plurality of second light holes, the second light holes correspond to the first light holes one to one, and orthographic projections of the second light holes on the substrate are mutually overlapped with orthographic projections of the first light holes on the substrate.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the display substrate further includes a black matrix, the black matrix is located on a side of the layer where the plurality of light emitting devices are located, the side being away from the substrate base plate, and an orthogonal projection of the black matrix on the substrate base plate is located in an orthogonal projection of a gap of each of the light emitting devices on the substrate base plate;
the at least one light shielding layer shares a film layer with at least one of the black matrix, an anode of the light emitting device, and a source/drain of the phototransistor.
In some embodiments, in the display substrate provided by the embodiments of the present disclosure, the photosensitive transistor and the driving transistor are both low-temperature polysilicon transistors.
Based on the same inventive concept, the embodiment of the present disclosure provides a display device, which includes the display substrate provided by the embodiment of the present disclosure.
Based on the same inventive concept, the embodiment of the present disclosure provides a manufacturing method of the display substrate, including:
providing a substrate base plate;
forming a plurality of driving transistors on the substrate base plate, and simultaneously forming a plurality of photosensitive transistors at least partial gaps of the driving transistors, wherein the photosensitive transistors are used for collecting reflected light of grains;
and forming a plurality of light emitting devices on the layer where the plurality of driving transistors are located, wherein the plurality of light emitting devices are electrically connected with the plurality of driving transistors.
In some embodiments, in the above manufacturing method provided by the embodiments of the present disclosure, forming a plurality of driving transistors on the substrate base plate, and simultaneously forming a plurality of photo transistors at least in a partial gap of each driving transistor specifically includes:
forming a plurality of first low-temperature polycrystalline silicon active layers and a plurality of second low-temperature polycrystalline silicon active layers on the substrate, wherein each first low-temperature polycrystalline silicon active layer is positioned at least part of a gap of each second low-temperature polycrystalline silicon active layer;
sequentially forming a transparent conductive layer and a metal layer on the plurality of first low temperature polysilicon active layers and the plurality of second low temperature polysilicon active layers;
etching the metal layer and the transparent conductive layer to form a first transparent conductive part and a first metal part which are positioned above each first low-temperature polycrystalline silicon active layer, and a second transparent conductive part and a second metal part which are positioned above each second low-temperature polycrystalline silicon active layer;
forming at least one first light-transmitting hole penetrating through the first metal part in each first metal part;
forming a plurality of first source/drain electrodes on the layer where the first metal parts are located, and simultaneously forming a plurality of second source/drain electrodes on the layer where the second metal parts are located, wherein the first source/drain electrodes are electrically connected with the first low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner, and the second source/drain electrodes are electrically connected with the second low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner; wherein,
the first low-temperature polycrystalline silicon active layer, the first transparent conductive part and the first metal part which are stacked, and the first source/drain constitute a phototransistor, and the second low-temperature polycrystalline silicon active layer, the second transparent conductive part and the second metal part which are stacked, and the second source/drain constitute a driving transistor.
In some embodiments, in the above manufacturing method provided by the embodiments of the present disclosure, forming a plurality of driving transistors on the substrate base plate, and simultaneously forming a plurality of photo transistors at least in a partial gap of each driving transistor specifically includes:
forming a plurality of first low-temperature polycrystalline silicon active layers and a plurality of second low-temperature polycrystalline silicon active layers on the substrate, wherein each first low-temperature polycrystalline silicon active layer is positioned at least part of a gap of each second low-temperature polycrystalline silicon active layer;
forming a transparent conductive layer on the plurality of first low-temperature polysilicon active layers and the plurality of second low-temperature polysilicon active layers, and etching the transparent conductive layer to form a first transparent conductive part positioned above each first low-temperature polysilicon active layer;
forming a metal layer on the layer where the first transparent conductive parts are located, and etching the metal layer to form first metal parts located above the first transparent conductive parts and second metal parts located above the second low-temperature polycrystalline silicon active layers; wherein each of the first metal parts includes at least one first light-transmitting hole;
forming a plurality of first source/drain electrodes on the layer where the first metal parts are located, and simultaneously forming a plurality of second source/drain electrodes on the layer where the second metal parts are located, wherein the first source/drain electrodes are electrically connected with the first low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner, and the second source/drain electrodes are electrically connected with the second low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner; wherein,
the first low-temperature polysilicon active layer, the first transparent conductive part and the first metal part which are stacked, and the first source/drain constitute a phototransistor, and the second low-temperature polysilicon active layer, the second metal part, and the second source/drain constitute a driving transistor.
The beneficial effects of this disclosure are as follows:
the display substrate, the manufacturing method thereof and the display device provided by the embodiment of the disclosure comprise a substrate; a plurality of light emitting devices arranged in an array on the substrate base; the driving transistors are positioned between the layer where the light-emitting devices are positioned and the substrate base plate, and are electrically connected with the light-emitting devices; the plurality of photosensitive transistors and the plurality of driving transistors are arranged on the same layer, each photosensitive transistor is located in at least partial gap of each driving transistor, and the photosensitive transistors are used for collecting reflected light of grains. The reflected light of the photosensitive transistor which is arranged on the same layer as the driving transistor is adopted to collect lines (such as fingerprints) for line identification, so that good compatibility with the manufacturing process of the driving transistor is realized, and a photosensitive device is prevented from being manufactured independently, so that the mask frequency is reduced, the cost is reduced, and the productivity is improved.
Drawings
Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the disclosure;
FIG. 2 is a schematic cross-sectional view taken along line I-II of FIG. 1;
FIG. 3 is a schematic view of another cross-sectional structure taken along line I-II of FIG. 1;
FIG. 4 is a schematic view of another cross-sectional structure taken along line I-II of FIG. 1;
fig. 5 is an arrangement of first light-transmitting holes in a first metal portion according to an embodiment of the present disclosure;
fig. 6 is a diagram of another arrangement of first light-transmitting holes in a first metal portion according to an embodiment of the present disclosure;
fig. 7 is a diagram of another arrangement of first light-transmitting holes in a first metal portion according to an embodiment of the present disclosure;
fig. 8 is a further arrangement of first light-transmitting holes in a first metal portion according to an embodiment of the present disclosure;
fig. 9 is yet another arrangement of first light-transmitting holes in a first metal portion according to an embodiment of the present disclosure;
FIG. 10 is a schematic view of another cross-sectional structure taken along line I-II of FIG. 1;
FIG. 11 is a schematic view of another cross-sectional structure taken along line I-II of FIG. 1;
fig. 12 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It should be noted that the sizes and shapes of the various figures in the drawings are not to scale, but are merely intended to illustrate the present disclosure. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in the description and claims does not indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. "inner", "outer", "upper", "lower", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The related art photo Sensor (Sensor) includes a bottom electrode (SD2), an N-type semiconductor layer, an I-type semiconductor layer (also referred to as an intrinsic semiconductor layer), a P-type semiconductor layer, and a top electrode (ITO) stacked, and has a very sensitive photo response capability. When the photosensitive device with the structure is integrated into an OLED screen, five mask processes need to be added to the original manufacturing process flow of the OLED screen, the five mask processes are respectively used for manufacturing an insulating layer (PVX1& PVX2), a first flat layer (PLN1), a bottom electrode (SD2), a top electrode (ITO) and a protective layer (Cover) covering the top electrode (ITO) of the photosensitive device, and the top electrode (ITO), the N-type semiconductor layer, the I-type semiconductor layer (also called an intrinsic semiconductor layer) and the P-type semiconductor layer are manufactured by adopting the same mask process. Therefore, in the related technology, the photosensitive device is integrated in the OLED screen for fingerprint identification, a multi-layer mask process is required to be introduced, the cost is high, and the influence on the productivity is high.
In order to solve the above technical problems in the related art, embodiments of the present disclosure provide a display substrate, as shown in fig. 1 to 3, including:
a base substrate 101;
a plurality of light emitting devices 102 arranged in an array on the substrate base plate 101; the light emitting device 102 may include an anode 1021, a light emitting functional layer 1022, and a cathode 1023, which are stacked, wherein the light emitting functional layer 1022 includes, but is not limited to, a hole injection layer, a hole transport layer, an electron blocking layer, a light emitting material layer, a hole blocking layer, a hole transport layer, and an electron injection layer; the light emitting device 102 may include a red light device R, a green light device G, a blue light device B, and the like;
a plurality of driving transistors 103 between the layer where the plurality of light emitting devices 102 are located and the base substrate 101, the plurality of driving transistors 103 being electrically connected to the plurality of light emitting devices 102; alternatively, the driving transistors 103 are electrically connected to the light emitting devices 102 in a one-to-one correspondence;
the plurality of phototransistors 104 are disposed on the same layer as the plurality of driving transistors 103, each phototransistor 104 is located at least a part of a gap of each driving transistor 103, and the phototransistors 104 are used for collecting reflected light of a texture (e.g., a fingerprint). Alternatively, the photo transistors 104 may be located at the row gaps of each driving transistor 103, and the specific position may be set according to the resolution of the actual required fingerprint identification, for example, the larger the resolution, the larger the number of photo transistors 104 required to be arranged, and the more gaps of each driving transistor 103 are occupied.
In the present disclosure, the term "same layer arrangement" refers to a layer structure formed by forming a film layer for forming a specific pattern by the same film formation process and then performing a patterning process by one step using the same mask plate. That is, one mask (also called as a photomask) is corresponding to one patterning process. Depending on the specific pattern, one patterning process may include multiple exposure, development or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous, and the specific patterns may be at the same height or have the same thickness, or may be at different heights or have different thicknesses.
In the display substrate provided by the embodiment of the present disclosure, the reflected light of the texture (for example, a fingerprint) is collected by using the phototransistor 104 disposed on the same layer as the driving transistor 103 to perform texture recognition, so that good compatibility with a manufacturing process of the driving transistor 103 in the related art is achieved, and a separate manufacturing of a photosensitive device (Sensor) is avoided, thereby reducing the mask frequency, reducing the cost, and improving the productivity.
In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as shown in fig. 4 to 9, the active layer P of the phototransistor 1041At the gate G of the phototransistor 1041Between the layer and the substrate 101, i.e. the phototransistor 104 is a top-gate transistor, the gate G of the phototransistor 1041May include a first metal portion G11(e.g., first metal portion G)11A structure of a titanium metal layer, an aluminum metal layer, and a titanium metal layer which may be provided in a stacked manner), each of the first metal portions G11Comprises at least one first light-transmitting hole H1At least one first light-transmitting hole H1The orthographic projection on the substrate base 101 is located within the orthographic projection of the channel region a of the phototransistor 104 on the substrate base 101. First light hole H1The presence of the light ensures that the reflected light of the fingerprint can strike the channel region a of the phototransistor 104 to generate an electrical signal.
In some embodiments, in the above display substrate provided by the embodiments of the present disclosure, as shown in fig. 2 and 3, the gate G of the phototransistor 1041May further comprise a first transparent conductive part G12(e.g., first transparent conductive section G12May be Indium Tin Oxide (ITO), etc.), the first transparent conductive part G12Is located in the first metal part G11Between the layer and the substrate 101, a first transparent conductive part G12Orthographic projection on the substrate 101 and the first metal part G11The orthographic projections on the base substrate 101 substantially coincide, that is, the first transparent conductive part G is influenced by the limitation of the process conditions or other factors such as measurement12Orthographic projection on the substrate 101 and the first metal part G11The orthographic projections on the base substrate 101 may coincide or may have some deviation (for example, a deviation of ± 2 μm), and thus the first transparent conductive part G12Orthographic projection on the substrate 101 and the first metal part G11The relationship of "substantial overlap" between orthographic projections on the base substrate 101 falls within the scope of the present disclosure as long as the tolerance is satisfied.
First metal part G11Having a first light hole H1Will be the first metal portion G11When a gate voltage is applied, the channel region A and the first light-transmitting hole H1The corresponding position can not be driven by the grid voltage to influence the channelZone a is responsive to light reflected from the fingerprint. By passing through the first metal part G11A first transparent conductive part G with a similar size is arranged under the lower contact12So that the first transparent conductive part G can be utilized12And a gate voltage is provided for all positions of the channel region A, so that the response sensitivity of the channel region A to the fingerprint reflected light is improved.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 2 to 4, the gate G of the driving transistor 1032Including a second metal portion G21Second metal portion G21And the first metal part G11And the same layer is arranged, so that the mask process is saved, the number of films is reduced, the production cost is reduced, and the productivity is improved.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 2, the gate G of the driving transistor 1032May further comprise a second transparent conductive part G22Second transparent conductive part G22And a first transparent conductive part G12And the same layer is arranged, so that the mask process is saved, the number of films is reduced, the production cost is reduced, and the productivity is improved.
In some embodiments, in the above display substrate provided in the embodiments of the present disclosure, as shown in fig. 5 to 9, each of the first metal parts G11The method can comprise the following steps: a first light hole H1Two first light-transmitting holes H arranged along the row direction X1Two first light-transmitting holes H arranged in the column direction Y1Four first light holes H arranged in array1Or four first light holes H arranged in a diamond shape1(e.g., four first light-transmitting holes H)1Enclosing a diamond). Alternatively, the row direction X may be a length (L) direction of the channel region a, and the column direction Y may be a width (W) direction of the channel region a. Note that, in the present disclosure, the first light-transmitting hole H1At each first metal part G11The number, arrangement manner, arrangement position, and the like of the arrangement are not limited to the embodiments shown in fig. 5 to 9. In addition, the first light hole H1Can be all round holes, all square holes, or partial round holes and the rest square holesEtc., and are not particularly limited herein. Via H in fig. 5 to 9 for implementing the active layer P of the phototransistor 1041And source/drain S1/D1To be electrically connected.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 2 to 4, at least one light shielding layer 105 may be further included, and all the light shielding layers 105 are located in the active layer P of the phototransistor 1041The side away from the base substrate 101; each light-shielding layer 105 includes a plurality of second light-transmitting holes H2Second light hole H2And the first light hole H1One-to-one correspondence and second light hole H2Orthographic projection on the substrate base plate 101 and corresponding first light-transmitting hole H1Orthographic projections on the substrate base plate 101 are overlapped with each other so that the first light transmission holes H arranged correspondingly1And a second light-transmitting hole H2A collimation structure is formed to realize the collection of light rays with small angles (for example, 10 degrees to 10 degrees), the interference of stray light with large angles is avoided, and the accuracy of fingerprint identification is improved. In specific implementation, the first light hole H1Can be smaller than or equal to the second light-transmitting hole H2The pore diameter of (a).
In some embodiments, as shown in fig. 10, in the above display substrate provided in the embodiments of the present disclosure, a black matrix 106 may be further included, where the black matrix 106 is located on a side of the layer where the plurality of light emitting devices 102 are located, the side being away from the base substrate 101, and an orthogonal projection of the black matrix 106 on the base substrate 101 is located in an orthogonal projection of a gap of each light emitting device 102 on the base substrate 101, that is, the black matrix 103 has an opening K at a position corresponding to each light emitting device 102. The opening K may be filled with a color resistor 107, so that the emitted light of each light emitting device 102 is selectively emitted through the color resistor 107, thereby improving color purity and reducing reflection of external environment light.
In some embodiments, as shown in fig. 2 to 4, 10 and 11, the light shielding layer 105 provided by the present disclosure may be connected with the black matrix 106, the anode 1021 of the light emitting device 102, and the source/drain S of the phototransistor 1041/D1At least one of the layers shares the film layer to save the mask process, reduce the number of film layers, reduce the production cost and improve the yieldCan be used. Specifically, the disclosure has been described by taking the light-shielding layer 105 as an example, for example, fig. 2 to 4 show that the light-shielding layer 105 and the anode 1021 share the same conductive film layer, and the light-shielding layer 105 is disconnected from the adjacent anode 1021 to avoid signal crosstalk on different anodes 1021; as shown in fig. 10 again that the light-shielding layer 105 and the black matrix 106 share the same black resin layer, since no electric signal is applied to the black matrix 106, the black matrix 106 and the light-shielding layer 105 can be multiplexed; further, as shown in FIG. 11, the light-shielding layer 105 and the source/drain S of the phototransistor 104 are1/D1The same conductive film layer is shared, and the light shielding layer 105 and the source/drain S1/D1Off setting to avoid source/drain S1/D1Signal crosstalk of (2).
It should be understood that there is also an OLED panel in the related art that does not use the color resistors 107 and the black matrix 106 for reducing reflection of the external ambient light, but uses a circular polarizer for reducing reflection, in which case the light shielding layer 105 may be connected to the anode 1021 of the light emitting device 102 and the source/drain S of the phototransistor 1041/D1At least one of which shares the membrane layer.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, the photosensitive transistor 104 and the driving transistor 103 may be both low temperature polysilicon transistors, that is, the active layers of both transistors are low temperature polysilicon (Poly-Si). The low-temperature polycrystalline silicon transistor has high mobility, low power consumption and high reliability, and is favorable for improving the image display quality and the fingerprint imaging quality.
In some embodiments, in the display substrate provided in the embodiments of the present disclosure, as shown in fig. 2 to 4, 10, and 11, the display substrate may further include: a first buffer layer 108, a first gate insulating layer 109, a second gate insulating layer 110, a gate metal layer 111, an interlayer dielectric layer 112, a first flat layer 113, a pixel defining layer 114, a support layer 115, an encapsulation layer 116, a second buffer layer 117, a second flat layer 118, a protective cover 119, a read transistor 120, and the like; wherein the structure of the read transistor 120 may be the same as that of the drive transistor 103, and the encapsulation layer 116 may include a first inorganic encapsulation layer (CVD1), an organic encapsulation layer (IJP), and a second inorganic encapsulation layer (CVD2) that are stacked. Other essential components of the display substrate should be understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present disclosure.
Based on the same inventive concept, the embodiment of the present disclosure provides a manufacturing method of the display substrate, and since a principle of the manufacturing method for solving the problem is similar to a principle of the manufacturing method for solving the problem, implementation of the manufacturing method provided by the embodiment of the present disclosure may refer to implementation of the display substrate provided by the embodiment of the present disclosure, and repeated details are not repeated.
Specifically, the method for manufacturing the display substrate provided by the embodiment of the present disclosure, as shown in fig. 12, may include the following steps:
s1201, providing a substrate base plate;
s1202, forming a plurality of driving transistors on a substrate, and simultaneously forming a plurality of photosensitive transistors at least partial gaps of the driving transistors, wherein the photosensitive transistors are used for collecting reflected light of grains;
and S1203, forming a plurality of light emitting devices on the layer where the plurality of driving transistors are located, wherein the plurality of light emitting devices are electrically connected with the plurality of driving transistors.
In some embodiments, in the manufacturing method provided by the embodiments of the present disclosure, in the step S1202, forming a plurality of driving transistors on the substrate, and simultaneously forming a plurality of photo transistors at least in a partial gap of each driving transistor, may specifically be implemented in the following two ways:
the first implementation mode comprises the following steps:
the first step is as follows: a plurality of first low temperature polysilicon active layers (i.e., P) are formed on the substrate base plate 1011) And a plurality of second low temperature polysilicon active layers P2Wherein each first low temperature polysilicon active layer (i.e. P)1) At each second low temperature polysilicon active layer P2At least a portion of the gap.
The second step is that: in the multiple first low temperature polysilicon active layers (i.e. P)1) And a plurality of secondLow temperature polysilicon active layer P2And sequentially forming a transparent conductive layer and a metal layer.
The third step: etching the metal layer and the transparent conductive layer to form first low temperature polysilicon active layers (i.e. P)1) Upper first transparent conductive part G12And a first metal part G11And second low temperature polysilicon active layers P2Second transparent conductive part G on the upper part22And a second metal part G21. In some embodiments, the metal layer may be etched by a dry etching method, and then the transparent conductive layer may be etched by a wet etching method.
The fourth step: at each first metal part G11Respectively formed with a first metal part G penetrating through11At least one first light-transmitting hole H1The metal portions of the other transistors (e.g., drive transistor 103 and read transistor 120) are not etched through vias.
The fifth step: in each first metal portion G11A plurality of first source/drain electrodes (i.e., S) are formed on the layer1/D1) Simultaneously in each second metal portion G21A plurality of second source/drain electrodes S are formed on the layer2/D2First source/drain (i.e., S)1/D1) And the first low temperature polysilicon active layer (i.e. P)1) One-to-one corresponding electrical connection, second source/drain S2/D2And a second low temperature polysilicon active layer P2Electrically connected in a one-to-one correspondence; wherein the first low temperature polysilicon active layer (i.e. P)1) And a first transparent conductive part G laminated12And a first metal part G11And a first source/drain (i.e., S)1/D1) A second low temperature polysilicon active layer P constituting the phototransistor 1042And a second transparent conductive part G laminated22And a second metal part G21And a second source/drain S2/D2 The driving transistor 103 is constituted. Specifically, the first source/drain (i.e., S)1/D1) And the first low temperature polysilicon active layer (i.e. P)1) The electrical connection is made through the via hole H in fig. 5 to 9, which penetrates the first gate insulating layer 109, the second gate insulating layer 110, and the interlayer dielectric layer 112. Likewise, a second source/drain S2/D2And a second low temperature polysilicon active layer P2And is also electrically connected through a via hole penetrating the first gate insulating layer 109, the second gate insulating layer 110, and the interlayer dielectric layer 112.
As can be seen from the above, the gate G of the driving transistor 103 is completed by one mask process compared to the prior art2The first light hole H is additionally manufactured1The mask process of (2); however, compared with the method that five mask processes are required to be added for manufacturing the photosensitive device, the four mask processes are reduced.
The second implementation comprises the following steps:
the first step is as follows: a plurality of first low temperature polysilicon active layers (i.e., P) are formed on the substrate base plate 1011) And a plurality of second low temperature polysilicon active layers P2Wherein each first low temperature polysilicon active layer (i.e. P)1) At each second low temperature polysilicon active layer P2At least a portion of the gap.
The second step is that: in the multiple first low temperature polysilicon active layers (i.e. P)1) And a plurality of second low temperature polysilicon active layers P2Forming a transparent conductive layer thereon, and etching the transparent conductive layer to form first low temperature polysilicon active layers (i.e. P)1) Upper first transparent conductive part G12。
The third step: in the first transparent conductive part G12Forming a metal layer on the first transparent conductive part G, and etching the metal layer to form a first transparent conductive part G12Upper first metal part G11And second low temperature polysilicon active layers P2Upper second metal part G21(ii) a Wherein each first metal part G11Comprises at least one first light-transmitting hole H1。
The fourth step: forming a plurality of first source/drain electrodes (i.e., S) on the layer where the first metal portions G11 are located1/D1) Simultaneously in each second metal portion G21A plurality of second source/drain electrodes S are formed on the layer2/D2First source/drain (i.e., S)1/D1) And the first low temperature polysilicon active layer (i.e. P)1) One for one corresponding to electricityConnected to the second source/drain S2/D2And a second low temperature polysilicon active layer P2Electrically connected in a one-to-one correspondence; wherein the first low temperature polysilicon active layer (i.e. P)1) And a first transparent conductive part G laminated12And a first metal part G11And a first source/drain (i.e., S)1/D1) A second low temperature polysilicon active layer P constituting the phototransistor 1042A second metal portion G21And a second source/drain S2/D2 The driving transistor 103 is constituted. Specifically, the first source/drain (i.e., S)1/D1) And the first low temperature polysilicon active layer (i.e. P)1) The electrical connection is made through the via hole H in fig. 5 to 9, which penetrates the first gate insulating layer 109, the second gate insulating layer 110, and the interlayer dielectric layer 112. Likewise, a second source/drain S2/D2And a second low temperature polysilicon active layer P2And is also electrically connected through a via hole penetrating the first gate insulating layer 109, the second gate insulating layer 110, and the interlayer dielectric layer 112.
As can be seen from the above, the gate G of the driving transistor 103 is completed by one mask process compared to the prior art2The first transparent conductive part G is additionally manufactured12The mask process and a process for manufacturing the first light hole H1The mask process of (2); however, compared with the five mask processes required for manufacturing the photosensitive device, the three mask processes are reduced.
It should be noted that, the fabrication of the light emitting device 102 and other film layers in the embodiments of the present disclosure is the same as that in the related art, and is not described herein again.
In addition, in the manufacturing method provided by the embodiment of the present disclosure, the patterning process related to forming each layer structure may include not only partial or all processes of deposition, photoresist coating, masking with a mask, exposure, development, etching, and photoresist stripping, but also other processes, and is not limited herein, specifically, based on a pattern to be patterned formed in an actual manufacturing process. For example, a post-bake process may also be included after development and before etching.
The deposition process may be a chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, or a physical vapor deposition method, which is not limited herein; the Mask used in the Mask process may be a Half-Tone Mask (Half Tone Mask), a Single Slit diffraction Mask (Single Slit Mask) or a Gray Tone Mask (Gray Tone Mask), which is not limited herein; the etching may be dry etching or wet etching, and is not limited herein.
Based on the same inventive concept, the present disclosure further provides a display device, which includes the display substrate provided in the embodiment of the present disclosure, and the display substrate may be an OLED display substrate. Since the principle of the display device to solve the problem is similar to that of the display substrate, the display device can be implemented according to the embodiment of the display substrate, and repeated descriptions are omitted. Other essential components of the display substrate should be understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present disclosure.
In some embodiments, the display device provided in the embodiments of the present disclosure may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, an intelligent watch, a fitness wrist strap, and a personal digital assistant. The display device provided by the embodiment of the present disclosure may further include but is not limited to: radio frequency unit, network module, audio output unit, input unit, sensor, display unit, user input unit, interface unit, memory, processor, and power supply. It will be appreciated by those skilled in the art that the above described composition of the display device does not constitute a limitation of the display device, which may comprise more or less of the components described above, or a combination of certain components, or a different arrangement of components.
It will be apparent to those skilled in the art that, although preferred embodiments of the present disclosure have been described, various modifications and variations can be made in the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the disclosure. Thus, if such modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is also intended to encompass such modifications and variations.
Claims (13)
1. A display substrate, comprising:
a substrate base plate;
a plurality of light emitting devices arranged in an array on the substrate base plate;
the driving transistors are positioned between the layer where the light-emitting devices are positioned and the substrate base plate, and are electrically connected with the light-emitting devices;
the photosensitive transistors are arranged on the same layer with the driving transistors, are positioned in at least partial gaps of the driving transistors and are used for collecting reflected light of grains.
2. A display substrate according to claim 1, wherein the active layer of the phototransistor is located between the layer at which the gate of the phototransistor is located and the substrate base plate;
the gate of the phototransistor includes first metal portions, each of the first metal portions includes at least one first light-transmitting hole, and an orthographic projection of the at least one first light-transmitting hole on the substrate base plate is located within an orthographic projection of the channel region of the phototransistor on the substrate base plate.
3. The display substrate of claim 2, wherein the gate of the phototransistor further comprises a first transparent conductive portion between the layer of the first metal portion and the substrate, wherein an orthographic projection of the first transparent conductive portion on the substrate substantially coincides with an orthographic projection of the first metal portion on the substrate.
4. The display substrate of claim 3, wherein the gate of the driving transistor comprises a second metal portion disposed on a same layer as the first metal portion.
5. The display substrate of claim 4, wherein the gate of the driving transistor further comprises a second transparent conductive portion disposed on a same layer as the first transparent conductive portion.
6. The display substrate according to any one of claims 2 to 5, wherein each of the first metal parts comprises: one first light hole, two of arranging along the line direction first light hole, two of arranging along the column direction first light hole is four of array arrangement first light hole, perhaps, is four first light hole of rhombus arrangement.
7. The display substrate according to any one of claims 2 to 5, further comprising at least one light-shielding layer on a side of the active layer of the phototransistor away from the substrate;
each light shielding layer comprises a plurality of second light holes, the second light holes correspond to the first light holes one to one, and orthographic projections of the second light holes on the substrate are mutually overlapped with orthographic projections of the first light holes on the substrate.
8. The display substrate of claim 7, further comprising a black matrix, wherein the black matrix is located on a side of the layer where the plurality of light emitting devices are located, the side being away from the substrate, and an orthogonal projection of the black matrix on the substrate is located in an orthogonal projection of a gap of each of the light emitting devices on the substrate;
the at least one light shielding layer shares a film layer with at least one of the black matrix, an anode of the light emitting device, and a source/drain of the phototransistor.
9. A display substrate according to any one of claims 1 to 5, wherein the phototransistor and the drive transistor are both low temperature polysilicon transistors.
10. A display device comprising the display substrate according to any one of claims 1 to 9.
11. A method for manufacturing a display substrate according to any one of claims 1 to 9, comprising:
providing a substrate base plate;
forming a plurality of driving transistors on the substrate base plate, and simultaneously forming a plurality of photosensitive transistors at least partial gaps of the driving transistors, wherein the photosensitive transistors are used for collecting reflected light of grains;
and forming a plurality of light emitting devices on the layer where the plurality of driving transistors are located, wherein the plurality of light emitting devices are electrically connected with the plurality of driving transistors.
12. The method of claim 11, wherein forming a plurality of driving transistors on the substrate base plate while forming a plurality of photo transistors at least partially in the gaps of each of the driving transistors comprises:
forming a plurality of first low-temperature polycrystalline silicon active layers and a plurality of second low-temperature polycrystalline silicon active layers on the substrate, wherein each first low-temperature polycrystalline silicon active layer is positioned at least part of a gap of each second low-temperature polycrystalline silicon active layer;
sequentially forming a transparent conductive layer and a metal layer on the plurality of first low temperature polysilicon active layers and the plurality of second low temperature polysilicon active layers;
etching the metal layer and the transparent conductive layer to form a first transparent conductive part and a first metal part which are positioned above each first low-temperature polycrystalline silicon active layer, and a second transparent conductive part and a second metal part which are positioned above each second low-temperature polycrystalline silicon active layer;
forming at least one first light-transmitting hole penetrating through the first metal part in each first metal part;
forming a plurality of first source/drain electrodes on the layer where the first metal parts are located, and simultaneously forming a plurality of second source/drain electrodes on the layer where the second metal parts are located, wherein the first source/drain electrodes are electrically connected with the first low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner, and the second source/drain electrodes are electrically connected with the second low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner; wherein,
the first low-temperature polycrystalline silicon active layer, the first transparent conductive part and the first metal part which are stacked, and the first source/drain constitute a phototransistor, and the second low-temperature polycrystalline silicon active layer, the second transparent conductive part and the second metal part which are stacked, and the second source/drain constitute a driving transistor.
13. The method of claim 11, wherein forming a plurality of driving transistors on the substrate base plate while forming a plurality of photo transistors at least partially in the gaps of each of the driving transistors comprises:
forming a plurality of first low-temperature polycrystalline silicon active layers and a plurality of second low-temperature polycrystalline silicon active layers on the substrate, wherein each first low-temperature polycrystalline silicon active layer is positioned at least part of a gap of each second low-temperature polycrystalline silicon active layer;
forming a transparent conductive layer on the plurality of first low-temperature polysilicon active layers and the plurality of second low-temperature polysilicon active layers, and etching the transparent conductive layer to form a first transparent conductive part positioned above each first low-temperature polysilicon active layer;
forming a metal layer on the layer where the first transparent conductive parts are located, and etching the metal layer to form first metal parts located above the first transparent conductive parts and second metal parts located above the second low-temperature polycrystalline silicon active layers; wherein each of the first metal parts includes at least one first light-transmitting hole;
forming a plurality of first source/drain electrodes on the layer where the first metal parts are located, and simultaneously forming a plurality of second source/drain electrodes on the layer where the second metal parts are located, wherein the first source/drain electrodes are electrically connected with the first low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner, and the second source/drain electrodes are electrically connected with the second low-temperature polycrystalline silicon active layer in a one-to-one correspondence manner; wherein,
the first low-temperature polysilicon active layer, the first transparent conductive part and the first metal part which are stacked, and the first source/drain constitute a phototransistor, and the second low-temperature polysilicon active layer, the second metal part, and the second source/drain constitute a driving transistor.
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| CN115050785A (en) * | 2022-06-08 | 2022-09-13 | 武汉华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
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