CN114077167B - Exposure method for improving overlay precision deterioration caused by wafer deformation - Google Patents

Exposure method for improving overlay precision deterioration caused by wafer deformation Download PDF

Info

Publication number
CN114077167B
CN114077167B CN202111417575.XA CN202111417575A CN114077167B CN 114077167 B CN114077167 B CN 114077167B CN 202111417575 A CN202111417575 A CN 202111417575A CN 114077167 B CN114077167 B CN 114077167B
Authority
CN
China
Prior art keywords
overlay accuracy
wafer
different
order correction
warp value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202111417575.XA
Other languages
Chinese (zh)
Other versions
CN114077167A (en
Inventor
王建涛
郭晓波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Original Assignee
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huali Integrated Circuit Manufacturing Co Ltd filed Critical Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority to CN202111417575.XA priority Critical patent/CN114077167B/en
Publication of CN114077167A publication Critical patent/CN114077167A/en
Application granted granted Critical
Publication of CN114077167B publication Critical patent/CN114077167B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70633Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

The invention provides an exposure method for improving overlay accuracy deterioration caused by wafer deformation, which is used for exposing standard wafers with different warp values, measuring and obtaining overlay accuracy on the whole standard wafer, analyzing and fitting the overlay accuracy, and generating different overlay accuracy high-order correction subroutines; establishing the relation between the warp value and the overlay accuracy high-order correction subprogram; inputting the relation between the warp value and the overlay accuracy high-order correction subroutine into a production system; measuring the warp value of the wafer before exposure, and sending the measured warp value into a production system; calling an overlay accuracy high-order correction subroutine matched with the measured warp value through the relation between the warp value and the overlay accuracy high-order correction subroutine in the production system; and exposing the wafer by using the called overlay accuracy high-order correction subprogram matched with the measured warp value, measuring the overlay accuracy of the wafer, fitting the corresponding relation between the overlay accuracy and the warp value according to the measurement result, and feeding back to the production system.

Description

Exposure method for improving overlay precision deterioration caused by wafer deformation
Technical Field
The invention relates to the technical field of semiconductors, in particular to an exposure method for improving overlay accuracy deterioration caused by wafer deformation.
Background
With the advancement of technology nodes, the line width is reduced, the photoetching process window of a product is also greatly reduced, meanwhile, as the design rule is more challenging, the requirement on the alignment precision (OVL) is also higher and higher, the quality of the OVL directly influences the performance of a device and the yield of the product, so that the improvement of the OVL is one of main challenges facing photoetching all the time, and especially the requirement of high-end manufacturing process on the OVL is more severe, even the minimum requirement of the OVL is 2.5nm, and the OVL limit of a photoetching machine is challenged.
For products of different processes, especially special processes, the wafers are deformed due to the special processes, the common deformation has warpage, the warpage is often caused by gradually thickening deposited films or after high-temperature treatment, and after the warped wafers are adsorbed on a wafer carrying platform, the post-exposure OVL is abnormal due to the post-adsorption stress, and the abnormality is common in KRF and Iline machines. The treatment of such anomalies is often to reduce wafer warpage by adjusting the stress of the deposited film, so as to achieve the effect of improving OVL, but the improvement effect is often limited. Photolithography can also improve such OVL, often through OVL high order correction or use high order alignment to improve in the stage of wafer alignment, but these two kinds of methods are strong to the product design dependence, and different levels of different products need to compensate alone, and are time-consuming and laborious, and more complicated, unfavorable for operation. The method is completely not influenced by product design, can realize full coverage of all products on a specific machine without carrying out OVL correction on a single product, continuously perfects a database through continuous feedback of data, can cover more and more product warpage (warp) conditions, and greatly increases OVL compensation accuracy. The productivity is greatly improved, the OVL condition of the product is greatly improved, and the yield of the product is further improved.
Disclosure of Invention
In view of the above-described drawbacks of the prior art, an object of the present invention is to provide an exposure method for improving overlay accuracy deterioration due to wafer deformation, which is used to solve the problem of overlay accuracy deviation caused by wafer warpage in the prior art.
To achieve the above and other objects, the present invention provides an exposure method for improving overlay accuracy degradation due to wafer deformation, the method at least comprising the steps of:
step one, preparing standard wafers with different warpage values;
step two, exposing by using the standard wafers with different warpage values, and measuring and obtaining the overlay accuracy of the whole standard wafer;
step three, analyzing and fitting the obtained alignment precision to generate different alignment precision high-order correction subroutines;
establishing the relation between the warp value and the overlay accuracy high-order correction subprogram to determine the overlay accuracy high-order correction subprogram which can be called by different warp values and wafer exposure; then inputting the relation between the warp value and the overlay accuracy high-order correction subroutine into a production system;
measuring the warp value of the wafer before exposure, and sending the measured warp value into a production system;
step six, calling an overlay accuracy high-order correction subroutine matched with the measured warp value according to the relation between the warp value and the overlay accuracy high-order correction subroutine in the production system;
and step seven, exposing the wafer by using the called overlay accuracy high-order correction subprogram matched with the measured warp value, measuring the overlay accuracy of the wafer, fitting out the corresponding relation between the overlay accuracy and the warp value according to the measurement result, and feeding back to the production system.
Preferably, the different warp values in step one are obtained by depositing films with different stresses on the standard wafer.
Preferably, the different warp values in step one are obtained by subjecting the standard wafer to different heat treatments.
Preferably, the different OVL high order correction subroutines in step three are used to compensate OVL textures generated on the wafer carrier by wafers with different warp values.
Preferably, in the third step, the different OVL subroutines include information of OVL textures of the wafer carrier and wafers with different warp values, and the OVL high-order correction subroutines are used for transmitting to the exposure machine.
Preferably, the different warp values prepared in step one are within an acceptable range of the lithographic apparatus, which range is between-250 and 250.
Preferably, the method for fitting the obtained overlay accuracy in the third step is third-order correction or more and less than the capability range of the photolithography machine.
Preferably, the high-order correction subroutine with different overlay accuracy generated in the third step corrects according to the wear degree of the wafer carrying platform.
Preferably, in the third step, the number of measurement points of the overlay accuracy performed by the high-order overlay accuracy correction subroutine is greater than or equal to 1000 points.
As described above, the exposure method of the present invention for improving the overlay accuracy deterioration due to wafer deformation has the following advantageous effects: the method can establish the subprogram of the overlay accuracy texture of the pre-compensated wafer warp value on the specific wafer bearing platform after the equipment is installed, can directly eliminate the influence on the overlay accuracy caused by the wafer deformation through the overlay accuracy high-order correction subprogram, is completely not influenced by product design, can realize the full coverage of all products on the specific machine, does not need to correct the overlay accuracy of single products, continuously perfects a database through continuous feedback of data, can cover more and more product warp value conditions, and greatly increases the overlay accuracy compensation accuracy. The productivity is greatly improved, and meanwhile, the alignment precision condition of the product is greatly improved, so that the yield of the product is improved.
Drawings
FIG. 1 is a flow chart showing an exposure method for improving overlay accuracy degradation due to wafer variation in accordance with the present invention;
FIG. 2 is a schematic view of a wafer warpage profile in accordance with the present invention;
FIG. 3 is a schematic view of another wafer warpage profile in accordance with the present invention;
fig. 4 is a schematic diagram showing different overlay accuracy correction amounts for wafers with different warpage in the present invention.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 1 to 4. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
The present invention provides an exposure method for improving overlay accuracy degradation caused by wafer deformation, as shown in fig. 1, fig. 1 shows a flow chart of the exposure method for improving overlay accuracy degradation caused by wafer deformation. The method at least comprises the following steps:
step one, preparing standard wafers with different warpage values; as shown in fig. 2 and 3, fig. 2 is a schematic view of a wafer warpage shape in the present invention; FIG. 3 is a schematic view of another wafer warpage profile in accordance with the present invention. The wafer warp shape shown in fig. 2 and 3 is a cross-sectional view of the wafer.
Further, the different warpage values in step one of the present embodiment are obtained by depositing films with different stresses on the standard wafer.
In this embodiment, the different warpage values in the first step may also be obtained by performing different heat treatments on the standard wafer.
Further, the different warpage values prepared in step one of the present embodiment are within an acceptable range of the photolithography tool, which is in the range of-250 to 250.
Step two, exposing by using the standard wafers with different warpage values, and measuring and obtaining the overlay accuracy of the whole standard wafer;
step three, analyzing and fitting the obtained alignment precision to generate different alignment precision high-order correction subroutines;
in the third step of the present embodiment, the OVL high-order correction subroutine is used to compensate OVL textures generated on the wafer carrier by wafers with different warpage values.
In the third step of the present embodiment, the OVL high-order correction subroutine includes information of OVL textures of the wafer carrier and wafers with different warpage values, and the OVL high-order correction subroutine is used for transmitting the OVL high-order correction subroutine to the exposure machine.
In the third step of the present embodiment, the method for fitting the obtained overlay accuracy is third-order correction or greater than third-order correction and smaller than the capability range of the photolithography machine.
In the third embodiment, the high-order correction sub-program with different overlay accuracy is generated according to the abrasion degree of the wafer carrying platform.
In the third step of the present embodiment, the number of measurement points of the overlay accuracy performed by the high-order overlay accuracy correction subroutine is greater than or equal to 1000 points.
Establishing the relation between the warp value and the overlay accuracy high-order correction subprogram to determine the overlay accuracy high-order correction subprogram which can be called by different warp values and wafer exposure; then inputting the relation between the warp value and the overlay accuracy high-order correction subroutine into a production system;
measuring the warp value of the wafer before exposure, and sending the measured warp value into a production system;
step six, calling an overlay accuracy high-order correction subroutine matched with the measured warp value according to the relation between the warp value and the overlay accuracy high-order correction subroutine in the production system;
and step seven, exposing the wafer by using the called overlay accuracy high-order correction subprogram matched with the measured warp value, measuring the overlay accuracy of the wafer, fitting out the corresponding relation between the overlay accuracy and the warp value according to the measurement result, and feeding back to the production system.
Fig. 4 is a schematic diagram showing different overlay accuracy correction amounts for wafers with different warpage in the present invention. Wherein the left graph has small correction and the right graph has large correction.
The layer with poor warping value is easy to appear on the I-line machine, and the 248nm deep ultraviolet KRF machine is also applicable. The above method is used for the layers with poor warpage, and the warp value measurement is needed before the photoetching station.
The production system automatically assigns the correct exposure files to the exposure wafer according to a one-to-one correspondence, but the system may also support assigning the exposure files manually.
The overlay accuracy high-order correction subroutine generated by the method is only related to the warp value condition of the wafer, is irrelevant to the product design, and is not influenced by any product design. Wafers with the same warp values for different products can be called the same exposure program.
The overlay accuracy high-order correction subroutine (OVL subeipe) changes with the abrasion of the wafer carrier, and the OVL subeipe needs to be updated periodically to obtain a better overlay accuracy condition.
The standard wafer manufactured according to the first machine can be used as a standard wafer of other machines, so that matching among different machines is realized.
The warp condition is called in one-to-one correspondence with the OVL compare, and may also include different shapes (maps) of the wafer, which are commonly bowl-shaped and umbrella-shaped. After each exposure, the measured OVL is fitted and then is connected with the waveform and fed back to the APC system.
In summary, the method of the invention can establish a high-order correction subprogram for pre-compensating the wafer warpage value and overlaying the precision texture on the specific wafer bearing platform after the equipment loading is completed, and can directly eliminate the influence on the overlay precision caused by the wafer deformation through the high-order correction subprogram of the overlay precision. The productivity is greatly improved, and meanwhile, the alignment precision condition of the product is greatly improved, so that the yield of the product is improved. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (9)

1. An exposure method for improving overlay accuracy degradation caused by wafer deformation, the method comprising at least the steps of:
step one, preparing standard wafers with different warpage values;
step two, exposing by using the standard wafers with different warpage values, and measuring and obtaining the overlay accuracy of the whole standard wafer;
step three, analyzing and fitting the obtained alignment precision to generate different alignment precision high-order correction subroutines;
establishing the relation between the warp value and the overlay accuracy high-order correction subprogram to determine the overlay accuracy high-order correction subprogram which can be called by different warp values and wafer exposure; then inputting the relation between the warp value and the overlay accuracy high-order correction subroutine into a production system;
measuring the warp value of the wafer before exposure, and sending the measured warp value into a production system;
step six, calling an overlay accuracy high-order correction subroutine matched with the measured warp value according to the relation between the warp value and the overlay accuracy high-order correction subroutine in the production system;
and step seven, exposing the wafer by using the called overlay accuracy high-order correction subprogram matched with the measured warp value, measuring the overlay accuracy of the wafer, fitting out the corresponding relation between the overlay accuracy and the warp value according to the measurement result, and feeding back to the production system.
2. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 1, characterized in that: the different warp values in step one are obtained by depositing films with different stresses on the standard wafer.
3. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 1, characterized in that: the different warp values in the first step are obtained by performing different heat treatments on the standard wafer.
4. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 1, characterized in that: and step three, the different OVL high-order correction subroutines are used for compensating the OVL textures generated on the wafer carrying platform by wafers with different warpage values.
5. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 1, characterized in that: and step three, the different OVL high-order correction subroutines comprise information of the wafer carrying platform and the OVL textures of the wafers with different warpage values, and are used for being transmitted to an exposure machine.
6. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 1, characterized in that: the different warping values prepared in the first step are within the acceptable range of the photoetching machine, and the range is-250.
7. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 4, characterized in that: and step three, the fitting method of the obtained overlay accuracy is third-order correction or more than third-order correction and less than the capacity range of the photoetching machine.
8. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 7, characterized in that: and thirdly, performing correction according to the abrasion degree of the wafer carrying platform by using the high-order correction subprogram with different alignment precision generated in the step three.
9. The exposure method for improving overlay accuracy deterioration due to wafer deformation according to claim 7, characterized in that: in the third step, the number of measurement points of overlay accuracy performed by the high-order overlay accuracy correction subroutine is greater than or equal to 1000 points.
CN202111417575.XA 2021-11-26 2021-11-26 Exposure method for improving overlay precision deterioration caused by wafer deformation Active CN114077167B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111417575.XA CN114077167B (en) 2021-11-26 2021-11-26 Exposure method for improving overlay precision deterioration caused by wafer deformation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111417575.XA CN114077167B (en) 2021-11-26 2021-11-26 Exposure method for improving overlay precision deterioration caused by wafer deformation

Publications (2)

Publication Number Publication Date
CN114077167A CN114077167A (en) 2022-02-22
CN114077167B true CN114077167B (en) 2024-03-08

Family

ID=80284166

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111417575.XA Active CN114077167B (en) 2021-11-26 2021-11-26 Exposure method for improving overlay precision deterioration caused by wafer deformation

Country Status (1)

Country Link
CN (1) CN114077167B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115356898A (en) * 2022-08-25 2022-11-18 上海华力集成电路制造有限公司 Method for improving photoetching alignment precision

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1400859A2 (en) * 2002-09-20 2004-03-24 ASML Netherlands B.V. Alignment system and methods for lithographic systems using at least two wavelengths
CN105842996A (en) * 2016-05-30 2016-08-10 上海华力微电子有限公司 Wafer bearing absorption pressure optimization method of mask aligner
CN106255923A (en) * 2014-05-01 2016-12-21 信越半导体株式会社 The dressing method of the wafer of the evaluation methodology of the bending of wafer and this evaluation methodology of use
CN109709774A (en) * 2019-03-08 2019-05-03 上海华力微电子有限公司 A method of for improving silicon warp degree and improving alignment precision
CN113906345A (en) * 2019-05-03 2022-01-07 Asml荷兰有限公司 Method for determining alignment model based on tilt fitting technique

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW511146B (en) * 2000-05-31 2002-11-21 Nikon Corp Evaluation method, position detection method, exposure method and device manufacturing method, and exposure apparatus
NL2009719A (en) * 2011-12-02 2013-06-05 Asml Netherlands Bv Alignment mark deformation estimating method, substrate position predicting method, alignment system and lithographic apparatus.
US10401279B2 (en) * 2013-10-29 2019-09-03 Kla-Tencor Corporation Process-induced distortion prediction and feedforward and feedback correction of overlay errors

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1400859A2 (en) * 2002-09-20 2004-03-24 ASML Netherlands B.V. Alignment system and methods for lithographic systems using at least two wavelengths
CN106255923A (en) * 2014-05-01 2016-12-21 信越半导体株式会社 The dressing method of the wafer of the evaluation methodology of the bending of wafer and this evaluation methodology of use
CN105842996A (en) * 2016-05-30 2016-08-10 上海华力微电子有限公司 Wafer bearing absorption pressure optimization method of mask aligner
CN109709774A (en) * 2019-03-08 2019-05-03 上海华力微电子有限公司 A method of for improving silicon warp degree and improving alignment precision
CN113906345A (en) * 2019-05-03 2022-01-07 Asml荷兰有限公司 Method for determining alignment model based on tilt fitting technique

Also Published As

Publication number Publication date
CN114077167A (en) 2022-02-22

Similar Documents

Publication Publication Date Title
US6304999B1 (en) Method and apparatus for embedded process control framework in tool systems
US6560503B1 (en) Method and apparatus for monitoring controller performance using statistical process control
US6622061B1 (en) Method and apparatus for run-to-run controlling of overlay registration
US7260442B2 (en) Method and system for mask fabrication process control
US6465263B1 (en) Method and apparatus for implementing corrected species by monitoring specific state parameters
US20200050180A1 (en) Methods & apparatus for controlling an industrial process
US6484064B1 (en) Method and apparatus for running metrology standard wafer routes for cross-fab metrology calibration
KR20210149245A (en) Optimizing an apparatus for multi-stage processing of product units
US20210349402A1 (en) Method and apparatus for optimization of lithographic process
CN114077167B (en) Exposure method for improving overlay precision deterioration caused by wafer deformation
US9513565B2 (en) Using wafer geometry to improve scanner correction effectiveness for overlay control
JP2018004393A (en) Substrate defect inspection device, substrate defect inspection-purpose parameter value adjustment method, and recording medium
US20220026810A1 (en) Method for controlling a manufacturing process and associated apparatuses
US11662666B2 (en) Sub-field control of a lithographic process and associated apparatus
US6571371B1 (en) Method and apparatus for using latency time as a run-to-run control parameter
US6577914B1 (en) Method and apparatus for dynamic model building based on machine disturbances for run-to-run control of semiconductor devices
US8239151B2 (en) Method and apparatus for analysis of continuous data using binary parsing
US6912436B1 (en) Prioritizing an application of correction in a multi-input control system
US20220244649A1 (en) Sub-field control of a lithographic process and associated apparatus
EP3767391A1 (en) Sub-field control of a lithographic process and associated apparatus
EP3734366A1 (en) Sub-field control of a lithographic process and associated apparatus
EP4134745A1 (en) A method for modeling measurement data over a substrate area and associated apparatuses
US7797073B1 (en) Controlling processing of semiconductor wafers based upon end of line parameters
US20230393487A1 (en) A method for modeling measurement data over a substrate area and associated apparatuses
US20230123680A1 (en) Correction and compensation method in semiconductor manufacturing process

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant