CN114069794B - BMS balanced battery management circuit based on multiple communication modes - Google Patents
BMS balanced battery management circuit based on multiple communication modes Download PDFInfo
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- CN114069794B CN114069794B CN202111404873.5A CN202111404873A CN114069794B CN 114069794 B CN114069794 B CN 114069794B CN 202111404873 A CN202111404873 A CN 202111404873A CN 114069794 B CN114069794 B CN 114069794B
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- resistor
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- 238000004891 communication Methods 0.000 title claims abstract description 52
- 238000007599 discharging Methods 0.000 claims abstract description 13
- 239000003990 capacitor Substances 0.000 claims description 18
- 101150008604 CAN1 gene Proteins 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 9
- 238000001514 detection method Methods 0.000 description 5
- 239000002131 composite material Substances 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 150000002910 rare earth metals Chemical class 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
- H02J7/0014—Circuits for equalisation of charge between batteries
- H02J7/0016—Circuits for equalisation of charge between batteries using shunting, discharge or bypass circuits
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Secondary Cells (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention relates to the technical field of battery management, in particular to a BMS (battery management system) balanced battery management circuit based on a plurality of communication modes, which comprises a battery self-discharging circuit, a battery cell balancing circuit, an electric quantity indicating module, a 485 communication circuit and a CAN (controller area network) communication circuit, wherein the battery self-discharging circuit is electrically connected with the battery cell balancing circuit; a plurality of communication interfaces are added for the battery through the 485 communication circuit and the CAN communication circuit, communication protocols such as serial ports, CANBUS, RS485, SMBUS and the like are supported, and the application range of the battery is enlarged.
Description
Technical Field
The invention relates to the technical field of battery management, in particular to a BMS (battery management system) balanced battery management circuit based on a multi-communication mode.
Background
The energy shortage is an important problem affecting the economic development of the national economy of China and is also a common concern worldwide. Energy conservation and emission reduction are a long-term strategic guideline for economic and social development of China, and are an urgent task at present. The new energy automobile power battery in China accounts for more than 85% of the world, and the improvement of the power battery pack relationship is significant. Considering the advantages of rich rare earth resources and listed battery output in China, the development of a high-energy fast-charging ultra-universal long-stroke modularized composite power battery pack is imperative.
When the existing electric automobile is charged, the communication interface is single, and the application range is smaller.
Disclosure of Invention
The invention aims to provide a BMS (battery management system) balanced battery management circuit based on a multi-communication mode, and aims to solve the technical problems that in the prior art, when an electric automobile is charged, a communication interface is single and the application range is small.
In order to achieve the above purpose, the invention provides a BMS balanced battery management circuit based on a multi-communication mode, wherein the BMS balanced battery management circuit based on the multi-communication mode comprises a battery self-discharging circuit, a battery cell balancing circuit, an electric quantity indicating module, a 485 communication circuit and a CAN communication circuit, wherein the battery self-discharging circuit is electrically connected with the battery cell balancing circuit, and the battery cell balancing circuit, the 485 communication circuit and the CAN communication circuit are electrically connected with the electric quantity indicating module;
the 485 communication circuit comprises a chip U5, a resistor R30, a resistor R33, a diode D2, a diode D3, a diode D4 and an external connector RS1, one end of the resistor R30 is electrically connected with the 7 pin of the chip U5, the other end of the resistor R30 is grounded, one end of the diode D2 is grounded, the other end of the diode D2 is electrically connected with the 7 pin of the chip U5, the diode D3 and the 2 pin of the external connector RS1 respectively, one end of the resistor R33 is electrically connected with the 6 pin of the chip U5, the other end of the resistor R33 is grounded, one end of the diode D4 is grounded, and the other end of the diode D4 is electrically connected with the 6 pin of the chip U5, the diode D3 and the 3 pin of the external connector RS1 respectively.
The CAN communication circuit comprises a capacitor C18, a capacitor C19, a resistor R32 and an external connector CAN1, wherein the 3 pin of the chip U4 is sequentially connected with the capacitor C19 and one end of the capacitor C18 in an electric mode, the capacitor C19 and the other end of the capacitor C18 are grounded, the 7 pin and the 6 pin of the chip U4 are respectively connected with two ends of the resistor R32 in an electric mode, and the 1 pin and the 2 pin of the external connector CAN1 are respectively connected with two ends of the resistor R32 in an electric mode.
The self-discharging circuit of the battery comprises a resistor R2, a resistor R3, a resistor R6 and a MOS tube Q2, wherein the resistor R2 is connected in parallel with the resistor R3, one end of the resistor R3 is electrically connected with a drain electrode of the MOS tube Q2, a source electrode of the MOS tube Q2 is grounded, and a grid electrode of the MOS tube Q2 is electrically connected with the resistor R6.
Wherein, chip U5 adopts SP485, chip U4 adopts TJA1050T.
The electric quantity indication module adopts an STM32F10338T6 singlechip.
Wherein, the diode D2, the diode D3 and the diode D4 are diacs.
According to the BMS balanced battery management circuit based on the multi-communication mode, when a certain battery cell is boosted, the battery cell is discharged through the battery self-discharging circuit, the battery cell is protected, and the balance of the battery cell is realized through the battery cell balancing circuit, so that circuit elements are protected; the 485 communication circuit and the CAN communication circuit are used for adding various communication interfaces for the battery, so that communication protocols such as serial ports, CANBUS, RS485 and SMBUS are supported, and the application range of the battery is enlarged.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a power indicating module according to the present invention.
Fig. 2 is a schematic circuit diagram of a battery self-discharge circuit provided by the invention.
Fig. 3 is a schematic circuit diagram of the cell equalization circuit provided by the invention.
Fig. 4 is a schematic circuit diagram of a 485 communication circuit provided by the invention.
Fig. 5 is a schematic circuit diagram of a CAN communication circuit provided by the present invention.
Fig. 6 is a schematic circuit diagram of the bit detection circuit provided by the present invention.
Fig. 7 is a schematic circuit diagram of a switching circuit provided by the present invention.
Fig. 8 is a schematic circuit diagram of an external module according to the present invention.
Fig. 9 is an interface diagram of a single chip microcomputer provided by the invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
In the description of the present invention, it should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present invention and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention. Furthermore, in the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Referring to fig. 1 to 9, the invention provides a BMS balancing battery management circuit based on a multi-communication mode, wherein the BMS balancing battery management circuit based on the multi-communication mode comprises a battery self-discharging circuit, a battery cell balancing circuit, an electric quantity indicating module, a 485 communication circuit and a CAN communication circuit, wherein the battery self-discharging circuit is electrically connected with the battery cell balancing circuit, and the battery cell balancing circuit, the 485 communication circuit and the CAN communication circuit are electrically connected with the electric quantity indicating module; the 485 communication circuit comprises a chip U5, a resistor R30, a resistor R33, a diode D2, a diode D3, a diode D4 and an external connector RS1, one end of the resistor R30 is electrically connected with the 7 pin of the chip U5, the other end of the resistor R30 is grounded, one end of the diode D2 is grounded, the other end of the diode D2 is electrically connected with the 7 pin of the chip U5, the diode D3 and the 2 pin of the external connector RS1 respectively, one end of the resistor R33 is electrically connected with the 6 pin of the chip U5, the other end of the resistor R33 is grounded, one end of the diode D4 is grounded, and the other end of the diode D4 is electrically connected with the 6 pin of the chip U5, the diode D3 and the 3 pin of the external connector RS1 respectively; the CAN communication circuit comprises a capacitor C18, a capacitor C19, a resistor R32 and an external connection piece CAN1, wherein a pin 3 of the chip U4 is sequentially and electrically connected with one end of the capacitor C19 and one end of the capacitor C18, the other ends of the capacitor C19 and the capacitor C18 are grounded, a pin 7 and a pin 6 of the chip U4 are respectively and electrically connected with two ends of the resistor R32, and a pin 1 and a pin 2 of the external connection piece CAN1 are respectively and electrically connected with two ends of the resistor R32; the battery self-discharging circuit comprises a resistor R2, a resistor R3, a resistor R6 and a MOS tube Q2, wherein the resistor R2 is connected in parallel with the resistor R3, one end of the resistor R3 is electrically connected with a drain electrode of the MOS tube Q2, a source electrode of the MOS tube Q2 is grounded, and a grid electrode of the MOS tube Q2 is electrically connected with the resistor R6.
In this embodiment, the chip U5 employs SP485, and the chip U4 employs TJA1050T; the electric quantity indication module adopts an STM32F10338T6 singlechip; the diode D2, the diode D3 and the diode D4 are diacs; when a certain cell is boosted, the cell is discharged through the battery self-discharging circuit to protect the cell, and equalization of the cell is realized through the cell equalization circuit, so that a circuit element is protected; the 485 communication circuit and the CAN communication circuit are used for adding various communication interfaces for the battery, so that communication protocols such as serial ports, CANBUS, RS485 and SMBUS are supported, and the application range of the battery is enlarged.
Further, the BMS equalization battery management circuit based on the multiple communication modes further comprises an in-place detection circuit, wherein the in-place detection circuit comprises a resistor R35, a resistor R37, a resistor R38 and a MOS tube Q8, the drain electrode of the MOS tube Q8 is electrically connected with the resistor R35, the source electrode of the MOS tube Q8 is grounded, and the grid electrode of the MOS tube Q8 is electrically connected with the resistor R37.
In this embodiment, after the current value in the bit detection circuit exceeds the preset value, the on-off of the circuit is controlled by the MOS transistor Q8, so as to protect the elements in the circuit.
Further, the BMS balancing battery management circuit based on the multiple communication modes further comprises a switch circuit, the switch circuit comprises a switch KEY1 and a resistor R36, one end of the switch KEY1 is grounded, and the other end of the switch KEY1 is electrically connected with the resistor R36.
In this embodiment, the current value in the in-place detection circuit is used, and after the current value exceeds the preset value, the switch KEY1 is controlled by the singlechip to disconnect the power supply of the singlechip, so as to protect the singlechip.
Further, the BMS balance battery management circuit based on the multiple communication modes further comprises an external module, and the external module is electrically connected with the electric quantity indication module.
In this embodiment, the external module provides the interfaces of UARY1 and IICI, so as to expand the application range.
The above disclosure is only a preferred embodiment of the present invention, and it should be understood that the scope of the invention is not limited thereto, and those skilled in the art will appreciate that all or part of the procedures described above can be performed according to the equivalent changes of the claims, and still fall within the scope of the present invention.
Claims (2)
1. A BMS balanced battery management circuit based on multiple communication modes is characterized in that,
the BMS balanced battery management circuit based on the multiple communication modes comprises a battery self-discharging circuit, a battery core balancing circuit, an electric quantity indicating module, a 485 communication circuit and a CAN communication circuit, wherein the battery self-discharging circuit is electrically connected with the battery core balancing circuit, and the battery core balancing circuit, the 485 communication circuit and the CAN communication circuit are electrically connected with the electric quantity indicating module;
the 485 communication circuit comprises a chip U5, a resistor R30, a resistor R33, a diode D2, a diode D3, a diode D4 and an external connector RS1, wherein one end of the resistor R30 is electrically connected with the 7 pin of the chip U5, the other end of the resistor R30 is grounded, one end of the diode D2 is grounded, the other end of the diode D2 is respectively electrically connected with the 7 pin of the chip U5, the diode D3 and the 2 pin of the external connector RS1, one end of the resistor R33 is electrically connected with the 6 pin of the chip U5, the other end of the resistor R33 is grounded, one end of the diode D4 is grounded, the other end of the diode D4 is respectively electrically connected with the 6 pin of the chip U5, the diode D3 and the 3 pin of the external connector RS1, and the chip U5 adopts SP485;
the CAN communication circuit comprises a chip U4, a capacitor C18, a capacitor C19, a resistor R32 and an external connection piece CAN1, wherein a pin 3 of the chip U4 is sequentially and electrically connected with one end of the capacitor C19 and one end of the capacitor C18, the other ends of the capacitor C19 and the capacitor C18 are grounded, a pin 7 and a pin 6 of the chip U4 are respectively and electrically connected with two ends of the resistor R32, a pin 1 and a pin 2 of the external connection piece CAN1 are respectively and electrically connected with two ends of the resistor R32, and the chip U4 adopts TJA1050T;
the battery self-discharging circuit comprises a resistor R2, a resistor R3, a resistor R6 and a MOS tube Q2, wherein the resistor R2 is connected in parallel with the resistor R3, one end of the resistor R3 is electrically connected with the drain electrode of the MOS tube Q2, the source electrode of the MOS tube Q2 is grounded, and the grid electrode of the MOS tube Q2 is electrically connected with the resistor R6;
the diode D2, the diode D3 and the diode D4 are diacs.
2. The BMS balancing battery management circuit based on a multi-communication mode according to claim 1, wherein,
and the electric quantity indication module adopts an STM32F10338T6 singlechip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111404873.5A CN114069794B (en) | 2021-11-24 | 2021-11-24 | BMS balanced battery management circuit based on multiple communication modes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111404873.5A CN114069794B (en) | 2021-11-24 | 2021-11-24 | BMS balanced battery management circuit based on multiple communication modes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114069794A CN114069794A (en) | 2022-02-18 |
| CN114069794B true CN114069794B (en) | 2024-01-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111404873.5A Active CN114069794B (en) | 2021-11-24 | 2021-11-24 | BMS balanced battery management circuit based on multiple communication modes |
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| Country | Link |
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| CN (1) | CN114069794B (en) |
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| Publication number | Publication date |
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| CN114069794A (en) | 2022-02-18 |
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