CN114064524A - Server, method and device for improving performance of server and medium - Google Patents

Server, method and device for improving performance of server and medium Download PDF

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Publication number
CN114064524A
CN114064524A CN202111386758.XA CN202111386758A CN114064524A CN 114064524 A CN114064524 A CN 114064524A CN 202111386758 A CN202111386758 A CN 202111386758A CN 114064524 A CN114064524 A CN 114064524A
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physical
virtual address
physical address
tlb
address
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王棚辉
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Inspur Power Commercial Systems Co Ltd
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Inspur Power Commercial Systems Co Ltd
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Priority to CN202111386758.XA priority Critical patent/CN114064524A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/109Address translation for multiple virtual address spaces, e.g. segmentation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals

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  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The application discloses a server, a method, a device and a medium for improving the performance of the server, and relates to the technical field of system design. The server includes: CPU, accelerator, memory; the accelerator is connected with the CPU; the memory is connected with the accelerator; and when the CPU determines that the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in the accelerator, the physical address corresponding to the virtual address is determined by the accelerator, and the physical memory is accessed through the physical address. Under the condition that the physical address corresponding to the virtual address is not found through the TLB, the previous server can acquire the physical address only by searching the TLB at least twice, the server realizes the conversion from the virtual address to the physical address through the accelerator, and finally the physical address can be acquired only by searching the TLB once, so that the processing speed of the server is improved, and the performance of the server is improved.

Description

Server, method and device for improving performance of server and medium
Technical Field
The present application relates to the field of system design technologies, and in particular, to a server, a method, an apparatus, and a medium for improving server performance.
Background
In modern systems, virtualization technology is ubiquitous, and virtualization can allow multiple threads to run simultaneously, and share Central Processing Units (CPUs) and Memory resources, where the sharing of Memory resources involves a storage Unit (Cache) for caching data and instructions in a Memory, a page table Cache (TLB), and a Memory Management Unit (MMU).
In the face of the dramatic increase in shared resources, the number of threads that need to be executed increases by orders of magnitude. When a plurality of threads need to search the corresponding relationship between the virtual address and the Physical address at the same time, the corresponding relationship is searched in the TLB, if the corresponding relationship cannot be searched in the TLB, the corresponding relationship is searched in the Cache, if the corresponding relationship cannot be searched in the Cache, the corresponding relationship is searched in a Page Table (PTE) in a Physical Memory (PM), the Page Table is read from the Physical Memory, the TLB is updated, then the virtual address is sent out according to a command of reading and writing data or instructions again, then the Physical address corresponding to the virtual address is searched in the updated TLB, and finally the Physical Memory is accessed according to the Physical address. In the whole process of acquiring the physical address corresponding to the virtual address, the TLB needs to be searched at least twice, so that the processing speed of the system is low, and the performance of the system is greatly reduced.
Therefore, how to improve the performance of the system is an urgent problem to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a server, a method, a device and a medium for improving the performance of the server, which are used for improving the performance of the server.
In order to solve the above technical problem, the present application provides a server, including: CPU, accelerator, memory;
the accelerator is connected with the CPU;
the memory is connected with the accelerator;
the CPU is used for judging whether the physical address corresponding to the virtual address is found in the TLB or not under the condition that the physical address corresponding to the virtual address is determined to be found through the TLB, and storing the virtual address into the accelerator if the physical address corresponding to the virtual address is not found in the TLB;
the accelerator is used for determining the physical address corresponding to the virtual address and accessing the memory through the physical address.
Preferably, the method further comprises the following steps: and the display is connected with the CPU and used for displaying whether the physical address corresponding to the virtual address is found in the TLB or not.
Preferably, the method further comprises the following steps: and the alarm is connected with the CPU and used for prompting whether the physical address corresponding to the virtual address is found in the TLB or not.
In order to solve the foregoing technical problem, the present application further provides a method for improving server performance, which is applied to the foregoing server, and the method includes:
under the condition that the physical address corresponding to the virtual address is searched through the TLB, judging whether the physical address corresponding to the virtual address is found in the TLB;
if the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in an accelerator so that the accelerator can determine the physical address corresponding to the virtual address, and a physical memory is accessed through the physical address.
Preferably, the determining whether the physical address corresponding to the virtual address is found in the TLB includes:
judging whether the physical address corresponding to the virtual address is found in the TLB within preset time or not from the beginning of searching the physical address corresponding to the virtual address in the TLB;
if the physical address corresponding to the virtual address is not found in the TLB within the preset time, the virtual address is stored in the accelerator so that the accelerator can determine the physical address corresponding to the virtual address, and the physical memory is accessed through the physical address.
Preferably, the page table is stored in the physical memory, and when the accelerator does not successfully determine the physical address corresponding to the virtual address, the method further includes:
reading the page table from the physical memory, wherein the page table is a page table containing the physical address corresponding to the virtual address;
updating the TLB according to the page table;
initiating an instruction for characterizing access to the physical memory;
sending a virtual address according to the instruction;
and finding the corresponding physical address of the virtual address through the TLB, and accessing the physical memory through the physical address.
Preferably, the method further comprises the following steps:
and after the physical address corresponding to the virtual address is acquired, outputting prompt information of successful acquisition of the physical address.
In order to solve the above technical problem, the present application further provides a device for improving server performance, which is applied to the above server, and the device includes:
the judging module is used for judging whether the physical address corresponding to the virtual address is found in the TLB under the condition that the physical address corresponding to the virtual address is found through the TLB; if the data is not found, triggering a storage module;
and the storage module is used for storing the virtual address into an accelerator so that the accelerator can determine the physical address corresponding to the virtual address and access the physical memory through the physical address.
In order to solve the above technical problem, the present application further provides a device for improving server performance, including:
a memory for storing a computer program;
and the processor is used for realizing the steps of the method for improving the performance of the server when executing the computer program.
In order to solve the above technical problem, the present application further provides a computer-readable storage medium, where a computer program is stored, and when the computer program is executed by a processor, the steps of the method for improving server performance are implemented.
The application provides a server, this server includes: CPU, accelerator, memory; the accelerator is connected with the CPU; the memory is connected with the accelerator; and when the CPU determines that the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in the accelerator, the physical address corresponding to the virtual address is determined by the accelerator, and the physical memory is accessed through the physical address. Under the condition that the physical address corresponding to the virtual address is not found through the TLB, the previous server can acquire the physical address only by searching the TLB at least twice, the server realizes the conversion from the virtual address to the physical address through the accelerator, and finally the physical address can be acquired only by searching the TLB once, so that the processing speed of the server is improved, and the performance of the server is improved.
In addition, the application also provides a method and a device for improving the performance of the server, which are applied to the server and have the same beneficial effects as the server.
In addition, the application also provides a device for improving the performance of the server and a computer readable storage medium, which have the same beneficial effects of the method for improving the performance of the server mentioned above.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a structural diagram of a server according to the present embodiment;
FIG. 2 is a flow chart of a server accessing physical memory;
FIG. 3 is a flow chart of a server improving performance of accessing physical memory;
fig. 4 is a flowchart of a method for improving server performance according to the present embodiment;
FIG. 5 is a block diagram of an apparatus for improving server performance according to an embodiment of the present disclosure;
fig. 6 is a block diagram of an apparatus for improving server performance according to another embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without any creative effort belong to the protection scope of the present application.
The core of the application is to provide a server, a method, a device and a medium for improving the performance of the server, which are used for improving the performance of the server.
It should be noted that the server, the method, the apparatus, and the medium for improving the performance of the server provided by the present application may not only be applied to the server, but also be applied to a data center, including a memory pool and other places where a large amount of page tables need to be read from a memory, and the address translation function may be implemented by hardware, so as to improve the system performance.
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings.
Fig. 1 is a structural diagram of a server according to this embodiment. The following describes the configuration of the server shown in fig. 1. The server includes: CPU1, accelerator 2, memory 3; the accelerator 2 is connected with the CPU 1; the memory 3 is connected with the accelerator 2; the CPU1 is configured to, when it is determined that the physical address corresponding to the virtual address is searched through the TLB, determine whether the physical address corresponding to the virtual address is found in the TLB, and if the physical address corresponding to the virtual address is not found in the TLB, store the virtual address in the accelerator 2; the accelerator 2 is used for determining a physical address corresponding to the virtual address and accessing the memory 3 through the physical address.
In modern systems, virtualization techniques have been proposed for increasing the utilization of existing resources, reducing data center costs, increasing the availability of hardware and applications, and so forth. Virtualization techniques may be applied to computers, servers, operating systems, storage devices, applications or networks, and the like. Virtualization technology may enable multiple threads to run simultaneously. When a program is to be run, the program is loaded into the memory, and the program is run directly on the memory, that is, the memory addresses accessed in the program are all actual physical memory addresses.
Generally, when the running program is less, the size of the physical storage space may satisfy the memory required by the running program, but when the running program is more, the size of the physical storage space may not satisfy the memory required by the running program. When the program directly accesses the physical memory, the following problems can be caused, and the memory data of other processes can be easily modified by a malicious program at will; the use efficiency of the memory is low; the operating address of the program is uncertain, so it is proposed to use an indirect address access method to access the physical memory, that is, the memory address accessed in the program is not the actual physical memory address but a virtual address, and then the operating system maps the virtual address to the appropriate physical memory address. Physical memory refers to the memory space gained by memory, typically memory space gained by physical memory banks.
Fig. 2 is a flowchart of a server accessing a physical memory. In the process of accessing the physical memory, the server first issues a command for reading and writing data/instructions by the CPU1, then issues a virtual address, converts the virtual address into a corresponding physical address, and then accesses the storage 3. There are generally three ways to translate virtual addresses to corresponding physical addresses, namely using fixed address translation, passing/real addresses, or looking up a TLB. When the operating mode of the CPU1 is real mode, converting a virtual address into a physical address by fixed address conversion; when the operating mode of the CPU1 is the segment selection mode in the protection mode, the virtual address is converted to a physical address by the pass/real address. When the resources are more and the resources are shared more, the physical address corresponding to the virtual address needs to be acquired through the TLB at this time. The TLB is a cache of the CPU1 used by the memory 3 management unit to improve the speed of virtual to physical address translation, and has a fixed number of spatial slots for storing tag page table entries that map virtual addresses to physical addresses. When the CPU1 needs to search for a physical address corresponding to a virtual address by searching for the TLB, the CPU1 first searches for the physical address corresponding to the virtual address in the TLB according to the upper 20 bits of the virtual address (20 is x86 specific, and different structures have different values), if the physical address corresponding to the virtual address is found in the TLB, the TLB is called a TLB hit, and if the physical address corresponding to the virtual address is not found in the TLB, the TLB miss is called, at this time, the physical address corresponding to the virtual address needs to be calculated by using a page table in a physical memory, and then the TLB is updated so that the TLB includes the physical address corresponding to the virtual address that is not found in the page table before, and when the physical memory needs to be accessed, the physical address corresponding to the virtual address can be found in the TLB.
When a plurality of programs need to search the page table at the same time, the processing speed of the system is reduced, so that the accelerator 2 is added, and the accelerator 2 is enabled to take part in the task of calculating a physical address corresponding to a virtual address. The flow chart of the server accessing the physical memory after adding the accelerator 2 is shown in fig. 3. FIG. 3 is a flow chart of a server improving performance of accessing physical memory. In the process of accessing the physical memory, the server first issues a command for reading and writing data/instructions by the CPU1, then issues a virtual address, converts the virtual address into a corresponding physical address, and then accesses the storage 3. There are generally three ways to translate virtual addresses to corresponding physical addresses, namely using fixed address translation, passing/real addresses, or looking up a TLB. And under the condition that the physical address corresponding to the virtual address is not found in the TLB, the accelerator 2 calculates the physical address corresponding to the virtual address, and then the accelerator 2 accesses the physical memory. The process of the accelerator 2 calculating the virtual address to the physical address is as follows:
firstly, dividing a 32-bit virtual address [31:0] sent by a CPU1 into three sections, wherein the first two sections of virtual addresses [31:20] and virtual addresses [19:12] are used as indexes of two table lookup, the third section of virtual address [11:0] is used as an offset in a page, and the table lookup steps are as follows: the base address of the first stage page table stored in the memory 3 is fetched, and this base address refers to the physical address, i.e. the page table is stored in the physical memory directly according to this address. Using the content in the memory 3 as the base address, and using the virtual address [31:20] as the index value to find out an entry (2^12 ^ 4096 entry) in the first-level page table, this page table entry holds the base address of the second-level page table, which is also the physical address, that is, the second-level page table is also stored in the physical memory directly according to this address. An entry (2^8 ^ 256 entries) is looked up in the second level page table using the virtual address [19:12] as an index value, the entry holds the base address of the physical page, and the virtual memory management is in page units, so the lookup is in page units. After the base address of the physical page is obtained, the data at the corresponding address can be fetched by adding the offset (2^12 ^ 4KB) of the virtual address [11:0 ]. For example, when the virtual address 0x01AF5518 is converted into a physical address through the secondary page table, the virtual address is first split into 3 parts (lower 12 bits, middle 10 bits, and upper 10 bits), and then the parts are converted into 2-bit system as follows: 00000001101011110101010100011000, rearranging the page table entries according to the number of bits 10, 10, and 12, obtaining 0000000110 (page directory index), 1011110101 (page table entry index), 010100011000 (offset), and converting the page directory index into hexadecimal to obtain a page directory index of 6, a page table entry index of 0x2f5, and an offset of 0x518, then locating the page directory table base address according to the physical address in the current memory 3, where the physical address stored in the memory 3 points to the page directory table base address of the process, so that the page directory table base address (PDE) of 0xAA0E5000 can be obtained, and then calculating the address of the page table entry, where the page table address is stored in the 6 th entry in the page directory table (PDE), that is, [0xAA0E5000+4 × 6], [0xAA0E5018], (0 x3D 955867), where 0x00000867 is the attribute value of the page directory index, the PTE of 0x3D 5000, and then calculating the virtual address of the page table entry of [0xAA 3E 5018], [0x3D 953D 3D 5000, and finally calculating the virtual page of the virtual page table entry of the page of [0x 953 f 2, where [3 x 953 x3D 3 is found in the page table of the page table 3, so as found in the virtual page 3, and the virtual page 3 x3D 3, and the virtual address of the virtual page table of the virtual page of 10 x3 of the virtual page table of 10 x 5000, 3 of the virtual address of the virtual page table of the virtual address of the virtual page of [0x3 of the virtual page table of the virtual address of the virtual page table of the virtual page of the virtual address of, assuming that [0x3D955BD4] ═ 0x7095E847, and the physical address x0x7095E000 of the page, and 0x00000847 indicate the page attribute, the offset separated by the virtual address can calculate the final physical address to be 0x7095E000+0x00000518 ═ 0x7095E 518. After determining the physical address corresponding to the virtual address, the accelerator 2 directly accesses the memory 3 to perform read/write operations, and then returns the read/write data to the CPU 1.
The server provided by the embodiment includes: CPU, accelerator, memory; the accelerator is connected with the CPU; the memory is connected with the accelerator; and when the CPU determines that the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in the accelerator, the physical address corresponding to the virtual address is determined by the accelerator, and the physical memory is accessed through the physical address. Under the condition that the physical address corresponding to the virtual address is not found through the TLB, the previous server can acquire the physical address only by searching the TLB at least twice, the server realizes the conversion from the virtual address to the physical address through the accelerator, and finally the physical address can be acquired only by searching the TLB once, so that the processing speed of the server is improved, and the performance of the server is improved.
In order to intuitively know whether the physical address corresponding to the virtual address is found in the TLB, as a preferred embodiment, a display is provided in the whole server, as shown in fig. 1, and the display 4 is connected to the CPU1 for displaying whether the physical address corresponding to the virtual address is found in the TLB.
The display 4 is connected to the CPU1, and may display the physical address corresponding to the virtual address found in the TLB, the physical address corresponding to the virtual address not found in the TLB, or both the physical address corresponding to the virtual address found in the TLB and the physical address corresponding to the virtual address not found in the TLB, which is not limited herein. The display form of the display 4 is not limited as long as the physical address corresponding to the virtual address can be distinguished from the physical address corresponding to the virtual address.
The display provided by the embodiment is connected with the CPU, so that the condition that whether the physical address corresponding to the virtual address is found in the TLB or not can be visually displayed, and the user can conveniently check the physical address.
Similarly, in order to intuitively know whether the physical address corresponding to the virtual address is found in the TLB, in an implementation, an alarm may be further disposed in the entire server, as shown in fig. 1, where the alarm 5 is connected to the CPU1 to prompt whether the physical address corresponding to the virtual address is found in the TLB.
The alarm 5 is connected to the CPU1, and may prompt that the physical address corresponding to the virtual address is found in the TLB, prompt that the physical address corresponding to the virtual address is not found in the TLB, and prompt that the physical address corresponding to the virtual address is found and not found in the TLB, which is not limited herein. The prompting mode of the alarm 5 is not limited, and the prompting can be performed in the form of a warning lamp or a buzzer, and finally, the conditions of finding and not finding the physical address corresponding to the virtual address can be distinguished.
The alarm provided by the embodiment is connected with the CPU, so that the condition of whether the physical address corresponding to the virtual address is found in the TLB can be intuitively prompted, and a user can conveniently know the running condition of the program at any time.
On the basis of the foregoing embodiment, this embodiment further provides a method for improving server performance, which is applied to the server in the foregoing embodiment, and fig. 4 is a flowchart of the method for improving server performance provided in this embodiment. The method comprises the following steps:
s10: if it is determined that the physical address corresponding to the virtual address is searched for by the TLB, it is determined whether the physical address corresponding to the virtual address is found in the TLB, and if not, the process proceeds to step S11.
The CPU sends out a command for reading and writing data and instructions and sends out a virtual address, and in the process of converting the virtual address into a physical address, the physical address corresponding to the virtual address can be obtained through three modes of fixed address conversion, transmission/real address and TLB, the former two modes do not need to obtain the physical address corresponding to the virtual address through a page table lookup, and the TLB mode needs to obtain the physical address corresponding to the virtual address through a page table lookup. The physical address corresponding to the virtual address may be found in the page table, but there may be physical addresses for which the virtual address cannot be found. Therefore, in the case that it is determined that the physical address corresponding to the virtual address is searched through the TLB, it is necessary to determine whether the physical address corresponding to the virtual address is found in the TLB. If the physical address corresponding to the virtual address is found in the TLB, the physical memory is directly accessed through the physical address, and if the physical address corresponding to the virtual address is not found in the TLB, the process proceeds to step S11.
S11: if the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in the accelerator so that the accelerator can determine the physical address corresponding to the virtual address, and the physical memory is accessed through the physical address.
When the physical address corresponding to the virtual address is not found in the TLB, the previous method is to read a page table in the physical memory, then update the TLB, and when a command to read and write data or an instruction is received again, the physical address corresponding to the virtual address can be obtained from the TLB by reading from the TLB, and then access the physical memory. The translation of the calculated virtual address to the physical address of the accelerator is described in detail in the above embodiments, and is not described herein again. The accelerator is equivalent to expand TLB in quantity, is realized by open source protocols such as open source OMI, CXL and the like on a physical interface, meets the requirement of high-speed data transmission between an acceleration unit and a CPU, can share a part of calculation tasks according to requirements, then sends out an instruction for reading and writing a memory, and directly returns a result to the CPU. It should be noted that the page table originally stored in the physical memory may be stored in the accelerator to reduce the storage space occupied by the page table in the physical memory, and increase the processing speed of the server, thereby improving the performance of the server.
In the method for improving the performance of the server provided in this embodiment, when it is determined that the physical address corresponding to the virtual address is searched through the TLB and when the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in the accelerator, so that the accelerator determines the physical address corresponding to the virtual address, and accesses the physical memory through the physical address. According to the method, the server realizes the conversion from the virtual address to the physical address through the accelerator, and finally the physical address can be obtained only by searching the TLB once, so that the processing speed of the server is increased, and the performance of the server is improved.
On the basis of the above embodiment, in order to increase the processing speed of the server, a preset time is set for searching the physical address corresponding to the virtual address in the TLB. As a preferred embodiment, the determining whether the physical address corresponding to the virtual address is found in the TLB includes:
starting to search a physical address corresponding to the virtual address in the TLB, and judging whether the physical address corresponding to the virtual address is found in the TLB within preset time;
if the physical address corresponding to the virtual address is not found in the TLB within the preset time, the virtual address is stored in the accelerator so that the accelerator can determine the physical address corresponding to the virtual address, and the physical memory is accessed through the physical address.
The preset time is set from the beginning of searching the physical address corresponding to the virtual address in the TLB, if the physical address corresponding to the virtual address is not searched in the TLB within the preset time, the virtual address is stored in the accelerator, the physical address corresponding to the virtual address is calculated by the accelerator, and then the physical memory is directly accessed; if the physical memory is found in the TLB within the preset time, the physical memory is directly accessed. The setting of the preset time is not limited, and the preset time can be set according to the number of programs running in a certain time period. When a physical address corresponding to a virtual address is found in the TLB from the beginning, when a certain program runs, the preset time can be the longest time required by the independent running of a plurality of programs, and also can be the average time required by the independent running of a plurality of programs; when a plurality of programs are simultaneously run, the preset time may be the total time required for all the programs to be simultaneously run.
The preset time is set according to the embodiment, and whether the physical address corresponding to the virtual address is found in the TLB within the preset time is determined. Under the condition that the physical address corresponding to the virtual address is not found in the TLB within the preset time, the physical address corresponding to the virtual address is directly obtained through calculation of the accelerator, the processing speed of the server can be improved, and therefore the performance of the server is improved.
The above embodiment illustrates that the accelerator can calculate the physical address corresponding to the virtual address, but when the accelerator fails, the accelerator cannot calculate the physical address of the virtual address, resulting in a large amount of heap of the program. At this time, in order to still obtain the physical address and enable the program to continue running, the physical address corresponding to the virtual address may be obtained through the page table in the physical memory. Therefore, as a preferred embodiment, the page table is stored in the physical memory, and when the accelerator does not successfully determine the physical address corresponding to the virtual address, the method further includes:
reading a page table from a physical memory, wherein the page table comprises a physical address corresponding to a virtual address;
updating the TLB according to the page table;
initiating an instruction for characterizing access to a physical memory;
issuing a virtual address according to the instruction;
and finding the corresponding physical address of the virtual address through the TLB, and accessing the physical memory through the physical address.
The storage location of the page table may be in the physical memory or in the accelerator, and this embodiment considers that when the page table is stored in the physical memory, if the accelerator fails and cannot calculate the physical address corresponding to the virtual address, the physical address may be acquired by accessing the page table in the physical memory. The CPU reads the page table from the physical memory, and the physical address corresponding to the virtual address can be obtained through the page table because the page table contains the physical address corresponding to the virtual address. The recently accessed page table is cached in the TLB, when a command of data access/instruction access is issued, the CPU issues a virtual address, and the recently accessed page table is cached in the TLB, so that the virtual address can be searched for a corresponding physical address through the TLB, and then the physical memory access is started.
The page table provided in this embodiment is stored in the physical memory, and when the accelerator does not successfully determine the physical address corresponding to the virtual address, the page table recording the physical address corresponding to the virtual address is obtained from the physical memory, and then the TLB is updated, so that when the data access/instruction access command is received again, the physical address can be found in the TLB, thereby accessing the physical memory. The method solves the problem that when the accelerator fails, the accelerator cannot calculate the physical address corresponding to the virtual address, so that the program can continue to run, the processing speed of the server is increased, and the performance of the server is improved.
On the basis of the above embodiment, in order to intuitively know whether the physical address is successfully acquired, as a preferred embodiment, after the physical address corresponding to the virtual address is acquired, a prompt message that the physical address is successfully acquired is output.
The manner, content, and the like of outputting the prompt information that the physical address acquisition succeeds are not limited as long as the acquisition succeeds. For example, the presentation information may be presented in a display or alarm manner, and when the acquisition is successfully presented, the display may directly display "Success", "check", or the like, and the alarm may sound for several seconds or generate a shock, or the display may display "Success", "check", or the like, and the alarm may sound for several seconds or generate a shock to indicate the acquisition Success.
After the physical address corresponding to the virtual address is acquired, the prompt message that the physical address is successfully acquired is output, so that whether the physical address is successfully acquired can be intuitively known.
In the foregoing embodiment, a method for improving server performance is described in detail, and the present application also provides an embodiment corresponding to an apparatus for improving server performance. It should be noted that the present application describes the embodiments of the apparatus portion from two perspectives, one from the perspective of the function module and the other from the perspective of the hardware.
Fig. 5 is a block diagram of an apparatus for improving server performance according to an embodiment of the present disclosure. The present embodiment is based on the angle of the function module, including:
the judging module 6 is configured to judge whether a physical address corresponding to the virtual address is found in the TLB, if it is determined that the physical address corresponding to the virtual address is found by the TLB; if the data is not found, triggering a storage module;
and the storing module 7 is used for storing the virtual address into the accelerator so that the accelerator can determine a physical address corresponding to the virtual address and access the physical memory through the physical address.
Since the embodiments of the apparatus portion and the method portion correspond to each other, please refer to the description of the embodiments of the method portion for the embodiments of the apparatus portion, which is not repeated here.
The apparatus for improving server performance provided in this embodiment first determines, by the determining module, whether a physical address corresponding to a virtual address is found in the TLB when it is determined that the physical address corresponding to the virtual address is found by the TLB, and if the physical address corresponding to the virtual address is not found, the storing module is started, the virtual address is stored in the accelerator by the storing module, the physical address corresponding to the virtual address is determined by the accelerator, and the physical memory is accessed by the physical address. The device realizes the conversion from the virtual address to the physical address through the accelerator, and finally the physical address can be obtained only by searching the TLB once, so that the processing speed of the server is improved, and the performance of the server is improved.
Fig. 6 is a block diagram of an apparatus for improving server performance according to another embodiment of the present application. In this embodiment, based on a hardware angle, as shown in fig. 6, the apparatus for improving the performance of the server includes:
a memory 20 for storing a computer program;
a processor 21 for implementing the steps of the method for improving server performance as mentioned in the above embodiments when executing the computer program.
The device for improving the performance of the server provided by the embodiment may include, but is not limited to, a smart phone, a tablet computer, a notebook computer, or a desktop computer.
The processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. The processor 21 may be implemented in at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor, where the main processor is a processor for Processing data in an awake state, and is also called a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor 21 may be integrated with a Graphics Processing Unit (GPU) which is responsible for rendering and drawing the content required to be displayed on the display screen. In some embodiments, the processor 21 may further include an Artificial Intelligence (AI) processor for processing computational operations related to machine learning.
The memory 20 may include one or more computer-readable storage media, which may be non-transitory. Memory 20 may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used for storing the following computer program 201, wherein after being loaded and executed by the processor 21, the computer program can implement the relevant steps of the method for improving the performance of the server disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202, data 203, and the like, and the storage manner may be a transient storage manner or a permanent storage manner. Operating system 202 may include, among others, Windows, Unix, Linux, and the like. Data 203 may include, but is not limited to, data related to the above-mentioned method of improving server performance, and the like.
In some embodiments, the device for improving the performance of the server may further include a display 22, an input/output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.
Those skilled in the art will appreciate that the configuration shown in FIG. 6 does not constitute a limitation of the means for boosting server performance and may include more or fewer components than those shown.
The device for improving the performance of the server provided by the embodiment of the application comprises a memory and a processor, wherein when the processor executes a program stored in the memory, the following method can be realized: the effect of the method for improving the performance of the server is the same as that of the method.
Finally, the application also provides a corresponding embodiment of the computer readable storage medium. The computer-readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps as set forth in the above-mentioned method embodiments.
It is to be understood that if the method in the above embodiments is implemented in the form of software functional units and sold or used as a stand-alone product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium and executes all or part of the steps of the methods described in the embodiments of the present application, or all or part of the technical solutions. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The computer-readable storage medium provided by the application comprises the above-mentioned method for improving the performance of the server, and the effects are the same as above.
The server, the method, the device and the medium for improving the performance of the server provided by the application are described in detail above. The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Claims (10)

1. A server, comprising: CPU, accelerator, memory;
the accelerator is connected with the CPU;
the memory is connected with the accelerator;
the CPU is used for judging whether the physical address corresponding to the virtual address is found in the TLB or not under the condition that the physical address corresponding to the virtual address is determined to be found through the TLB, and storing the virtual address into the accelerator if the physical address corresponding to the virtual address is not found in the TLB;
the accelerator is used for determining the physical address corresponding to the virtual address and accessing the memory through the physical address.
2. The server of claim 1, further comprising: and the display is connected with the CPU and used for displaying whether the physical address corresponding to the virtual address is found in the TLB or not.
3. The server of claim 1, further comprising: and the alarm is connected with the CPU and used for prompting whether the physical address corresponding to the virtual address is found in the TLB or not.
4. A method for improving performance of a server, the method being applied to the server of any one of claims 1 to 3, the method comprising:
under the condition that the physical address corresponding to the virtual address is searched through the TLB, judging whether the physical address corresponding to the virtual address is found in the TLB;
if the physical address corresponding to the virtual address is not found in the TLB, the virtual address is stored in an accelerator so that the accelerator can determine the physical address corresponding to the virtual address, and a physical memory is accessed through the physical address.
5. The method of claim 4, wherein the determining whether the physical address corresponding to the virtual address is found in the TLB comprises:
judging whether the physical address corresponding to the virtual address is found in the TLB within preset time or not from the beginning of searching the physical address corresponding to the virtual address in the TLB;
if the physical address corresponding to the virtual address is not found in the TLB within the preset time, the virtual address is stored in the accelerator so that the accelerator can determine the physical address corresponding to the virtual address, and the physical memory is accessed through the physical address.
6. The method of claim 4, wherein a page table is stored in the physical memory, and when the accelerator does not successfully determine the physical address corresponding to the virtual address, the method further comprises:
reading the page table from the physical memory, wherein the page table is a page table containing the physical address corresponding to the virtual address;
updating the TLB according to the page table;
initiating an instruction for characterizing access to the physical memory;
sending a virtual address according to the instruction;
and finding the corresponding physical address of the virtual address through the TLB, and accessing the physical memory through the physical address.
7. The method for improving server performance according to any one of claims 4 to 6, further comprising:
and after the physical address corresponding to the virtual address is acquired, outputting prompt information of successful acquisition of the physical address.
8. An apparatus for improving server performance, applied to the server of any one of claims 1 to 3, the apparatus comprising:
the judging module is used for judging whether the physical address corresponding to the virtual address is found in the TLB under the condition that the physical address corresponding to the virtual address is found through the TLB; if the data is not found, triggering a storage module;
and the storage module is used for storing the virtual address into an accelerator so that the accelerator can determine the physical address corresponding to the virtual address and access the physical memory through the physical address.
9. An apparatus for improving server performance, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the method for improving server performance according to any one of claims 4 to 7 when executing the computer program.
10. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the method for boosting server performance according to any one of claims 4 to 7.
CN202111386758.XA 2021-11-22 2021-11-22 Server, method and device for improving performance of server and medium Pending CN114064524A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023165317A1 (en) * 2022-03-02 2023-09-07 阿里巴巴(中国)有限公司 Memory access method and device
WO2024001310A1 (en) * 2022-06-30 2024-01-04 超聚变数字技术有限公司 Data processing device and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023165317A1 (en) * 2022-03-02 2023-09-07 阿里巴巴(中国)有限公司 Memory access method and device
WO2024001310A1 (en) * 2022-06-30 2024-01-04 超聚变数字技术有限公司 Data processing device and method

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