CN114040487A - Real-time attenuation control method for satellite uplink and downlink simulation equipment - Google Patents
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Abstract
The invention discloses a real-time attenuation control method of satellite uplink and downlink analog equipment, which comprises the following steps: after the analog equipment is powered on, the upper computer sets parameters through an operation page, a start operation button is clicked to operate the equipment, an operation instruction is driven through PCIE DMA to read an identifier stored in a board card, the board card is judged to belong to an uplink board card or a downlink board card, attenuation messages and command messages are transmitted from the upper computer to a link needing to be operated through a PCIE module, satellite signals are collected through an AD module and distributed to two FPGA chip channels of the board card, the two FPGA chips control the rest chips on the board card to start signals and end signals according to the received command messages, meanwhile, power attenuation values in decimal forms in the attenuation messages are converted into integer forms through a conversion algorithm and stored into the FPGA chips, the signal simulation efficiency is improved, and the limitation that the FPGA chips can only store integers is solved.
Description
Technical Field
The invention relates to the technical field of satellite simulation attenuation control, in particular to a real-time attenuation control method of satellite uplink and downlink simulation equipment.
Background
With the development of science and technology, a satellite network is also undergoing a broadband process, the traditional low-speed data services are gradually reduced, new high-speed data services, such as broadband multimedia, internet access services and the like, become more and more, compared with a ground wireless communication network, each link in a spatial information network has the defects of large propagation delay, complex satellite-ground link fading condition, significant Doppler frequency shift and the like, in order to overcome the defects in satellite communication, a large number of experiments and tests are required when a transmitter and a receiver are designed, and the actual satellite communication link is used with long time consumption and high price, so that a satellite channel simulator is produced in response;
however, because the satellite has uplink and downlink links, and the radio frequency standard of each link is different, the prior art lacks the research of simultaneously simulating the uplink and downlink signals; secondly, many control methods are proposed at present for controlling the signal power attenuation, but a specific conversion strategy of the attenuation value from software to hardware is lacked; finally, the numbers which can be stored in the FPGA chip adopted by the hardware are usually integers, and the number of attenuation points generated by the software according to the attenuation model is often huge, so that each attenuation point has decimal places which are not beneficial to being stored in the FPGA chip.
Therefore, a real-time attenuation control method for satellite uplink and downlink analog devices is needed to solve the above problems.
Disclosure of Invention
The invention aims to provide a real-time attenuation control method of satellite uplink and downlink analog equipment, so as to solve the problems in the background technology.
In order to solve the technical problems, the invention provides the following technical scheme: a real-time attenuation control method for satellite uplink and downlink analog equipment is characterized in that: the method comprises the following steps:
s1: electrifying the simulation equipment, setting parameters and operating the simulation equipment;
s2: judging whether the board card belongs to an uplink board card or a downlink board card;
s3: sending a message to a link board card needing to be operated;
s4: the control chip starts to output signals and finishes outputting signals.
Further, in steps S1-S2: after the analog equipment is powered on, the upper computer sets parameters through an operation page, clicks a start operation button to operate the equipment, reads the identification stored in the board card through a PCIE DMA drive operation instruction, and judges whether the board card belongs to an uplink board card or a downlink board card, wherein the board card refers to a KINTEX-7 board.
Further, in step S3: transmitting a message from an upper computer to a link needing to be operated through a PCIE module, wherein the message comprises an attenuation message and a command message, firstly transmitting the attenuation message, the attenuation message stores an attenuation power value, the command message is transmitted afterwards, controlling the chip to start outputting signals and end outputting signals through the command message, acquiring satellite signals through the AD module, distributing the satellite signals to a chip a and a chip b of the board card, wherein the chip a and the chip b refer to two FPGA chips, when the received command message is the starting value, the signals are output through the other chips on the control board card of the chip a and the chip b respectively, the other chips comprise a QDR, an ADC and a DAC, wherein the QDR is used for storing signals, the ADC is used for converting the collected analog signals into digital signals, the DAC is used for converting the digital signals into the analog signals, and when the received command message is a finished value, the control chip finishes outputting the signals.
Further, an uplink and downlink identification stored in the board card is read through a PCIE DMA drive operation instruction, the uplink and downlink identification is stored in the RAM module, the board card is judged to belong to an uplink or a downlink through information obtained through a channel corresponding to C2H of the PCIE module, a correspondence table of a C2H channel number and the uplink and downlink identification stored in the board card is generated, corresponding message information is sent to a channel having the same channel number as the C2H channel number according to the correspondence table, different messages are distinguished and analyzed according to a message header or a type, a channel switch is controlled in real time, and the PCIE DMA drive operation instruction refers to drive customization and includes instructions of sending, reading, maintaining, initializing and the like.
Further, in two FPGA chips: converting satellite signals from analog signals into digital signals by using an ADC in a chip a, collecting digital signal data, transmitting the collected data to a chip b by using a GTX, receiving message data transmitted by a PCIE module by using an SPI in the chip a, analyzing attenuation messages by using a message analyzing module to obtain power value code words, storing the power value code words into an RAM module, performing time delay control by using QDR to read and write data at high speed, generating corresponding sine and cosine data according to Doppler frequency shift by using DDS, processing the Doppler frequency shift data and the data read by the QDR by using a digital mixing module to obtain data after frequency offset, transmitting the data after frequency offset into an amplitude modulation module, adjusting signal frequency by using the amplitude modulation module according to the power value code words stored in the RAM module, converting the digital signals into analog signals in the chip a by using DA1 and outputting the analog signals, the digital signals are converted into analog signals through the DA3 in the b chip and then output, the data are read and written by utilizing the QDR, the high-speed reading and writing of a large amount of data are facilitated, the simulation efficiency is improved, only one RAM module is arranged on each board card, the influence on wiring complexity caused by too many RAMs and signal time sequence receiving in the prior art is reduced, the influence degree on the signal quality is further reduced, the upper link and the lower link are assisted by the transmission of message data, the function of simultaneous simulation is realized, an SOC chip is not required to be additionally used, the communication requirement is met, and the chip cost of simulation equipment is saved.
Further, converting and restoring the power attenuation value stored in the attenuation message, wherein the converting and restoring the power attenuation value comprises the following steps:
s301: the upper computer generates required attenuation points from the matlab according to the attenuation model;
s302: converting the attenuation points into integer-shaped code words which can be stored by the FPGA chip;
s303: sending a message, storing related code words through an RAM module of the FPGA chip, and circularly reading the code words to an amplitude modulation module;
s304: the amplitude modulation module restores the attenuation by calculating according to the code words.
Further, in step S302: setting the attenuation range as [ a, b]Wherein a is more than or equal to 0, b is more than a, the total number of the obtained attenuation points is count, and the RAM module of the FPGA is obtainedAnd (3) setting the storage bit number of the block as store, and establishing a conversion function: y ═ f (x)]Wherein 2 isstore≥count，0≤[f(x)]≤2store1, a ≦ x ≦ b, f (x) a monotonically non-decreasing function or a monotonically non-increasing function when a ≦ x ≦ b;
judging the resolution of the attenuation value generated by matlab: setting the resolution as distinting, taking two random attenuation values as x1 and x2, and making distinting ═ f (x2) ] - [ f (x1) ], where a ≦ x1 < x2 ≦ b, and f (x) is a monotone non-decreasing function, and it needs to satisfy: min (distinting) is not less than 1, namely [ f (x2) ] - [ f (x1) ] > not less than 1, obtaining [ f (x2) ] > not less than f (x1) ] +1, obtaining [ f (x2) ] > not less than f (x1) +1 according to the property of a rounding function, and setting f (x) as a monotonous non-decreasing function, wherein the aim is that: the larger the function slope is, the larger the density of allowable attenuation points is, which is beneficial to improving the rationality of the number of the attenuation points of each segment to be subsequently distributed and ensuring the resolution of the attenuation value generated by matlab.
Further, f (x) mx + n is set, and [ a, b ═ m, n is set]Segmenting the range, and adjusting the slope of f (x) corresponding to different segments: the attenuation value range is set to be [ a1, b1]]In (a)<a1<b1<b, obtaining: f (b1) -f (a1) ═ m (b1-a1), the number of attenuation points generated by matlab is obtained as k, and the ratio of the number of attenuation points is obtained as: k/count, according to step S502: 0 ≦ [ f (x)]≤2store-1, taking [ f (x)]Maximum value of (2)store-1, obtaining: f (b1) -f (a1) ═ m (b1-a1) ═ 2store-1) k/count, calculating the slope m according to the following formula:
m＝(2store-1)*k/(count*(b1-a1))；
segmenting the range of attenuation values into: [ a, a1], (a1, b1], (a2, b2], … (an, bn ], (bn, b ], the minimum and maximum attenuation values of the segments are substituted into the above formula to obtain each segment slope set { ma, m1, …, mn, mb }, and the corresponding intercept set { na, n1, …, nb }, and na is obtained from f (a) 0 and ma, n1 is f (a1) -ma (a1-a), n2 f (b1) -m1 (b1-a1), the values of mb and nb are obtained by stepwise solving, the conversion function of each segment is obtained, the number of different segments is greatly different in the total range of attenuation values, so the adjustment is needed, the attenuation points generated according to lab account for the slope ratio of the matts and the gradient distribution of the segment slope adjustment, and the conversion function of each segment is obtained by calculating the attenuation point of the attenuation point, so that the attenuation point of the segment slope adjustment meets the objective attenuation distribution model, and simultaneously obtaining the conversion functions of different segments.
Further, in step S304: f (x) is obtained through the conversion function of each segment obtained in the step S302, the corresponding x is obtained, the integer-shaped attenuation value is reduced to the attenuation value in the form of decimal, the original attenuation value in the form of decimal is converted to the integer form, which is beneficial to storing the attenuation point in the FPGA, and when the signal power attenuation control needs to be completed through the attenuation point, the stored integer-shaped attenuation value is reduced to the form of decimal, which is beneficial to improving the attenuation control accuracy.
Compared with the prior art, the invention has the following beneficial effects:
most satellite channel simulators are provided with corresponding software platforms and hardware platforms, network topological structures and channel parameters are updated at millisecond-level to second-level time intervals through the software platforms for simulation, and simulation describing real-time change of air wireless signals can be realized by the high-speed hardware platforms; the original decimal attenuation value and the integer form a mapping relation through a conversion algorithm, and the mapping relation is converted into an integer form, so that the limitation that only the integer can be stored in an FPGA chip is solved, a large number of accurate attenuation values can be conveniently stored, and signal power control is facilitated.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a general overview of software and hardware of a real-time attenuation control method of satellite uplink and downlink analog equipment according to the present invention;
fig. 2 is a specific control flow diagram of a hardware board card of the real-time attenuation control method of the uplink and downlink analog device according to the present invention;
fig. 3 is a general flowchart of a real-time attenuation control method of a satellite uplink and downlink analog device according to the present invention;
fig. 4 is a PCIE schematic diagram of a real-time attenuation control method of a satellite uplink and downlink analog device according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Referring to fig. 1-4, the present invention provides a technical solution: a real-time attenuation control method for satellite uplink and downlink analog equipment is characterized in that: the method comprises the following steps:
s1: electrifying the simulation equipment, setting parameters and operating the simulation equipment;
s2: judging whether the board card belongs to an uplink board card or a downlink board card;
s3: sending a message to a link board card needing to be operated;
s4: the control chip starts to output signals and finishes outputting signals.
In steps S1-S2: after the analog equipment is powered on, the upper computer sets parameters through an operation page, clicks a start operation button to operate the equipment, reads the identification stored in the board card through a PCIE DMA drive operation instruction, and judges whether the board card belongs to an uplink board card or a downlink board card, wherein the board card refers to a KINTEX-7 board.
In step S3: the method comprises the steps that a message is transmitted from an upper computer to a link needing to be operated through a PCIE module, the message comprises an attenuation message and a command message, the attenuation message is sent at first, the attenuation message stores an attenuation power value, the command message is sent later, a control chip starts to send out signals and finishes sending out signals through the command message, satellite signals are collected through an AD module and are distributed to two channels of an a chip and a b chip of a board card, the a chip and the b chip refer to two FPGA chips, when the received command message is the starting value, the signals are sent out through the other chips on the control board card respectively through the a chip and the b chip, the other chips comprise QDR, ADC and DAC, and when the received command message is the finishing value, the control chip finishes sending out the signals.
Reading uplink and downlink identifiers stored in a board card through a PCIE DMA drive operation instruction, wherein the uplink and downlink identifiers are stored in an RAM module, judging that the board card belongs to an uplink or a downlink through information acquired by a channel corresponding to C2H of the PCIE module, generating a corresponding relation table of a channel number C2H and the uplink and downlink identifiers stored in the board card, sending corresponding message information to a channel with the same channel number C2H according to the corresponding relation table, distinguishing and analyzing different messages according to message headers or types, controlling a channel switch in real time, and judging that the board card belongs to the uplink or the downlink through the stored uplink and downlink identifiers, for example: the method comprises the following steps that two board cards exist, wherein a first board card has a memory 1, a second board card has a memory 3, reading 1 with software convention indicates that a corresponding board card belongs to an uplink, reading 3 indicates that the corresponding board card belongs to a downlink, and the board cards are hardware platforms; judging by a message analysis module: if the message header is 1, the message is the required message, and the message is continuously received; otherwise, the message is not received until the message header is 1, the channel switch is controlled in real time through the message, the upper computer stores the functional parameters into the message, the board card realizes real-time control according to the content of the message after receiving the functional parameters, and the C2H channel is responsible for processing data transmission from the board card to the upper computer.
In two FPGA chips: converting satellite signals from analog signals into digital signals by using an ADC in a chip a, collecting digital signal data, transmitting the collected data to a chip b by using a GTX, receiving message data transmitted by a PCIE module by using an SPI in the chip a, analyzing attenuation messages by using a message analyzing module to obtain power value code words, storing the power value code words in an RAM module, performing time delay control by using a QDR to read and write data at high speed, generating corresponding sine and cosine data according to Doppler frequency shift by using a DDS, processing the Doppler frequency shift data and the data read by the QDR by using a digital mixing module to obtain data after frequency offset, transmitting the data after frequency offset to an amplitude modulation module, adjusting signal frequency by using the amplitude modulation module according to the power value code words stored in the RAM module, converting the digital signals into analog signals in the chip a by using a DA1 and then outputting the analog signals, the digital signal is converted into an analog signal in the b-piece by DA3 and then output.
The method for converting and restoring the power attenuation value stored in the attenuation message comprises the following steps:
s301: the upper computer generates required attenuation points from the matlab according to the attenuation model;
s302: converting the attenuation points into integer-shaped code words which can be stored by the FPGA chip;
s303: sending a message, storing related code words through an RAM module of the FPGA chip, and circularly reading the code words to an amplitude modulation module;
s304: the amplitude modulation module reduces attenuation through calculation according to the code words, the attenuation model can be a Rayleigh model and the like, a function corresponding to the model exists in matlab, the corresponding function is called to obtain an attenuation value according to a required attenuation range, and attenuation points are generated according to the corresponding model; the reduction attenuation is realized through a system _ generator, which refers to a model built in matlab, and can generate FPGA codes for use in a chip.
In step S302: setting the attenuation range as [ a, b]And a is more than or equal to 0, b is more than a, the total number of the obtained attenuation points is count, the number of the obtained RAM module storage bits of the FPGA is store, and a conversion function is established: y ═ f (x)]Wherein 2 isstore≥count，0≤[f(x)]≤2store1, a ≦ x ≦ b, f (x) a monotonically non-decreasing function or a monotonically non-increasing function when a ≦ x ≦ b;
judging the resolution of the attenuation value generated by matlab: setting the resolution as distinting, taking two random attenuation values as x1 and x2, and making distinting ═ f (x2) ] - [ f (x1) ], where a ≦ x1 < x2 ≦ b, and f (x) is a monotone non-decreasing function, and it needs to satisfy: min (distinting) is not less than 1, namely [ f (x2) ] - [ f (x1) ] > not less than 1, obtaining [ f (x2) ] > not less than f (x1) ] +1, and obtaining [ f (x2) ] > not less than f (x1) +1 according to the property of a rounding function.
Set f (x) mx + n, pair [ a, b ═ m]Segmenting the range, and adjusting the slope of f (x) corresponding to different segments: the attenuation value range is set to be [ a1, b1]]In (a)<a1<b1<b, obtaining: f (b1) -f (a1) ═ m (b1-a1), and matlab raw material is obtainedThe number of the formed attenuation points is k, and the obtained attenuation point number accounts for the ratio: k/count, according to step S502: 0 ≦ [ f (x)]≤2store-1, taking [ f (x)]Maximum value of (2)store-1, obtaining: f (b1) -f (a1) ═ m (b1-a1) ═ 2store-1) k/count, calculating the slope m according to the following formula:
m＝(2store-1)*k/(count*(b1-a1))；
segmenting the range of attenuation values into: [ a, a1], (a1, b1], (a2, b2], … (an, bn ], (bn, b ], the minimum and maximum attenuation values of the segments are substituted into the above formula to obtain a slope set { ma, m1, …, mn, mb } for each segment, and a corresponding intercept set { na, n1, …, nb }, and according to f (a) ═ 0 and ma, na ═ 0 is obtained, n1 ═ f (a1) -ma (a1-a), n2 ═ f (b1) -m1 ═ b1-a1, and the values of mb and nb are obtained through stepwise solving, and a conversion function of each segment is obtained.
In step S304: the conversion function for each segment obtained in step S302 is known as f (x), and the corresponding x is obtained, and the integer attenuation value is reduced to the decimal attenuation value.
The first embodiment is as follows: setting the attenuation value x in the attenuation value range [ a, b]＝[1,100]And obtaining the total number of attenuation points as 10000, obtaining the storage bit number of the RAM module of the FPGA as 16 bits, and enabling the storage bit number to be equal to or less than 0 [ f (x)]≤2store-1 ═ 65535, yielding [ f (1)]＝0，[f(100)]65535, set f (x) mx + n, couple [ a, b]＝[1,100]The range is segmented into: [1,20]，(20,40]，(40,100]And 3 segments in total, acquiring the number k of attenuation points generated by matlab, wherein in each segment, the number k of the attenuation points is respectively as follows: 1000, 5000 and 4000, and obtaining the number ratio of the attenuation points as follows: k/count, the number ratio of each attenuation point in each section is respectively as follows: 1000/10000-10%, 5000/10000-50%, 4000/10000-40%, corresponding [ f (x)]The value ranges of (a) are: [0, 65535 10% ]]，(65535*10％，65535*60％]，(65535*60％，65535]The result is f (1) ═ 0, f (20) ═ 65535 × 10%, according to the formula m ═ 2store-1) k/(count (b1-a1)) calculation [1,20 [ (-)/k/(b 1-a1) ]]The slope m of the segment is: m 65535 × 10%/(20-1) ≈ 345, n 0; obtained from f (20) ═ 65535 × 10%, f (40) ═ 65535 × 60% (20, 40)]The slope m1 of the segment is: m 1-65535 x 50%/(40-20) 1638, n1 ═ f (20) -m1 ═ -20 ═ -26206.5; the formula (40,100) is obtained from (40) ═ 65535 × 60% and (100) ═ 65535]The slope m2 of the segment is: the method comprises the steps of obtaining a conversion function of each segment, obtaining f (x) of each segment, obtaining corresponding x, and reducing integer attenuation values to decimal attenuation values, wherein m2 is 65535, 40%/(100-60) is 655.35, n1 is f (40) -m2 is 40, 13107.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. A real-time attenuation control method for satellite uplink and downlink analog equipment is characterized in that: the method comprises the following steps:
s1: electrifying the simulation equipment, setting parameters and operating the simulation equipment;
s2: judging whether the board card belongs to an uplink board card or a downlink board card;
s3: sending a message to a link board card needing to be operated;
s4: the control chip starts to output signals and finishes outputting signals.
2. The real-time attenuation control method for the satellite uplink and downlink simulation equipment according to claim 1, characterized in that: in steps S1-S2: after the analog equipment is powered on, the upper computer sets parameters through an operation page, clicks a start operation button to operate the equipment, reads the identification stored in the board card through a PCIE DMA drive operation instruction, and judges whether the board card belongs to an uplink board card or a downlink board card, wherein the board card refers to a KINTEX-7 board.
3. The real-time attenuation control method for the satellite uplink and downlink simulation equipment according to claim 1, characterized in that: in step S3: the method comprises the steps that a message is transmitted to a link needing to be operated from an upper computer through a PCIE module, the message comprises an attenuation message and a command message, the attenuation message is firstly transmitted, the attenuation message is stored with an attenuation power value, the command message is transmitted afterwards, a chip is controlled to start to output signals and end to output the signals through the command message, satellite signals are collected through an AD module and are distributed to two channels of a chip and a b chip of a board card, the a chip and the b chip refer to two FPGA chips, when the received command message is the starting value, the signals are output through the rest chips on the control board card of the a chip and the b chip respectively, the rest chips comprise QDR, ADC and DAC, and when the received command message is the ending value, the control chip ends to output the signals.
4. The real-time attenuation control method for the satellite uplink and downlink simulation equipment according to claim 2, characterized in that: the method comprises the steps of reading uplink and downlink identifications stored in a board card through a PCIE DMA drive operation instruction, storing the uplink and downlink identifications in an RAM module, judging that the board card belongs to an uplink or a downlink through information obtained by a channel corresponding to C2H of the PCIE module, generating a corresponding relation table of a channel number C2H and the uplink and downlink identifications stored in the board card, sending corresponding message information to a channel with the same channel number C2H according to the corresponding relation table, distinguishing and analyzing different messages according to message headers or types, and controlling a channel switch in real time.
5. The real-time attenuation control method for the satellite uplink and downlink simulation equipment according to claim 3, characterized in that: in two FPGA chips: converting satellite signals from analog signals into digital signals by using an ADC in a chip a, collecting digital signal data, transmitting the collected data to a chip b by using a GTX, receiving message data transmitted by a PCIE module by using an SPI in the chip a, analyzing attenuation messages by using a message analyzing module to obtain power value code words, storing the power value code words into an RAM module, performing time delay control by using QDR to read and write data at high speed, generating corresponding sine and cosine data according to Doppler frequency shift by using DDS, processing the Doppler frequency shift data and the data read by the QDR by using a digital mixing module to obtain data after frequency offset, transmitting the data after frequency offset into an amplitude modulation module, adjusting signal frequency by using the amplitude modulation module according to the power value code words stored in the RAM module, converting the digital signals into analog signals in the chip a by using DA1 and outputting the analog signals, the digital signal is converted into an analog signal in the b-piece by DA3 and then output.
6. The real-time attenuation control method for the satellite uplink and downlink simulation equipment according to claim 3, characterized in that: converting and restoring the power attenuation value stored in the attenuation message, wherein the converting and restoring the power attenuation value comprises the following steps:
s301: the upper computer generates required attenuation points from the matlab according to the attenuation model;
s302: converting the attenuation points into integer-shaped code words which can be stored by the FPGA chip;
s303: sending a message, storing related code words through an RAM module of the FPGA chip, and circularly reading the code words to an amplitude modulation module;
s304: the amplitude modulation module restores the attenuation by calculating according to the code words.
7. The real-time attenuation control method for the satellite uplink and downlink simulation equipment according to claim 6, characterized in that: in step S302: setting the attenuation range as [ a, b]And a is more than or equal to 0, b is more than a, the total number of the obtained attenuation points is count, the number of the obtained RAM module storage bits of the FPGA is store, and a conversion function is established: y ═ f (x)]Wherein 2 isstore≥count，0≤[f(x)]≤2store1, a ≦ x ≦ b, f (x) a monotonically non-decreasing function or a monotonically non-increasing function when a ≦ x ≦ b;
judging the resolution of the attenuation value generated by matlab: setting the resolution as distinting, taking two random attenuation values as x1 and x2, and making distinting ═ f (x2) ] - [ f (x1) ], where a ≦ x1 < x2 ≦ b, and f (x) is a monotone non-decreasing function, and it needs to satisfy: min (distinting) is not less than 1, namely [ f (x2) ] - [ f (x1) ] > not less than 1, obtaining [ f (x2) ] > not less than f (x1) ] +1, and obtaining [ f (x2) ] > not less than f (x1) +1 according to the property of a rounding function.
8. The real-time attenuation control method for the satellite uplink and downlink analog equipment according to claim 7, characterized in that: set f (x) mx + n, pair [ a, b ═ m]Segmenting the range, and adjusting the slope of f (x) corresponding to different segments: the attenuation value range is set to be [ a1, b1]]Wherein a < a1 < b1 < b, gives: f (b1) -f (a1) ═ m (b1-a1), the number of attenuation points generated by matlab is obtained as k, and the ratio of the number of attenuation points is obtained as: k/count, according to step S502: 0 ≦ [ f (x)]≤2store-1, taking [ f (x)]Maximum value of (2)store-1, obtaining: f (b1) -f (a1) ═ m (b1-a1) ═ 2store-1) k/count, calculating the slope m according to the following formula:
m＝(2store-1)*k/(count*(b1-a1))；
segmenting the range of attenuation values into: [ a, a1], (a1, b1], (a2, b2], … (an, bn ], (bn, b ], the minimum and maximum attenuation values of the segments are substituted into the above formula to obtain a slope set { ma, m1, …, mn, mb } for each segment, and a corresponding intercept set { na, n1, …, nb }, and according to f (a) ═ 0 and ma, na ═ 0 is obtained, n1 ═ f (a1) -ma (a1-a), n2 ═ f (b1) -m1 ═ b1-a1, and the values of mb and nb are obtained through stepwise solving, and a conversion function of each segment is obtained.
9. The real-time attenuation control method for the satellite uplink and downlink analog equipment according to claim 8, characterized in that: in step S304: f (x) is obtained by the conversion function of each segment obtained in step S302, and the corresponding x is obtained, and the integer attenuation value is reduced to the decimal attenuation value.
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