CN114039525A - Servo control signal logic protection circuit, servo controller and unmanned helicopter - Google Patents
Servo control signal logic protection circuit, servo controller and unmanned helicopter Download PDFInfo
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- CN114039525A CN114039525A CN202210011894.9A CN202210011894A CN114039525A CN 114039525 A CN114039525 A CN 114039525A CN 202210011894 A CN202210011894 A CN 202210011894A CN 114039525 A CN114039525 A CN 114039525A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
- H02P29/02—Providing protection against overload without automatic interruption of supply
- H02P29/024—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load
- H02P29/028—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load the motor continuing operation despite the fault condition, e.g. eliminating, compensating for or remedying the fault
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B64—AIRCRAFT; AVIATION; COSMONAUTICS
- B64C—AEROPLANES; HELICOPTERS
- B64C27/00—Rotorcraft; Rotors peculiar thereto
- B64C27/04—Helicopters
- B64C27/08—Helicopters with two or more rotors
- B64C27/10—Helicopters with two or more rotors arranged coaxially
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B64—AIRCRAFT; AVIATION; COSMONAUTICS
- B64U—UNMANNED AERIAL VEHICLES [UAV]; EQUIPMENT THEREFOR
- B64U50/00—Propulsion; Power supply
- B64U50/10—Propulsion
- B64U50/19—Propulsion using electrically powered motors
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Combustion & Propulsion (AREA)
- Aviation & Aerospace Engineering (AREA)
- Mechanical Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention relates to a servo control signal logic protection circuit, a servo controller and an unmanned helicopter, wherein the servo control signal logic protection circuit comprises a signal correction unit, a logic protection unit and a buffer; the signal correction unit is used for receiving six paths of PWM signals output by the CPU, and outputting the six paths of PWM signals to the logic protection unit and the buffer after logic abnormality judgment and abnormality correction are carried out; the logic protection unit is used for judging whether logic errors which enable an upper tube and a lower tube of the same line of the H bridge to be simultaneously conducted exist in the input six paths of PWM signals; if so, outputting a protection signal to the buffer; the buffer is used for buffering the six input PWM signals and outputting the signals to an MOS tube driving circuit for driving an H bridge; and when the protection signal is input, the output is closed. The invention can effectively avoid the phenomena of abnormal work and instant jamming of the steering engine of the unmanned helicopter caused by abnormal PWM signal state.
Description
Technical Field
The invention relates to the technical field of servo control, in particular to a servo control signal logic protection circuit, a servo controller and an unmanned helicopter.
Background
At present, most servo controllers still drive an H-bridge circuit switch composed of 6 MOS tubes after a processor signal increases driving power through an MOS tube driver so as to control the action of a steering engine. In the conventional servo controller, because the PWM signal provided by the processor directly controls the H-bridge circuit, if the logic of the given control signal is wrong, the H-bridge circuit is opened wrongly, the current flows to the wrong direction, and the servo controller is possibly damaged. Or when the signal encounters interference, the H-bridge circuit may be opened erroneously instantly, which may cause operation failure or damage of the servo controller.
Disclosure of Invention
In view of the above analysis, the present invention aims to provide a servo control signal logic protection circuit, a servo controller and an unmanned helicopter, which can prevent the wrong control caused by the wrong logic signal entering the MOS transistor.
The technical scheme provided by the invention is as follows:
the invention discloses a servo control signal logic protection circuit, which comprises a signal correction unit, a logic protection unit and a buffer, wherein the signal correction unit is used for correcting a servo control signal;
the signal correction unit is used for receiving six paths of PWM signals output by the CPU, and outputting the six paths of PWM signals to the logic protection unit and the buffer after logic abnormality judgment and abnormality correction are carried out;
the logic protection unit is used for judging whether logic errors which enable an upper tube and a lower tube of the same line of the H bridge to be simultaneously conducted exist in the input six paths of PWM signals; if so, outputting a protection signal to the buffer;
the buffer is used for buffering the six input PWM signals and outputting the signals to an MOS tube driving circuit for driving an H bridge; and when the protection signal is input, the output is closed.
Further, the signal correction unit comprises a first logic judgment correction branch and a second logic judgment correction branch;
the first logic judgment and correction branch is used for carrying out logic abnormality judgment and abnormality correction on the six-step commutation method control logic;
and the second logic judgment and correction branch is used for carrying out logic abnormity judgment and abnormity correction on the FOC control logic.
Further, the first logic judgment and correction branch comprises a logic judgment module, a logic storage module and a logic correction module;
the logic judgment module is used for judging whether the input six paths of PWM signals accord with six-step commutation method control logic or not;
the logic storage module is used for storing six paths of PWM signals which are judged to accord with the six-step commutation method control logic for the last time;
and the logic correction module is used for replacing the PWM signals with logic abnormality by adopting the six paths of PWM signals stored by the logic storage module when the logic abnormality occurs in the six-step commutation method control logic.
Further, the judgment conditions of the six-step commutation method control logic in the logic judgment module are as follows:
the six input paths of PWM signals comprise two signals which are 1; and two signals which are '1' are not on the same line of the H bridge, one is an upper tube, and the other is a PWM signal of a lower tube.
Further, the second logic judgment and correction branch comprises a logic judgment module, a logic storage module and a logic correction module;
the logic judgment module is used for judging whether the input six paths of PWM signals accord with FOC control logic or not;
the logic storage module is used for storing six paths of PWM signals which are judged to accord with FOC control logic for the last time;
and the logic correction module is used for replacing the PWM signal with the logic abnormity by adopting the six paths of PWM signals stored by the logic storage module when the FOC control logic is in the logic abnormity.
Further, the judgment conditions of the FOC control logic in the logic judgment module are as follows:
the six input paths of PWM signals comprise three signals of '1'; and the three "1" signals are not on the same line of the H-bridge.
Further, the logic protection unit comprises a first nand gate, a second nand gate, a third nand gate, a first and gate, a second and gate and a fourth nand gate;
input signals of the first NAND gate are PWM signals PWM1 and PWM2 of an upper tube and a lower tube of an H bridge first circuit;
input signals of the second NAND gate are PWM signals PWM3 and PWM4 of an upper tube and a lower tube of an H-bridge second circuit;
input signals of the third NAND gate are PWM signals PWM5 and PWM6 of an upper tube and a lower tube of an H-bridge third circuit;
the input signals of the first AND gate are output signals of a first NAND gate and a second NAND gate;
the input signals of the second AND gate are the output signals of the first AND gate and the third NAND gate;
the input signals of the fourth NAND gate are the output signal of the second AND gate and an external control signal, the output signal is output to the enabling end of the buffer, and the buffer is closed when the output signal is '1';
the external control signal is "1" when normal and "0" when a failure occurs.
Further, the logic protection unit further comprises a third and gate; two input signals of the third AND gate are a temperature control switch signal and an enable signal of the DSP control logic protection unit, and an output signal is the external control signal.
The temperature control switch signal is 1 when the temperature is normal and 0 when the temperature is over-temperature; the DSP controls an enabling signal of the logic protection unit to be 1 when enabled and 0 when not enabled.
The invention also discloses a servo controller, which comprises a CPU, an MOS tube driver and an H bridge; the servo control signal logic protection circuit is used for carrying out signal correction and logic protection on the six paths of PWM signals output by the CPU and then outputting the signals to the MOS tube driver to carry out power driving on the H bridge.
The invention also discloses an unmanned helicopter which is a coaxial unmanned aerial vehicle and comprises two groups of rotors;
each group of rotor wings comprises three steering engines, tilting disks and propellers;
the three steering engines are used for controlling the flight attitude of the unmanned helicopter by adjusting the angle of the propeller through adjusting the tilting disk;
the steering engine adjusts the posture through the servo controller.
The invention can realize the following beneficial effects:
the servo control signal logic protection circuit can effectively avoid abnormal operation of the unmanned helicopter steering engine caused by abnormal PWM signal state, avoid the phenomenon of instantaneous jamming of the steering engine caused by interference, and ensure good use condition of the steering engine.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
FIG. 1 is a schematic block diagram of a servo control signal logic protection circuit in an embodiment of the present invention;
FIG. 2 is a schematic block diagram of the logic protection unit circuit in the embodiment of the present invention;
FIG. 3 is a schematic block diagram of a servo controller circuit according to an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form a part hereof, and which together with the embodiments of the invention serve to explain the principles of the invention.
A specific aspect of this embodiment discloses a servo control signal logic protection circuit, as shown in fig. 1, including a signal modification unit, a logic protection unit, and a buffer;
the signal correction unit is used for receiving six paths of PWM signals output by the CPU, and outputting the six paths of PWM signals to the logic protection unit and the buffer after logic abnormality judgment and abnormality correction are carried out;
the logic protection unit is used for judging whether logic errors which enable an upper tube and a lower tube of the same line of the H bridge to be simultaneously conducted exist in the input six paths of PWM signals; if so, outputting a protection signal to the buffer;
the buffer is used for buffering the six input PWM signals and outputting the signals to an MOS tube driving circuit for driving an H bridge; and when the protection signal is input, the output is closed.
Specifically, the abnormality judgment and correction of the control logic of the six-step commutation method can be realized, and the abnormality judgment and correction of the FOC control logic can also be realized; the signal correction unit comprises a first logic judgment correction branch and a second logic judgment correction branch;
the first logic judgment and correction branch is used for carrying out logic abnormality judgment and abnormality correction on the six-step commutation method control logic;
and the second logic judgment and correction branch is used for carrying out logic abnormity judgment and abnormity correction on the FOC control logic.
More specifically, the first logic judgment and correction branch comprises a logic judgment module, a logic storage module and a logic correction module;
the logic judgment module is used for judging whether the input six paths of PWM signals accord with six-step commutation method control logic or not;
the logic storage module is used for storing six paths of PWM signals which are judged to accord with the six-step commutation method control logic for the last time;
and the logic correction module is used for replacing the PWM signals with logic abnormality by adopting the six paths of PWM signals stored by the logic storage module when the logic abnormality occurs in the six-step commutation method control logic.
Preferably, the judgment conditions of the six-step commutation method control logic in the logic judgment module are as follows:
the six input paths of PWM signals comprise two signals which are 1; and two signals which are '1' are not on the same line of the H bridge, one is an upper tube, and the other is a PWM signal of a lower tube.
In the present embodiment, the PWM signals of the upper tube and the lower tube of the H-bridge first line are PWM1 and PWM2, respectively;
PWM signals of an upper tube and a lower tube of a second line of the H bridge are PWM3 and PWM4 respectively;
PWM signals of an upper tube and a lower tube of a third line of the H bridge are PWM5 and PWM6 respectively;
specifically, the judgment conditions of the six-step commutation method control logic include the following six conditions:
the first method comprises the following steps: PWM _1 and PWM _ 4;
and the second method comprises the following steps: PWM _1, PWM _ 6;
and the third is that: PWM _3, PWM _ 2;
and fourthly: PWM _3, PWM _ 6;
and a fifth mode: PWM _5, PWM _ 2;
and a sixth mode: PWM _5, PWM _ 4.
More specifically, the second logic judgment and correction branch comprises a logic judgment module, a logic storage module and a logic correction module;
the logic judgment module is used for judging whether the input six paths of PWM signals accord with FOC control logic or not;
the logic storage module is used for storing six paths of PWM signals which are judged to accord with FOC control logic for the last time;
and the logic correction module is used for replacing the PWM signal with the logic abnormity by adopting the six paths of PWM signals stored by the logic storage module when the FOC control logic is in the logic abnormity.
Preferably, the judgment conditions of the FOC control logic in the logic judgment module are as follows:
the six input paths of PWM signals comprise three signals of '1'; and the three "1" signals are not on the same line of the H-bridge.
Specifically, for the sequence of six MOS transistors of the H-bridge of this embodiment, the FOC control logic determination conditions include the following six conditions:
the first method comprises the following steps: PWM _1, PWM _3 and PWM _ 6;
and the second method comprises the following steps: PWM _1, PWM _5 and PWM _ 4;
and the third is that: PWM _3, PWM _5 and PWM _ 2;
and fourthly: PWM _1, PWM _4 and PWM _ 6;
and a fifth mode: PWM _3, PWM _2 and PWM _ 6;
and a sixth mode: PWM _5, PWM _2, PWM _ 4.
Through the signal correction unit, the identification of the six-step commutation method control logic and the FOC control logic, the identification and the repair of logic abnormality are realized, and the logic error that the upper pipe and the lower pipe are simultaneously conducted in the same circuit in the control logic is avoided.
The signal correction unit of the present embodiment may be implemented by a hardware circuit, or may be implemented by a single chip microcomputer and an integrated logic circuit such as an FPGA.
After the abnormity is found, six paths of PWM signals which accord with the control logic are judged at the last time, so that the logic error is avoided, and even if individual control signals are lacked, the current asymmetry on the signals can be only caused due to the fact that the signal data volume output by the brushless motor is large and the individual signals are lacked, but the action of the brushless motor cannot be influenced.
Specifically, as shown in fig. 2, the logic protection unit includes a first nand gate, a second nand gate, a third nand gate, a fourth nand gate, a first and gate, a second and gate, and a third and gate;
input signals of the first NAND gate are PWM signals PWM1 and PWM2 of an upper tube and a lower tube of an H bridge first circuit;
input signals of the second NAND gate are PWM signals PWM3 and PWM4 of an upper tube and a lower tube of an H-bridge second circuit;
input signals of the third NAND gate are PWM signals PWM5 and PWM6 of an upper tube and a lower tube of an H-bridge third circuit;
the input signals of the first AND gate are output signals of a first NAND gate and a second NAND gate;
the input signals of the second AND gate are the output signals of the first AND gate and the third NAND gate;
the input signals of the fourth NAND gate are the output signal of the second AND gate and an external control signal, the output signal is output to the enabling end of the buffer, and the buffer is closed when the output signal is '1';
the external control signal is "1" when normal and "0" when a failure occurs.
Two input signals of the third AND gate are a temperature control switch signal and an enable signal of the DSP control logic protection unit, and an output signal is an external control signal.
The temperature control switch signal is 1 when the temperature is normal and 0 when the temperature is over-temperature; the DSP controls an enabling signal of the logic protection unit to be 1 when enabled and 0 when not enabled.
Specifically, the working process of the logic protection unit is as follows:
PWM1 and PWM2 are a set of PWM signals that are in opposite phase at any time, so that when the signals are correct, after passing through the nand gate, the PWM12 signal outputs 1;
similarly, after the NAND gates are passed by PWM3 and PWM4, the PWM34 signal outputs 1.
The processed PWM12 signal and the PWM34 signal are both 1, and after the signals pass through the AND gate, the PWM1234 signal output by the AND gate is 1.
After passing through the NAND gate, PWM5 and PWM6 have a signal of 1 at PWM56 and a signal of 1 at PWM123456 after being AND-ed with the signal of PWM 1234.
the/OC _ T signal is a signal of a temperature controlled switch, which is 1 when the board temperature is in the normal range, and is 0 if the board temperature exceeds the threshold temperature.
The DSP _ EN signal is a signal for controlling the enabling of the module buffer by the DSP, when the signal is 1, the buffer is enabled, and when the signal is 0, the buffer is closed.
the/OC _ T signal and the DSP _ EN signal are both 1 during normal operation, the signal is still 1 after passing through an AND gate, and then the signal passes through an NAND gate with the PWM123456 signal, so that both the signals are 1 during normal operation, the signal becomes 0 after passing through the NAND gate, namely the ENABLE signal is 0 when the signal is fed into normal operation, and the signal is connected with an ENABLE pin of a buffer and ENABLEs the buffer.
If any of the above signals is abnormal, such as PWM1 and PWM2 are both 1, then there will be a signal of 0 when reaching the last nand gate, and after passing through the nand gate, signal ENABLE is 1, at which time the buffer ENABLE is turned off.
In the initial state, the PWM 1-6 signal can default to the state of 0 due to the pull-down resistance of the hardware, and the signal is still 1 after passing through the NAND gate, so the condition of the initial state and the circuit locking can not occur.
The logic protection unit of the embodiment is built by adopting a pure hardware circuit, is quick in judgment and small in time delay, particularly has a good inhibiting effect on an instantaneous burr interference signal generated by the interference signal, and prevents the burr interference from being carried out to cause logic errors and damage the circuit; and the logic protection unit has simple circuit, small volume, low cost and convenient popularization and application.
In another specific aspect of this embodiment, a servo controller is disclosed, as shown in fig. 3, including a CPU, an MOS transistor driver, an H-bridge, and a servo control signal logic protection circuit;
six paths of PWM signals output by the CPU are subjected to logic protection of the servo control signal logic protection circuit, are output to corresponding MOS tubes of the H bridge after being subjected to signal driving by the MOS tube driver, and enable the H bridge to output power signals to control the action of the steering engine.
The servo control signal logic protection circuit in the scheme of the embodiment adopts the servo control signal logic protection circuit in the scheme of the embodiment to perform signal correction and logic protection on the six paths of PWM signals output by the CPU.
In another specific aspect of this embodiment, an unmanned helicopter is disclosed, which is a coaxial unmanned helicopter and includes two sets of rotors;
each group of rotor wings comprises three steering engines, tilting disks and propellers;
the three steering engines are used for controlling the flight attitude of the unmanned helicopter by adjusting the angle of the propeller through adjusting the tilting disk;
the steering engine performs attitude adjustment through the servo controller in the above embodiment.
By the specific scheme of the embodiment, the attitude adjustment of the coaxial unmanned aerial vehicle is realized, and the steering engine is prevented from working abnormally due to the combination error of the control signals; and the phenomenon of instantaneous jamming of the steering engine caused by interference ensures good use condition of the steering engine.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Claims (10)
1. A servo control signal logic protection circuit is characterized by comprising a signal correction unit, a logic protection unit and a buffer;
the signal correction unit is used for receiving six paths of PWM signals output by the CPU, and outputting the six paths of PWM signals to the logic protection unit and the buffer after logic abnormality judgment and abnormality correction are carried out;
the logic protection unit is used for judging whether logic errors which enable an upper tube and a lower tube of the same line of the H bridge to be simultaneously conducted exist in the input six paths of PWM signals; if so, outputting a protection signal to the buffer;
the buffer is used for buffering the six input PWM signals and outputting the signals to an MOS tube driving circuit for driving an H bridge; and when the protection signal is input, the output is closed.
2. The servo control signal logic protection circuit of claim 1, wherein the signal modification unit comprises a first logic decision modification branch and a second logic decision modification branch;
the first logic judgment and correction branch is used for carrying out logic abnormality judgment and abnormality correction on the six-step commutation method control logic;
and the second logic judgment and correction branch is used for carrying out logic abnormity judgment and abnormity correction on the FOC control logic.
3. The servo control signal logic protection circuit of claim 2, wherein the first logic judgment correction branch comprises a logic judgment module, a logic storage module and a logic correction module;
the logic judgment module is used for judging whether the input six paths of PWM signals accord with six-step commutation method control logic or not;
the logic storage module is used for storing six paths of PWM signals which are judged to accord with the six-step commutation method control logic for the last time;
and the logic correction module is used for replacing the PWM signals with logic abnormality by adopting the six paths of PWM signals stored by the logic storage module when the logic abnormality occurs in the six-step commutation method control logic.
4. The servo control signal logic protection circuit of claim 3,
the judgment conditions of the six-step reversing method control logic in the logic judgment module are as follows:
the six input paths of PWM signals comprise two signals which are 1; and two signals which are '1' are not on the same line of the H bridge, one is an upper tube, and the other is a PWM signal of a lower tube.
5. The servo control signal logic protection circuit of claim 2, wherein the second logic judgment correction branch comprises a logic judgment module, a logic storage module and a logic correction module;
the logic judgment module is used for judging whether the input six paths of PWM signals accord with FOC control logic or not;
the logic storage module is used for storing six paths of PWM signals which are judged to accord with FOC control logic for the last time;
and the logic correction module is used for replacing the PWM signal with the logic abnormity by adopting the six paths of PWM signals stored by the logic storage module when the FOC control logic is in the logic abnormity.
6. The logic protection circuit of claim 5, wherein the FOC control logic in the logic determination module is configured to determine the following conditions:
the six input paths of PWM signals comprise three signals of '1'; and the three "1" signals are not on the same line of the H-bridge.
7. The servo control signal logic protection circuit of claim 1, wherein the logic protection unit comprises a first nand gate, a second nand gate, a third nand gate, a first and gate, a second and gate, and a fourth nand gate;
input signals of the first NAND gate are PWM signals PWM1 and PWM2 of an upper tube and a lower tube of an H bridge first circuit;
input signals of the second NAND gate are PWM signals PWM3 and PWM4 of an upper tube and a lower tube of an H-bridge second circuit;
input signals of the third NAND gate are PWM signals PWM5 and PWM6 of an upper tube and a lower tube of an H-bridge third circuit;
the input signals of the first AND gate are output signals of a first NAND gate and a second NAND gate;
the input signals of the second AND gate are the output signals of the first AND gate and the third NAND gate;
the input signals of the fourth NAND gate are the output signal of the second AND gate and an external control signal, the output signal is output to the enabling end of the buffer, and the buffer is closed when the output signal is '1';
the external control signal is "1" when normal and "0" when a failure occurs.
8. The servo control signal logic protection circuit of claim 7, wherein the logic protection unit further comprises a third and gate; two input signals of the third AND gate are a temperature control switch signal and an enable signal of the DSP control logic protection unit, and an output signal is the external control signal;
the temperature control switch signal is 1 when the temperature is normal and 0 when the temperature is over-temperature; the DSP controls an enabling signal of the logic protection unit to be 1 when enabled and 0 when not enabled.
9. A servo controller comprises a CPU, an MOS tube driver and an H bridge; the servo control signal logic protection circuit is characterized by further comprising a servo control signal logic protection circuit according to any one of claims 1 to 8, wherein the servo control signal logic protection circuit is used for carrying out signal correction and logic protection on six paths of PWM signals output by the CPU and then outputting the signals to the MOS tube driver to carry out power driving on the H bridge.
10. An unmanned helicopter is characterized by being a coaxial unmanned helicopter and comprising two groups of rotors;
each group of rotor wings comprises three steering engines, tilting disks and propellers;
the three steering engines are used for controlling the flight attitude of the unmanned helicopter by adjusting the angle of the propeller through adjusting the tilting disk;
the steering engine is subjected to attitude adjustment by a servo controller according to claim 9.
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