CN114031032A - Cross-layer over-etching gradient test structure and test method for multi-layer bonding MEMS device - Google Patents

Cross-layer over-etching gradient test structure and test method for multi-layer bonding MEMS device Download PDF

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CN114031032A
CN114031032A CN202111326978.3A CN202111326978A CN114031032A CN 114031032 A CN114031032 A CN 114031032A CN 202111326978 A CN202111326978 A CN 202111326978A CN 114031032 A CN114031032 A CN 114031032A
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layer
over
shaped silicon
etching
beam unit
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刘海韵
李臣民
高红民
沈洁
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Hohai University HHU
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00523—Etching material
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00—Manufacture or treatment of microstructural devices or systems
    • B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101—Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0128—Processes for removing material
    • B81C2201/013—Etching
    • B81C2201/0135—Controlling etch progression

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Abstract

The invention discloses a cross-layer over-etching gradient test structure and a test method for a multi-layer bonding MEMS device, wherein the test structure comprises an SOI (silicon on insulator) silicon chip and an upper silicon chip which are connected in a bonding manner; the SOI silicon chip comprises a bottom silicon substrate, an insulating layer and an over-etching structure consisting of a monocrystalline silicon structure layer which are sequentially arranged from bottom to top; the upper layer silicon wafer comprises a first L-shaped silicon beam unit, a second L-shaped silicon beam unit, a third L-shaped silicon beam unit and a fourth L-shaped silicon beam unit which are arranged in sequence at equal intervals; the four L-shaped silicon beam units enclose a square etching area; the testing method comprises the steps of measuring the equivalent resistivity of the over-etched structure by adopting a four-wire method, and calculating the over-etched gradient of the over-etched structure according to the equivalent resistivity. The test structure is simple, the preparation cost is low, the test method has simple steps, the result can be quickly obtained, and the universality is strong.

Description

Cross-layer over-etching gradient test structure and test method for multi-layer bonding MEMS device
Technical Field
The invention relates to a cross-layer over-etching gradient test structure and a cross-layer over-etching gradient test method for a multi-layer bonding MEMS device, and belongs to the technical field of semiconductors.
Background
Micro-Electro-Mechanical systems (MEMS) are a leading research area developed on the basis of microelectronics. Its basic features are miniaturization, high integration and high-precision batch manufacture. With the development of the MEMS industrialization, the design structure of the MEMS product is more and more complex, the requirement for the process line is higher and higher, and the on-line testing technology is the key to monitor the process line and ensure the yield of the process line.
Many MEMS products adopt a multilayer bonding technology, and Deep Etching is often performed by using a DRIE (Deep Reactive Ion Etching) process when a movable structure therein is fabricated, which may generate cross-layer over-Etching, an over-Etching region with a slope is formed at the bottom, and the over-Etching region may expand directly below an upper structure layer, and when the movable structure moves up and down, it is very easy to adhere to the over-Etching region, resulting in device failure, and therefore a test structure needs to be designed for monitoring the cross-layer over-Etching generated by the Etching process in the multilayer bonding MEMS device.
The test structure and the product to be monitored adopt the same processing technology, the test must adopt common test instruments and test environment, and use electrical test means, and no related test structure meeting the test requirements exists at present.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, and provides a cross-layer over-etching gradient test structure and a test method for a multi-layer bonding MEMS device, which can obtain the over-etching gradient of an over-etching structure.
In order to achieve the purpose, the invention is realized by adopting the following technical scheme:
on one hand, the invention provides a cross-layer over-etching gradient test structure for a multilayer bonding MEMS device, which is characterized by comprising an SOI (silicon on insulator) silicon chip and an upper silicon chip which are in bonding connection;
the SOI silicon chip comprises a bottom layer silicon substrate, an insulating layer and an over-etching structure which are sequentially arranged from bottom to top, wherein the over-etching structure is made of monocrystalline silicon;
the upper layer silicon wafer comprises a first L-shaped silicon beam unit, a second L-shaped silicon beam unit, a third L-shaped silicon beam unit and a fourth L-shaped silicon beam unit which are arranged in sequence at equal intervals;
the four L-shaped silicon beam units enclose a square etching area;
each L-shaped silicon beam unit comprises an L-shaped silicon beam, an anchor area is arranged at the inflection point of the L-shaped silicon beam, and an electrode is arranged at the top end of the anchor area and used for being connected with an external power supply or a voltmeter.
Furthermore, a first metal bonding layer is arranged at the bottom end of each anchor area, and a second metal bonding layer corresponding to each first metal bonding layer is arranged at the top of the over-etched structure;
the SOI silicon chip and the upper silicon chip which are connected in a bonding mode through the first metal bonding layer and the second metal bonding layer.
Furthermore, the L-shaped silicon beam is made of monocrystalline silicon.
Further, the electrode is a metal electrode.
In another aspect, the invention provides a cross-layer over-etching gradient testing method for a multi-layer bonding MEMS device, comprising the following steps:
a direct current power supply I is externally connected between the first L-shaped silicon beam unit and the second L-shaped silicon beam unit, and the voltage V between the third L-shaped silicon beam unit and the fourth L-shaped silicon beam unit is measured1；
A direct current power supply I is externally connected between the second L-shaped silicon beam unit and the third L-shaped silicon beam unit, and the voltage V between the fourth L-shaped silicon beam unit and the first L-shaped silicon beam unit is measured2；
According to V1、V2And I, calculating to obtain equivalent resistivity rho of the over-etched structureeffAnd according to the equivalent resistivity ρeffAnd calculating the over-etching gradient of the over-etched structure.
Further, said is according to V1、V2And I, calculating to obtain equivalent resistivity rho of the over-etched structureeffComprises obtaining rho by the formulaeff：
Figure BDA0003347259680000021
And h is the thickness of the bottom SOI single crystal silicon structure layer.
Further, the resistivity p according to equivalent resistivityeffCalculating the over-etching gradient of the over-etched structure comprises obtaining by the following formula:
Figure BDA0003347259680000022
where ρ isrefThe resistivity of the bottom SOI single crystal silicon structure layer is shown, and l is the side length of the etching area.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, the four L-shaped silicon beam units arranged clockwise surround the square etching area, and the test is carried out by an electrical means, so that the structure is simple, the operation is easy, the calculation process is simple, the universality is strong, and the over-etching gradient of the piece to be tested with the over-etching structure can be quickly obtained.
Drawings
FIG. 1 is a top view of an embodiment of a cross-layer over-etched slope test structure for a multi-layer bonded MEMS device according to the present invention;
FIG. 2 is a side view of one embodiment of a cross-layer over-etched slope test structure for a multi-layer bonded MEMS device of the present invention;
in the figure: 1. an L-shaped silicon beam; 2. an electrode; 3. an anchor area; 4. a base layer silicon substrate; 5. an insulating layer; 6. an over-etched structure; 7. a first metal bonding layer; 8. a second metal bonding layer; 9. a square etching area; 101. a first L-shaped silicon beam unit; 102. a second L-shaped silicon beam unit; 103. a third L-shaped silicon beam unit; 104. a fourth L-shaped silicon beam unit; 201. a first electrode; 202. a second electrode; 203. a third electrode; 204. and a fourth electrode.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.
Example 1
The embodiment provides a cross-layer over-etching gradient test structure for a multi-layer bonding MEMS device, which comprises an SOI (silicon on insulator) silicon chip and an upper silicon chip which are connected in a bonding manner; the SOI silicon chip comprises a bottom layer silicon substrate 4, an insulating layer 5 and an over-etching structure 6 which are sequentially arranged from bottom to top, wherein the over-etching structure 6 is made of monocrystalline silicon; the upper layer silicon wafer comprises a first L-shaped silicon beam unit 101, a second L-shaped silicon beam unit 102, a third L-shaped silicon beam unit 103 and a fourth L-shaped silicon beam unit 104 which are arranged in sequence at equal intervals; the four L-shaped silicon beam units form a square etching area 9 in a surrounding mode; each L-shaped silicon beam unit comprises an L-shaped silicon beam 1, an anchor area 3 is arranged at the inflection point of the L-shaped silicon beam 1, an electrode 2 is arranged at the top end of the anchor area 3, and the electrode 2 is used for being connected with an external power supply or a voltmeter.
When the present embodiment is applied, first, an external first power source is connected between the first electrode 201 and the second electrode 202, and an external first pressure measuring device is connected to two ends of the third electrode 203 and the fourth electrode 204 for detectingA voltage V across the third electrode 203 and the fourth electrode 2041(ii) a Then, an external second power supply is connected between the second electrode 202 and the third electrode 203, an external second pressure measuring device is connected to the two ends of the fourth electrode 204 and the first electrode 201, and the voltage V at the two ends of the fourth electrode 204 and the first electrode 201 is detected2. Wherein the first power supply and the second power supply are the same in size.
According to the invention, the four L-shaped silicon beam units arranged clockwise surround the square etching area, and the test is carried out by an electrical means, so that the structure is simple, the operation is simple, and the universality is strong.
Example 2
On the basis of embodiment 1, the bottom end of each anchor region 3 of this embodiment is provided with a first metal bonding layer 7, and the top of the over-etching structure 6 is provided with a second metal bonding layer 8 corresponding to each first metal bonding layer 7; the SOI silicon wafer and the upper silicon wafer which are in bonding connection through the first metal bonding layer 7 and the second metal bonding layer 8.
In addition, the L-shaped silicon beam 1 is made of monocrystalline silicon, and the electrode 2 is a metal electrode.
In application, an anchor region 3 is etched in an upper silicon wafer, then the upper silicon wafer and an SOI silicon wafer are bonded together by adopting a gold-gold bonding process, then the upper surface of the upper silicon wafer is thinned, four L-shaped silicon beams 1 are etched in the upper silicon wafer by adopting a DRIE (DRIE etching) process, and an over-etched structure 6 is formed in a bottom SOI (silicon on insulator) single crystal silicon structure layer; finally, the electrode 2 is arranged on the upper surface of the upper silicon chip.
Example 3
The embodiment provides a cross-layer over-etching gradient testing method for a multi-layer bonding MEMS device, which comprises the following steps of:
a direct current power supply I is externally connected between the first L-shaped silicon beam unit 101 and the second L-shaped silicon beam unit 102, and a voltage V between the third L-shaped silicon beam unit 103 and the fourth L-shaped silicon beam unit 104 is measured1；
A direct current power supply I is externally connected between the second L-shaped silicon beam unit 102 and the third L-shaped silicon beam unit 103, and the voltage V between the fourth L-shaped silicon beam unit 104 and the first L-shaped silicon beam unit 101 is measured2；
According to V1、V2And I, calculating to obtain the equivalent resistivity rho of the over-etched structure 6effAnd according to the equivalent resistivity ρeffAnd calculating the over-etching gradient of the over-etched structure 6.
The test method is simple, easy to operate and simple in calculation step, and the over-etching gradient of the over-etching structure 6 can be quickly obtained.
Example 4
On the basis of embodiment 3, the embodiment also provides equivalent resistivity ρefAnd the algorithm of the over-carved gradient:
(one) equivalent resistivity ρefIs calculated by
According to V1、V2And I, calculating the equivalent resistivity rho of the over-etched structure 6 through (1)eff；
Figure BDA0003347259680000041
And h is the thickness of the bottom SOI single crystal silicon structure layer.
(II) over-etching gradient algorithm
According to equivalent resistivity ρeffCalculating the over-etching gradient of the over-etched structure 6 by the formula (2):
Figure BDA0003347259680000051
where ρ isrefThe resistivity of the bottom SOI single crystal silicon structure layer is shown, and l is the side length of the etching area.
In conclusion, the test structure is simple in structure, easy to operate and low in preparation cost; the test method has the advantages of simple test steps, easy operation, capability of quickly obtaining a calculation result and strong universality.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (7)

1. A cross-layer over-etching gradient test structure for a multilayer bonded MEMS device is characterized by comprising an SOI (silicon on insulator) silicon chip and an upper silicon chip which are bonded and connected;
the SOI silicon chip comprises a bottom layer silicon substrate (4), an insulating layer (5) and an over-etching structure (6) which are sequentially arranged from bottom to top, wherein the over-etching structure (6) is made of monocrystalline silicon;
the upper layer silicon wafer comprises a first L-shaped silicon beam unit (101), a second L-shaped silicon beam unit (102), a third L-shaped silicon beam unit (103) and a fourth L-shaped silicon beam unit (104) which are arranged in sequence at equal intervals;
the four L-shaped silicon beam units enclose a square etching area (9);
each L-shaped silicon beam unit comprises an L-shaped silicon beam (1), an anchor area (3) is arranged at the inflection point of the L-shaped silicon beam (1), an electrode (2) is arranged at the top end of the anchor area (3), and the electrode (2) is used for being connected with an external power supply or a voltmeter.
2. The structure for testing the over-etching gradient of the multi-layer bonding MEMS device as claimed in claim 1, wherein a first metal bonding layer (7) is arranged at the bottom end of each anchor region (3), and a second metal bonding layer (8) corresponding to each first metal bonding layer (7) is arranged at the top of the over-etching structure (6);
the SOI silicon chip and the upper silicon chip which are connected in a bonding mode through a first metal bonding layer (7) and a second metal bonding layer (8).
3. The structure for testing the cross-layer over-etching gradient of the multilayer bonding MEMS device as claimed in claim 1, wherein the L-shaped silicon beam (1) is made of monocrystalline silicon.
4. The structure for cross-layer over-etching gradient test of the multi-layer bonding MEMS device as claimed in claim 1, wherein the electrode (2) is a metal electrode.
5. A cross-layer over-etching gradient testing method for a multi-layer bonding MEMS device is characterized by comprising the following steps:
a direct current power supply I is externally connected between the first L-shaped silicon beam unit (101) and the second L-shaped silicon beam unit (102), and the voltage V between the third L-shaped silicon beam unit (103) and the fourth L-shaped silicon beam unit (104) is measured1；
A direct current power supply I is externally connected between the second L-shaped silicon beam unit (102) and the third L-shaped silicon beam unit (103), and the voltage V between the fourth L-shaped silicon beam unit (104) and the first L-shaped silicon beam unit (101) is measured2；
According to V1、V2And I, calculating to obtain the equivalent resistivity rho of the over-etched structure (6)effAnd according to the equivalent resistivity ρeffAnd calculating the over-etching gradient of the over-etched structure (6).
6. The method of claim 5, wherein the V-base is a value of1、V2And I, calculating to obtain the equivalent resistivity rho of the over-etched structure (6)effComprises obtaining rho through the formula (1)eff：
Figure FDA0003347259670000011
And h is the thickness of the bottom SOI single crystal silicon structure layer.
7. The method of claim 5, wherein the p is the equivalent resistivity peffCalculating the over-etching gradient of the over-etched structure (6) comprises the following steps of (2):
Figure FDA0003347259670000021
where ρ isrefThe resistivity of the bottom SOI single crystal silicon structure layer is shown, and l is the side length of the etching area.
CN202111326978.3A 2021-11-10 2021-11-10 Cross-layer over-etching gradient test structure and test method for multi-layer bonding MEMS device Pending CN114031032A (en)

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