CN114020380A - Radar image display device and method - Google Patents
Radar image display device and method Download PDFInfo
- Publication number
- CN114020380A CN114020380A CN202111224900.0A CN202111224900A CN114020380A CN 114020380 A CN114020380 A CN 114020380A CN 202111224900 A CN202111224900 A CN 202111224900A CN 114020380 A CN114020380 A CN 114020380A
- Authority
- CN
- China
- Prior art keywords
- radar
- module
- display
- image
- graphic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 16
- 102100029368 Cytochrome P450 2C18 Human genes 0.000 claims abstract description 7
- 101000919360 Homo sapiens Cytochrome P450 2C18 Proteins 0.000 claims abstract description 7
- 230000001133 acceleration Effects 0.000 claims description 18
- 238000009877 rendering Methods 0.000 claims description 10
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 230000000694 effects Effects 0.000 claims description 4
- 230000007613 environmental effect Effects 0.000 claims description 3
- 238000012544 monitoring process Methods 0.000 claims description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000012549 training Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/451—Execution arrangements for user interfaces
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
One embodiment of the present invention discloses a radar image display apparatus and method, the apparatus including: the system comprises a graph cache module and an FPGA module, wherein radar target instruction information sent by an upper application program is transmitted to an instruction queue cache of the FPGA module through a CPCI bus; the graphic cache module is used for frame caching of radar basic graphic information and storing radar basic graphics; the FPGA module is used for analyzing the radar target instruction information in the instruction queue cache, and overlapping the analyzed data with the radar basic graph to form and output a radar display image of each frame. The radar image display device and the method solve the problems of computer resource occupation, untimely image reflection, insufficient image authenticity and the like caused by pure software drawing.
Description
Technical Field
The present invention relates to the field of image display. And more particularly, to a radar image display apparatus and method.
Background
In a simulation training system, it is often necessary to simulate the images produced by various types of sensors, such as the scanning waveforms of a radar. Generally, related images are drawn through pure software design, but the method is often low in efficiency, needs to occupy a large amount of computing resources of a computer, and is not timely in image reflection and insufficient in reality. The problems can be well solved by configuring corresponding embedded software to replace pure software drawing through the hardware board card.
Disclosure of Invention
The invention aims to provide a radar image display device, which solves the problems of computer resource occupation, untimely image reflection, insufficient image authenticity and the like caused by pure software drawing.
Another object of the present invention is to provide a radar image display method.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides a radar image display apparatus comprising: a graphics cache module and an FPGA module, wherein,
radar target instruction information sent by an upper application program is transmitted to an instruction queue cache of the FPGA module through a CPCI bus;
the graphic cache module is used for frame caching of radar basic graphic information and storing radar basic graphics;
the FPGA module is used for analyzing the radar target instruction information in the instruction queue cache, and overlapping the analyzed data with the radar basic graph to form and output a radar display image of each frame.
In a specific example, the FPGA module includes an embedded operating system, and the embedded operating system is configured to parse radar target instruction information in an instruction queue cache.
In a specific example, the embedded operating system includes a graphics rendering acceleration module, where the graphics rendering acceleration module calls a radar basic graphics in the graphics cache module, and performs an overlay process with data analyzed by the embedded operating system to form a radar display image of each frame.
In a specific example, the apparatus further includes a video digital-to-analog conversion module and a display device, and in the display period of each image information frame, the graphics rendering acceleration module outputs the radar display image of each frame to the display device through the video digital-to-analog conversion module for display.
In one particular example, the graphics rendering acceleration module further supports special effects in the display of radar image information.
In one specific example, the device is provided with one VGA video output, and can achieve 1280 by 1024 resolution, 60Hz refresh frequency and graphic display of multiple layers.
In a specific example, the device provides a driver under vxworks5.5, and the upper application program initializes the device, inputs radar target instruction information to be drawn, calls a drawing instruction and monitors the working state of the device by loading a special driver package.
In one specific example, the radar base pattern includes: radar scanning patterns, aerial target patterns, airborne active interference patterns, remote support interference patterns and environmental passive interference patterns.
In a second aspect, the present invention provides a radar image display method, including the steps of:
s101: the FPGA module receives radar target instruction information transmitted through the CPCI bus and places the radar target instruction information in an instruction queue cache of the FPGA module;
s103: the embedded operating system analyzes the radar target instruction information in the instruction queue cache;
s105: the graphic drawing acceleration module calls a radar basic graphic in the graphic cache module, and the radar basic graphic is overlapped with data analyzed by the embedded operating system to form a radar display image of each frame;
s107: in the display period of each image information frame, the graphic drawing acceleration module outputs the radar display image of each frame to the display equipment for display through the video digital-to-analog conversion module.
The invention has the following beneficial effects:
according to the radar image display device and method, the hardware board card is used for configuring corresponding embedded software to replace pure software drawing, and the problems of computer resource occupation, untimely image reflection, insufficient image authenticity and the like caused by pure software drawing are solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a radar image display device according to an embodiment of the present invention.
Fig. 2 shows a flowchart of a radar image display method according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The first embodiment of the invention provides a radar image display device, which has one path of VGA video output and can realize the graphic display functions of 1280 × 1024 resolution, 60Hz refresh frequency and multiple layers;
as shown in fig. 1, the method comprises the following steps: a graphics cache module and an FPGA module, wherein,
radar target instruction information sent by an upper application program is transmitted to an instruction queue cache of the FPGA module through a CPCI bus;
the graphic cache module is used for frame caching of radar basic graphic information and storing radar basic graphics;
and the FPGA module is used as a graphic processing core and is used for analyzing the radar target instruction information in the instruction queue cache, and overlapping the analyzed data and the radar basic graphic to form and output a radar display image of each frame.
In a specific embodiment, the FPGA module includes an embedded operating system, and the embedded operating system is configured to parse radar target instruction information in the instruction queue cache.
In a specific embodiment, the embedded operating system includes a graphics rendering acceleration module, where the graphics rendering acceleration module calls a radar basic graphic in the graphics cache module, performs an overlay process with data analyzed by the embedded operating system, for example, what type of interference is applied at which time, and then forms a radar display image of each frame.
In a specific embodiment, the apparatus further includes a video digital-to-analog conversion module and a display device, and in the display period of each graphic information frame, the graphic drawing acceleration module outputs the radar display image of each frame to the display device through the video digital-to-analog conversion module for display.
In a specific embodiment, the graphic drawing acceleration module is used for supporting special effects in radar graphic information display, and especially provides complete support for special effects such as scanning lines and afterglow in radar information display.
In a specific embodiment, the device provides a driver under VxWorks5.5, and an upper application program realizes initialization of the device, inputting of radar target instruction information to be drawn, calling of a drawing instruction and monitoring of the working state of the device by loading a special driver package.
In one embodiment, the radar base pattern includes: radar scanning patterns, aerial target patterns, airborne active interference patterns, remote support interference patterns, environmental passive interference patterns and the like.
A second embodiment of the present invention provides a radar image display method, as shown in fig. 2, including the steps of:
s101: the FPGA module receives radar target instruction information transmitted through the CPCI bus and places the radar target instruction information in an instruction queue cache of the FPGA module;
s103: the embedded operating system analyzes the radar target instruction information in the instruction queue cache;
s105: the graphic drawing acceleration module calls a radar basic graphic in the graphic cache module, and the radar basic graphic is overlapped with data analyzed by the embedded operating system to form a radar display image of each frame;
s107: in the display period of each image information frame, the graphic drawing acceleration module outputs the radar display image of each frame to the display equipment for display through the video digital-to-analog conversion module.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (9)
1. A radar image display apparatus, characterized by comprising: a graphics cache module and an FPGA module, wherein,
radar target instruction information sent by an upper application program is transmitted to an instruction queue cache of the FPGA module through a CPCI bus;
the graphic cache module is used for frame caching of radar basic graphic information and storing radar basic graphics;
the FPGA module is used for analyzing the radar target instruction information in the instruction queue cache, and overlapping the analyzed data with the radar basic graph to form and output a radar display image of each frame.
2. The apparatus of claim 1, wherein the FPGA module comprises an embedded operating system configured to parse radar target instruction information in an instruction queue cache.
3. The device of claim 2, wherein the embedded operating system comprises a graphics rendering acceleration module, and the graphics rendering acceleration module calls the radar basic graphics in the graphics cache module, and performs an overlay process on the radar basic graphics and the data analyzed by the embedded operating system to form a radar display image of each frame.
4. The apparatus of claim 3, further comprising a video DAC module and a display device, wherein the graphics rendering acceleration module outputs the radar display image of each frame to the display device for display through the video DAC module during the display period of each frame of image information.
5. The apparatus of claim 3, wherein the graphics rendering acceleration module further supports special effects in the display of radar image information.
6. The apparatus of claim 1, wherein the apparatus has a VGA video output, and is capable of achieving 1280 by 1024 resolution, 60Hz refresh rate, and multi-layer graphic display.
7. The device according to claim 1, wherein the device provides a driver under VxWorks5.5, and the upper application program realizes initialization of the device, inputting of radar target instruction information to be drawn, calling of drawing instructions and monitoring of the working state of the device by loading a special driver package.
8. The apparatus of claim 1, wherein the radar base pattern comprises: radar scanning patterns, aerial target patterns, airborne active interference patterns, remote support interference patterns and environmental passive interference patterns.
9. A radar image display method is characterized by comprising the following steps:
s101: the FPGA module receives radar target instruction information transmitted through the CPCI bus and places the radar target instruction information in an instruction queue cache of the FPGA module;
s103: the embedded operating system analyzes the radar target instruction information in the instruction queue cache;
s105: the graphic drawing acceleration module calls a radar basic graphic in the graphic cache module, and the radar basic graphic is overlapped with data analyzed by the embedded operating system to form a radar display image of each frame;
s107: in the display period of each image information frame, the graphic drawing acceleration module outputs the radar display image of each frame to the display equipment for display through the video digital-to-analog conversion module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111224900.0A CN114020380A (en) | 2021-10-21 | 2021-10-21 | Radar image display device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111224900.0A CN114020380A (en) | 2021-10-21 | 2021-10-21 | Radar image display device and method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114020380A true CN114020380A (en) | 2022-02-08 |
Family
ID=80057002
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111224900.0A Pending CN114020380A (en) | 2021-10-21 | 2021-10-21 | Radar image display device and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114020380A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103685977A (en) * | 2013-09-11 | 2014-03-26 | 中国科学院电子学研究所 | An apparatus for real time displaying of images of a synthetic aperture radar |
| CN105260153A (en) * | 2015-10-15 | 2016-01-20 | 西安诺瓦电子科技有限公司 | Image output apparatus and image output method |
| CN105426149A (en) * | 2015-11-10 | 2016-03-23 | 北京恒宇信通科技发展有限公司 | FPGA (Field Programmable Gate Array)-based graphic display card |
| CN107329720A (en) * | 2017-06-30 | 2017-11-07 | 中国航空工业集团公司雷华电子技术研究所 | A kind of radar image based on ZYNQ shows acceleration system |
| CN110738594A (en) * | 2019-11-28 | 2020-01-31 | 苏州长风航空电子有限公司 | FPGA-based onboard electronic instrument image generation method |
-
2021
- 2021-10-21 CN CN202111224900.0A patent/CN114020380A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103685977A (en) * | 2013-09-11 | 2014-03-26 | 中国科学院电子学研究所 | An apparatus for real time displaying of images of a synthetic aperture radar |
| CN105260153A (en) * | 2015-10-15 | 2016-01-20 | 西安诺瓦电子科技有限公司 | Image output apparatus and image output method |
| CN105426149A (en) * | 2015-11-10 | 2016-03-23 | 北京恒宇信通科技发展有限公司 | FPGA (Field Programmable Gate Array)-based graphic display card |
| CN107329720A (en) * | 2017-06-30 | 2017-11-07 | 中国航空工业集团公司雷华电子技术研究所 | A kind of radar image based on ZYNQ shows acceleration system |
| CN110738594A (en) * | 2019-11-28 | 2020-01-31 | 苏州长风航空电子有限公司 | FPGA-based onboard electronic instrument image generation method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8878833B2 (en) | Systems, methods, and apparatus for recording of graphical display | |
| US10002021B2 (en) | Deferred preemption techniques for scheduling graphics processing unit command streams | |
| JP3286331B2 (en) | Block texture complex clip mask processor | |
| CN111737019B (en) | Method and device for scheduling video memory resources and computer storage medium | |
| JPH01129371A (en) | Raster scan display device and graphic data transfer | |
| CN114741044B (en) | Cross-operation environment display output sharing method based on heterogeneous rendering | |
| CN114972607B (en) | Data transmission method, device and medium for accelerating image display | |
| CN101154150A (en) | Method for capturing computer screen image | |
| US20140146064A1 (en) | Graphics memory load mask for graphics processing | |
| CN113010466B (en) | Interface switching method of ink screen equipment, ink screen equipment and storage medium | |
| CN110471701A (en) | Method, apparatus, storage medium and the electronic equipment of image rendering | |
| CN114840339A (en) | GPU server, data calculation method and electronic equipment | |
| CN114020380A (en) | Radar image display device and method | |
| CN113450733A (en) | Screen refreshing method, display system and user equipment | |
| CN108733602B (en) | Data processing | |
| CN112486807A (en) | Pressure testing method and device, electronic equipment and readable storage medium | |
| CN114998500B (en) | Rendering system and method based on SOC platform | |
| CN112882561B (en) | Display control method, storage medium, and electronic device | |
| CN102981806A (en) | Situation display area high-speed refreshing technique and implementation method thereof based on video memory pond | |
| CN109960562B (en) | Information display method and device and computer readable storage medium | |
| JPS61133482A (en) | Multiprocessor for graphic display | |
| CN103631548A (en) | Image external-connection device and method for processing image external-connection device | |
| US5644691A (en) | Method and apparatus for accelerated filling of polygons on a computer display by rectangular decomposition | |
| Snyder | Solving the embedded OpenGL puzzle-making standards, tools, and APIs work together in highly embedded and safety critical environments | |
| CN113713375B (en) | Interface element display method, device, terminal and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20220208 |
|
| RJ01 | Rejection of invention patent application after publication |