CN114003531A - USB Type C interface circuit and terminal equipment - Google Patents
USB Type C interface circuit and terminal equipment Download PDFInfo
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- CN114003531A CN114003531A CN202010739218.4A CN202010739218A CN114003531A CN 114003531 A CN114003531 A CN 114003531A CN 202010739218 A CN202010739218 A CN 202010739218A CN 114003531 A CN114003531 A CN 114003531A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
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Abstract
The invention discloses a USB Type C interface circuit and terminal equipment. The interface circuit includes: the first end of the first resistor is electrically connected with the CC1 end of the USB Type C interface, and the second end of the first resistor is electrically connected with the reference signal input end of the interface circuit; a first end of the second resistor is electrically connected with the CC2 end of the USB Type C interface, and a second end of the second resistor is electrically connected with the reference signal input end; a first voltage division network, a first end of which is electrically connected with a power supply end of the interface circuit, a second end of which is electrically connected with the reference signal input end, and a voltage division output end of which is electrically connected with a D-end of the USB Type C interface; and a first end of the second voltage division network is electrically connected with the power supply end, a second end of the second voltage division network is electrically connected with the reference signal input end, a voltage division output end of the second voltage division network is electrically connected with a D + end of the USB Type C interface, and a control end of the second voltage division network is electrically connected with the D-end. The invention can realize the power supply butt joint of the USB Type C interface under the condition of not using an integrated chip.
Description
Technical Field
The embodiment of the invention relates to a circuit technology, in particular to a USB Type C interface circuit and terminal equipment.
Background
The USB Type C interface has the advantages of strong protocol support, reverse plug compatibility and the like, so that the USB Type C interface is more and more widely applied to the mobile terminal;
however, the USB Type C interface is more complex than the Type B interface and the Type a version, and requires a built-in ic to support various devices or different communication requirements, such as high/low speed transmission, conventional charging and fast charging, USB2.0 protocol compatibility, etc.;
because integrated chip's cost is higher, in some terminal equipment that only need utilize the USBType C interface to carry out charging, if additionally set up an integrated chip, will increase terminal equipment's cost to be unfavorable for terminal equipment's popularization.
Disclosure of Invention
The invention provides a USB Type C interface circuit and a terminal device, which are used for realizing power supply butt joint of a USB Type C interface under the condition of not using an integrated chip.
In a first aspect, an embodiment of the present invention provides a USB Type C interface circuit, where the interface circuit includes: a first end of the first resistor is electrically connected with a CC1 end of a USB Type C interface, and a second end of the first resistor is electrically connected with a reference signal input end of the interface circuit; a first end of the second resistor is electrically connected with the CC2 end of the USB Type C interface, and a second end of the second resistor is electrically connected with the reference signal input end; a first voltage division network, a first end of which is electrically connected with a power end of the interface circuit, a second end of which is electrically connected with the reference signal input end, and a voltage division output end of which is electrically connected with a D-end of the USB Type C interface; the first end of the second voltage division network is electrically connected with the power supply end, the second end of the second voltage division network is electrically connected with the reference signal input end, the voltage division output end of the second voltage division network is electrically connected with the D + end of the USB Type C interface, the control end of the second voltage division network is electrically connected with the D-end, and the second voltage division network is used for adjusting the output voltage of the voltage division output end of the second voltage division network according to whether the D + end and the D-end are in short circuit or not.
Optionally, the second voltage-dividing network comprises: a first end of the third resistor is used as a first end of the second voltage division network, and a second end of the third resistor is used as a voltage division output end of the second voltage division network; a series network, a first end of the series network is electrically connected to a second end of the third resistor, the second end of the series network serves as a second end of the second voltage dividing network, the series network includes a fourth resistor and a switching transistor connected in series, and a control electrode of the switching transistor serves as a control end of the second voltage dividing network; a fifth resistor in parallel with the series network.
Optionally, a first terminal of the fourth resistor serves as a first terminal of the series network, a second terminal of the fourth resistor is electrically connected to a first pole of the switching transistor, and a second pole of the switching transistor serves as a second terminal of the series network.
Optionally, the first voltage-dividing network comprises: a sixth resistor and a seventh resistor; the first end of the sixth resistor is used as the first end of the first voltage division network, the second end of the sixth resistor is electrically connected with the first end of the seventh resistor, the second end of the sixth resistor is used as the voltage division output end of the first voltage division network, and the second end of the seventh resistor is used as the second end of the first voltage division network.
Optionally, at least one of the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, and the seventh resistor is an adjustable resistor.
Optionally, the interface circuit further comprises: an eighth resistor connected in parallel with the third resistor.
Optionally, a resistance value of the fourth resistor is smaller than one tenth of a resistance value of the third resistor.
Optionally, the threshold voltage of the switching transistor is smaller than a preset value.
Optionally, the preset value is a communication protocol level value.
In a second aspect, an embodiment of the present invention further provides a terminal device, where the terminal device includes the interface circuit described in the first aspect.
The technical scheme of this embodiment, the USB Type C interface circuit who adopts includes: the first end of the first resistor is electrically connected with the CC1 end of the USB Type C interface, and the second end of the first resistor is electrically connected with the reference signal input end of the interface circuit; a first end of the second resistor is electrically connected with the CC2 end of the USB Type C interface, and a second end of the second resistor is electrically connected with the reference signal input end; the first end of the first voltage division network is electrically connected with the power supply end of the interface circuit, the second end of the first voltage division network is electrically connected with the reference signal input end, and the voltage division output end of the first voltage division network is electrically connected with the D-end of the USB Type C interface; and the first end of the second voltage division network is electrically connected with the power supply end, the second end of the second voltage division network is electrically connected with the reference signal input end, the voltage division output end of the second voltage division network is electrically connected with the D + end, the control end of the second voltage division network is electrically connected with the D-end, and the second voltage division network is used for adjusting the output voltage of the voltage division output end of the second voltage division network according to whether the D + end and the D-end are in short circuit or not. When the interface circuit is connected to the power supply device, the first resistor or the second resistor pulls down the level value of the corresponding port on the power supply device, thereby indicating that the interface circuit is connected with the power supply device, at this time, the power supply device short-circuits the D + terminal and the D-terminal of the interface circuit, the interface circuit enables the level of the D + terminal to be maintained as the first level value through the first voltage division network and the second voltage division network, at this time, the power supply device learns that the terminal device provided with the interface circuit supports the fast charging protocol, and disconnects the D + terminal and the D-terminal, at this time, the D-terminal of the interface circuit is the second level value under the action of the first voltage division network, the D + terminal is the third level value under the action of the second voltage division network, the power supply device can output corresponding fast charging voltage to the terminal device according to the detected second level value and third level value, without arranging an integrated chip, the quick charging protocol connection with the power supply equipment can be realized only by a simple circuit, and the cost is greatly reduced.
Drawings
Fig. 1 is a schematic circuit structure diagram of a USB Type C interface circuit according to an embodiment of the present invention;
fig. 2 is a schematic circuit structure diagram of another USB Type C interface circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a terminal device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic circuit structure diagram of a USB Type C interface circuit according to an embodiment of the present invention, and referring to fig. 1, the interface circuit includes: a first end of the first resistor R1 is electrically connected with the CC1 end of the USB Type C interface, and a second end of the first resistor R1 is electrically connected with a reference signal input end of the interface circuit; a first end of the second resistor R2 is electrically connected with the CC2 end of the USB Type C interface, and a second end of the second resistor R2 is electrically connected with the reference signal input end; a first end of the first voltage division network 101 is electrically connected with a power supply end VCC of the interface circuit, a second end A2 of the first voltage division network 101 is electrically connected with a reference signal input end, and a voltage division output end A3 of the first voltage division network 101 is electrically connected with a D-end of the USB Type C interface; the first end B1 of the second voltage division network is electrically connected with a power supply end VCC, the second end B2 of the second voltage division network 102 is electrically connected with a reference signal input end, the voltage division output end B3 of the second voltage division network 102 is electrically connected with the D + end of the USB Type C interface, the control end B4 of the second voltage division network 102 is electrically connected with the D-end, and the second voltage division network 102 is used for adjusting the output voltage of the voltage division output end according to whether the D + end and the D-end are short-circuited.
Specifically, the USB Type C interface may include a plurality of ports, such as VBUS, GND for power supply ports, SBUS1 and SBUS2 for some special transmission modes, D + and D-for compatibility with the USB pre-standard, Tx and Rx for transmitting data, and CC1 and CC2 for initialization configuration, and the like. The USBType C interface circuit that this embodiment provided can regard as the armale end on the terminal equipment, when power supply unit and terminal equipment are connected, realizes power supply unit to terminal equipment's charging through interface circuit. A CC1 end and a CC2 end on the power supply equipment interface are connected with a pull-up resistor, and the default is high level; when the USB Type C interface is connected to the power supply device, the CC1 end or the CC2 end on the power supply device interface is connected to the reference signal input end of the interface circuit through the resistor R1 or the resistor R2, the reference signal input end may be a ground end, the power supply device may determine that the power supply device is well connected to the terminal device through the port where the signal is pulled down, and determine the polarity of the connection, and further activate the corresponding pin bank, at this time, the power supply device defaults to charge the terminal device with the first preset voltage, such as slow charging with 5V. Then, the power supply device shorts the D + terminal and the D-terminal according to a protocol stored in the power supply device, at this time, the levels of the D + terminal and the D-terminal are the same, and at this time, under the combined action of the first voltage division network 101 and the second voltage division network 102, the level value of the D + terminal/the D-terminal is a first level value, the first level value may be a standard USB Type C communication protocol setting value, such as 0.325V, and the power supply device detects that the level of the D + terminal maintains the first level value for a preset time (such as 1.25s), which indicates that the terminal device supports the fast charging protocol, at this time, the power supply device disconnects the D-terminal and the D + terminal, the level of the D-terminal is determined by the first voltage division network 101, and the level of the D + terminal is determined by the second voltage division network, so that the levels of the D + terminal and the D-terminal conform to the fast charging protocol. If the D + terminal is 3.3V and the D-terminal is 3.3V, the power supply equipment outputs 20V of charging voltage to the terminal equipment; when the D + end is 0.6V and the D-end is 0.6V, the power supply equipment outputs 12V of charging voltage to the terminal equipment; when the D + terminal is 3.3V and the D-terminal is 0.6V, the power supply equipment outputs 9V charging voltage to the terminal equipment, and therefore the corresponding quick charging function is achieved. In this embodiment, by setting that the output voltages of the divided-voltage output ends of the second voltage division network 102 are different when the D + end and the D-end are not short-circuited or short-circuited, it is ensured that the output voltages of the D + end and the D-end in the process of initiating the fast charge protocol are different from the output voltages of the D + end and the D-end after the initiation of the fast charge protocol is completed by the interface circuit, so that the power supply device realizes a corresponding fast charge function. And an integrated chip is not needed to be arranged, and the quick charging protocol connection with the power supply equipment can be realized only by a simple circuit, so that the cost is greatly reduced.
The technical scheme of this embodiment, the USB Type C interface circuit who adopts includes: the first end of the first resistor is electrically connected with the CC1 end of the USB Type C interface, and the second end of the first resistor is electrically connected with the reference signal input end of the interface circuit; a first end of the second resistor is electrically connected with the CC2 end of the USB Type C interface, and a second end of the second resistor is electrically connected with the reference signal input end; the first end of the first voltage division network is electrically connected with the power supply end of the interface circuit, the second end of the first voltage division network is electrically connected with the reference signal input end, and the voltage division output end of the first voltage division network is electrically connected with the D-end of the USB Type C interface; and the first end of the second voltage division network is electrically connected with the power supply end, the second end of the second voltage division network is electrically connected with the reference signal input end, the voltage division output end of the second voltage division network is electrically connected with the D + end, the control end of the second voltage division network is electrically connected with the D-end, and the second voltage division network is used for adjusting the output voltage of the voltage division output end of the second voltage division network according to whether the D + end and the D-end are in short circuit or not. When the interface circuit is connected to the power supply device, the first resistor or the second resistor pulls down the level value of the corresponding port on the power supply device, thereby indicating that the interface circuit is connected with the power supply device, at this time, the power supply device short-circuits the D + terminal and the D-terminal of the interface circuit, the interface circuit enables the level of the D + terminal to be maintained as the first level value through the first voltage division network and the second voltage division network, at this time, the power supply device learns that the terminal device provided with the interface circuit supports the fast charging protocol, and disconnects the D + terminal and the D-terminal, at this time, the D-terminal of the interface circuit is the second level value under the action of the first voltage division network, the D + terminal is the third level value under the action of the second voltage division network, the power supply device can output corresponding fast charging voltage to the terminal device according to the detected second level value and third level value, without arranging an integrated chip, the quick charging protocol connection with the power supply equipment can be realized only by a simple circuit, and the cost is greatly reduced.
Optionally, fig. 2 is a schematic circuit structure diagram of another USB Type C interface circuit according to an embodiment of the present invention, and referring to fig. 2, the second voltage-dividing network 102 includes: a third resistor R3, wherein a first terminal of the third resistor R3 is used as a first terminal B1 of the second voltage-dividing network 102, and a second terminal of the third resistor R3 is used as a voltage-dividing output terminal B3 of the second voltage-dividing network 102; a series network 1021, a first end of the series network 1021 is electrically connected to a second end of the third resistor R3, the second end of the series network 1021 serves as a second end B2 of the second voltage-dividing network 102, the series network 1021 includes a fourth resistor R4 and a switching transistor Q1 connected in series, and a control electrode of the switching transistor Q1 serves as a control end B4 of the second voltage-dividing network 102; a fifth resistor R5, a fifth resistor R5, is connected in parallel with the series network 1021.
Specifically, as shown in fig. 2, the switching transistor Q1 may be an NPN transistor, when the D + terminal and the D-terminal are shorted, the gate of the switching transistor Q1 is provided with a high level from the power source terminal VCC, so that the switching transistor Q1 is turned on, at this time, the fourth resistor R4 is connected in parallel with the fifth resistor R5, the third resistor R3 is connected in series with the fourth resistor R4 and the fifth resistor R5 after being connected in parallel, and under the combined action of the first voltage-dividing network 101, the output voltage of the D + terminal is at a first level value; after the D + terminal and the D-terminal are disconnected, the control electrode of the switching transistor Q1 cannot receive a high-level conducting signal, and the switching transistor Q1 is turned off, so that the second voltage division network 102 is a series structure of the third resistor R3 and the fifth resistor R5 at this time, and the voltage output by the D + terminal is different from the output voltage when the D-terminal of the D + terminal is short-circuited, thereby ensuring that the output voltages of the D + terminal and the D-terminal of the interface circuit in the process of initiating the fast charge protocol are different from the output voltages of the D + terminal and the D-terminal after the initiation of the fast charge protocol is completed, and enabling the power supply device to realize a corresponding fast charge function. The fifth resistor R5 is used to provide a current path, so as to avoid the phenomenon that the second voltage-dividing network 102 cannot form a current path when the switching transistor Q1 is turned off.
Optionally, with continued reference to fig. 2, a first terminal of the fourth resistor R4 serves as a first terminal of the series network 1021, a second terminal of the fourth resistor R4 is electrically connected to a first terminal of the switching transistor Q1, and a second terminal of the switching transistor Q1 serves as a second terminal of the series network 1021.
Specifically, the first pole of the switching transistor Q1 may be a collector, the second pole may be an emitter, and when the switching transistor Q1 is turned on, the second voltage division network 102 is a structure in which the fourth resistor R4 and the fifth resistor R5 are connected in parallel and then connected in series with the third resistor R3, where the level value of the D + terminal is the first level value; and when the switching transistor Q1 is turned off, the second voltage division network 102 is a series connection structure of a third resistor R3 and a fifth resistor R5, and the level value of the D + terminal is the third level value.
Optionally, with continued reference to fig. 2, the interface circuit further comprises: the eighth resistor R8 and the eighth resistor R8 are connected in parallel with the third resistor R3.
Optionally, with continued reference to fig. 2, the first voltage-dividing network 101 comprises: a sixth resistor R6 and a seventh resistor R7, wherein a first end of the sixth resistor R6 serves as a first end a1 of the first voltage-dividing network 101, a second end of the sixth resistor R6 is electrically connected to a first end of the seventh resistor R7, a second end of the sixth resistor R6 serves as a voltage-dividing output end of the first voltage-dividing network 101, and a second end of the seventh resistor R7 serves as a second end of the first voltage-dividing network 101.
Specifically, when the D + terminal and the D-terminal are short-circuited, the first voltage division network 101 and the second voltage division network 102 are equivalent to a structure in which the sixth resistor R6, the third resistor R3 and the eighth resistor R8 are connected in parallel and then connected in series with a parallel structure of the seventh resistor R7, the fourth resistor R4 and the fifth resistor R5, where a level value of the D + terminal is a first level value; when the D + end and the D-end are disconnected, the output voltage of the D-end is the divided voltage output of the sixth resistor R6 and the seventh resistor R7; the voltage division function of the first voltage division network 101 can be realized only by adopting two resistors, namely the sixth resistor R6 and the seventh resistor R7, and the circuit is simple in structure, easy to realize and low in cost.
Optionally, at least one of the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7 is an adjustable resistor.
Specifically, the USB Type C protocol includes multiple fast charging modes, the power supply device provides different fast charging voltages to the terminal device according to different levels of the D + terminal and the D-terminal, and by setting at least one of the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 as an adjustable resistor, the level value of the D + terminal and/or the D-terminal can be dynamically adjusted, so that the compatibility of the interface circuit is improved, and the application range of the interface circuit is favorably expanded.
Specifically, the eighth resistor R8 may be used as a part of the second voltage-dividing network 102, and the eighth resistor R8 may be used for dividing current, so as to prevent the phenomenon that the third resistor R3 is burned out due to an excessive current flowing through the third resistor R3 if only the third resistor R3 is provided, thereby improving the stability of the operation of the interface circuit.
Optionally, the threshold voltage of the switching transistor Q1 is less than a preset value.
Specifically, the preset value may be a voltage loaded at the D + terminal when the terminal device actively initiates a fast charging protocol process to the power supply device in the USB Type C protocol, that is, a communication protocol level value, for example, 0.325V, and by setting the threshold voltage of the switching transistor Q1 to be smaller than the preset value, that is, by setting the voltage loaded at the D + terminal when initiating the fast charging protocol process, the switching transistor Q1 is always in a conducting state in the protocol initiation process, that is, the voltage at the D + terminal is kept unchanged, for example, the preset value is maintained for at least 1.25s, so that the power supply device learns that the terminal device supports the fast charging protocol.
Optionally, the resistance value of the fourth resistor R4 is less than one tenth of the resistance value of the third resistor R3.
Specifically, in the process of initiating the fast charging protocol, it is necessary to keep the level value of the D + terminal at 0.325V, while the level value of the power supply terminal VCC is larger, for example, 5V, that is, the level value of the D + terminal is kept smaller than the level value of the power supply terminal VCC; the voltage values of the third resistor R3, the eighth resistor R8 and the fifth resistor R5 may be the same magnitude, for example, all of them are greater than 30K ohms, and the resistance value of the fourth resistor is smaller than one tenth of the resistance value of the third resistor R3, so that the resistance value is closer to the resistance value of the fourth resistor R4 after the fourth resistor R4 and the fifth resistor R5 are connected in parallel, and the voltage of the divided voltage output of the second voltage division network 102 is smaller than the voltage of the power supply terminal VCC, so that the D + terminal can output 0.325V voltage, and the smooth proceeding of the fast charge protocol is ensured.
Fig. 3 is a schematic structural diagram of a terminal device according to an embodiment of the present invention, and referring to fig. 3, the terminal device includes an interface circuit and a USB Type C interface according to any embodiment of the present invention, and therefore the terminal device includes the interface circuit according to any embodiment of the present invention, and has the same beneficial effects, and details are not repeated herein. The terminal device can be a mobile phone, a tablet computer, a wearable device, an MP3, an MP4 and other electronic products, and the terminal device can also be a toy and other devices which need to be charged and have lower cost.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. The USB Type C interface circuit, characterized in that, interface circuit includes:
a first end of the first resistor is electrically connected with a CC1 end of a USB Type C interface, and a second end of the first resistor is electrically connected with a reference signal input end of the interface circuit;
a first end of the second resistor is electrically connected with the CC2 end of the USB Type C interface, and a second end of the second resistor is electrically connected with the reference signal input end;
a first voltage division network, a first end of which is electrically connected with a power end of the interface circuit, a second end of which is electrically connected with the reference signal input end, and a voltage division output end of which is electrically connected with a D-end of the USB Type C interface;
the first end of the second voltage division network is electrically connected with the power supply end, the second end of the second voltage division network is electrically connected with the reference signal input end, the voltage division output end of the second voltage division network is electrically connected with the D + end of the USB Type C interface, the control end of the second voltage division network is electrically connected with the D-end, and the second voltage division network is used for adjusting the output voltage of the voltage division output end of the second voltage division network according to whether the D + end and the D-end are in short circuit or not.
2. The USB Type C interface circuit of claim 1, wherein the second voltage-dividing network comprises:
a first end of the third resistor is used as a first end of the second voltage division network, and a second end of the third resistor is used as a voltage division output end of the second voltage division network;
a series network, a first end of the series network is electrically connected to a second end of the third resistor, the second end of the series network serves as a second end of the second voltage dividing network, the series network includes a fourth resistor and a switching transistor connected in series, and a control electrode of the switching transistor serves as a control end of the second voltage dividing network;
a fifth resistor in parallel with the series network.
3. The interface circuit of claim 2, wherein a first terminal of the fourth resistor is the first terminal of the series network, a second terminal of the fourth resistor is electrically connected to a first pole of the switching transistor, and a second pole of the switching transistor is the second terminal of the series network.
4. The interface circuit of claim 2, wherein the first voltage-division network comprises:
a sixth resistor and a seventh resistor;
the first end of the sixth resistor is used as the first end of the first voltage division network, the second end of the sixth resistor is electrically connected with the first end of the seventh resistor, the second end of the sixth resistor is used as the voltage division output end of the first voltage division network, and the second end of the seventh resistor is used as the second end of the first voltage division network.
5. The interface circuit of claim 4, wherein at least one of the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, and the seventh resistor is an adjustable resistor.
6. The interface circuit of claim 2, wherein the interface circuit further comprises:
an eighth resistor connected in parallel with the third resistor.
7. The interface circuit of claim 2, wherein the fourth resistor has a resistance value less than one tenth of the resistance value of the third resistor.
8. The interface circuit of claim 2, wherein the threshold voltage of the switching transistor is less than a predetermined value.
9. The interface circuit of claim 8, wherein the predetermined value is a communication protocol level value.
10. A terminal device, characterized in that the terminal device comprises an interface circuit according to any of claims 1-9.
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| CN202010739218.4A CN114003531A (en) | 2020-07-28 | 2020-07-28 | USB Type C interface circuit and terminal equipment |
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