CN113993010A - Efficient Xepon olt downlink transmission control method - Google Patents
Efficient Xepon olt downlink transmission control method Download PDFInfo
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- CN113993010A CN113993010A CN202111183716.6A CN202111183716A CN113993010A CN 113993010 A CN113993010 A CN 113993010A CN 202111183716 A CN202111183716 A CN 202111183716A CN 113993010 A CN113993010 A CN 113993010A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
- H04Q11/0062—Network aspects
- H04Q11/0067—Provisions for optical access or distribution networks, e.g. Gigabit Ethernet Passive Optical Network (GE-PON), ATM-based Passive Optical Network (A-PON), PON-Ring
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/0001—Selecting arrangements for multiplex systems using optical switching
- H04Q11/0062—Network aspects
- H04Q2011/0086—Network resource allocation, dimensioning or optimisation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention relates to the technical field of data transmission, in particular to a high-efficiency Xeponolt downlink transmission control method.A speed control module is used for maintaining a data variable V, judging a V value, and when the V value is less than or equal to a threshold value M1, inserting IDLE N1 at a high speed and updating the variable V; continuously judging the value of V, entering a waiting state when V is larger than the threshold M1 and V is larger than or equal to the threshold M2, continuously outputting data and continuously reducing V in the waiting state, judging whether the data PAYLOAD to be sent exists or not when the threshold M1 is larger than the threshold M2, reading the data PAYLOAD to be sent of the front-stage module, and inserting the IPG after the end of reading the PAYLOAD. Meanwhile, special interface descriptors are set to ensure that the IPG between downlink data packets can reach the minimum value. The invention does not need too many resources, controls the output data rate to be stable, inserts less IDLE as far as possible and fully increases the resource utilization rate.
Description
Technical Field
The invention relates to the technical field of data transmission, in particular to a high-efficiency Xepon olt downlink transmission control method.
Background
An Xepon olt (Optical line terminal) refers to an epon system olt supporting a 10g rate, where the Xepon olt downstream sends data to all onu (Optical Network Unit ) in a broadcast manner, and needs to ensure continuous sending of the downstream data, and when there is no data PAYLOAD (which refers to a normal ethernet packet, which is a valid data portion, from dmac to crc check code end, and does not include a preamble), needs to ensure continuous sending of the downstream data by sending an IDLE (IDLE indicates that there is no invalid data filled when the packet is sent, and IDLE data).
olt the simple basic principle is to obtain eth data from the upper level, encapsulate it according to the frame format specified by the protocol, send it to onu, and then parse out eth data packets according to the protocol in onu, and then process them in the ethernet layer. olt and onu are connected by passive optical fibers. olt, a simplified olt data sending side schematic diagram can be obtained by hanging multiple onu modules, as shown in fig. 2, where the data reading module is mainly responsible for reading data from the front-stage module, generating descriptors or sending data to the data processing module, the processing in the data processing module is complex, including encoding and scrambling of data format according to 802.3 protocol, the data processing module includes a partial buffer for buffering data to absorb delay existing in data processing, and the last data sending module performs egress rate conversion according to 802.3 protocol, and the partial buffer still includes the partial buffer.
Downlink of the Xepon olt system needs to continuously send data to ensure that flow can not be interrupted, and often in order to ensure internal data processing efficiency, a data input rate at an interface inlet is greater than a sending rate of outlet data, which causes a situation of an excessively high flow rate when data are to be sent, and if excessive burst flow is absorbed by a cache under different data flows, the system needs to consume a large resource. If the data is controlled by the back pressure of the buffer, excessive IDLE is needed to be inserted under the condition of no data transmission, so that the flow cutoff is prevented, the channel is basically in a back pressure congestion state, and the efficiency of downlink data transmission is influenced.
On the other hand, according to the 802.3 protocol, the olt internal interface is in the form of xgmii, and the minimum IPG between two packets can be up to 5 bytes. There is a relationship between the packet length of the primary and packet, and for most systems to handle, the IPG between two packets is often greater than this value, which makes maximum use of downstream traffic. The data transmission efficiency is reduced.
Disclosure of Invention
The invention provides an efficient Xepon olt downlink sending control method, which can control the stable data rate of an outlet without too many resources and insert less IDLE as far as possible while ensuring that the IPG between downlink data packets can reach the minimum value.
In order to achieve the purpose of the present invention, an efficient method for controlling downlink transmission of an Xepon olt comprises the following steps:
1) the speed control module is used for maintaining a data variable V, judging the value of V, and when the value of V is less than or equal to a threshold value M1, inserting IDLE N1 at a high speed and updating the variable V;
2) continuously judging the value of V, entering a waiting state when V is larger than the threshold M1 and V is larger than or equal to the threshold M2, continuously outputting data and continuously reducing V in the waiting state, judging whether the data PAYLOAD to be transmitted exist or not when the threshold M1 is larger than the threshold M2, and jumping to the step 3) if the data PAYLOAD to be transmitted exist, or jumping to the step 4) if the data PAYLOAD to be transmitted does not exist;
3) reading data PAYLOAD to be sent of a preceding-stage module, updating V, judging V at the same time, entering a waiting state when V is larger than or equal to a threshold value M2, and updating V; otherwise, continuously reading PAYLOAD, updating V, and inserting the IPG after the read data PAYLOAD is finished;
4) IDLE N2 is inserted at a low speed to ensure there is a continuous data input, updating V.
As an optimization scheme of the invention, the IPG is inserted according to the packet length by the minimum principle, and the calculation method of the minimum IPG comprises the following steps: the remainder t is obtained by dividing the packet length by 4, and 8-t represents the length of the inserted IPG.
As an optimized solution of the present invention, the data variable V of the speed control module is a data amount C in the link from data input to last egress transmission at a fixed system processing clock frequency, where the data amount C is equal to a data amount to be transmitted minus a data amount to be transmitted by the egress, where the data to be transmitted includes: IDLE N1, IDLE N2, parity overhead for data PAYLOAD and preamble to be transmitted, IPG and fec.
As an optimization scheme of the invention, data interface marks IDLE _ FLAG, DB and PB are set, the IDLE _ FLAG is used for indicating whether current data is IDLE or not, and complete data description information is jointly expressed by combining a data byte variable DB and a PAYLOAD byte variable PB.
The invention has the positive effects that: 1) the invention can provide complete data information and ensure the normal coding and splicing data of the subsequent modules through the specific interface descriptor under the condition of ensuring the minimum IPG insertion. After the interface descriptor is defined in advance, the PAYLOAD length PB is used for special processing of only PAYLOAD in a subsequent data processing module, DB is convenient for calculation of a rate module, only the data length DB needs to be considered when calculating the input data quantity, subsequent data splicing conversion only needs to consider DB, and 4-byte integral multiple splicing calculation is more convenient.
2) The rate control ensures that the whole system does not stop the flow, does not need too many resources to buffer excessive data, and ensures that the data volume of the whole access is maintained at a stable level.
3) The threshold value M1 ensures the data amount in the data path, and prevents the delay generated in the data processing process from causing the outlet to cut off the flow. Threshold M2, it is possible to prevent the entry rate from being too large, resulting in a full cache of subsequent processing modules. M1 and M2 together ensure that data in subsequent data links remain within a stable range.
4) N1 and N2 ensure IDLE is inserted when there is no data input, wherein inserting IDLE N2 at a low speed can ensure that IDLE is less in the entire data link and is maintained at substantially M1 when there is no PAYLOAD transmission. Thus, when data arrives, the data PAYLOAD can be transmitted as soon as possible, and the insertion of IDLE can be reduced sufficiently. N1 ensures that when IDLE is inserted at low speed, when C is lower than M1, data can be supplemented quickly to prevent interruption.
5) The interface description and rate control flow ensures that IDLE is inserted as little as possible while adapting to different interface rates, fully increases the sending efficiency of data, and ensures the stability of the exit rate.
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The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
FIG. 1 is a control flow diagram of the present invention;
fig. 2 is a simplified data transmission diagram.
Detailed Description
The implementation of the invention is described in further detail below with reference to the attached drawing figures:
as shown in fig. 1, in an efficient Xepon olt downlink transmission control method, a transmission enable determination indicates whether a downlink transmission side starts transmitting, and an independent switch is used to control the total on/off. Firstly, whether the sending enable is opened or not is judged, and the C value is kept to be 0 in the closed state. And then remains in that state until transmit enable is turned on.
The sending enable is turned on, and the following steps are executed:
1) olt descending data reading and preceding stage module adds speed control module, maintains data variable V, judges V value, when V is less than or equal to threshold M1, inserts IDLE N1 at high speed, updates variable V;
2) continuously judging the value of V, entering a waiting state when V is larger than a threshold value M2, continuously outputting data without data input and continuously reducing V in the waiting state, judging whether the data PAYLOAD to be transmitted exist or not when V is smaller than or equal to the threshold value M2, and jumping to the step 3) if the data PAYLOAD to be transmitted exist, or jumping to the step 4 if the data PAYLOAD to be transmitted does not exist;
3) reading data PAYLOAD to be sent of a preceding-stage module, updating V, and entering a waiting state to update V when V is judged to be larger than a threshold value M2; otherwise, continuously reading PAYLOAD, updating V, and inserting the IPG after the read data PAYLOAD is finished;
4) IDLE N2 is inserted at a low speed to ensure there is a continuous data input, updating V. The rate control is smoother while preventing flow interruption.
The IPG is inserted according to the length of a data packet by the minimum principle, the maximum efficiency is ensured, and the minimum IPG calculation method comprises the following steps: the remainder t is obtained by dividing the packet length by 4, and 8-t represents the length of the inserted IPG. The insertion of the minimum IPG (which is also effectively IDLE, but may be a non-4-byte integer multiple) may be inserted in the shortest 5 bytes depending on the protocol.
For the above flowchart, the high-speed insert IDLE (integer multiple of 4 bytes) data amount is set to N1, that is: IDLE N1. The amount of the low-speed insert IDLE data is N2, namely: IDLE N2. The too-low rate threshold is M1 and the too-high rate threshold is M2. All the four parameters are configurable parameters.
The data variable V of the speed control module is the data quantity C in the link section which is sent from the data input to the last exit under the fixed system processing clock frequency, and the data quantity C is calculated by subtracting the data quantity sent by the exit from the data which needs to be sent. The data to be transmitted includes IDLE N1, IDLE N2, the PAYLOAD length of the data read from the front module (note that each packet needs to be added with 8 bytes of preamble), and the parity overhead of the inserted IPG, fec (32 bytes of parity are automatically added for each 216 bytes of data transmitted). The amount of data that needs to be subtracted is the amount of data sent by the egress. Olt are sent downstream at a steady rate so that the amount of data subtracted is a constant at a fixed clock frequency. The waiting time is the minimum time unit, one clk, so that the judgment is more timely and the rate control is more precise. Too low a rate is C less than M1, and too high a rate is C greater than M2.
In order to facilitate data processing and improve data processing efficiency, the following data interface descriptor IDLE _ FLAG, sop, eop of data, and data interfaces are set.
An IDLE _ FLAG is set to indicate whether the current data is IDLE, and 1 indicates that the current data is IDLE. A value of 0 indicates that the current data must contain data.
The PAYLOAD length PB is set in bytes. When the current data IDLE _ FLAG is 0, PB indicates the data length contained in the current data, and the possible values are from 1 to the maximum value of the beat data, and the current implementation is 1-16 bytes. When IDLE _ FLAG is 1, no consideration is given.
The data length is set to be DB, the unit byte is set, and the IDLE _ FLAG is set to be 1, which indicates that the current data contains data (including IDLE and data) to be sent, the value is an integral multiple of 4, the maximum value is the maximum value of beat data, so that the subsequent modules can conveniently perform interface format conversion, and the value range of the current implementation scheme is 8, 12 and 16. It will not be 4, since in the non-IDLE case there is typically only a case where the preamble and trailer of the packet are not 16, when DB is at least 8, including the inserted IPG length. When IDLE _ FLAG is 0, the length of IDLE is 4 bytes.
When IDLE _ FLAG is 1, it represents pure IDLE data, and the IDLE length is DB, and the unit is 4 bytes. When IDLE _ FLAG is 0, it means that the current data must contain PAYLOAD, if DB is equal to PB, the current data is PAYLOAD, if DB is greater than PB, the value of DB minus PB is the number of IDLE inserted, and the unit is single byte. No matter IDLE, data packet or tail IPG, the method adopts a uniform mode to describe, thereby facilitating the calculation of the V value and facilitating the subsequent data processing. Special interface descriptors are set to ensure that the IPG between downstream packets can reach a minimum.
Example (b):
the example is applied to an Xepon olt downlink channel and is used for controlling downlink data transmission.
The previous module data clock 125M, the data bit width is 16 bytes, and the interface rate is 16 g. The Xepon downstream olt exit rate is fixed at 10g (no need to consider 64/66B encoded data overhead, automatic processing in subsequent data processing modules), and at a clock frequency of 125M, olt outputs 10 bytes of data per clk. The output data amount is fixed to 10 for each clk, and the input data amount is different in value according to different states of the system.
The threshold M1 in this system takes the value 300 in bytes. The threshold M2 takes the value 350 in bytes. The high speed insert IDLE N1 takes the value 5, with the unit of 4 bytes. The low speed insert IDLE N2 takes the value of 2 in 4 bytes. The sop, eop and data and other information in the interface are not described in detail.
And inserting IDLE N1 at high speed, wherein the interface descriptor IDLE _ FLAG is 1, DB is 4, and PB is not considered. Data C was calculated as C + N1 x 4-10.
When IDLE is inserted at a low speed, the interface descriptor IDLE _ FLAG is 1, DB is 2, and PB is not considered. Data C was calculated as C + N2 x 4-10.
When data is sent, the interface descriptor IDLE _ FLAG is 0, the DB value is 16, and the PB value is 16. The calculation mode of the data C is C + 16-10; when the data packet leads the code, the descriptor IDLE _ FLAG is 0, the DB is 8, and the PB is 8. There are 3 cases when the packet end is not 16 bytes: tail bytes (indicated by pbw) are 1-11 bytes, the descriptor is IDLE _ FLAG is 0, DB is valued as pbw divided by 4, the quotient of 4 is rounded up and then added with 2, finally, the quotient is multiplied by 4, the calculation mode of data C is C + DB-10, and PB is valued as pbw; in 12-16 bytes of the tail byte, the descriptor is IDLE _ FLGA is 0, DB is taken as 16, PB is taken as pbw, the data C is calculated in a manner of C +16-10, the descriptor IDLE _ FLAG of the next beat is 1, DB is taken as 1 (12-15 bytes of the tail byte), or 2 (the tail byte is just 16), PB is not considered, and the data C is calculated in a manner of C + DB 4-10.
When the transmitted data amount reaches an integer multiple of 216 bytes or is larger than the integer multiple of 216 bytes for the first time (the input data amount in the above case), the parity data amount C of the supplementary fec needs to be C + 32-10.
During the waiting period, no data is transmitted, and the data C is calculated in a mode of C-10.
According to the calculated data amount C and other conditions, the system is judged to enter different states (see FIG. 1 in the detailed flow), read data PAYLOAD or send IDLE, or wait for keeping the data amount in the system between the threshold values M1 and M2.
The above-mentioned embodiments only express the embodiments of the present invention, and the description thereof is more specific and detailed, and therefore, the present invention should not be construed as limiting the scope of the present invention. It should be noted that several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention.
Claims (4)
1. An efficient downlink transmission control method of an Xepon olt is characterized in that: the method comprises the following steps:
1) the speed control module is used for maintaining a data variable V, judging the value of V, and when the value of V is less than or equal to a threshold value M1, inserting IDLE N1 at a high speed and updating the variable V;
2) continuously judging the value of V, entering a waiting state when V is larger than the threshold M1 and is larger than or equal to the threshold M2, continuously outputting data and continuously reducing V in the waiting state, judging whether the data PAYLOAD to be transmitted exist or not when the threshold M1 is larger than the threshold M2, and if the threshold M1 is smaller than the threshold M2, jumping to the step 3), otherwise, jumping to the step 4);
3) reading data PAYLOAD to be sent of a preceding-stage module, updating V, judging V at the same time, entering a waiting state when V is larger than or equal to a threshold value M2, and updating V; otherwise, continuously reading PAYLOAD, updating V, and inserting the IPG after the read data PAYLOAD is finished;
4) IDLE N2 is inserted at a low speed to ensure there is a continuous data input, updating V.
2. The efficient Xepon olt downlink transmission control method according to claim 1, characterized in that: the IPG is inserted according to the length of the data packet by the minimum principle, and the minimum IPG calculation method comprises the following steps: the remainder t is obtained by dividing the packet length by 4, and 8-t represents the length of the inserted IPG.
3. The method for controlling high-efficiency downlink transmission of an Xepon olt according to claim 1 or 2, characterized in that: the data variable V of the speed control module is the data volume C in the link sent from the data input to the last exit at a fixed system processing clock frequency, where the data volume C is equal to the data volume to be sent minus the data volume sent by the exit, where the data to be sent includes: IDLE N1, IDLE N2, parity overhead for data PAYLOAD and preamble to be transmitted, IPG and fec.
4. The efficient Xepon olt downlink transmission control method according to claim 3, characterized in that: setting data interface marks IDLE _ FLAG, DB and PB, wherein the IDLE _ FLAG is used for indicating whether current data is IDLE or not, and jointly expressing complete data description information by combining a data byte variable DB and a PAYLOAD byte variable PB.
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