CN113990898A

CN113990898A - Display panel

Info

Publication number: CN113990898A
Application number: CN202111093386.1A
Authority: CN
Inventors: 孙丹丹
Original assignee: Yungu Guan Technology Co Ltd
Current assignee: Yungu Guan Technology Co Ltd
Priority date: 2021-09-17
Filing date: 2021-09-17
Publication date: 2022-01-28

Abstract

The application provides a display panel, including: a substrate; a plurality of light emitting cells on one side of the substrate; the ultrasonic fingerprint identification units are positioned on one side of the substrate, where the light emitting units are arranged, each ultrasonic fingerprint identification unit comprises a pressure sensing unit, and at least part of electrodes in the pressure sensing units are multiplexed into electrodes in the adjacent light emitting units. Above-mentioned design provides an integrated scheme in ultrasonic fingerprint screen, can reduce whole display panel thickness, and improves ultrasonic fingerprint identification effect.

Description

Display panel

Technical Field

The application belongs to the technical field of display, and particularly relates to a display panel.

Background

Compared with optical fingerprint and capacitive fingerprint identification, the ultrasonic signal has better penetrability, and better fingerprint identification can be carried out under the interference of finger dirt, grease and water.

Currently, an ultrasonic fingerprint identification module is generally attached to one side of a non-display surface of a display screen in a plug-in mode; compared with an in-screen integration scheme, the plug-in mode can seriously affect ultrasonic signal identification due to the good or bad adhesion of the optical adhesive; and the ultrasonic wave in the plug-in mode needs to penetrate through a larger thickness, so that the problems of high power consumption and the like exist. Therefore, an integrated scheme in the ultrasonic fingerprint screen needs to be designed at present.

Disclosure of Invention

The application provides a display panel to an integrated scheme in the ultrasonic wave fingerprint screen is provided, reduces the thickness of whole display panel, and improves ultrasonic wave fingerprint identification effect.

In order to solve the technical problem, the application adopts a technical scheme that: provided is a display panel including: a substrate; a plurality of light emitting cells on one side of the substrate; the ultrasonic fingerprint identification units are positioned on one side of the substrate, where the light emitting units are arranged, each ultrasonic fingerprint identification unit comprises a pressure sensing unit, and at least part of electrodes in the pressure sensing unit are multiplexed into at least part of electrodes in the light emitting units.

Being different from the prior art situation, the beneficial effect of this application is: the display panel provided by the application comprises a plurality of light-emitting units and a plurality of ultrasonic fingerprint identification units, wherein the light-emitting units and the ultrasonic fingerprint identification units are positioned on one side of a substrate; wherein each ultrasonic fingerprint identification unit comprises a pressure sensing unit, and at least part of electrodes in the pressure sensing unit can be multiplexed as at least part of electrodes in the light-emitting unit. The design scheme in the ultrasonic fingerprint screen is provided, and at least part of electrodes in the pressure sensing unit and the corresponding electrodes in the light-emitting unit are the same, so that the thickness of the whole display panel can be reduced, and the cost is reduced; and the distance that the ultrasonic waves need to penetrate can be reduced, so that the accuracy of ultrasonic fingerprint identification is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:

FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;

FIG. 2 is a schematic top view of one embodiment of the display panel of FIG. 1;

FIG. 3 is a schematic circuit diagram of one embodiment of the ultrasonic fingerprint identification unit of FIG. 1;

FIG. 4 is a block diagram of one embodiment of the pixel driving circuit and the light emitting unit of FIG. 1;

FIG. 5 is a circuit diagram of one embodiment of the pixel driving circuit and the ultrasonic fingerprinting unit of FIG. 1;

FIG. 6 is a diagram illustrating an embodiment of timing control.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a display panel of the present application, where the display panel 1 may be an OLED display panel, and the display panel 1 specifically includes a substrate 10, a plurality of light emitting units 12, and a plurality of ultrasonic fingerprint identification units 14; the substrate 10 may be a flexible substrate, and the material thereof may be polyimide or the like; of course, the substrate 10 may be a hard substrate, and the material thereof may be glass or the like. A plurality of light-emitting elements 12 (only two are schematically shown in fig. 1) are located on one side of the substrate 10. The plurality of ultrasonic fingerprint identification units 14 (only two are schematically shown in fig. 1) are located on the side of the substrate 10 where the light emitting unit 12 is located, i.e., the plurality of ultrasonic fingerprint identification units 14 and the plurality of light emitting units 12 are located on the same side. Wherein, each ultrasonic fingerprint identification unit 14 comprises a pressure sensing unit 140, and at least part of the electrodes in the pressure sensing unit 140 are multiplexed as at least part of the electrodes in the light emitting unit 12. Alternatively, in the present embodiment, the pressure-sensitive unit 140 may be disposed on the same layer as the light-emitting unit 12, and at least a part of the electrodes in the pressure-sensitive unit 140 may be reused as the electrodes in the light-emitting unit 12 adjacent in the horizontal direction; for example, one of the electrodes in the pressure-sensitive cells 140 may extend horizontally and cover the light-emitting material of the light-emitting cells 12. Alternatively, in the present embodiment, the pressure-sensitive cells 140 may be stacked with the light-emitting cells 12 in a direction away from the substrate 10, at least some of the electrodes in the pressure-sensitive cells 140 may be multiplexed as electrodes in the light-emitting cells 12 adjacent in the vertical direction, and an orthographic projection of one of the electrodes in the pressure-sensitive cells 140 on the substrate 10 may cover the light-emitting material of the light-emitting cell 12. In the present embodiment, the pressure-sensitive cells 140 may be stacked with the light-emitting cells 12 in the direction close to the substrate 10, and at least some of the electrodes in the pressure-sensitive cells 140 may be multiplexed as the electrodes in the light-emitting cells 12 adjacent in the vertical direction. That is, the present application provides an interior design scheme of an ultrasonic fingerprint screen, and at least a part of electrodes in the pressure sensing unit 140 are the same as the electrodes in the corresponding light emitting units 12, so that the thickness of the whole display panel 1 can be reduced, and the cost can be reduced; and the distance that the ultrasonic waves need to penetrate can be reduced, so that the accuracy of ultrasonic fingerprint identification is improved.

In one embodiment, as shown in fig. 1, in a direction away from the substrate 10, the light emitting unit 12 includes a first electrode 120, a light emitting layer 122, and a second electrode 124 which are stacked; alternatively, in the present embodiment, the first electrode 120 may be an anode, and the second electrode 124 may be a cathode; and the first electrodes 120 of the adjacent light emitting cells 12 may be disconnected from each other so that the adjacent light emitting cells 12 may be driven to emit light individually. The light emitting units 12 may be red light emitting units, blue light emitting units, green light emitting units, or the like, and the adjacent light emitting units 12 may emit light of the same or different colors, which is not limited in the present application. Further, in the direction away from the substrate 10, the pressure-sensitive cell 140 includes a receiving electrode 1400, a piezoelectric functional block 1402, and a driving electrode 1404, which are stacked. In this embodiment, the piezoelectric functional block 1402 may be made of a piezoelectric material such as PVDF, AlN, ZnO, or PZT. Generally, a piezoelectric material can generate a high-frequency sound signal, namely an ultrasonic signal, under the action of alternating voltage due to the inverse piezoelectric effect; wherein, the alternating voltage refers to the voltage of which the magnitude and direction can change along with the time; due to the positive piezoelectric effect, the piezoelectric material can generate charges with opposite polarities on the electrodes on the two sides of the piezoelectric material under the action of external force, so that voltage is generated; this allows the piezoelectric material to generate and receive ultrasonic signals and convert the received ultrasonic signals into a voltage. Alternatively, as shown in fig. 1, the driving electrode 1404 is multiplexed as the first electrode 120 of the adjacent light emitting cell 12 when the piezoelectric functional block 1402 and the receiving electrode 1400 are located between the light emitting cell 12 and the substrate 10. In the above design, the driving electrode 1404 is multiplexed into the first electrode 120, so that the overall structural design is simple; and the alternating voltage does not pass through the light-emitting layer 122 during the application of the alternating voltage to the driving electrode 1404, so as to reduce the influence on the light-emitting lifetime of the light-emitting layer 122.

Of course, when the material forming the light emitting layer 122 has relatively stable performance and a long lifetime and the second electrodes 124 of the adjacent light emitting cells 12 are disconnected from each other, the second electrodes 124 may be used as the driving electrodes 1404. Further, the first electrode 120 located in the same light emitting unit 12 may also be multiplexed as the receiving electrode 1400, and the piezoelectric function block 1402 is disposed between the light emitting layer 122 and the first electrode 120, or the piezoelectric function block 1402 is disposed between the light emitting layer 122 and the second electrode 124. The design method can further reduce the thickness of the display panel 1, and is beneficial to the lightening and thinning of the display panel 1. Alternatively, when the second electrodes 124 of the adjacent light emitting units 12 are disconnected from each other, the second electrodes 124 can be reused as the receiving electrodes 1400, and the piezoelectric functional block 1402 and the driving electrodes 1404 can be located on the side of the light emitting units 12 facing away from the substrate 10. The design mode can reduce the distance between the pressure sensing unit 140 and the touch piece, the distance through which ultrasonic waves need to penetrate is small, and the ultrasonic fingerprint identification effect is good.

With continued reference to fig. 1, in the same pressure-sensitive cell 140, the orthographic projection of the receiving electrode 1400 on the driving electrode 1404 is located inside the driving electrode 1404. This design can increase the overlapping area between the driving electrode 1404 and the receiving electrode 1400 in the pressure-sensitive cell 140, and increase the intensity of the electric field generated between the two electrodes at the same voltage, thereby generating strong ultrasonic waves.

In addition, as shown in fig. 1, the piezoelectric functional blocks 1402 of all the pressure-sensitive cells 140 are connected to each other to form a piezoelectric functional layer (not shown). Alternatively, in the present embodiment, the orthographic projection of the piezoelectric functional layer on the substrate 10 may cover the substrate 10. The design mode can reduce the difficulty of process preparation.

In this embodiment, as shown in fig. 2, fig. 2 is a schematic top view of an embodiment of the display panel in fig. 1. The area indicated by the dotted line frame in fig. 2 is a fingerprint identification area in which one pressure-sensitive unit 140 is provided at the position of one light-emitting unit 12. Of course, in other embodiments, the display panel 1 may also perform full-screen fingerprint recognition, and at this time, one pressure sensing unit 140 may be correspondingly disposed at the positions of all the light emitting units 12. Wherein, the corresponding meanings mentioned above mean: the orthographic projection of the electrode in the pressure-sensitive cell 140 on the substrate 10 is located within the orthographic projection of the electrode of the light-emitting cell 12 at the corresponding position on the substrate 10. Certainly, in consideration of subsequent circuit layout, a pressure sensing unit 140 may be correspondingly disposed at a position of a part of the light emitting units 12 in the fingerprint identification area or the full-screen fingerprint identification area described by the dashed line frame in fig. 2, and at this time, the pressure sensing units 140 need to be uniformly arranged in the fingerprint identification area or the full-screen fingerprint identification area to improve the fingerprint identification effect.

With reference to fig. 1, the display panel 1 further includes an array layer 16 disposed between all the light emitting units 12 and the substrate 10; the array layer 16 is generally provided with a plurality of pixel driving circuits 160, and one pixel driving circuit 160 is electrically connected to the first electrode 120 of one light emitting unit 12, so that the pixel driving circuit 160 can drive the corresponding light emitting unit 12 to independently emit light. The array layer 16 includes a first metal layer 162 farthest from the substrate 10, the receiving electrode 1400 of the pressure-sensitive unit 140 is located in the first metal layer 162, and the piezoelectric functional block 1402 of the pressure-sensitive unit 140 is located between the first metal layer 162 and the light-emitting unit 12. The driving electrode 1404 of the pressure-sensitive cell 140 is multiplexed as the first electrode 120 of the adjacent light-emitting cell 12; at this time, the pressure-sensitive cell 140 and the adjacent light-emitting cell 12 can be understood as being adjacent in the longitudinal direction, and the orthographic projection of the driving electrode 1404 in the pressure-sensitive cell 140 on the substrate 10 coincides with the orthographic projection of the first electrode 120 of the light-emitting cell 12 at the corresponding position on the substrate 10. This design may further reduce the thickness of the display panel 1, and the receiving electrode 1400 may be formed simultaneously when the first metal layer 162 in the array layer 16 is patterned, so as to reduce the process complexity. Alternatively, as shown in fig. 1, in a direction away from the substrate 10, the array layer 16 includes a semiconductor layer 164, a gate layer 166, a second metal layer 168, and a first metal layer 162; the semiconductor layer 164 includes a channel region, and a first conductive region and a second conductive region on both sides of the channel region. The second metal layer 168 may be provided with a first via terminal electrically connected to the first conductive region, a second via terminal electrically connected to the second conductive region, and the like. The first metal layer 162 may be provided therein with a connection electrode that may electrically connect the first electrode 120 of the light emitting cell 12 with the corresponding first via terminal. Of course, the first metal layer 162 may also have a power line, a reference signal line, a data line, and the like disposed therein. Of course, in other embodiments, a power line, a reference signal line, a data line, and the like may be disposed in the second metal layer 168, and a first via end electrically connected to the first conductive region and a second via end electrically connected to the second conductive region may be disposed in the first metal layer 162, which is not limited in this application. The wiring manner of the array layer 16 using multiple metal layers can make the wiring simpler, and the probability of short circuit between adjacent wirings is reduced. Of course, in some cases, the array layer 16 may also include only one metal layer, i.e. only the first metal layer 162, which is not limited in this application.

Optionally, referring to fig. 3 together, fig. 3 is a circuit schematic diagram of an embodiment of the ultrasonic fingerprint identification unit in fig. 1. As shown in fig. 1 and 3, the ultrasonic fingerprint recognition unit 14 further includes an ultrasonic wave generation circuit 142 and an ultrasonic wave acquisition circuit 144; the ultrasonic wave generating circuit 142 is electrically connected to the driving electrode 1404 of the pressure sensing unit 140, the ultrasonic wave collecting circuit 144 is electrically connected to the receiving electrode 1400 of the pressure sensing unit 140, and the ultrasonic wave generating circuit 142 and the ultrasonic wave collecting circuit 144 are located in the array layer 16. This design may form the ultrasound generation circuitry 142 and the ultrasound acquisition circuitry 144 at the same time as the pixel drive circuitry 160 is formed in the array layer 16. For example, a plurality of transistors in the ultrasonic wave generation circuit 142 and the ultrasonic wave acquisition circuit 144 may be formed at the same time as a plurality of transistors in the pixel driving circuit 160 is formed, so as to reduce the process preparation complexity.

In one application scenario, as shown in fig. 3, the ultrasonic wave generating circuit 142 includes a first transistor M1 including a control terminal M10, a first path terminal M12, and a second path terminal M14; the control terminal M10 of the first transistor M1 is configured to receive the first SCAN signal SCAN1, the first path terminal M12 of the first transistor M1 is configured to receive the driving voltage signal Tx, the driving voltage signal Tx is an alternating voltage in the ultrasonic wave generation phase, and the second path terminal M14 of the first transistor M1 is electrically connected to the driving electrode 1404. In the present embodiment, the ultrasonic wave generating circuit 142 has a simple structural design and occupies a small space. Of course, in other embodiments, the structure of the ultrasonic wave generation circuit 142 may be other, and for example, the first transistor M1 may be replaced by a double gate transistor or the like.

In yet another application scenario, with continued reference to fig. 3, the ultrasound acquisition circuit 144 includes a second transistor M2, a third transistor M3, a fourth transistor M4, and a fifth transistor M5. Wherein the second transistor M2 includes a control terminal M20, a first pass terminal M22 and a second pass terminal M24; and the control terminal M20 of the second transistor M2 is configured to receive the second SCAN signal SCAN2, the first pass terminal M22 of the second transistor M2 is electrically connected to the receiving electrode 1400, and the second pass terminal M24 of the second transistor M2 is configured to receive a base voltage signal Vbias, which may provide a fixed voltage value to the second pass terminal M24 of the second transistor M2. The third transistor M3 includes a control terminal M30, a first path terminal M32, and a second path terminal M34; and the control terminal M30 of the third transistor M3 is used for receiving the third SCAN signal SCAN3, and the second pass terminal M34 of the third transistor M3 is electrically connected to the first pass terminal M22 of the second transistor M2. The fourth transistor M4 includes a control terminal M40, a first path terminal M42, and a second path terminal M44; and the control terminal M40 of the fourth transistor M4 is for receiving the fourth SCAN signal SCAN4, and the first pass terminal M42 of the fourth transistor M4 is electrically connected to the signal READ LINE READ. The fifth transistor M5 includes a control terminal M50, a first path terminal M52, and a second path terminal M54; a control terminal M50 of the fifth transistor M5 is electrically connected to the first path terminal M32 of the third transistor M3, a first path terminal M52 of the fifth transistor M5 is electrically connected to the second path terminal M44 of the fourth transistor M4, and a second path terminal M54 of the fifth transistor M5 is configured to receive the power supply voltage signal VDD; the control terminal M50 of the fifth transistor M5 is electrically connected to the receiving electrode 1400. In the present embodiment, the ultrasonic wave generating circuit 142 has a simple structural design and occupies a small space. Of course, in other embodiments, the structural design of the ultrasonic acquisition circuit 144 may be other, and the present application does not limit this.

Further, in the present embodiment, part of the transistors in the ultrasonic wave generation circuit 142 and the ultrasonic wave acquisition circuit 144 may be multiplexed as the transistors in the pixel driving circuit 160. That is, some transistors in the ultrasonic wave generating circuit 142 and the ultrasonic wave collecting circuit 144 are the same as some transistors in the pixel driving circuit 160. The design mode can reduce the space occupied by the ultrasonic wave generating circuit 142 and the ultrasonic wave collecting circuit 144, and is beneficial to circuit arrangement.

In a specific application scenario, please refer to fig. 4 and 5 together, and fig. 4 is a schematic diagram of an embodiment of the pixel driving circuit and the light emitting unit in fig. 1. Fig. 5 is a circuit diagram of an embodiment of the pixel driving circuit and the ultrasonic fingerprint identification unit in fig. 1, the pixel driving circuit 160 may be a circuit structure commonly found in the prior art, for example, the transistors labeled T1-T7 in fig. 5 belong to the pixel driving circuit 160 (not labeled in fig. 5), the transistors labeled M1-M5 belong to the ultrasonic wave generating circuit 142 and the ultrasonic wave collecting circuit 144, and the pixel driving circuit 160 in fig. 5 is a commonly found 7T1C structure. Specifically, in the present embodiment, the pixel driving circuit 160 may include a power supply unit 1600, a driving signal writing unit 1602, a driving unit 1604, and an initializing unit 1606.

The power supply unit 1600 is configured to receive the emission signal EM and provide a power supply voltage signal VDD for the light emitting unit 12 according to the emission signal EM. Specifically, as shown in fig. 5, when the pixel driving circuit 160 is a 7T1C circuit, the power supply unit 1600 includes switching transistors T4 and T7, control terminals of the switching transistors T4 and T7 receive the emission signal EM, a first path terminal of the switching transistor T7 receives the power supply voltage signal VDD, and a second path terminal of the switching transistor T7 is connected to the driving unit 1604 (i.e., the driving transistor T1 in fig. 5); a first path terminal of the switching transistor T4 is connected to the driving unit 1604 (i.e., the driving transistor T1 in fig. 5).

The driving signal writing unit 1602 receives the second SCAN signal SCAN2 to write the Data voltage signal Data under the driving of the second SCAN signal SCAN2 during the display phase. Specifically, as shown in fig. 5, the driving signal writing unit 1602 includes switching transistors T2 and T3.

The driving unit 1604 connects the driving signal writing unit 1602 and the power supply unit 1600 to generate a driving current matching the Data voltage signal Data according to the Data voltage signal Data and using the power supply voltage signal VDD, so as to drive the light emitting unit 12 to emit light using the driving current; specifically, as shown in fig. 5, the driving unit includes a driving transistor T1.

An initialization unit 1606 receiving the first SCAN signal SCAN1 and the reference voltage signal Vref to initialize the light emitting cells 12 with the reference voltage signal Vref according to the first SCAN signal SCAN1 in the display stage; specifically, as shown in fig. 5, the initialization unit 1606 includes switching transistors T5 and T6.

The timing operation of the pixel driving circuit 160 can be referred to in the prior art, and will not be described in detail herein. The initialization unit 1606 in the pixel driving circuit 160 multiplexes the first transistor M1 in the ultrasonic wave generating circuit 142 to receive the reference voltage signal Vref during the display period; that is, the reference voltage signal Vref in the present embodiment and the driving voltage signal Tx in the above embodiments may be provided by the same wire. For example, as shown in fig. 5, T5 or T6 in the initialization unit 1606 may be the same as the first transistor M1; alternatively, when the first transistor M1 is a double-gate transistor, the above-described T5 and T6 may be commonly used as the first transistor M1. Of course, in other embodiments, the driving signal writing unit 1602 may also multiplex the second transistor M2 in the ultrasonic wave generating circuit 144 to receive the Data voltage signal Data in the display phase; that is, the Data voltage signal Data in the present embodiment and the fundamental voltage signal Vbias in the above-described embodiments may be provided by the same lead. The multiplexing mode is simple in structural design, and the process is easy to prepare and form.

In addition, the display panel 1 provided in the present application further includes a timing controller (not shown) for controlling timings of the first SCAN signal SCAN1, the second SCAN signal SCAN2, the third SCAN signal SCAN3, and the fourth SCAN signal SCAN4 to control on/off of the corresponding transistors and for controlling a timing of the driving voltage signal Tx; referring to fig. 3 and fig. 6 together, fig. 6 is a schematic diagram of an embodiment of timing control. In the fingerprint identification stage, the timing controller is specifically configured to:

A. in the t1 time period, the first transistor M1 and the second transistor M2 are controlled to be turned on, and the driving voltage signal Tx is made to be an alternating voltage (i.e., the driving voltage signal Tx is switched back and forth between high and low levels in the t1 time period), so that the driving electrode 1404 of the pressure sensing unit 140 is applied with an alternating driving voltage, and the pressure sensing unit 140 generates an ultrasonic signal; i.e., the t1 time period is the ultrasonic wave generation time period. Specifically, assuming that the transistors in fig. 3 are all NMOS transistors, the SCAN1 and the SCAN2 can be controlled to be high level signals at this time, so that the first transistor M1 and the second transistor M2 are turned on; it may be turned on or off for the third transistor M3 and the fourth transistor M4.

B. During the time period t3, the first transistor M1, the second transistor M2 and the fourth transistor M4 are controlled to be turned off, the third transistor M3 is turned on, and the reflected ultrasonic wave voltage signal received by the receiving electrode 1400 is transferred to the control terminal M50 of the fifth transistor M5. Specifically, assuming that the transistors in fig. 3 are all NMOS transistors, at this time, SCAN1, SCAN2, and SCAN4 may be controlled to be low level signals, and SCAN3 is controlled to be high level signals, so that the first transistor M1, the second transistor M2, and the fourth transistor M4 are turned off, and the reflected ultrasonic voltage signal accumulated at the receiving electrode 1400 is transmitted to the control terminal M50 of the fifth transistor M5 through the third transistor M3 for accumulation.

C. In the time period t5, the second transistor M2 is controlled to be turned on, the third transistor M3 is controlled to be turned off, the fourth transistor M4 is controlled to be turned on, and the reflected ultrasonic voltage signal accumulated on the fifth transistor M5 is transmitted to the fourth transistor M4 and read by the signal reading line to obtain fingerprint information. Specifically, assuming that the transistors in fig. 3 are all NMOS transistors, at this time, SCAN1 and SCAN3 may be controlled to be low level signals, and SCAN2 and SCAN4 are high level signals, so that the first transistor M1 and the third transistor M3 are turned off, the second transistor M2 and the fourth transistor M4 are turned on, and the collected fingerprint signal is amplified by the fifth transistor M5 and then READ by the signal READ LINE READ. Because the ultrasonic wave signal that the finger reflects is relevant with the valley and the ridge of finger to the voltage signal that can READ according to signal LINE READ LINE READs confirms the information of the valley and the ridge of finger, and then analyzes out fingerprint information. In addition, after the second transistor M2 is turned on at this stage, the connection between the third transistor M3 and the second transistor M2 has a fixed voltage value, so as to reduce the generation of leakage current.

In the time sequence control process, the fingerprint signals can be conveniently analyzed and obtained. Of course, in other embodiments, in order to obtain more accurate fingerprint signals, please continue to refer to fig. 3 and 6, the timing controller is further configured to control the first transistor M1, the second transistor M2 and the third transistor M3 to be turned on and control the driving voltage signal Tx to be a constant low voltage signal during a t2 time period between a t1 time period and a t3 time period; the stage is a time period of ultrasonic wave transmission and reflection, and the ultrasonic wave reaches the fingerprint in the time period and reaches the receiving electrode after being reflected by the fingerprint; i.e. giving the signal a certain propagation and accumulation time to improve the accuracy of the subsequent fingerprint identification.

In addition, with continued reference to fig. 3 and fig. 6, the timing controller is further configured to control the second transistor M2 to be turned on and the first transistor M1, the third transistor M3 and the fourth transistor M4 to be turned off during a time period t4 between a time period t3 and a time period t 5; this stage is a signal holding stage, and the signal of the control terminal M50 of the fifth transistor M5 can be accumulated and stabilized to improve the accuracy of the subsequent fingerprint recognition. In addition, the second transistor M2 is turned on at this stage, so that the connection between the third transistor M3 and the second transistor M2 has a constant voltage value, thereby reducing the generation of leakage current.

In addition, with continued reference to fig. 3 and fig. 6, the timing controller is further configured to control the second transistor M2 and the third transistor M3 to be turned on, the first transistor M1 and the fourth transistor M4 to be turned off, and initialize the control terminal M50 of the fifth transistor M5 during a time period t6 after the time period t 5. Through the initialization process, the voltage signal in the last fingerprint identification process can be eliminated, so that the accuracy of next fingerprint identification is improved.

In another embodiment, referring to fig. 4, fig. 5 and fig. 6 again, the timing controller is further configured to control the on/off of the transistor in the pixel driving circuit 160, and control the driving signal writing unit 1602 to be turned off during the fingerprint identification phase, so that the light emitting unit 12 cannot receive the driving current. For example, the emission signal EM may be pulled down to a low level, the switching transistors T4 and T7 are turned off, and the light emitting unit 12 cannot receive the driving current, thereby increasing the lifetime of the light emitting unit 12.

In addition, in the fingerprint recognition phase, the timing controller is further configured to apply the same voltage signal as the driving voltage signal Tx to the second electrode 124 of the light emitting unit 12 for a time period t 1. For example, the second electrode 124 of the light emitting unit 12 receives another power voltage signal VSS, and at the same time in the time period t1, the corresponding levels of VSS and Tx are the same, so that the voltages on the two sides of the light emitting unit 12 are the same, and the light emitting unit 12 does not emit light, thereby improving the lifetime of the light emitting unit 12.

In other embodiments, when the fingerprint recognition process is finished and the normal display stage is entered, the timing controller may control the third transistor M3 and the fourth transistor M4 to be turned off; for the first transistor M1 and the second transistor M2 shared with the pixel driving circuit 160, they can cooperate with the remaining transistors in the pixel driving circuit 160 to drive the light emitting unit 12 to emit light.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings, or which are directly or indirectly applied to other related technical fields, are intended to be included within the scope of the present application.

Claims

1. A display panel, comprising:

a substrate;

a plurality of light emitting cells on one side of the substrate;

the ultrasonic fingerprint identification units are positioned on one side of the substrate, where the light emitting units are arranged, each ultrasonic fingerprint identification unit comprises a pressure sensing unit, and at least part of electrodes in the pressure sensing unit are multiplexed into at least part of electrodes in the light emitting units.

2. The display panel according to claim 1,

in the direction far away from the substrate, the light-emitting unit comprises a first electrode, a light-emitting layer and a second electrode which are arranged in a stacked mode, and the pressure sensing unit comprises a receiving electrode, a piezoelectric functional block and a driving electrode which are arranged in a stacked mode; wherein the driving electrode is multiplexed into the first electrode of at least part of the light emitting cells;

preferably, in the same pressure sensing unit, the orthographic projection of the receiving electrode on the driving electrode is located in the driving electrode;

preferably, the piezoelectric functional blocks of all the pressure sensing units are connected with each other to form a piezoelectric functional layer.

3. The display panel according to claim 2, characterized in that the display panel further comprises: an array layer between all the light emitting cells and the substrate;

the array layer comprises a first metal layer farthest from the substrate, the receiving electrode is located in the first metal layer, and the piezoelectric functional block is located between the first metal layer and the light emitting unit.

4. The display panel according to claim 3,

the ultrasonic fingerprint identification unit also comprises an ultrasonic generating circuit and an ultrasonic collecting circuit; the ultrasonic generating circuit is electrically connected with the driving electrode, the ultrasonic collecting circuit is electrically connected with the receiving electrode, and the ultrasonic generating circuit and the ultrasonic collecting circuit are positioned in the array layer.

5. The display panel according to claim 4,

the array layer further comprises a plurality of pixel driving circuits, one of the pixel driving circuits is electrically connected with one of the first electrodes; and part of transistors in the ultrasonic wave generating circuit and the ultrasonic wave acquisition circuit are multiplexed into transistors in the pixel driving circuit.

6. The display panel according to claim 5, wherein the ultrasonic wave generation circuit comprises:

a first transistor including a control terminal, a first path terminal, and a second path terminal; the control end of the first transistor is used for receiving a first scanning signal, the first path end of the first transistor is used for receiving a driving voltage signal, the driving voltage signal is an alternating voltage in an ultrasonic wave generation stage, and the second path end of the first transistor is electrically connected with the driving electrode;

and/or, the ultrasonic acquisition circuit comprises:

a second transistor including a control terminal, a first path terminal, and a second path terminal; the control end of the second transistor is used for receiving a second scanning signal, the first path end of the second transistor is electrically connected with the receiving electrode, and the second path end of the second transistor is used for receiving a basic voltage signal;

a third transistor including a control terminal, a first path terminal, and a second path terminal; a control end of the third transistor is configured to receive a third scan signal, and a second path end of the third transistor is electrically connected to a first path end of the second transistor;

a fourth transistor including a control terminal, a first path terminal, and a second path terminal; the control end of the fourth transistor is used for receiving a fourth scanning signal, and the first path end of the fourth transistor is electrically connected with a signal reading line;

a fifth transistor including a control terminal, a first path terminal, and a second path terminal; the control end of the fifth transistor is electrically connected with the first path end of the third transistor, the first path end of the fifth transistor is electrically connected with the second path end of the fourth transistor, and the second path end of the fifth transistor is used for receiving a power supply voltage signal.

7. The display panel according to claim 6, wherein the pixel driving circuit comprises:

the power supply providing unit is used for receiving a light-emitting signal and providing a power supply voltage signal for the light-emitting unit according to the light-emitting signal;

the driving signal writing unit receives the second scanning signal and writes a data voltage signal under the driving of the second scanning signal in a display stage;

the driving unit is connected with the driving signal writing unit and the power supply unit and used for generating a driving current matched with the data voltage signal according to the data voltage signal and utilizing the power supply voltage signal so as to drive the light-emitting unit to emit light by utilizing the driving current;

an initialization unit receiving the first scan signal and a reference voltage signal to initialize the light emitting unit with the reference voltage signal according to the first scan signal in a display stage;

wherein the initialization unit multiplexes the first transistor in the ultrasonic wave generation circuit to receive the reference voltage signal in a display phase; and/or the driving signal writing unit multiplexes the second transistor in the ultrasonic wave generating circuit to receive the data voltage signal in a display stage.

8. The display panel according to claim 7, further comprising a timing controller for controlling timings of the first scan signal, the second scan signal, the third scan signal, and the fourth scan signal to control on and off of corresponding transistors and for controlling a timing of the driving voltage signal; in the fingerprint identification stage, the timing controller is specifically configured to:

controlling the first transistor and the second transistor to be conducted and enabling the driving voltage signal to be an alternating voltage so as to enable the pressure sensing unit to generate an ultrasonic signal in a t1 time period;

in a time period t3, the first transistor, the second transistor and the fourth transistor are controlled to be switched off, the third transistor is switched on, and the reflected ultrasonic wave signal received by the receiving electrode is transmitted to the control end of the fifth transistor;

and in a time period t5, the second transistor is controlled to be conducted, the third transistor is controlled to be disconnected, the fourth transistor is controlled to be conducted, and the reflected ultrasonic wave signals accumulated on the fifth transistor are transmitted to the fourth transistor and read by the signal reading line to obtain fingerprint information.

9. The display panel according to claim 8,

the timing controller is further used for controlling the first transistor, the second transistor and the third transistor to be turned on in a t2 time period between the t1 time period and the t3 time period, and the driving voltage signal is a constant voltage signal;

and/or the timing controller is further used for controlling the second transistor to be turned on and the first transistor, the third transistor and the fourth transistor to be turned off in a t4 time period between the t3 time period and the t5 time period;

and/or the timing controller is further configured to control the second transistor and the third transistor to be turned on, and the first transistor and the fourth transistor to be turned off, and initialize the control terminal of the fifth transistor in a time period t6 after the time period t 5.

10. The display panel according to claim 8,

the time sequence controller is also used for controlling the on-off of a transistor in the pixel driving circuit, and controlling the driving signal writing unit to be switched off in the fingerprint identification stage so that the light-emitting unit cannot receive the driving current;

preferably, the timing controller is further configured to apply the same voltage signal as the driving voltage signal to the second electrode of the light emitting unit for the t1 time period.