CN113989161A - Method for realizing dynamic nonlinear adjustment of high contrast of video picture based on FPGA algorithm prediction - Google Patents

Method for realizing dynamic nonlinear adjustment of high contrast of video picture based on FPGA algorithm prediction Download PDF

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CN113989161A
CN113989161A CN202111329994.8A CN202111329994A CN113989161A CN 113989161 A CN113989161 A CN 113989161A CN 202111329994 A CN202111329994 A CN 202111329994A CN 113989161 A CN113989161 A CN 113989161A
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dynamic
nonlinear
value
curve
image
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李刚
柴燕
柴明
尹海鲜
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Shenzhen Zhongbo Photoelectric Co ltd
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Shenzhen Zhongbo Photoelectric Co ltd
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    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00—Image enhancement or restoration
    • G06T5/90—Dynamic range modification of images or parts thereof
    • G06T5/92—Dynamic range modification of images or parts thereof based on global image properties
    • G—PHYSICS
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    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
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    • G06T2207/10016—Video; Image sequence
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    • G06T2207/00—Indexing scheme for image analysis or image enhancement
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Abstract

The invention discloses a method for realizing dynamic nonlinear adjustment of high contrast of video pictures based on FPGA algorithm prediction, which comprises the steps of generating a dynamic nonlinear processing mode coefficient value through an empirical algorithm, proportionally mixing the measured dynamic nonlinear processing coefficient value with an original R, G, B nonlinear curve to generate a new nonlinear curve, transforming and displaying an image according to the new nonlinear curve, and processing the characteristics of the frame picture in real time. The method of the invention can make the existing Standard Dynamic (SDR) program source generate the effect of high contrast dynamic (HDR) on the display terminal, thereby improving the image quality and the watching experience.

Description

Method for realizing dynamic nonlinear adjustment of high contrast of video picture based on FPGA algorithm prediction
Technical Field
The invention relates to the field of LCD and LED display, in particular to a dynamic nonlinear adjustment method for realizing high contrast of video pictures based on FPGA algorithm prediction.
Background
In a traditional image processing scheme for controlling LED display, an acquired image source is Standard Dynamic (SDR), a source image is displayed after nonlinear transformation before being displayed, the nonlinear relation is mostly fixed, and conversion is performed in a fixed mode regardless of the characteristics of frame image quality; two picture characteristics which seriously affect the visual impression are common, and the low-gray picture state of the first high-contrast characteristic has large low-gray scale span after display and serious low-gray fault blocks appear; the second high gray picture state with low contrast features, the high gray scale span after display is large, and severe fault blocks appear. Fixed-coefficient image conversion cannot accommodate a wide range of image features.
Therefore, in order to obtain a better display effect under the condition of Standard Dynamic (SDR) of an image source, the display performance can be improved only by correlating with the picture characteristics through an FPGA algorithm and a processing flow, and the effect of High Dynamic (HDR) of the picture is achieved.
Disclosure of Invention
The invention provides a method for realizing dynamic nonlinear adjustment of high contrast of a video picture based on FPGA algorithm prediction, which is characterized by comprising the following steps of:
s1, performing equal-proportion compression on the image to obtain compressed image information;
s2, white background brightness extraction is carried out on the compressed image information;
s3, traversing the white background brightness two-dimensional array, counting the brightness value distribution, and generating a dynamic nonlinear processing coefficient value through an empirical algorithm according to the measured value range distribution relation;
s4, proportionally mixing the measured dynamic nonlinear processing coefficient value with the original R, G, B nonlinear curve to generate a new nonlinear curve;
and S5, transforming the image according to the new nonlinear curve and displaying the image.
In a possible embodiment, the S2, performing white background luminance extraction on the compressed image information includes:
s21, reading RGB values of points on the compressed image, thereby obtaining the RGB values
Figure BDA0003348421900000011
The value ranges from 0 to 255;
and S22, selecting the UVW Value (UVW) of the normalized point under different color standards, so as to obtain the UVW value in the range of 0.00-1.00.
S23, multiplying the RGB value and the UVW value to obtain a transformation result
Figure BDA0003348421900000021
。
In one possible embodiment, S4, the scaling the calculated dynamic non-linear processing coefficient value with the original R, G, B non-linear curve to generate a new non-linear curve includes:
s41, receiving a mixing ratio (A) input by a user;
s42, calculating and generating a new nonlinear curve (Y) according to the following formula＊)；
Y＊＝Y1×A+Y2×(1-A)；
Wherein Y is1Is an original constant coefficient, Y2Are dynamic non-linear processing mode coefficient values.
Compared with the serious fault block condition possibly caused by conversion in a fixed mode in the prior art, the method adopts a dynamic change mode to convert the image, so that the prior Standard Dynamic (SDR) program source can generate a high-contrast dynamic (HDR) effect on a display terminal, and the image quality and the viewing experience are improved.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a block diagram of the system of the present invention;
FIG. 2 background luminance distribution;
FIG. 3 is an image before compression;
FIG. 4 is a compressed image;
FIG. 5 is a graph of the effect of each pixel after matrix transformation.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," and the like in the description and claims of the present invention and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or modules is not limited to the listed steps or modules but may alternatively include other steps or modules not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The following is a detailed description of specific embodiments.
Referring to fig. 1, fig. 1 is a block diagram illustrating a method for implementing high-contrast dynamic nonlinear adjustment of video pictures based on FPGA algorithm prediction according to an embodiment of the present invention, including the following steps:
s1, performing equal-proportion compression on the image to obtain compressed image information;
s2, white background brightness extraction is carried out on the compressed image information;
s3, traversing the white background brightness two-dimensional array, counting the brightness value distribution, and generating a dynamic nonlinear processing numerical value through an empirical algorithm according to the measured value range distribution relation;
s4, proportionally mixing the measured dynamic nonlinear processing coefficient value with the original R, G, B nonlinear curve to generate a new nonlinear curve;
and S5, transforming the image according to the new nonlinear curve and displaying the image.
In one possible embodiment, the step S1 of performing an equal-scale compression on the image to obtain compressed image information includes:
the image is simplified and associated original image information is related, the original frame image is compressed in proportion, if the original image is 1920(W) x1080(H), 128(W) x72(H) is obtained, the total information quantity is about original 1/225, main features of the image are reserved through compression, the influence of interpolation can be reduced as much as possible through equal proportion relation compression, the information quantity is simplified, and subsequent rapid processing is achieved.
In one possible embodiment, the step of traversing the two-dimensional array of white background luminances and counting the luminance value distribution, and the step of generating the dynamic nonlinear processing mode coefficient value by an empirical algorithm from the measured value range distribution relationship at S3 further comprises:
mathematically expressing the relationship distribution function development:
D＝{X1＝x1，X2＝x2，…，Xn＝xn}
background luminance profile 2 is as shown:
and (4) measuring the brightness value range, dividing each 16 segments into 16 segments in the range of 0-255, and dividing the 16 segments in total, wherein the following formula only represents one segment 0-A and A-B.
Figure BDA0003348421900000041
Figure BDA0003348421900000042
Figure BDA0003348421900000043
Figure BDA0003348421900000044
The method can obtain the information of the scattered pixels in each interval and generate a two-dimensional array, and the information is compared by an algorithm to obtain a dynamic linear adjustment coefficient by comparing an empirical value relation table.
The empirical value relation table is a set of nonlinear adjustment coefficient table which is generated by acquiring the digital quantization relation of the brightness distribution and combining the human visual physiological habits through a computer to process various types of picture frames according to the processing method of the equipment end in advance. The video film, DV digital video, studio program and other categories of various types of picture frames are classified. The biological impression means that the vision habits of different people such as Asians, Europe, African and the like are different. The relationship between human visual biological habits and mathematical distribution is associated into a digital coefficient table by the process of combining and correcting the digital quantized brightness distribution and the visual physiological impression.
The method for generating the empirical value relation table is similar to the method for processing the FPGA at the equipment end, and has the difference that the number of video frames processed in the process is extremely small, the picture characteristics and the digital quantized distribution diagram are related, the physiological vision habit is corrected, and manual participation is realized.
In the implementation, the program types and the habits of observers are preset in advance on software at the front end of a computer, and the program types and the habits of the observers correspond to various empirical value relation lookup tables in advance, and are configured to an FPGA processing layer at the equipment end after setting and confirmation. Similarly, the method also supports the generation of a related video frame mode, extracts, converts and quantizes the program to be subjected to HDR intervention in advance by a computer, and determines and corrects the picture and related digital characteristics by an executive in a special software environment.
For example, the image before compression is shown in fig. 3, and the image after compression is shown in fig. 4.
In a possible embodiment, the S2, performing white background luminance extraction on the compressed image information includes:
s21, reading the compressedRGB values of points on an image, thereby obtaining
Figure BDA0003348421900000051
Obtaining the range of the RGB value from 0 to 255;
and S22, selecting normalized UVW values under different color standards to obtain (UVW), wherein the UVW values range from 0.00 to 1.00.
S23, multiplying the RGB value and the UVW value
Figure BDA0003348421900000052
And obtaining a transformation result.
Specifically, white background brightness extraction is performed on the compressed information, and a transformation result is obtained by using the coefficient matrix. R \ G \ B is frame picture pixel, the range is 0-255, U \ V \ W is brightness weight factor, the value range is 0.00-1.00, usually U: 0.30V: 0.59W: 0.11.
for example, after each pixel is matrix transformed, the effective range of brightness is 0-255. The effect is as in fig. 5.
In one possible embodiment, S4, the scaling the calculated dynamic non-linear processing coefficient value with the original R, G, B non-linear curve to generate a new non-linear curve includes:
s41, receiving a mixing ratio (A) input by a user;
s42, calculating and generating a new nonlinear curve (Y) according to the following formula＊)；
Y*＝Y1×A+Y2×(1-A)；
Wherein Y is1Is an original constant coefficient, Y2Are dynamic non-linear processing mode coefficient values.
Specifically, the display application is realized, after a new nonlinear curve is generated, after a frame synchronization signal, an image is updated to a corresponding nonlinear curve look-up table before the image is transmitted; when the image starts to be transmitted, pipeline transformation is performed. The displayed image of each frame is related to the picture characteristics, and the phenomenon of picture gray scale jumping and fault block is solved.
Compared with the serious fault block condition possibly caused by conversion in a fixed mode in the prior art, the method adopts a dynamic change mode to convert the image, so that the prior Standard Dynamic (SDR) program source can generate a high-contrast dynamic (HDR) effect on a display terminal, and the image quality and the viewing experience are improved.
It should be noted that, for simplicity of description, the above-mentioned embodiments of the product are described as a series of acts, but those skilled in the art will recognize that the present invention is not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the invention. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required by the invention.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus can be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules is merely a logical division, and in actual implementation, there may be other divisions, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or modules through some interfaces, and may be in an electrical or other form.
The modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical modules, may be located in one place, or may be distributed on a plurality of network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
In addition, functional modules in the embodiments of the present invention may be integrated into one processing module, or each of the modules may exist alone physically, or two or more modules are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode.
The above embodiments of the present invention are described in detail, and the principle and the implementation of the present invention are explained by applying specific embodiments, and the above description of the embodiments is only used to help understand the products of the present invention and the core ideas thereof; meanwhile, for a person skilled in the art, the specific embodiments and the application range of the product according to the present invention may be changed, and in summary, the content of the present specification should not be construed as limiting the present invention.

Claims (3)

1. A method for realizing dynamic nonlinear adjustment of high contrast of video pictures based on FPGA algorithm prediction is characterized by comprising the following steps:
s1, performing equal-proportion compression on the image to obtain compressed image information;
s2, white background brightness extraction is carried out on the compressed image information;
s3, traversing the white background brightness two-dimensional array, counting the brightness value distribution, and generating a dynamic nonlinear processing coefficient value through an empirical algorithm according to the measured value range distribution relation;
s4, proportionally mixing the measured dynamic nonlinear processing coefficient value with the original R, G, B nonlinear curve to generate a new nonlinear curve;
and S5, transforming the image according to the new nonlinear curve and displaying the image.
2. The method for realizing high-contrast dynamic nonlinear adjustment of video pictures based on FPGA algorithm prediction as recited in claim 1, wherein said S2, performing white background luminance extraction on said compressed image information comprises:
s21, reading RGB value of point on compressed image, thereby obtaining
Figure FDA0003348421890000011
The RGB value range is 0-255;
s22, selecting normalized UVW coefficient values under different color standards to obtain (UVW), wherein the UVW value ranges from 0.00 to 1.00.
S23, multiplying the RGB value and the UVW value
Figure FDA0003348421890000012
And obtaining a white background brightness conversion result.
3. The method for performing dynamic nonlinear adjustment of high contrast in video pictures based on FPGA algorithm prediction as claimed in claim 1, wherein the step of S4 proportionally mixing the measured dynamic nonlinear processing coefficient value with the original R, G, B nonlinear curve to generate a new nonlinear curve comprises:
s41, receiving a mixing ratio (A) input by a user;
s42, calculating and generating a new nonlinear curve (Y) according to the following formula*)；
Y*＝Y1×A+Y2×(1-A)；
Wherein Y is1Is an original constant coefficient, Y2Are dynamic non-linear processing mode coefficient values.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024087756A1 (en) * 2022-10-27 2024-05-02 格科微电子（上海）有限公司 Implementation method for high-dynamic-range image sensor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024087756A1 (en) * 2022-10-27 2024-05-02 格科微电子（上海）有限公司 Implementation method for high-dynamic-range image sensor

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