CN113986812A - CHNN-based on-chip network mapping method and device - Google Patents

CHNN-based on-chip network mapping method and device Download PDF

Info

Publication number
CN113986812A
CN113986812A CN202111046022.8A CN202111046022A CN113986812A CN 113986812 A CN113986812 A CN 113986812A CN 202111046022 A CN202111046022 A CN 202111046022A CN 113986812 A CN113986812 A CN 113986812A
Authority
CN
China
Prior art keywords
mapping
chnn
elements
network
iteration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202111046022.8A
Other languages
Chinese (zh)
Other versions
CN113986812B (en
Inventor
李慧
牛玉翔
顾华玺
张伟鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xidian University
Original Assignee
Xidian University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xidian University filed Critical Xidian University
Priority to CN202111046022.8A priority Critical patent/CN113986812B/en
Publication of CN113986812A publication Critical patent/CN113986812A/en
Application granted granted Critical
Publication of CN113986812B publication Critical patent/CN113986812B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7825Globally asynchronous, locally synchronous, e.g. network on chip
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/11Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Operations Research (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses an on-chip network mapping method and device based on CHNN, wherein the method comprises the following steps: s1: establishing a mapping problem model to convert the mapping problem to be solved into a dynamic process of the CHNN; s2: constructing a CHNN dynamic equation according to the mapping problem model; s3: performing initialization processing on the CHNN; s4: updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme; s5: resetting the initial state of the CHNN and executing step S4, repeating for multiple times to obtain multiple effective mapping schemes, and selecting an optimal mapping scheme from the multiple effective mapping schemes according to the objective function. The on-chip network mapping method provided by the invention solves the problems of high calculation complexity and long time of the existing mapping algorithm, improves the operation speed of the algorithm and ensures the stability of the algorithm.

Description

CHNN-based on-chip network mapping method and device
Technical Field
The invention belongs to the technical field of network on chip, and particularly relates to a CHNN-based network on chip mapping method and device.
Background
The network on chip is a new communication method of the system on chip, which is a main component of the multi-core technology. The network-on-chip method brings a brand-new communication method on chip, and is obviously superior to the performance of the traditional bus system. Conventional networks on chip mainly use electrical signals to transmit signals, which are called networks on chip, and their performance and efficiency are limited by metal wires in the chip. With the progress of communication technology and photonics technology, a new interconnection technology for multiprocessor chips, i.e., a network-on-chip technology, is proposed.
At present, the research on optical network on chip is mainly based on two aspects of bus technology and network structure technology, wherein the position of an IP core in a network structure can greatly affect the network performance. The mapping in the optical network-on-chip is to correspond the IP cores and the virtual core diagram elements in the core diagram one by one, and meanwhile, the relevant mapping requirements are met. Therefore, how to reasonably allocate a plurality of virtual kernel map elements in an optical network structure to meet the requirement of optical interconnection in future high-performance computing becomes a problem to be solved urgently. The existing mapping algorithm mainly comprises an heuristic algorithm, a linear programming algorithm and the like.
However, the existing mapping method has high computational complexity and long time, so that the operation speed of the network is slow and not stable enough. In addition, because the state of the neural network changes along with the change of time, the existing algorithm lacks an effective iteration stop condition, so that the error in the operation process of the algorithm influences the accuracy of the result.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a CHNN-based network-on-chip mapping method and apparatus. The technical problem to be solved by the invention is realized by the following technical scheme:
in one aspect, the present invention provides a network on optical chip mapping method based on CHNN, including:
s1: establishing a mapping problem model to convert the mapping problem to be solved into a dynamic process of the CHNN;
s2: constructing a CHNN dynamic equation according to the mapping problem model;
s3: performing initialization processing on the CHNN;
s4: updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme;
s5: resetting the initial state of the CHNN and executing step S4, repeating for multiple times to obtain multiple effective mapping schemes, and selecting an optimal mapping scheme from the multiple effective mapping schemes according to the objective function.
In one embodiment of the present invention, step S1 includes:
mapping a plurality of prokaryotic graph elements into network elements in a topology; the mapped network elements correspond to the prokaryotic graph elements one by one, and the network elements and the prokaryotic graph elements have the same communication relation;
representing the mapping result in a permutation matrix mode to convert the mapping problem to be solved into a dynamic process of CHNN; wherein, the permutation matrix needs to satisfy a preset rule.
In one embodiment of the present invention, the preset rule includes:
a first rule: only one element in each row of elements of the permutation matrix is 1, and the other elements are 0;
the second rule is as follows: only one element in each row of elements of the permutation matrix is 1, and the other elements are 0;
a third rule: the sum of all elements in the permutation matrix is equal to the number of elements before mapping.
In one embodiment of the present invention, step S2 includes:
converting the preset rule into a constraint term equation by adopting binary decision variable definition;
constructing an objective function according to the mapping algorithm target;
combining the objective function and the constraint term equation to obtain an energy function of the CHNN;
and obtaining a CHNN dynamic equation according to the energy function.
In one embodiment of the invention, the objective function is represented as:
max(i,x)V(i,j)V(x,y)Wastage(j,y)
wherein, elements i and x represent elements in a prokaryotic diagram, and j and y represent elements in a network; (i, x) represents the connection relation among elements in the prokaryotic diagram, when the element i and the element x are connected, (i, x) is 1, and when the element i and the element x are not connected, (i, x) is 0; the matrix V represents a state output matrix after iteration, a mapping scheme is represented after binary judgment is carried out on the state output matrix, V (i, j) represents the corresponding relation before and after element mapping, when an element i in the prokaryotic graph is mapped to an element j in the network, V (i, j) is 1, and otherwise, V (i, j) is 0; v (x, y) also represents the corresponding relation before and after element mapping, when the element x in the prokaryotic graph is mapped to the element y in the network, the V (x, y) is 1, otherwise, the V (x, y) is 0; wastage (j, y) represents the loss between network elements.
In one embodiment of the present invention, the CHNN dynamic equation is expressed as:
Figure BDA0003251210400000031
wherein E represents an energy function, and A, B, C, D are all scaling parameters of CHNN; n represents the number of elements; elements i, x represent elements in the prokaryotic graph, and j, y represent elements in the network; and V (, X) represents the corresponding relation before and after mapping, and is obtained by carrying out binary decision processing on the state output matrix V after iteration.
In one embodiment of the present invention, step 3 comprises:
carrying out assignment initialization on the input voltage, the iteration times and the weight of the CHNN;
calculating the loss between any two elements of the network;
the initial state of the CHNN is set.
In one embodiment of the present invention, step S4 includes:
updating the input and the output of the dynamic equation and calculating an energy function until an iteration end condition is met; wherein the iteration end condition is as follows: the current iteration frequency is between a preset minimum value and a preset maximum value, and the energy function reaches a minimum value;
carrying out binarization processing on the output matrix meeting the iteration end condition to obtain a mapping scheme;
and judging the effectiveness of the mapping scheme to obtain the effective mapping scheme.
In one embodiment of the present invention, in step S5, selecting an optimal mapping scheme from the plurality of effective mapping schemes according to the objective function includes:
solving the maximum loss of all effective mapping schemes according to the objective function;
and selecting a mapping scheme corresponding to the loss with the minimum maximum loss as an optimal mapping scheme.
On the other hand, the invention also provides a network mapping device on an optical chip based on the CHNN, comprising:
the model establishing module is used for establishing a mapping problem model so as to convert the mapping problem to be solved into a dynamic process of the CHNN;
the computing module is used for constructing a CHNN dynamic equation according to the mapping problem model;
the initialization module is used for carrying out initialization processing on the CHNN;
the iterative updating module is used for updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme;
and the preference module is used for selecting an optimal mapping scheme from the plurality of effective mapping schemes according to the objective function.
The invention has the beneficial effects that:
1. the CHNN algorithm is applied to solving the mapping problem of the network on the optical chip, the mapping problem model is established, the mapping problem to be solved is converted into a dynamic process of the CHNN, then a CHNN dynamic equation is established, the network is initialized, finally, the CHNN state is updated in an iterative mode, an effective mapping scheme is obtained, the optimal mapping scheme is selected from the multiple effective mapping schemes according to the objective function through multiple times of solving, the problems of high calculation complexity and long time of the existing mapping algorithm are solved, the operation speed of the algorithm is improved, and meanwhile the stability of the algorithm is guaranteed;
2. according to the invention, the limit of iteration times and the change of the energy function value are used as the judgment conditions for ending the iteration, when the corresponding conditions are met, the iterative solution mapping scheme is ended, and when the corresponding conditions are not met all the time, the iteration times are exceeded and the system is stopped, and the CHNN is automatically initialized to be solved again, so that the effectiveness and the accuracy of the solution are greatly increased, and the CHNN has good fault tolerance.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic diagram of a CHNN-based network-on-optical mapping method according to an embodiment of the present invention;
FIG. 2 is a flow chart of a one-pass complete CHNN initialization and iteration process provided by an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a network mapping device on an optical chip based on CHNN according to an embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the method and apparatus for network mapping on optical chip based on CHNN according to the present invention will be described in detail with reference to the accompanying drawings and the detailed description, but the embodiments of the present invention are not limited thereto. The mapping algorithm target can be adjusted adaptively according to the reality, that is, the overall design idea of the mapping algorithm is similar, but the objective function can be adjusted correspondingly according to the reality.
The foregoing and other technical matters, features and effects of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings. The technical means and effects of the present invention adopted to achieve the predetermined purpose can be more deeply and specifically understood through the description of the specific embodiments, however, the attached drawings are provided for reference and description only and are not used for limiting the technical scheme of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or device that comprises a list of elements does not include only those elements but may include other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of additional like elements in the article or device comprising the element.
Example one
Referring to fig. 1, fig. 1 is a schematic diagram of a network mapping method on an optical chip based on CHNN according to an embodiment of the present invention, which includes:
s1: a mapping problem model is established to convert the mapping problem to be solved into a dynamic process of the CHNN.
Specifically, mapping in the optical network on chip is to correspond the IP cores to the virtual core map elements in the core map one to one, and at the same time, the relevant mapping requirements are satisfied.
In this embodiment, a Hopfield Neural Network (HNN) is used as a single-layer fully-connected feedback neural network, and has the advantages of a relatively complete theoretical system, an intelligent algorithm, a relatively high operation speed, and the like. The method can be classified into a discrete type (DHNN) and a continuous type (CHNN) according to the processing input sample. Based on the processing object of the invention, a Continuous Hopfield Neural Network (CHNN) is selected for algorithm design.
Specifically, step S1 includes:
s11: mapping a plurality of prokaryotic graph elements into network elements in a topology; the mapped network elements correspond to the prokaryotic graph elements one by one, and the network elements and the prokaryotic graph elements have the same communication relation.
In particular, when the number of prokaryotic elements is N, there may be N! A mapping scheme is used. For example, taking the number of the prokaryotic elements as 4 as an example, assuming that the prokaryotic elements include four elements 1, 2, 3, and 4, and the network elements include A, B, C, D, the mapping schemes are 24 when the four elements 1, 2, 3, and 4 are mapped to positions A, B, C, D.
S12: representing the mapping result in a permutation matrix mode to convert the mapping problem to be solved into a dynamic process of CHNN; wherein, the permutation matrix needs to satisfy a preset rule.
Specifically, in the present embodiment, the mapping result is expressed in the form of a permutation matrix, and the rule of the permutation matrix needs to be satisfied. For any final mapping scheme of prokaryotic map elements, an N-dimensional vector can be generally used for representation, that is, N neurons are needed, and the mapping problem of N elements needs N × N neurons for implementation. For example, in the problem of mapping 5 prokaryotic map elements, prokaryotic map element 1 maps to network element 3, and the corresponding vector is V (1:) ═ 00100.
Further, the preset rules that the permutation matrix needs to satisfy include the following three:
a first rule: only one element in each row of elements of the permutation matrix is 1, and the other elements are 0;
the second rule is as follows: only one element in each row of elements of the permutation matrix is 1, and the other elements are 0;
a third rule: the sum of all elements in the permutation matrix is equal to the number of elements before mapping.
S2: and constructing a CHNN dynamic equation according to the mapping problem model.
In the present embodiment, step S2 includes:
s21: and converting the preset rule into a constraint term equation by adopting binary decision variable definition.
First, the first rule, that is, only one element in each row of elements of the permutation matrix is 1, and the other elements are 0, is converted into the following formula:
Figure BDA0003251210400000081
namely: for any one i have
Figure BDA0003251210400000082
Wherein i represents a prokaryotic element and j represents a network element. Matrix V tableAnd (4) displaying the state output matrix after iteration, namely the mapping result, and after the iteration is finished, performing binary judgment on the mapping result to represent a final mapping scheme. When the i element in the prokaryotic map maps to the j element in the network, V (i, j) is 1, otherwise it is 0.
Then, the first rule, that is, only one element in each column of elements of the permutation matrix is 1, and the other elements are 0, is converted into the following formula:
Figure BDA0003251210400000083
i.e. for any one j
Figure BDA0003251210400000084
Finally, the third rule, that the sum of all elements in the permutation matrix is equal to the number of elements before mapping, is converted into the following formula:
Figure BDA0003251210400000085
the three formulas jointly form a constraint term in the energy equation, so that the mapping result is a permutation matrix meeting the requirements after binarization.
S22: and constructing an objective function according to the mapping algorithm target.
In this embodiment, the mapping algorithm aims to perform signal transmission on the elements mapped in the network according to the element relationship in the kernel map, and solve the maximum loss generated in the transmission process of the elements having the connection relationship in each effective mapping scheme. And solving for multiple times, comparing the maximum losses obtained by the effective mapping schemes, and finding out the minimum maximum loss in all the schemes. The objective function may find the loss value at which the transmission path loss is the largest in one mapping.
Specifically, the objective function constructed from the mapping algorithm targets may be expressed as:
max(i,x)V(i,j)V(x,y)Wastage(j,y)
wherein, elements i and x represent elements in a prokaryotic diagram, and j and y represent elements in a network; (i, x) represents the connection relation among elements in the prokaryotic diagram, when the element i and the element x are connected, (i, x) is 1, and when the element i and the element x are not connected, (i, x) is 0; the matrix V represents a state output matrix after iteration, namely a mapping result, and after the iteration is finished, binary judgment is carried out on the state output matrix to obtain a final mapping scheme; v (i, j) represents the corresponding relation before and after element mapping, when the element i in the prokaryotic graph is mapped to the element j in the network, V (i, j) is 1, otherwise, V (i, j) is 0; v (x, y) also represents the corresponding relation before and after element mapping, when the element x in the prokaryotic graph is mapped to the element y in the network, the V (x, y) is 1, otherwise, the V (x, y) is 0; wastage (j, y) represents the loss between network elements.
S23: and combining the objective function with the constraint term equation to obtain an energy function of the CHNN.
In this embodiment, the constructed objective function and the constraint term equation obtained in step S21 are combined to construct an energy function, so that the objective function corresponds to the energy function, and the specific expression of the energy function is as follows:
Figure BDA0003251210400000101
a, B, C, D are penalty parameters of CHNN; i. x is a prokaryotic diagram element, and x and y are network elements; the matrix V represents a state output matrix after iteration, namely a mapping result, and after the binary decision of the matrix V (#,) can obviously reflect the corresponding relation before and after element mapping.
In this embodiment, the first three terms in the energy function expression are constraint terms of the problem, and the latter term is a target term to be optimized. When CHNN is operated, the energy function value can be continuously reduced along with the increase of the iteration number, and when the energy function value is changed little compared with the last time, the network tends to be stable.
S24: and obtaining a CHNN dynamic equation according to the energy function.
Specifically, according to the energy equation obtained in step S23, the dynamic equation of the CHNN corresponding to the mapping problem can be derived as:
Figure BDA0003251210400000102
s3: the CHNN is initialized.
Firstly, assigning and initializing network parameters such as input voltage, iteration times, weight and the like of the CHNN.
Specifically, the CHNN is sensitive to the energy function of the network and the coefficients of the dynamic equations in the iterative process, while the determination of the network parameter values has a direct influence on the convergence performance of the neural network, and the reasonable selection of the parameter values is very important for the solution of the problem. Because the research on the network mapping on the optical chip by the CHNN is less at present, when initializing the network parameters, the present embodiment may mainly perform assignment initialization by researchers on the basis of experience in the early stage of summary.
Referring to fig. 2, fig. 2 is a flowchart illustrating a complete CHNN initialization and iteration process according to an embodiment of the present invention.
First, the input voltage, iteration times, weight, etc. of the CHNN are assigned and initialized.
The loss between any two elements of the network is then calculated.
Specifically, after performing parameter initialization assignment on the CHNN, the loss parameter L of the network can be obtainedMoff、LMonAnd LwcAnd calculating the loss between any two elements of the network according to the loss parameters for calling in iteration.
It should be noted that, when performing loss calculation, the path problem needs to be considered; the path is different and the loss is different.
Finally, the initial state of the CHNN is set.
Specifically, the present embodiment may initialize the input of the network as:
Figure BDA0003251210400000111
wherein, U0Is the input voltage of the network, U is the input state matrix,n is the number of prokaryotic primitive elements, deltaxyFor the added random term, it satisfies the following condition:
δxy∈(-1,1)。
s4: and updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme.
S41: and updating the input and the output of the dynamic equation and calculating an energy function until an iteration end condition is met.
In particular, please continue to refer to fig. 2.
First, the CHNN dynamics equation may be used to calculate the increments of the input states.
Then, the input state of the CHNN at the next time is updated by using a first-order euler method, and the updating formula is as follows:
Figure BDA0003251210400000121
wherein U (t) is the input state matrix at the previous time, U (t +1) is the input state matrix at the next time,
Figure BDA0003251210400000122
for increments of the input state, Δ t is the iteration step.
Next, the output state of CHNN at the next time is updated by using the sigmoid function, and the update formula is as follows:
Figure BDA0003251210400000123
wherein, V is an output state matrix, namely a mapping result, which reflects the mapping relation between the kernel graphic element i and the network element j; u is an input state matrix, U0Is the input voltage of the network.
Further, after the state of the dynamic equation is updated, the energy function of the current CHNN is calculated according to the updated output, and the calculation formula is shown in the energy function expression in step S23.
And finally, using the limit of the iteration times and the change of the energy function value as the judgment conditions for ending the iteration, and ending the iteration to solve the mapping scheme when the corresponding conditions are met.
As the energy function is continuously reduced along with the increase of the iteration times, the state of the network neurons gradually approaches to an equilibrium point, and when the network runs to be stable, the energy function reaches the minimum value. Therefore, the present embodiment uses the limit of the number of iterations and the change in the energy function value together as the criterion for the end of the iteration.
Specifically, the discrimination condition of the end of iteration is: the current iteration number is between a preset minimum value and a preset maximum value, and the energy function reaches a minimum value.
If the iteration ending condition is not met, stopping iteration when the current iteration number exceeds the preset maximum iteration number, and automatically reinitializing the CHNN initial state matrix to solve again. And if the current iteration times do not exceed the maximum iteration times or the current network energy function does not meet the requirements, namely the current network energy function does not reach a minimum value, repeating the iterative operation.
And if the iteration ending condition is met, ending the iteration.
For example, the minimum number of iterations 1000, the maximum number of iterations 6000, and the upper limit of the energy function variation value may be set to 10^ (-8). Each time of solving the mapping scheme needs to iterate for at least 1000 times, so that the energy function value is continuously reduced, and the network tends to a stable state as much as possible. Each iteration requires the calculation of an energy function value, which is compared with the energy function value obtained in the previous iteration, and the change value is saved. When the iteration number i is more than or equal to 1000 and less than 6000, the variation value of the energy function value of the (i-10) th time and the (i-9) th time is less than 10^ (8), and the variation value of the energy function value of the ith time and the (i-1) th time is also less than 10^ (8), (continuously comparing the variation values of the two intervals is to eliminate the error caused by the local minimum value of the energy function as far as possible), the network is basically stable, and the iteration is finished. And when the judgment condition that i is larger than 6000 is not met, automatically adjusting the initial state matrix to carry out reiterative solution.
According to the invention, the limit of iteration times and the change of the energy function value are used as the judgment conditions for ending the iteration, when the corresponding conditions are met, the iterative solution mapping scheme is ended, and when the corresponding conditions are not met all the time, the iteration times are exceeded and the system is stopped, and the CHNN is automatically initialized to be solved again, so that the effectiveness and the accuracy of the solution are greatly increased, and the CHNN has good fault tolerance.
S42: and carrying out binarization processing on the output matrix meeting the iteration end condition to obtain a mapping scheme.
Because the output matrix cannot completely get 0 at the non-mapping position and 1 at the mapping position, which are approximate values, when the iteration end condition is satisfied, the output matrix V (i.e. the mapping result) at this time needs to be binarized to obtain a standard and complete mapping scheme.
S43: and judging the effectiveness of the mapping scheme to obtain the effective mapping scheme.
Specifically, the validity of the mapping scheme is determined according to the constraint term equation of the permutation matrix in this embodiment, if the binarized output matrix meets the constraint term equation, the mapping scheme is indicated to be valid, otherwise, the mapping scheme is solved again.
S5: resetting the initial state of the CHNN and executing step S4, repeating for multiple times to obtain multiple effective mapping schemes, and selecting an optimal mapping scheme from the multiple effective mapping schemes according to the objective function.
Due to the robustness of the CHNN, the result of each solution is not necessarily a global optimal solution, and a suboptimal solution and an effective solution close to the optimal solution may occur, so that the solution needs to be performed for many times to select the global optimal solution.
Specifically, reference may be made to the initial state of the setting CHNN in step S3, and then step S4 is performed. And finally, solving the maximum loss of all effective mapping schemes according to the objective function.
And comparing the maximum loss of each mapping scheme in the obtained effective mapping schemes, and selecting the mapping scheme corresponding to the minimum loss in the maximum loss as the optimal mapping scheme.
In this embodiment, iterative computation is performed according to a network update formula to obtain an effective mapping scheme, maximum losses in a plurality of effective mapping schemes obtained by multiple solutions are computed and compared, and a mapping scheme corresponding to a minimum value is selected from the maximum losses, that is, an optimal mapping scheme is obtained.
The CHNN algorithm is applied to solving the mapping problem of the network on the optical chip, the mapping problem model is established, the mapping problem to be solved is converted into a dynamic process of the CHNN, then a CHNN dynamic equation is established, the network is initialized, finally, the CHNN state is updated in an iterative mode, an effective mapping scheme is obtained, the optimal mapping scheme is selected from the multiple effective mapping schemes according to the objective function through multiple times of solving, the problems of high calculation complexity and long time of the existing mapping algorithm are solved, the operation speed of the algorithm is improved, and meanwhile the stability of the algorithm is guaranteed;
example two
On the basis of the first embodiment, the present embodiment provides an optical network-on-chip mapping device based on the CHNN. Referring to fig. 3, fig. 3 is a schematic structural diagram of a network mapping device on an optical chip based on CHNN according to an embodiment of the present invention, which includes:
the model establishing module 1 is used for establishing a mapping problem model so as to convert the mapping problem to be solved into a dynamic process of CHNN;
the calculation module 2 is used for constructing a CHNN dynamic equation according to the mapping problem model;
the initialization module 3 is used for performing initialization processing on the CHNN;
the iteration updating module 4 is used for updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme;
and the preference module 5 is used for selecting an optimal mapping scheme from the plurality of effective mapping schemes according to the objective function.
The on-chip network mapping apparatus provided in this embodiment may implement the mapping method provided in the first embodiment, and the detailed process is not described herein again.
The invention adopts the CHNN mapping algorithm to solve the network problem on the optical chip, the provided CHNN-based mapping algorithm is stable and feasible in solving the network mapping problem on the optical chip, and the method is simple, convenient, correct and stable in solving aiming at the traditional mapping algorithm. The adopted neural network has good fault tolerance, the state of the neural network changes along with the change of time, and the limit of iteration times and the change of an energy function value are used as the judgment conditions for ending the iteration, so that the effectiveness and the accuracy of the solution are greatly increased.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.

Claims (10)

1. A CHNN-based on-chip network mapping method is characterized by comprising the following steps:
s1: establishing a mapping problem model to convert the mapping problem to be solved into a dynamic process of the CHNN;
s2: constructing a CHNN dynamic equation according to the mapping problem model;
s3: performing initialization processing on the CHNN;
s4: updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme;
s5: resetting the initial state of the CHNN and executing step S4, repeating for multiple times to obtain multiple effective mapping schemes, and selecting an optimal mapping scheme from the multiple effective mapping schemes according to the objective function.
2. The CHNN-based optical network-on-chip mapping method of claim 1, wherein the step S1 includes:
mapping a plurality of prokaryotic graph elements into network elements in a topology; the mapped network elements correspond to the prokaryotic graph elements one by one, and the network elements and the prokaryotic graph elements have the same communication relation;
representing the mapping result in a permutation matrix mode to convert the mapping problem to be solved into a dynamic process of CHNN; wherein, the permutation matrix needs to satisfy a preset rule.
3. The CHNN-based on-chip network mapping method of claim 2, wherein the preset rules comprise:
a first rule: only one element in each row of elements of the permutation matrix is 1, and the other elements are 0;
the second rule is as follows: only one element in each row of elements of the permutation matrix is 1, and the other elements are 0;
a third rule: the sum of all elements in the permutation matrix is equal to the number of elements before mapping.
4. The CHNN-based optical network-on-chip mapping method according to claim 2, wherein the step S2 includes:
converting the preset rule into a constraint term equation by adopting binary decision variable definition;
constructing an objective function according to the mapping algorithm target;
combining the objective function and the constraint term equation to obtain an energy function of the CHNN;
and obtaining a CHNN dynamic equation according to the energy function.
5. The CHNN-based on-chip network mapping method of claim 4, wherein the objective function is represented as:
max(i,x)V(i,j)V(x,y)Wastage(j,y)
wherein, elements i and x represent elements in a prokaryotic diagram, and j and y represent elements in a network; (i, x) represents the connection relation among elements in the prokaryotic diagram, when the element i and the element x are connected, (i, x) is 1, and when the element i and the element x are not connected, (i, x) is 0; the matrix V represents a state output matrix after iteration, a mapping scheme is represented after binary judgment is carried out on the state output matrix, V (i, j) represents the corresponding relation before and after element mapping, when an element i in the prokaryotic graph is mapped to an element j in the network, V (i, j) is 1, and otherwise, V (i, j) is 0; v (x, y) also represents the corresponding relation before and after element mapping, when the element x in the prokaryotic graph is mapped to the element y in the network, the V (x, y) is 1, otherwise, the V (x, y) is 0; wastage (j, y) represents the loss between network elements.
6. The CHNN-based on-chip network mapping method of claim 5, wherein the CHNN dynamic equation is expressed as:
Figure FDA0003251210390000021
wherein E represents an energy function, and A, B, C, D are all scaling parameters of CHNN; n represents the number of elements; elements i, x represent elements in the prokaryotic graph, and j, y represent elements in the network; and V (, X) represents the corresponding relation before and after mapping, and is obtained by carrying out binary decision processing on the state output matrix V after iteration.
7. The CHNN-based on-chip network mapping method according to claim 1, wherein step 3 comprises:
carrying out assignment initialization on the input voltage, the iteration times and the weight of the CHNN;
calculating the loss between any two elements of the network;
the initial state of the CHNN is set.
8. The CHNN-based optical network-on-chip mapping method according to claim 2, wherein the step S4 includes:
updating the input and the output of the dynamic equation and calculating an energy function until an iteration end condition is met; wherein the iteration end condition is as follows: the current iteration frequency is between a preset minimum value and a preset maximum value, and the energy function reaches a minimum value;
carrying out binarization processing on the output matrix meeting the iteration end condition to obtain a mapping scheme;
and judging the effectiveness of the mapping scheme to obtain the effective mapping scheme.
9. The CHNN-based optical on-chip network mapping method of claim 2, wherein in step S5, selecting an optimal mapping scheme from the plurality of effective mapping schemes according to an objective function comprises:
solving the maximum loss of all effective mapping schemes according to the objective function;
and selecting a mapping scheme corresponding to the loss with the minimum maximum loss as an optimal mapping scheme.
10. An on-chip network mapping device based on CHNN, comprising:
the model building module (1) is used for building a mapping problem model so as to convert the mapping problem to be solved into a dynamic process of CHNN;
the computing module (2) is used for constructing a CHNN dynamic equation according to the mapping problem model;
an initialization module (3) for performing initialization processing on the CHNN;
the iteration updating module (4) is used for updating the CHNN state according to the CHNN dynamic equation to obtain an effective mapping scheme;
and the preference module (5) is used for selecting an optimal mapping scheme from the plurality of effective mapping schemes according to the objective function.
CN202111046022.8A 2021-09-07 2021-09-07 CHNN-based network-on-light-sheet mapping method and device Active CN113986812B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111046022.8A CN113986812B (en) 2021-09-07 2021-09-07 CHNN-based network-on-light-sheet mapping method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111046022.8A CN113986812B (en) 2021-09-07 2021-09-07 CHNN-based network-on-light-sheet mapping method and device

Publications (2)

Publication Number Publication Date
CN113986812A true CN113986812A (en) 2022-01-28
CN113986812B CN113986812B (en) 2024-07-12

Family

ID=79735453

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111046022.8A Active CN113986812B (en) 2021-09-07 2021-09-07 CHNN-based network-on-light-sheet mapping method and device

Country Status (1)

Country Link
CN (1) CN113986812B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030161467A1 (en) * 2001-04-19 2003-08-28 Cheng Lee Ming Compact crypto-engine for random number and stream cipher generation
CN104021420A (en) * 2014-05-23 2014-09-03 电子科技大学 Programmable discrete Hupfield network circuit
US20160252943A1 (en) * 2015-02-27 2016-09-01 Ankush Varma Dynamically updating logical identifiers of cores of a processor
US20170063541A1 (en) * 2015-08-28 2017-03-02 City University Of Hong Kong Multivariate cryptography based on clipped hopfield neural network
CN108173760A (en) * 2017-12-22 2018-06-15 北京工业大学 A kind of NoC mapping method based on modified-immune algorithm
CN111752891A (en) * 2020-06-05 2020-10-09 西安电子科技大学 IP core mapping method for optical network on chip
CN112054869A (en) * 2020-08-05 2020-12-08 西安电子科技大学 Wavelength allocation method based on continuous Hopfield neural network

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030161467A1 (en) * 2001-04-19 2003-08-28 Cheng Lee Ming Compact crypto-engine for random number and stream cipher generation
CN104021420A (en) * 2014-05-23 2014-09-03 电子科技大学 Programmable discrete Hupfield network circuit
US20160252943A1 (en) * 2015-02-27 2016-09-01 Ankush Varma Dynamically updating logical identifiers of cores of a processor
US20170063541A1 (en) * 2015-08-28 2017-03-02 City University Of Hong Kong Multivariate cryptography based on clipped hopfield neural network
CN108173760A (en) * 2017-12-22 2018-06-15 北京工业大学 A kind of NoC mapping method based on modified-immune algorithm
CN111752891A (en) * 2020-06-05 2020-10-09 西安电子科技大学 IP core mapping method for optical network on chip
CN112054869A (en) * 2020-08-05 2020-12-08 西安电子科技大学 Wavelength allocation method based on continuous Hopfield neural network

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
MD FARHADUR REZA ET AL: "Energy-efficient and high-performance Noc Architecture and mapping solution for deep neural nerworks.", 《NOCS’19:PROCEEDINGS OF THE 13TH IEEE INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP 》, 31 October 2019 (2019-10-31) *
YUXIANG NIU ET AL: "A Loss-aware Continuous Hopfield Neural NetWork(CHNN)-based Maping Algorithm in Optical Nwework-on-Chip(NnoC)", 《2022 20TH INTERNATIONAL CONFERENCE ON OPTICAL COMMUNICAATIONS AND NETWORKS(ICOCN)》, 4 October 2022 (2022-10-04) *
许川佩;董平;关鉴;: "改进量子算法的片上网络映射研究", 计算机工程与应用, no. 01, 1 January 2011 (2011-01-01) *

Also Published As

Publication number Publication date
CN113986812B (en) 2024-07-12

Similar Documents

Publication Publication Date Title
CN109241291B (en) Knowledge graph optimal path query system and method based on deep reinforcement learning
CN107169563B (en) Processing system and method applied to two-value weight convolutional network
US20220083868A1 (en) Neural network training method and apparatus, and electronic device
KR20180092810A (en) Automatic thresholds for neural network pruning and retraining
WO2020199690A1 (en) Cloud platform-based sharing learning system and method, sharing platform and method, and medium
CN113489654B (en) Routing method, device, electronic equipment and storage medium
CN109214502B (en) Neural network weight discretization method and system
CN113722980B (en) Ocean wave height prediction method, ocean wave height prediction system, computer equipment, storage medium and terminal
CN113537365B (en) Information entropy dynamic weighting-based multi-task learning self-adaptive balancing method
CN114092336B (en) Image scaling method, device, equipment and medium based on bilinear interpolation algorithm
CN113361803A (en) Ultra-short-term photovoltaic power prediction method based on generation countermeasure network
CN116796639A (en) Short-term power load prediction method, device and equipment
CN112036651A (en) Electricity price prediction method based on quantum immune optimization BP neural network algorithm
CN117853269B (en) Heat supply data optimization method, device and equipment based on machine learning
EP0384709A2 (en) Learning Machine
CN113986812A (en) CHNN-based on-chip network mapping method and device
CN116702598A (en) Training method, device, equipment and storage medium for building achievement prediction model
CN111488208B (en) Bian Yun collaborative computing node scheduling optimization method based on variable-step-size bat algorithm
CN117351299A (en) Image generation and model training method, device, equipment and storage medium
CN112529328A (en) Product performance prediction method and system
CN116826699A (en) Photovoltaic cluster power prediction method, device, equipment and medium
US20230252215A1 (en) System and method for generating a floorplan for a digital circuit using reinforcement learning
CN112561050A (en) Neural network model training method and device
WO2020087254A1 (en) Optimization method for convolutional neural network, and related product
CN115660347A (en) Energy storage system optimal configuration method facing multiple constraints and nonlinear targets

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant