CN113985760B - ARM-based switching value processing method applied to monitoring alarm system - Google Patents
ARM-based switching value processing method applied to monitoring alarm system Download PDFInfo
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- 238000003672 processing method Methods 0.000 title claims abstract description 10
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
- G05B19/0425—Safety, monitoring
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- G—PHYSICS
- G08—SIGNALLING
- G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
- G08B21/00—Alarms responsive to a single specified undesired or abnormal condition and not otherwise provided for
- G08B21/18—Status alarms
- G08B21/185—Electrical failure alarms
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- G—PHYSICS
- G08—SIGNALLING
- G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
- G08B21/00—Alarms responsive to a single specified undesired or abnormal condition and not otherwise provided for
- G08B21/18—Status alarms
- G08B21/187—Machine fault alarms
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Abstract
Embodiments of the present disclosure provide ARM-based switching value processing methods, apparatus, devices, and computer-readable storage media for use in monitoring alarm systems. The method comprises the steps of obtaining switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment; defining two structural bodies in a binding area and an alias area respectively through a preset algorithm based on the switching value data; storing and transmitting the switching value data through a structural body defined in the binding area; updating the switching value data by a structure defined in the alias area; the monitoring alarm system comprises an ARM embedded platform supporting BitBund operation. In this way, the storage, transmission and operation efficiency of the switching value data are improved.
Description
Technical Field
Embodiments of the present disclosure relate generally to the field of data processing, and more particularly, to an ARM-based switching value processing method, apparatus, device, and computer-readable storage medium for use in a monitoring alarm system.
Background
In the field of ship monitoring and alarming, a large number of monitoring and alarming points are needed, and data of the alarming points are needed to be collected, stored, operated and transmitted; a measurement/alarm point is typically referred to as a physical state that has and only has 2 values, and so can be represented using exactly one binary bit (bit) variable (or logical variable) on a computer, which is also known in the industry as a switching value.
In practical applications, there are sometimes many monitoring alarm points, up to several thousand, for large vessels. Because the data volume is large and the data is refreshed in real time, if the data is processed improperly, the algorithm is bad, and the problems of slow updating, unreliability and the like can be caused. Therefore, it is valuable to study the processing efficiency and algorithm of the switching value.
Disclosure of Invention
According to an embodiment of the present disclosure, an ARM-based switching value processing scheme is provided for use in a monitoring alarm system.
In a first aspect of the present disclosure, an ARM-based switching value processing method applied to a monitoring alarm system is provided. The method comprises the following steps:
acquiring switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment;
defining two structural bodies in a binding area and an alias area respectively through a preset algorithm based on the switching value data;
storing and transmitting the switching value data through a structural body defined in the binding area; updating the switching value data by a structure defined in the alias area;
the monitoring alarm system comprises an ARM embedded platform supporting BitBund operation.
Further, defining two structures in the binding area and the alias area respectively by a preset algorithm based on the switching value data includes:
based on the switching value data, two structures are respectively defined in the binding area and the alias area through a BitBund algorithm.
Further, the defining two structures in the binding area and the alias area respectively through the BitBund algorithm includes:
defining a structure body in the binding area by a bit addressing method;
a structure is defined in the alias area by word addressing.
Further, the method comprises the steps of,
the bit width of the structure body in the alias area is 32 times of the bit width of the structure body in the binding area.
Further, the method comprises the steps of,
each switching value is ordered identically in the alias area structure and the binding area structure.
Further, the alias area structure and the binding area structure have the same starting offset address.
In a second aspect of the present disclosure, an ARM based switching value processing apparatus for use in a monitoring alarm system is provided. The device comprises:
the acquisition module is used for acquiring switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment;
the definition module is used for defining two structural bodies in the binding area and the alias area respectively through a preset algorithm based on the switching value data;
the processing module is used for storing and transmitting the switching value data through the structure body defined in the binding area; updating the switching value data by a structure defined in the alias area;
the monitoring alarm system comprises an ARM embedded platform supporting BitBund operation.
Further, defining two structures in the binding area and the alias area respectively by a preset algorithm based on the switching value data includes:
based on the switching value data, two structures are respectively defined in the binding area and the alias area through a BitBund algorithm.
In a third aspect of the present disclosure, an electronic device is provided. The electronic device includes: a memory and a processor, the memory having stored thereon a computer program, the processor implementing the method as described above when executing the program.
In a fourth aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon a computer program which when executed by a processor implements a method as according to the first aspect of the present disclosure.
The ARM-based switching value processing method applied to the monitoring alarm system provided by the embodiment of the application obtains switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment; defining two structural bodies in a binding area and an alias area respectively through a preset algorithm based on the switching value data; storing and transmitting the switching value data through a structural body defined in the binding area; and updating the switching value data through a structural body defined in the alias area, so that the storage, transmission and operation efficiency of the switching value data are improved.
It should be understood that what is described in this summary is not intended to limit the critical or essential features of the embodiments of the disclosure nor to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following description.
Drawings
The above and other features, advantages and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, wherein like or similar reference numerals denote like or similar elements, in which:
FIG. 1 illustrates a flowchart of an ARM-based switching value processing method applied to a monitoring alarm system according to an embodiment of the present disclosure;
FIG. 2 illustrates a memory map diagram of a local ARM CORTEX-M4 according to an embodiment of the present disclosure;
FIG. 3 illustrates an application diagram of bit binding according to an embodiment of the present disclosure;
FIG. 4 illustrates a block diagram of an ARM-based switching value processing device for use in a monitoring alarm system in accordance with an embodiment of the present disclosure;
fig. 5 illustrates a block diagram of an exemplary electronic device capable of implementing embodiments of the present disclosure.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments in this disclosure without inventive faculty, are intended to be within the scope of this disclosure.
In addition, the term "and/or" herein is merely an association relationship describing an association object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
Fig. 1 shows a flowchart of an ARM-based switching value processing method 100 applied to a monitoring alarm system according to an embodiment of the present disclosure, including:
the monitoring alarm system is usually an ARM embedded platform supporting the bitbase operation, for example, an ARM embedded platform with M3 and M4 cores, etc.
S110, acquiring switching value data; the switching value data is a binary bit variable for identifying the operating state of the device.
The switching value data is binary bit variable, and the states of the measuring points/alarming points correspond to the values of the switching values, as shown in table 1:
| measuring point/alarm point | Bitval=logic 1 | Bitval=logic 0 |
| Operating state of the generator | In operation | Stop of |
| Generator fault alarm | Alarm for failure | Alarm without failure |
| Smoke alarm | Alarm occurs | No alarm occurs |
| Fireproof door opening | Has been opened | Unopened |
TABLE 1
In some embodiments, the measurement/alarm points may be typically collected by a sensor, i.e., by a sensor circuit, which translates into a high-low level collection of one voltage level by the GPIO of the chip.
In some embodiments, the switching value is generally used to identify the operating state of the device, as shown in table 2:
TABLE 2
S120, defining two structural bodies in a binding area and an alias area respectively through a preset algorithm based on the switching value data;
in some embodiments, referring to FIG. 2, taking the local memory map of the M4 core as an example, where the address 0x20000000-0x200FFFFF interval is a BitBund (Bit bind) region, addressing is Bit addressing (addressed by CMSIS); the 0x22000000-0x23FFFFFF field is a BitBund alias field addressed in Word addressing (the minimum access unit is 4 bytes, i.e., 4 bytes are defined as 1 Word).
In some embodiments, one bit within a bit bound region corresponds to 32 bits of a homonym region based on a CMSIS map;
referring to FIG. 3, a bit variable or a combination thereof is defined in the binding area, while a 32-bit wide mapped variable is defined in the alias area. When one unit variable (32 bit wide) in the alias area is accessed, the unit variable is equivalent to one bit variable (1 bit wide) of the binding area is accessed at the same time, and a basis is provided for realizing atomic operation;
specifically, two forms are defined for each switching amount:
1, bit addressing form (form used for storage/transmission), the occupied bit width is 1bit;
2, word addressing form (form used for acquisition/operation), occupation bit width is 1 word=32bit;
the Bit width of the Word addressing form is 32 times of that of the Bit addressing form;
further, two structures are defined through the two addressing modes, wherein the switching value arrangement sequences inside the two structures are consistent; reference is made to the definition of left generator structure in table 2:
table 2 (definition for Structure of Generator)
The structure of the Bit addressing form is defined as follows:
referring to the two structures, each switching value is defined in the two structures, the ordering is the same, and the structure Bit width defined by Word addressing form is 32 times of the structure Bit width defined by Bit addressing form; for example, b0_com Alarm is first in the bit addressing structure, occupying 1bit, while the corresponding w0_com Alarm is also first in the Word addressing structure, but occupying 32 bits;
further, in the present disclosure, the start offset addresses (relative addresses) of the above two structures are the same, referring to the following formula (starting from offset 0):
LeftGenerator_Type LeftGenerator__at(0x20000000U)；
the/(Bit) addressing object is defined in the binding area, offset 0
LeftGeneratorAlias_Type LeftGeneratorAlias__at(0x22000000U)；
the/(Word) addressing object is defined in the alias area, offset 0
By definition, the two structures can form a one-to-one pairing relationship, namely, when one structure is operated, the operation is equivalent to the operation of the other structure, namely, when bit type variable operation (switching value) is realized in ARM, the complicated steps of whole reading-whole saving-single bit changing-whole writing are not needed, only the combination of bit type variables is needed to be defined to a binding area, the corresponding word variable is defined in an alias area, and the operation can be realized by changing one variable unit of the alias area.
S130, storing and transmitting the switching value data through a structural body defined in the binding area; updating the switching value data by a structure defined in the alias area
In some embodiments, word addressing objects may be applied directly when updating the switching value; for example, b0_com Alarm is updated to S n When the pairing variable is used, only the pairing variable is required to be directly assigned with the value:
LeftGeneratorAlias.w0_Com Alarm＝S n ；
when the output needs to be read and formatted for b0_com Alarm, only the lefttgeneratoralarm.w0_com Alarm needs to be read:
printf(“b0_ComAlarm＝％d”,LeftGeneratorAlias.w0_Com Alarm)；
in some embodiments, the stored result for the switching value is a LeftGenerator (Bit addressing); at the time of transmission, the LeftGenerator may be directly referred to, or the LeftGenerator may be directly copied to the buffer of transmission.
According to the embodiment of the disclosure, the following technical effects are achieved:
the unique bitband function in the ARM is utilized, so that the atomic-level operation and mapping of bit variable (switching value) are realized, and the defect that the ARM does not support the bit variable is overcome.
In the monitoring alarm system disclosed by the invention, for a large amount of used switching value data, a binding area of ARM is defined in a form of combined variable, when the switching values are required to be collected and operated, single-step change of bit type variables in the binding area can be realized by changing a variable unit (32 bits) of an alias area; when the switching value is required to be transmitted through a bus, only the binding area variable is transmitted (1 switching value occupies 1bit, and the efficiency is highest and the transmission is fastest);
further, referring to table 3, it can be seen that the switching value processing method provided by the present disclosure greatly improves the storage, transmission and operation efficiency of switching value data while reducing the economic cost.
TABLE 3 Table 3
Note that: the table is represented by ∈x for the advantage and x for the disadvantage.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present disclosure is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present disclosure. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all alternative embodiments, and that the acts and modules referred to are not necessarily required by the present disclosure.
The foregoing is a description of embodiments of the method, and the following further describes embodiments of the present disclosure through examples of apparatus.
Fig. 4 shows a block diagram of an ARM based switching value processing apparatus 400 applied to a monitoring alarm system according to an embodiment of the present disclosure. As shown in fig. 4, the apparatus 400 includes:
an acquisition module 410, configured to acquire switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment;
a definition module 420, configured to define two structures in the binding area and the alias area respectively through a preset algorithm based on the switching value data;
a processing module 430, configured to store and transmit the switching value data through a structure defined in the binding area; updating the switching value data by a structure defined in the alias area;
the monitoring alarm system comprises an ARM embedded platform with an M3 or M4 kernel.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the described modules may refer to corresponding procedures in the foregoing method embodiments, which are not described herein again.
Fig. 5 shows a schematic block diagram of an electronic device 500 that may be used to implement embodiments of the present disclosure. As shown, the device 500 includes a Central Processing Unit (CPU) 501 that may perform various suitable actions and processes in accordance with computer program instructions stored in a Read Only Memory (ROM) 502 or loaded from a storage unit 508 into a Random Access Memory (RAM) 503. In the RAM 503, various programs and data required for the operation of the device 500 can also be stored. The CPU501, ROM502, and RAM 503 are connected to each other through a bus 504. An input/output (I/O) interface 505 is also connected to bus 504.
Various components in the device 500 are connected to the I/O interface 505, including: an input unit 506 such as a keyboard, a mouse, etc.; an output unit 507 such as various types of displays, speakers, and the like; a storage unit 508 such as a magnetic disk, an optical disk, or the like; and a communication unit 509 such as a network card, modem, wireless communication transceiver, etc. The communication unit 509 allows the device 500 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.
The processing unit 501 performs the various methods and processes described above, such as method 100. For example, in some embodiments, the method 100 may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 508. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 500 via the ROM502 and/or the communication unit 509. When the computer program is loaded into RAM 503 and executed by CPU501, one or more steps of method 100 described above may be performed. Alternatively, in other embodiments, CPU501 may be configured to perform method 100 by any other suitable means (e.g., by means of firmware).
The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a load programmable logic device (CPLD), etc.
Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
Moreover, although operations are depicted in a particular order, this should be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.
Claims (8)
1. An ARM-based switching value processing method applied to a monitoring alarm system is characterized by comprising the following steps:
acquiring switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment;
storing and transmitting the switching value data through a structural body defined in a binding area based on the switching value data;
updating the switching value data by a structure body defined in an alias area;
associating the structure body defined by the binding area with the structure body defined by the alias area, wherein the association means one-to-one pairing of forms;
the monitoring alarm system comprises an ARM embedded platform supporting BitBund operation;
based on the switching value data, defining two structures in the binding area and the alias area respectively through a preset algorithm comprises:
based on the switching value data, two structural bodies are respectively defined in a binding area and an alias area through a BitBund algorithm;
the defining two structures in the binding area and the alias area respectively through the BitBund algorithm comprises the following steps:
defining a structure body in the binding area by a bit addressing method;
a structure is defined in the alias area by word addressing.
2. The method of claim 1, wherein the bit width of the structure in the alias region is 32 times the bit width of the structure in the binding region.
3. The method of claim 2, wherein the ordering of each switch in the alias area structure and the binding area structure is the same.
4. A method according to claim 3, wherein the alias area structure and the binding area structure have the same start offset address.
5. An ARM-based switching value processing device applied to a monitoring alarm system, comprising:
the acquisition module is used for acquiring switching value data; the switching value data is a binary bit variable and is used for identifying the running state of the equipment;
the definition module is used for storing and transmitting the switching value data through a structural body defined in the binding area based on the switching value data;
the processing module is used for updating the switching value data through a structural body defined in the alias area; associating the structure body defined by the binding area with the structure body defined by the alias area, wherein the association means one-to-one pairing of forms;
the monitoring alarm system comprises an ARM embedded platform supporting BitBund operation;
based on the switching value data, defining two structures in the binding area and the alias area respectively through a preset algorithm comprises:
based on the switching value data, two structural bodies are respectively defined in a binding area and an alias area through a BitBund algorithm;
the defining two structures in the binding area and the alias area respectively through the BitBund algorithm comprises the following steps:
defining a structure body in the binding area by a bit addressing method;
a structure is defined in the alias area by word addressing.
6. The apparatus of claim 5, wherein, based on the switching value data,
defining two structures in the binding area and the alias area respectively through a preset algorithm comprises the following steps:
based on the switching value data, two structures are respectively defined in the binding area and the alias area through a BitBund algorithm.
7. An electronic device comprising a memory and a processor, the memory having stored thereon a computer program, wherein the processor, when executing the program, implements the method of any of claims 1-4.
8. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the method according to any one of claims 1-4.
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