CN113972961A - Method and device for scheduling data length of downlink shared channel - Google Patents

Method and device for scheduling data length of downlink shared channel Download PDF

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CN113972961A
CN113972961A CN202010713120.1A CN202010713120A CN113972961A CN 113972961 A CN113972961 A CN 113972961A CN 202010713120 A CN202010713120 A CN 202010713120A CN 113972961 A CN113972961 A CN 113972961A
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mcs
bit information
code rate
target code
determining
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CN113972961B (en
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蔡月宏
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Datang Mobile Communications Equipment Co Ltd
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    • H04ELECTRIC COMMUNICATION TECHNIQUE
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    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
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Abstract

The embodiment of the invention provides a method and a device for scheduling the data length of downlink shared channel, wherein the method comprises the following steps: determining an MCS according to the spectrum efficiency, and determining a target code rate and a modulation level according to the MCS; predicting the number of PRBs according to the target data length and the MCS to obtain the total number of REs occupied by the PDSCH of the terminal; calculating intermediate bit information for determining the length of a code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal; and judging whether the intermediate bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the intermediate bit information does not belong to the preset ambiguous segment, and entering a resource allocation process. When the resource is estimated, the embodiment of the invention ensures that the length of the code block avoids the understood ambiguous segment by improving the PRB mode, has simple realization and small influence on the system performance, can ensure the success rate of important processes, avoids the occurrence of difficult positioning error codes of uplink and downlink services, and is compatible with terminals of various manufacturers.

Description

Method and device for scheduling data length of downlink shared channel
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a method and an apparatus for scheduling data length of a downlink shared channel.
Background
38.214 protocol section 5.1.3.2 describes the data block length determination procedure of PDSCH (Physical Downlink Shared Channel) as follows:
step 1) firstly determining the number N of available RE (Resource Element) in the current time slotRE(ii) a Step 2) determining the middle bit information N of the code block lengthinfo=NRE·R·QmV, wherein NRERepresenting total RE occupied by PDSCH channel of terminal, R representing target code rate, QmExpressing modulation grade, upsilon expressing scheduling stream number, target code rate R and modulation grade QmReference protocol 38.214 section 5.1.3.1Determining when N isinfoStep 3) is executed when the value is less than or equal to 3824, otherwise, step 4) is executed; step 3) when N is presentinfoWhen the value is less than or equal to 3824, the intermediate information is quantized
Figure BDA0002597268630000011
Wherein
Figure BDA0002597268630000012
Determining the code block length by looking up a table, wherein the code block length is not less than N'info(ii) a Step 4) when N is presentinfo3824 hours, intermediate information is quantized
Figure BDA0002597268630000013
Wherein the content of the first and second substances,
Figure BDA0002597268630000014
when the code rate R is less than or equal to 1/4,
Figure BDA0002597268630000021
wherein
Figure BDA0002597268630000022
Otherwise is when N'infoWhen the pressure is higher than that of the mixture of the components in the specification of 8424,
Figure BDA0002597268630000023
wherein the content of the first and second substances,
Figure BDA0002597268630000024
otherwise
Figure BDA0002597268630000025
Calculating formula N due to intermediate bit informationinfo=NRE·R·QmThe target code rate R in upsilon is a decimal less than 1, and the current base station side is opposite to the middle bit information NinfoTakes the rounding-down and the terminal manufacturer performs the intermediate bit information NinfoSome of the processing of (1) is floating point number, and some is rounding down. Therefore, when 3824 < Ninfo< 3825, it is highly likely that the code block lengths understood by different manufacturers will not be uniform. For exampleNinfoWhen 3824.1, company A rounds N downinfo3824, the code block length is obtained by using step 3) table lookup, and company B uses floating point number Ninfo3824.1, the method proceeds to step 4) to calculate the code block length, and the code block lengths obtained by company a and company B are inconsistent, so company a and company B interface the downstream service, and the receiver fails to decode due to the inconsistent understanding of the code block lengths by both parties. The decoding failure of the receiver can have important influence on random access, important signaling flow and uplink and downlink service transmission, especially the MSG4 with important signaling such as RESUME, REESTABLISH and the like, the code block length is around 3816, ambiguity easily occurs, and the terminal access failure is caused.
Disclosure of Invention
The embodiment of the invention provides a method and a device for scheduling the data length of downlink shared channel, which are used for solving the defect that the decoding identification of a receiving party fails due to the ambiguity of understanding the code block length by different manufacturers in the related technology.
In a first aspect, an embodiment of the present invention provides a method for scheduling a data length of a downlink shared channel, which is applied to a base station, and includes:
determining a modulation coding grade (MCS), and determining a target code rate and a modulation grade according to the MCS;
estimating the number of PRBs (physical resource blocks) according to the target data length and the MCS, and acquiring the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of a terminal;
calculating intermediate bit information for determining the length of the code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal;
judging whether the middle bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and entering a resource allocation process;
and the preset ambiguous segment is determined according to the target code rate.
Optionally, after entering the resource allocation procedure, the method further includes:
recalculating the middle bit information according to the number of the newly allocated PRBs, and judging whether the middle bit information belongs to the preset ambiguous segment;
if the middle bit information still belongs to the preset ambiguous segment, judging whether the MCS reaches the highest level, if not, adjusting the MCS upwards until the middle bit information is larger than or equal to the upper boundary of the preset ambiguous segment.
Optionally, after determining whether the MCS reaches the highest level, the method further includes:
if the MCS has reached the highest level, adjusting the MCS downward until the middle bit information is less than or equal to the lower boundary of the preset ambiguous segment.
Optionally, the determining the target code rate and the modulation level according to the MCS includes:
inquiring protocol table information according to the MCS to obtain the target code rate and the modulation level;
amplifying the target code rate by M times, and determining the upper and lower boundaries of a preset ambiguous segment according to the amplified target code rate; m is 2048 or a multiple of 2048.
In a second aspect, an embodiment of the present invention provides a downlink shared channel data length scheduling apparatus, including:
the first determining module is used for determining a modulation coding grade (MCS) and determining a target code rate and a modulation grade according to the MCS;
the second determining module is used for predicting the number of PRBs (physical resource blocks) according to the target data length and the MCS to obtain the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of the terminal;
a calculating module, configured to calculate, according to the target code rate, the modulation level, and the total number of REs occupied by the PDSCH of the terminal, intermediate bit information used for determining a code block length;
a first judging module, configured to judge whether the middle bit information belongs to a preset ambiguous segment, if so, increase the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and enter a resource allocation procedure;
and the preset ambiguous segment is determined according to the target code rate.
Optionally, the method further comprises:
the second judgment module is used for recalculating the middle bit information according to the number of newly allocated PRBs after the resource allocation is finished, and judging whether the middle bit information belongs to the preset ambiguous segment;
and the MCS adjusting module is used for judging whether the MCS reaches the highest level or not if the middle bit information still belongs to the preset ambiguous segment, and if the MCS does not reach the highest level, upwards adjusting the MCS until the middle bit information is more than or equal to the upper boundary of the preset ambiguous segment.
Optionally, the MCS adjusting module is further configured to:
if the MCS has reached the highest level, adjusting the MCS downward until the middle bit information is less than or equal to the lower boundary of the preset ambiguous segment.
Optionally, the first determining module is configured to:
inquiring protocol table information according to the MCS to obtain a target code rate and a modulation level;
amplifying the target code rate by M times, and determining the upper and lower boundaries of a preset ambiguous segment according to the amplified target code rate; m is 2048 or a multiple of 2048.
In a third aspect, an embodiment of the present invention further provides a base station, including a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor, when executing the computer program, implements the steps of the downlink shared channel data length scheduling method according to any one of the above.
Embodiments of the present invention also provide a non-transitory computer readable storage medium, on which a computer program is stored, the computer program, when being executed by a processor, implementing the steps of the downlink shared channel data length scheduling method according to any one of the above.
According to the downlink shared channel data length scheduling method and device provided by the embodiment of the invention, when resources are estimated, the length of the code block can avoid an understood ambiguous section by improving the physical resource block PRB, more real data can be loaded as much as possible, the method and the device are simple to realize, have small influence on the system performance, can ensure the success rate of important processes such as random access, RESUME, REESTABLISH and the like, avoid the occurrence of error codes which are difficult to position in uplink and downlink services, and are compatible with terminals of various manufacturers.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a flowchart illustrating a downlink shared channel data length scheduling method according to an embodiment of the present invention;
fig. 2 is a flowchart illustrating a downlink shared channel data length scheduling method according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a downlink shared channel data length scheduling apparatus according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a base station according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart illustrating a downlink shared channel data length scheduling method according to an embodiment of the present invention, where the downlink shared channel data length scheduling method according to the embodiment of the present invention is applied to a base station, and as shown in fig. 1, the method includes:
step 100, determining a modulation coding grade MCS, and determining a target code rate and a modulation grade according to the MCS;
specifically, an execution subject of the embodiment of the present invention is a base station, and when a Media Access Control (MAC) layer at a base station side performs resource estimation, a modulation and coding level MCS is determined according to spectrum efficiency, and then a target code rate R and a modulation level Q are determined according to the modulation and coding level MCSm
In one embodiment, the target code rate R and the modulation level Q may be determined by looking up table 2(MCS index table 2 for PDSCH) in the protocol 38.214 according to the modulation and coding level MCSm. Taking table 2 in the protocol 38.214 as an example, when MCS is 20 and MCS is 26, the target code rates R are 682.5 and 916.5, respectively, and the modulation level Q ismAre all 8.
MCS index table 2 for PDSCH
Figure BDA0002597268630000071
Step 101, estimating the number of PRBs (physical resource blocks) according to the target data length and the MCS, and acquiring the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of a terminal;
specifically, the target data length is the real data length. The base station estimates the number of Physical Resource Blocks (PRBs) according to the target data length and the modulation coding level MCS to obtain the total number N of Resource Elements (RE) occupied by a downlink shared channel (PDSCH) of the terminalRE
102, calculating intermediate bit information for determining the length of a code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal;
specifically, the base station modulates the grade Q according to the target code rate RmThe total number N of Resource Elements (REs) occupied by a terminal downlink shared channel (PDSCH)REThe intermediate bit information N for determining the code block length is calculated using the following formulainfo
Ninfo=NRE·R·Qm·υ
The number of scheduled flows is determined by other flows, and is not particularly limited in the embodiment of the present invention.
And 103, judging whether the intermediate bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the intermediate bit information does not belong to the preset ambiguous segment, and entering a resource allocation process.
Specifically, the base station judges the intermediate bit information NinfoJudging whether the intermediate bit information belongs to a preset ambiguous segment, namely judging whether the intermediate bit information falls in a range represented by the preset ambiguous segment, if so, adjusting the PRBs upwards, namely increasing the number of the PRBs until the intermediate bit information N isinfoIf not, then entering a resource allocation process, otherwise, if the intermediate bit information N isinfoIf not, directly entering the resource allocation process.
The embodiment of the invention does not specifically limit the resource allocation process.
The preset ambiguity segment refers to a range of intermediate bit information which enables different manufacturers to understand the length of the code block to generate ambiguity, and the preset ambiguity segment is determined according to the target code rate. It should be noted that, in the step 3) and step 4) of determining the data block length of the downlink PDSCH channel described according to the 38.214 protocol), the intermediate bit information N may cause ambiguity in understanding the code block length by different manufacturersinfoIn the range of 3824 < Ninfo< 3825, it can be understood that in the case that the target code rate R is not expanded, the predetermined ambiguous segment is specifically (3824,3825).
In some cases, in order to eliminate the influence of decimal, the target code rate R is amplified by M times and stored, and then the intermediate bit information NinfoThe ambiguous segment is also amplified by a corresponding multiple, and the decision threshold of the ambiguous segment is also amplified by a corresponding multiple, so that the ambiguous segment is specifically (3824 × M,3825 × M), and M is the amplification multiple of the target code rate.
The downlink shared channel data length scheduling method provided by the embodiment of the invention has the advantages that when the resources are estimated, the code block length can avoid the understood ambiguous segment by improving the PRB mode, more real data can be loaded as much as possible, the method is simple to realize, the influence on the system performance is small, the success rate of important processes such as random access, RESUME, REESTABLISH and the like can be ensured, the problem that the uplink and downlink services are difficult to position error codes is avoided, and the method is compatible with terminals of various manufacturers.
On the basis of the above embodiment, after entering the resource allocation procedure, the method further includes:
recalculating the middle bit information according to the number of the newly allocated PRBs, and judging whether the middle bit information belongs to the preset ambiguous segment;
if the middle bit information still belongs to the preset ambiguous segment, judging whether the MCS reaches the highest level, if not, adjusting the MCS upwards until the middle bit information is larger than or equal to the upper boundary of the preset ambiguous segment.
Specifically, considering that the resource allocation is completed, the expected physical resource block PRB may not be obtained, and the scheduling result may fall to the preset ambiguous segment again, so that after the resource allocation is completed, the base station according to the number of the newly allocated PRBs, that is, the new NREAccording to the formula Ninfo=NRE·R·QmRe-calculating the intermediate bit information of the code block length, and judging whether the re-calculated intermediate bit information of the code block length belongs to the preset ambiguous segment;
if the resource allocation is finished, the middle bit information N of the code block lengthinfoIf the modulation coding level MCS still belongs to the preset ambiguous segment, whether the modulation coding level MCS reaches the highest level is continuously judged, if the modulation coding level MCS does not reach the highest level, the modulation coding level MCS is upwards adjusted until the middle bit information NinfoAnd the upper boundary is larger than or equal to the preset ambiguous segment, so that the middle bit information avoids the preset ambiguous segment.
In the downlink shared channel data length scheduling method provided by the embodiment of the invention, the base station detects the current N when the resources are pre-estimatedinfoIf the ambiguity section is included, the PRB is promoted to avoid ambiguitySegment, not getting the expected PRB after the resource allocation is finished, checking N againinfoIf the terminal is in the ambiguous section, the length of the scheduling code block is enabled to cross the ambiguous section by adjusting the MCS upwards, the implementation is simple, the influence on the system performance is small, the success rate of important processes such as random access, RESUME, REESTABLISH and the like can be ensured, the problem that the uplink and downlink services are difficult to position error codes is avoided, and the terminal is compatible with terminals of various manufacturers.
On the basis of the above embodiment, after determining whether the MCS reaches the highest level, the method further includes:
if the MCS has reached the highest level, adjusting the MCS downward until the middle bit information is less than or equal to the lower boundary of the preset ambiguous segment.
Specifically, the middle bit information N of the code block length after the resource allocation is completedinfoIf the modulation coding level MCS still belongs to the preset ambiguous segment, the base station continuously judges whether the modulation coding level MCS reaches the highest level, if the modulation coding level MCS reaches the highest level, namely, when the MCS reaches the highest level and still cannot avoid the ambiguous segment, the base station adopts a mode of keeping away from the boundary downwards to avoid the ambiguous segment, namely, the base station downwards adjusts the modulation coding level MCS until the middle bit information NinfoLess than or equal to the lower boundary of the pre-defined ambiguous segment.
In the method for scheduling data length of downlink shared channel provided in the embodiments of the present invention, a Media Access Control (MAC) at a base station side detects a current N when estimating resourcesinfoIf the resource allocation belongs to the ambiguous segment, the PRB is promoted to avoid the ambiguous segment, the expected PRB is not obtained after the resource allocation is finished, and N is checked againinfoThe method for scheduling the data length of the downlink shared channel provided by the embodiment of the invention has the advantages of simple realization, small influence on the system performance, capability of ensuring the success rate of important processes such as random access, RESUME, REESTABLISH and the like, avoiding the occurrence of difficult positioning error codes of uplink and downlink services, and compatibility with terminals of various manufacturers.
On the basis of the above embodiment, determining the target code rate and the modulation level according to the MCS includes:
inquiring protocol table information according to the MCS to obtain a target code rate and a modulation level;
amplifying the target code rate by M times, and determining the upper and lower boundaries of a preset ambiguous segment according to the amplified target code rate; m is 2048 or a multiple of 2048.
Specifically, after the target code rate and the modulation level are obtained according to the MCS lookup protocol table information, the target code rate may be amplified by M times for storage when the target code rate is realized in order to remove the influence of the decimal. Taking table 2 in the protocol 38.214 as an example, when the R column is stored by expanding by 1024 times, and MCS is 20 and MCS is 26, the target code rate R is 682.5 and 916.5, respectively, and although the R column is stored by expanding by 1024 times, the target code rate R is still a floating point number, and in order to remove the influence of the decimal, the target code rate R may be stored by expanding by an integer multiple of 2048 or 2048, so as to eliminate the influence of rounding of the decimal.
After the target code rate is amplified by M times, the intermediate bit information NinfoAnd the corresponding magnification is also carried out, so that the upper and lower boundaries of the preset ambiguous segment need to be determined according to the amplified target code rate. That is, when the target code rate R is stored at an M-fold magnification, the predetermined ambiguous segment is (3824 × M,3825 × M), M is a magnification of the target code rate, and M is a multiple of 2048 or 2048. Taking the target code rate as an example of amplifying by 2048 times, the preset ambiguous segments are (7831552, 7833600).
The downlink shared channel data length scheduling method provided by the embodiment of the invention has the advantages that the target code rate is amplified by 2048 or integral multiple of 2048 for storage, the influence of decimal can be removed, and the calculation precision of the intermediate bit information is improved.
Fig. 2 is a flowchart illustrating a downlink shared channel data length scheduling method according to an embodiment of the present invention. As shown in fig. 2, the MAC (Media Access Control ) at the base station side amplifies the target code rate by integral multiple of 2048 or 2048 for storage, removes the influence of decimal, and detects the current N when estimating resourcesinfoIf the ambiguous segment belongs to, the PRB is promoted to avoid the ambiguous segment and the resource is divided intoAfter the end of the allocation, the expected PRB is not obtained, and N is checked againinfoThe method for scheduling the data length of the downlink shared channel provided by the embodiment of the invention has the advantages of simple realization, small influence on the system performance, capability of ensuring the success rate of important processes such as random access, RESUME, REESTABLISH and the like, avoiding the occurrence of difficult positioning error codes of uplink and downlink services, and compatibility with terminals of various manufacturers.
Fig. 3 is a schematic structural diagram of a downlink shared channel data length scheduling apparatus according to an embodiment of the present invention, including: a first determination module 310, a second determination module 320, a calculation module 330, and a first determination module 340, wherein,
a first determining module 310, configured to determine a modulation and coding level MCS, and determine a target code rate and a modulation level according to the MCS;
specifically, the first determining module 310 determines a modulation and coding level MCS according to the spectrum efficiency, and then determines a target code rate R and a modulation level Q according to the modulation and coding level MCSm
A second determining module 320, configured to estimate, according to the target data length and the MCS, the number of PRBs in physical resource blocks, and obtain the total number of resource elements RE occupied by a downlink shared channel PDSCH of the terminal;
specifically, the target data length is the real data length. The second determining module 320 estimates the number of Physical Resource Blocks (PRBs) according to the target data length and the modulation coding level MCS, and obtains the total number N of Resource Elements (REs) occupied by the terminal downlink shared channel (PDSCH)RE.。
A calculating module 330, configured to calculate, according to the target code rate, the modulation level, and the total number of REs occupied by the PDSCH of the terminal, middle bit information used for determining a code block length;
specifically, the calculating module 330 calculates the target code rate R and the modulation level Q according to the target code rate R and the modulation level QmThe total number N of Resource Elements (REs) occupied by a terminal downlink shared channel (PDSCH)REThe code block length is determined by calculating using the following formulaIntermediate bit information N of degreeinfo
Ninfo=NRE·R·Qm·υ
The number of scheduled flows is determined by other flows, and is not particularly limited in the embodiment of the present invention.
A first determining module 340, configured to determine whether the middle bit information belongs to a preset ambiguous segment, if so, increase the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and enter a resource allocation procedure.
Specifically, the first determining module 340 determines the middle bit information NinfoIf the intermediate bit information N belongs to the preset ambiguous segment, adjusting the PRBs upwards, namely increasing the number of the PRBs until the intermediate bit information N belongs to the preset ambiguous segmentinfoIf not, then entering a resource allocation process, otherwise, if the intermediate bit information N isinfoIf the ambiguity section does not belong to the preset ambiguity section, the resource allocation process is directly entered.
The embodiment of the invention does not specifically limit the resource allocation process.
The preset ambiguity segment refers to a range of intermediate bit information which enables different manufacturers to understand the length of the code block to generate ambiguity, and the preset ambiguity segment is determined according to the target code rate. It should be noted that, in the step 3) and step 4) of determining the data block length of the downlink PDSCH channel described according to the 38.214 protocol), the intermediate bit information N may cause ambiguity in understanding the code block length by different manufacturersinfoIn the range of 3824 < Ninfo< 3825, it can be understood that, when the target code rate R is not expanded, the predetermined ambiguous segment is specifically (3824,3825), and when the target code rate R is stored in an enlarged manner, the predetermined ambiguous segment is specifically (3824 × M,3825 × M), and M is an enlargement factor of the target code rate.
The downlink shared channel data length scheduling device provided by the embodiment of the invention can avoid the understood ambiguous segment by improving the PRB mode when the resources are estimated, can load more real data as much as possible, is simple to realize, has small influence on the system performance, can ensure the success rate of important processes such as random access, RESUME, REESTABLISH and the like, avoids the occurrence of difficult positioning error codes of uplink and downlink services, and is compatible with terminals of various manufacturers.
Based on the content of the above embodiment, the method further includes:
the second judgment module is used for recalculating the middle bit information according to the number of the newly allocated PRBs and judging whether the middle bit information belongs to the preset ambiguous segment;
and the MCS adjusting module is used for judging whether the MCS reaches the highest level or not if the middle bit information still belongs to the preset ambiguous segment, and if the MCS does not reach the highest level, upwards adjusting the MCS until the middle bit information is more than or equal to the upper boundary of the preset ambiguous segment.
Specifically, considering that the resource allocation is completed, the expected physical resource block PRB may not be obtained, and the scheduling result may fall to the preset ambiguous segment again, so that after the resource allocation is completed, the second determining module determines the number of the newly allocated PRBs, that is, the new NREAccording to the formula Ninfo=NRE·R·QmV recalculating the intermediate bit information of the code block length, and judging whether the intermediate bit information of the recalculated code block length belongs to the preset ambiguous segment;
if the resource allocation is finished, the middle bit information N of the code block lengthinfoIf the modulation coding level MCS does not reach the highest level, the MCS adjusting module adjusts the modulation coding level MCS upwards until the middle bit information NinfoAnd the upper boundary is larger than or equal to the preset ambiguous segment, so that the middle bit information avoids the preset ambiguous segment.
The downlink shared channel data length scheduling device provided by the embodiment of the invention detects the current N when the resources are pre-estimatedinfoIf the resource allocation belongs to the ambiguous segment, the PRB is promoted to avoid the ambiguous segment, the expected PRB is not obtained after the resource allocation is finished, and N is checked againinfoIf it belongs to ambiguous segment, if yes, the MC is increasedThe S mode enables the length of the scheduling code block to cross an ambiguous section, is simple to implement, has little influence on system performance, can ensure the success rate of important processes such as random access, RESUME, REESTABLISH and the like, avoids the occurrence of difficult positioning error codes of uplink and downlink services, and is compatible with terminals of various manufacturers.
Based on the content of the foregoing embodiment, the MCS adjusting module is further configured to:
if the MCS has reached the highest level, adjusting the MCS downward until the middle bit information is less than or equal to the lower boundary of the preset ambiguous segment.
Specifically, the middle bit information N of the code block length after the resource allocation is completedinfoIf the modulation coding level MCS still belongs to the preset ambiguous segment, the MCS adjusting module continues to judge whether the modulation coding level MCS reaches the highest level, if the modulation coding level MCS reaches the highest level, namely, when the MCS reaches the highest level and still cannot avoid the ambiguous segment, the ambiguous segment is avoided by adopting a mode of being away from the boundary downwards, namely, the modulation coding level MCS is adjusted downwards until the middle bit information NinfoLess than or equal to the lower boundary of the pre-defined ambiguous segment.
The downlink shared channel data length scheduling device provided by the embodiment of the invention detects the current N when the resources are pre-estimatedinfoIf the resource allocation belongs to the ambiguous segment, the PRB is promoted to avoid the ambiguous segment, the expected PRB is not obtained after the resource allocation is finished, and N is checked againinfoIf the ambiguous section belongs to the ambiguous section, the MCS is preferentially promoted, and if the MCS reaches the highest level and the ambiguous section cannot be avoided, the ambiguous section is avoided downwards by reducing the MCS.
Based on the content of the foregoing embodiment, the first determining module is specifically configured to:
inquiring protocol table information according to the MCS to obtain a target code rate and a modulation level;
amplifying the target code rate by M times, and determining the upper and lower boundaries of a preset ambiguous segment according to the amplified target code rate; m is 2048 or a multiple of 2048.
Specifically, in order to remove the influence of the decimal number, the first determining module stores the target code rate in an enlarged manner of 2048 or an integral multiple of 2048 when being implemented, so that the intermediate bit information NinfoAnd the judgment threshold of the preset ambiguous segment needs to be correspondingly amplified on the basis of (3824,3825), namely, the upper and lower boundaries of the preset ambiguous segment are determined according to the amplified target code rate.
The downlink shared channel data length scheduling device provided by the embodiment of the invention can amplify the target code rate by 2048 or integral multiple of 2048 for storage, can remove the influence of decimal and improve the calculation precision of intermediate bit information.
Fig. 4 is a schematic structural diagram of a base station according to an embodiment of the present invention, and as shown in fig. 4, the base station 400 may include at least one processor 410, a memory 420, at least one user interface 430, and a transceiver 440. The various components in the base station 400 are coupled together by a bus system 450. It is understood that the bus system 450 is used to enable connected communication between these components. The bus system 450 includes a power bus, a control bus, and a status signal bus in addition to a data bus. For clarity of illustration, however, the various buses are labeled in fig. 4 as bus system 450, which may include any number of interconnected buses and bridges, with one or more processors, represented by processor 410, and various circuits, represented by memory 420, being linked together. The bus system may also link together various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, embodiments of the present invention will not be described any further. The bus interface provides an interface. The transceiver 440 may be a number of elements including a transmitter and a receiver that provide a means for communicating with various other apparatus over a transmission medium. For different user devices, the user interface 430 may also be an interface capable of interfacing with a desired device externally, including but not limited to a keypad, display, speaker, microphone, joystick, etc.
It will be appreciated that memory 420 in embodiments of the invention may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of illustration and not limitation, many forms of RAM are available, such as Static random access memory (Static RAM, SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic random access memory (Synchronous DRAM, SDRAM), Double Data Rate Synchronous Dynamic random access memory (ddr Data Rate SDRAM, ddr SDRAM), Enhanced Synchronous SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The memory 420 described in the various embodiments of the invention includes, but is not limited to, these and any other suitable types of memory.
The processor 410 is responsible for managing the bus system and the general processing, and the memory 420 may store computer programs or instructions used by the processor 410 in performing the operations, in particular, the processor 410 performs the steps of: determining a modulation coding grade (MCS), and determining a target code rate and a modulation grade according to the MCS; estimating the number of PRBs (physical resource blocks) according to the target data length and the MCS, and acquiring the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of a terminal; calculating intermediate bit information for determining the length of the code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal; judging whether the middle bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and entering a resource allocation process; and the preset ambiguous segment is determined according to the target code rate.
The processor in this embodiment of the present invention executes the downlink shared channel data length scheduling method provided in the foregoing method embodiments, and therefore, the description and definition in the foregoing method embodiments may be used for understanding the processor 410 in this embodiment of the present invention, and will not be described again here.
The method steps disclosed in the above embodiments of the present invention may be applied to the processor 410, or may be implemented by the processor 410. The processor 410 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 410. The Processor 410 may be a general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component. The various methods, steps and logic blocks disclosed in the embodiments of the present invention may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present invention may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 420, and the processor 410 reads the information in the memory 420 and performs the steps of the above method in combination with the hardware thereof.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or any combination thereof. For a hardware implementation, the Processing units may be implemented within one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units configured to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described in the embodiments of the invention. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
The base station provided by the embodiment of the invention can avoid the understood ambiguous segment by improving the PRB mode when the resources are pre-estimated, can load more real data as much as possible, is simple to realize, has small influence on the system performance, can ensure the success rate of important processes such as random access, RESUME, REESTABLISH and the like, avoids the occurrence of difficult positioning error codes of uplink and downlink services, and is compatible with terminals of various manufacturers.
In another aspect, an embodiment of the present invention further provides a computer program product, where the computer program product includes a computer program stored on a non-transitory computer-readable storage medium, where the computer program includes program instructions, and when the program instructions are executed by a computer, the computer is capable of executing the downlink shared channel data length scheduling method provided by the above-mentioned method embodiments, where the method includes: determining a modulation coding grade (MCS), and determining a target code rate and a modulation grade according to the MCS; estimating the number of PRBs (physical resource blocks) according to the target data length and the MCS, and acquiring the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of a terminal; calculating intermediate bit information for determining the length of the code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal; judging whether the middle bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and entering a resource allocation process; and the preset ambiguous segment is determined according to the target code rate.
In yet another aspect, an embodiment of the present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program is implemented by a processor to execute the downlink shared channel data length scheduling method provided in the foregoing embodiments, and the method includes: determining a modulation coding grade (MCS), and determining a target code rate and a modulation grade according to the MCS; estimating the number of PRBs (physical resource blocks) according to the target data length and the MCS, and acquiring the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of a terminal; calculating intermediate bit information for determining the length of the code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal; judging whether the middle bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and entering a resource allocation process; and the preset ambiguous segment is determined according to the target code rate.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A downlink shared channel data length scheduling method applied to a base station is characterized by comprising the following steps:
determining a modulation coding grade (MCS), and determining a target code rate and a modulation grade according to the MCS;
estimating the number of PRBs (physical resource blocks) according to the target data length and the MCS, and acquiring the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of a terminal;
calculating intermediate bit information for determining the length of the code block according to the target code rate, the modulation level and the total number of REs occupied by the PDSCH of the terminal;
judging whether the middle bit information belongs to a preset ambiguous segment, if so, increasing the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and entering a resource allocation process;
and the preset ambiguous segment is determined according to the target code rate.
2. The downlink shared channel data length scheduling method of claim 1, wherein after entering the resource allocation procedure, further comprising:
recalculating the middle bit information according to the number of the newly allocated PRBs, and judging whether the middle bit information belongs to the preset ambiguous segment;
if the middle bit information still belongs to the preset ambiguous segment, judging whether the MCS reaches the highest level, if not, adjusting the MCS upwards until the middle bit information is larger than or equal to the upper boundary of the preset ambiguous segment.
3. The downlink shared channel data length scheduling method of claim 2, wherein after determining whether the MCS reaches a highest level, further comprising:
if the MCS has reached the highest level, adjusting the MCS downward until the middle bit information is less than or equal to the lower boundary of the preset ambiguous segment.
4. The downlink shared channel data length scheduling method of claim 1, wherein determining a target code rate and a modulation level according to the MCS comprises:
inquiring protocol table information according to the MCS to obtain the target code rate and the modulation level;
amplifying the target code rate by M times, and determining the upper and lower boundaries of a preset ambiguous segment according to the amplified target code rate; m is 2048 or a multiple of 2048.
5. A downlink shared channel data length scheduler, comprising:
the first determining module is used for determining a modulation coding grade (MCS) and determining a target code rate and a modulation grade according to the MCS;
the second determining module is used for predicting the number of PRBs (physical resource blocks) according to the target data length and the MCS to obtain the total number of Resource Elements (REs) occupied by a PDSCH (physical downlink shared channel) of the terminal;
a calculating module, configured to calculate, according to the target code rate, the modulation level, and the total number of REs occupied by the PDSCH of the terminal, intermediate bit information used for determining a code block length;
a first judging module, configured to judge whether the middle bit information belongs to a preset ambiguous segment, if so, increase the number of PRBs until the middle bit information does not belong to the preset ambiguous segment, and enter a resource allocation procedure;
and the preset ambiguous segment is determined according to the target code rate.
6. The downlink shared channel data length scheduling apparatus according to claim 5, further comprising:
the second judgment module is used for recalculating the middle bit information according to the number of the newly allocated PRBs and judging whether the middle bit information belongs to the preset ambiguous segment;
and the MCS adjusting module is used for judging whether the MCS reaches the highest level or not if the middle bit information still belongs to the preset ambiguous segment, and if the MCS does not reach the highest level, upwards adjusting the MCS until the middle bit information is more than or equal to the upper boundary of the preset ambiguous segment.
7. The downlink shared channel data length scheduling apparatus of claim 6, wherein the MCS adjustment module is further configured to:
if the MCS has reached the highest level, adjusting the MCS downward until the middle bit information is less than or equal to the lower boundary of the preset ambiguous segment.
8. The downlink shared channel data length scheduling apparatus of claim 5, wherein the first determining module is configured to:
acquiring a target code rate and a modulation level according to the MCS query protocol table information;
amplifying the target code rate by M times, and determining the upper and lower boundaries of a preset ambiguous segment according to the amplified target code rate; m is 2048 or a multiple of 2048.
9. A base station comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor when executing the computer program realizes the steps of the downlink shared channel data length scheduling method according to any of claims 1 to 4.
10. A non-transitory computer readable storage medium having stored thereon a computer program, which when executed by a processor implements the steps of the downlink shared channel data length scheduling method according to any one of claims 1 to 4.
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