CN113972624A - Magnetic modulation oscillation circuit and driving method thereof - Google Patents
Magnetic modulation oscillation circuit and driving method thereof Download PDFInfo
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- CN113972624A CN113972624A CN202010713919.0A CN202010713919A CN113972624A CN 113972624 A CN113972624 A CN 113972624A CN 202010713919 A CN202010713919 A CN 202010713919A CN 113972624 A CN113972624 A CN 113972624A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/26—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to difference between voltages or between currents; responsive to phase angle between voltages or between currents
- H02H3/32—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to difference between voltages or between currents; responsive to phase angle between voltages or between currents involving comparison of the voltage or current values at corresponding points in different conductors of a single system, e.g. of currents in go and return conductors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
- G01R15/18—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
- G01R15/181—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers using coils without a magnetic core, e.g. Rogowski coils
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16571—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
Abstract
The embodiment of the application provides a magnetic modulation oscillation circuit and a driving method thereof. The magnetic modulation oscillation circuit comprises a magnetic ring; at least one coil wound on the magnetic ring; a sampling circuit connected to the at least one coil and outputting a sampling signal; a differentiator connected to the sampling circuit and outputting a differentiated signal; a comparator connected to the differentiator and outputting a comparison result signal based on a comparison of the differentiated signal with a preset threshold; a pulse shielding circuit which is connected with the comparator and outputs the driving control signal and keeps the driving control signal unchanged within a preset time length after the comparison result signal is changed; and the driving circuit is connected with the pulse shielding circuit to receive the driving control signal and drive the at least one coil to generate the oscillation signal. The technical scheme of the embodiment of the application can accurately control the drive circuit of the magnetic modulation oscillation circuit, so that the moment of the polarity change point of the drive signal is basically consistent with the moment of the magnetic ring entering the critical point of the magnetic saturation state from the non-magnetic saturation state.
Description
Technical Field
The invention relates to the field of current protection, in particular to a magnetic modulation oscillation circuit and a driving method thereof.
Background
In ac or dc power supply systems, magnetic modulation techniques may be used to detect current in the power supply line, for example, by detecting residual current in the ac power supply line; when the residual current is detected to be larger than the set threshold value, the connection between the power supply line and the load is cut off, so that the load and the personal protection are realized.
The polarity of the driving signal can be changed alternately by changing the polarity of the power supply (such as a voltage source and a current source), and the working state of the magnetic ring wound by the coil receiving the driving signal is also changed alternately. However, it is difficult to accurately control the polarity change of the driving signal during the dynamic change of the operating state.
Disclosure of Invention
The invention solves the technical problems that the polarity change of a driving signal is difficult to accurately control and the like.
To solve the above technical problem, an embodiment of the present invention provides a magnetic modulation oscillation circuit, including: the magnetic ring is suitable for enabling at least one conductor through which current to be measured can pass to pass; at least one coil wound on the magnetic ring; a sampling circuit connected to one end of each of the at least one coil and adapted to output a sampling signal; a differentiator having an input connected to the sampling circuit for receiving the sampled signal and adapted to output a differentiated signal; a comparator having an input connected to the output of the differentiator for receiving the differentiated signal and adapted to output a comparison result signal based on a comparison of the differentiated signal with a preset threshold; the input end of the pulse shielding circuit is connected with the output end of the comparator to receive the comparison result signal, and the pulse shielding circuit is suitable for outputting the driving control signal and keeping the driving control signal unchanged within a preset time length after the comparison result signal is changed; and the input end of the driving circuit is connected with the output end of the pulse shielding circuit to receive the driving control signal, and the output end of the driving circuit is connected with the other end of each coil in the at least one coil to drive the other end of each coil to generate the oscillation signal.
Optionally, the output terminal of the pulse shielding circuit is connected to the input terminal of the comparator to control the preset threshold.
Optionally, the predetermined duration is greater than or equal to 10 microseconds and less than a half cycle of the oscillating signal.
Optionally, the at least one coil includes a coil, the sampling circuit includes a sampling resistor, one end of the sampling resistor is connected to one end of the coil and the input end of the differentiator, the other end of the sampling resistor is connected to ground, and the output end of the driving circuit is connected to the other end of the coil.
Optionally, the pulse masking circuit includes a pulse generator and a latch, the input terminal of the pulse generator is connected to the output terminal of the comparator to receive the comparison result signal, the output terminal of the pulse generator is connected to the clock terminal of the latch to output the clock signal, the data terminal of the latch is connected to the output terminal of the comparator to receive the comparison result signal, the clock terminal of the latch receives the clock signal, and the output terminal of the latch outputs the driving control signal based on the comparison result signal and the clock signal.
Optionally, the pulse masking circuit further comprises a buffer adapted to allow the comparison result signal to reach the latch before reaching the pulse generator, an input of the pulse generator being connected to an output of the comparator via the buffer.
Optionally, the at least one coil comprises a first coil and a second coil, wherein: the sampling circuit comprises a sampling resistor, wherein a first end and a second end of the sampling resistor are respectively connected with one end of the first coil and one end of the second coil and are respectively suitable for outputting a first sampling signal and a second sampling signal; a first input end and a second input end of the input ends of the differentiator are respectively connected with a first end and a second end of the sampling resistor to receive the first sampling signal and the second sampling signal and are respectively suitable for outputting a first differential signal and a second differential signal; a first input terminal and a second input terminal of the input terminals of the comparator are respectively connected with a first output terminal and a second output terminal of the output terminals of the differentiator to receive the first differential signal and the second differential signal and are respectively suitable for being respectively compared with a first preset threshold value and a second preset threshold value to output a first comparison result signal and a second comparison result signal; a first input end and a second input end of the input ends of the pulse shielding circuit are respectively connected with a first output end and a second output end of the output ends of the comparator to receive the first comparison result signal and the second comparison result signal and are respectively suitable for outputting a first driving control signal and a second driving control signal and respectively keeping the first driving control signal and the second driving control signal unchanged within a first preset time length and a second preset time length after the first comparison result signal and the second comparison result signal are changed; the first input end and the second input end in the input end of the driving circuit are respectively connected with the first output end and the second output end in the output end of the pulse shielding circuit so as to receive the first driving control signal and the second driving control signal, and the first output end and the second output end in the output end of the driving circuit are respectively connected with the other ends of the first coil and the second coil.
Optionally, the first output terminal and the second output terminal of the pulse shielding circuit are respectively connected to the first input terminal and the second input terminal of the comparator to respectively control the first preset threshold and the second preset threshold.
Optionally, the pulse masking circuit comprises a first latch, a second latch, a first pulse generator and a second pulse generator, wherein: the input end of the first pulse generator is connected with the first output end of the comparator to receive the first comparison result signal, and the output end of the first pulse generator is connected with the clock end of the first latch to output a first clock signal; the data end of the first latch is connected with the first output end of the comparator to receive the first comparison result signal, the clock end of the first latch receives the first clock signal, and the output end of the first latch outputs a first driving control signal based on the first comparison result signal and the first clock signal; the input end of the second pulse generator is connected with the second output end of the comparator to receive a second comparison result signal, and the output end of the second pulse generator is connected with the clock end of the second latch to output a second clock signal; the data terminal of the second latch is connected to the second output terminal of the comparator to receive the second comparison result signal, the clock terminal receives the second clock signal, and the output terminal outputs the second driving control signal based on the second comparison result signal and the second clock signal.
Optionally, the first pulse generator and the second pulse generator further comprise a first buffer and a second buffer, respectively, wherein: the first buffer is suitable for enabling the first comparison result signal to reach the first latch firstly and then reach the first pulse generator, and the input end of the first pulse generator is connected with the first output end of the comparator through the first buffer; the second buffer is adapted to enable the second comparison result signal to reach the second latch first and then reach the second pulse generator, and the input end of the second pulse generator is connected with the second output end of the comparator through the second buffer.
An embodiment of the present invention further provides a method for driving a magnetically modulated oscillation circuit, including: acquiring an oscillation signal at the at least one coil and outputting a sampling signal; processing the sampled signal to output a differential signal; outputting a comparison result signal based on a comparison of the differential signal and a preset threshold; outputting a driving control signal based on the comparison result signal and keeping the driving control signal unchanged within a preset time length after the comparison result signal is changed, wherein the driving control signal controls a preset threshold value; the driving signal is output based on the driving control signal to cause the at least one coil to generate the oscillation signal.
Optionally, the predetermined duration is greater than or equal to 10 microseconds and less than a half cycle of the oscillating signal.
Optionally, the method comprises: a clock signal is output based on the comparison result signal, and a drive control signal is output based on the comparison result signal and the clock signal.
Compared with the prior art, the technical scheme of the embodiment of the invention has the beneficial effect. For example, the drive circuit of the magnetic modulation oscillation circuit is precisely controlled so that the timing of the point of change in the polarity of the drive signal can substantially coincide with the timing at which the magnetic ring enters the critical point of the magnetic saturation state from the non-magnetic saturation state.
Drawings
FIG. 1 is a first schematic diagram of a magnetically modulated oscillating circuit according to an embodiment of the present invention;
FIG. 2 is a second schematic diagram of a magnetically modulated oscillating circuit according to an embodiment of the present invention;
FIG. 3 is a graph of magnetic induction versus magnetic field strength for a prior art magnet ring;
FIG. 4 is a schematic diagram of a pulse masking circuit according to an embodiment of the present invention;
FIG. 5 is a waveform diagram of the relevant signals in the magnetically modulated oscillating circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a third structure of a magnetically modulated oscillating circuit according to an embodiment of the present invention;
FIG. 7 is a flow chart of a method of driving a magnetically modulated oscillating circuit according to an embodiment of the invention.
Detailed Description
Existing magnetic modulation techniques pick up the current on the coil and change the polarity of the drive signal when it equals or exceeds a threshold value to magnetize the magnetic loop in the opposite direction. However, when the current is sampled and the value of the current is compared with a threshold value, the drive signal in the coil and the magnetic field induced in the magnetic ring are still changed, so that the time of the polarity change of the drive signal determined based on the threshold value comparison is not consistent with the time when the magnetic ring enters the magnetic saturation state from the non-magnetic saturation state.
In the embodiment of the invention, in consideration of the change rule of the current in the coil wound on the magnetic ring, namely, under the driving of the driving circuit, the magnetic ring periodically runs along the hysteresis loop, when the magnetic ring gradually runs to a magnetic saturation state, the current in the coil is gradually increased, the sampling signal is gradually increased, and when the magnetic ring enters the magnetic saturation state from a non-magnetic saturation state, the current in the coil is rapidly increased.
It is also considered that the direct comparison of the sampled signal (e.g. sampled current, sampled voltage) with the threshold value based on the physical phenomenon of current change in the coil does not accurately and timely reflect the state change of the magnetic loop from the non-magnetic saturated state to the magnetic saturated state; another physical phenomenon (i.e., a rapid increase in the rate of change of the current in the coil) during the magnetic loop entering the magnetic saturation state from the non-magnetic saturation state can be directly correlated, so that the polarity change of the driving signal can be accurately and timely controlled based on the rate of change of the current in the coil.
Specifically, the differentiator receives and processes the sampling signal and outputs a differentiated signal which represents, for example, the rate of change of the current in the coil, and is directly based on the comparison of the differentiated signal with the preset threshold value without introducing other additional input or comparison, so that the output drive control signal and the drive signal can be directly and timely obtained, so that the polarity change of the drive signal can be substantially coincident with the moment when the magnetic ring enters the magnetic saturation state from the non-magnetic saturation state.
For example, the comparator may obtain a comparison result signal based on a comparison of the differential signal with a preset threshold, the pulse shielding circuit may output the driving control signal based on the comparison result signal, and the driving circuit may output the driving signal based on the driving control signal, so that a timing of a polarity change point of the driving signal may substantially coincide with a timing at which the magnetic loop enters the magnetic saturation state from the non-magnetic saturation state in real time, and thus, the polarity change of the driving signal may be accurately controlled.
In the embodiment of the present invention, when the comparator outputs the comparison result signal based on the comparison of the differential signal with the preset threshold, the comparison result signal may include a short pulse (glitch); the output end of the comparator is connected with a pulse shielding circuit, the input end of the pulse shielding circuit receives the comparison result signal output by the comparator and keeps the output drive control signal unchanged within a preset time length after the comparison result signal is changed, and therefore the drive control signal can still be kept unchanged during the output glitch of the output end of the comparator.
In the embodiment of the present invention, when the comparator outputs the comparison result signal based on the comparison of the differential signal with the preset threshold, since the comparison result signal may include short pulses (glitches), if the output terminal of the comparator is connected to the input terminal of the comparator through the feedback loop, controlling the preset threshold of the comparator based on the rising edge and the falling edge of the glitches causes the preset threshold to be unnecessarily frequently inverted; the output end of the comparator is connected with a pulse shielding circuit, the input end of the pulse shielding circuit receives a comparison result signal output by the comparator, the output end of the pulse shielding circuit is connected to the input end of the comparator through a feedback loop, and the output driving control signal is kept unchanged within a preset time length after the comparison result signal is changed, so that the polarity of the preset threshold value can be kept stable during the output glitch period of the output end of the comparator.
In describing embodiments of the present invention in conjunction with the detailed drawings, elements such as magnetic rings, conductors, coils, circuits, resistors, etc., which are denoted by the same reference numerals in the drawings, are the same elements, and have the same functions and connection relationships.
In an embodiment of the invention, the connections comprise electrical connections for transmitting electrical parameters between different elements, and signal connections for transmitting electrical signals between different elements.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 1 illustrates an overall structure of a magnetic modulation oscillation circuit in an embodiment of the present invention, and fig. 2 illustrates a specific structure of the magnetic modulation oscillation circuit in the embodiment of the present invention. The magnetic modulated oscillating circuit 100, 200 includes a magnetic loop 110, at least one coil 120, a sampling circuit 130, a differentiator 140, a comparator 150, a pulse shield circuit 160, and a drive circuit 170.
The magnetic ring 110 is a closed magnetic conductor, and at least one conductor 180 through which a current to be measured, which may be a direct current or an alternating current, can pass is provided.
The conductor passing through the magnetic loop 110 may be one, such as the conductor 180 shown in FIG. 1, and the current protection device 100 may detect a change in current on the conductor 180.
The conductors passing through the magnetic loop 110 may be more than one, for example, two conductors in a direct current circuit (power and ground), two conductors in an alternating current circuit (two phase lines), three conductors in an alternating current circuit (three phase lines), four conductors in an alternating current circuit (three phase lines and one neutral line). In an ac circuit, the vector sum of the currents flowing through the conductors is a residual current, and the current protection device 100 can detect the residual current.
At least one coil is wound around the magnetic ring 110 (one coil 120 is illustrated in fig. 1 and 2), and receives the driving signal, so that the magnetic ring 110 wound around the coil induces a periodically-changing magnetic field strength along a hysteresis loop, thereby generating an oscillating signal on the at least one coil.
As shown in fig. 3, the magnetic induction B varies periodically with the magnetic field strength H generated by the driving signal, and the formed closed curve is a hysteresis loop. A forward magnetic saturation critical point a is arranged at the magnetic induction intensity B where the magnetic field intensity H is in the forward direction, and a reverse magnetic saturation critical point B is arranged at the magnetic induction intensity B where the magnetic field intensity H is in the reverse direction; the magnetic ring is in a non-magnetic saturation state, and the magnetic ring is in a reverse magnetic saturation state.
Specifically, when the magnetic field strength H is not applied and the magnetic induction B in the magnetic ring 110 is zero, the magnetic field strength H is gradually increased from the origin o in the positive direction, and accordingly, the magnetic induction B is also gradually increased along the curve oca in fig. 2 until the forward magnetic saturation critical point a is reached, at which time the magnetic field strength H is further increased and the magnetic induction B is also substantially kept unchanged; immediately after reaching the critical point a of forward magnetic saturation, the value of the magnetic field strength H is represented by + Hs, and the magnetic induction strength B is represented by + Bs.
At this time, if the magnetic field strength H is decreased in the reverse direction, the magnetization curve does not return from the point a along the original aco curve; when the magnetic field intensity H is reduced to zero, the magnetic induction intensity is + Br; continuously applying the magnetic field intensity H in the reverse direction, wherein the magnetic induction intensity B is zero when the magnetic field intensity H reaches-Hc; then, a reverse magnetic field intensity H is applied, and when the magnetic field intensity H reaches-Hs, the magnetic induction intensity B is-Bs, namely, a reverse magnetic saturation critical point B is reached.
At this time, if the magnetic field strength H is increased in the forward direction, when the magnetic field strength H is increased to zero, the magnetic induction is-Br; continuously applying the magnetic field intensity H in the positive direction, and when the magnetic field intensity H reaches + Hc, the magnetic induction intensity B is zero; then, a magnetic field strength H in the positive direction is applied, and when the magnetic field strength H reaches + Hs, the magnetic induction intensity B is + Bs, namely the magnetic saturation critical point a in the positive direction is returned.
The sampling circuit 130 is connected to one end of each of the at least one coil, and samples an electrical signal of the coil (i.e., an oscillation signal generated on the coil) and outputs a sampling signal (e.g., a sampling current, a sampling voltage).
In a specific implementation, the sampling circuit 130 is a sampling resistor RS connected in series with at least one coil, and has a first end connected to one end of the at least one coil and a second end grounded; the sampling resistor RS samples the current flowing through at least one coil and converts the current into a sampled voltage.
The differentiator 140 has an input coupled to the sampling circuit 130 for receiving the sampled signal and outputting a differentiated signal by detecting a rate of change of the sampled signal.
In an embodiment of the invention, a specific physical phenomenon (i.e. a rapid increase in the rate of change of the current in the coils) during the magnetic loop entering the magnetic saturation state from the non-magnetic saturation state is associated, so that the polarity change of the drive signal can be accurately controlled based on the rate of change of the current in at least one of the coils.
The specific parameters of the differentiator 140 may be set such that the timing of the polarity change of the drive control signal and the drive signal, which is directly determined based on the comparison of the differentiated signal output by the differentiator 140, substantially coincides with the timing at which the magnetic ring 110 enters the magnetic saturation state from the non-magnetic saturation state.
In some embodiments, as illustrated in fig. 2, the differentiator 140 includes an operational amplifier 141, a capacitor C0 and a feedback resistor R0, a first terminal of the capacitor C0 is connected to the sampling circuit 130, a forward input terminal of the operational amplifier 141 is connected to ground, an inverting input terminal is connected to a second terminal of the capacitor C0, an output terminal is connected to an input terminal of the comparator 150, and the feedback resistor R0 is connected between the output terminal and the inverting input terminal of the operational amplifier 141; the specific parameter setting of the differentiator 140 includes that the value range of the feedback resistor R0 is between 200K Ω (kilo-ohm) and 250K Ω, the value range of the capacitor C0 is between 50pF (picofarad) and 150pF, and optionally, the value of the capacitor is 100 pF.
An input of the comparator 150 may be connected to the output of the differentiator 140 for receiving the differentiated signal, and an input connected to the pulse masking circuit 160 for outputting a comparison result signal.
The input terminal of the pulse masking circuit 160 is connected to the output terminal of the comparator 150 to receive the comparison result signal; the pulse mask circuit 160 detects rising and falling edges of the comparison result signal, and accordingly outputs a driving control signal having a high level and a low level.
The input of the comparator 150 may also be connected to a feedback loop, for example, the input of the comparator 150 and the output of the pulse masking circuit 160 to form a feedback loop.
The comparator 150 may have a preset threshold. The polarity of the preset threshold may be controlled by the polarity of the driving control signal output from the pulse shielding circuit 160, for example, by changing the polarity of the driving control signal to reverse the polarity of the preset threshold, which is represented by a positive preset threshold and a negative preset threshold, and the range between the positive and negative preset thresholds is the threshold window of the comparator 150. The magnitude of the preset threshold may be set by parameters of the feedback loop, e.g. by a supply voltage, a resistance value, etc. in the feedback loop.
The comparator 150 may output a comparison result signal based on a comparison of the differential signal with a preset threshold. Specifically, a signal (i.e., a signal of a preset threshold) formed by a signal output from the pulse masking circuit 160 reaching the input terminal of the comparator 150 through a feedback loop is calculated from a differential signal output from the differentiator 140, and a value obtained by the calculation is compared with a reference value at the reference terminal of the comparator 150 to output a comparison result signal.
In some embodiments, as illustrated in fig. 2, the comparator 150 is a hysteresis comparator formed by a positive feedback structure, and includes a comparator 151, resistors R1 and R2, the resistor R1 is connected between the output terminal of the differentiator 130 and the input terminal of the comparator 151, the reference terminal of the comparator 151 is grounded, and the resistor R2 is connected between the input terminal of the comparator 151 and the output terminal of the pulse shielding circuit 160 to provide feedback to the input terminal of the comparator 151.
For example, the output voltage of the differentiator 130 is a negative voltage-V1, the voltage output by the pulse mask circuit 160 is a positive voltage VDD, and when the value of V1 is equal to the value of VDD × R1/R2, the level of the input terminal of the comparator 151 is zero, which is equal to the zero level of the reference terminal, so that the output voltage of the comparator 151 is inverted; at this time, the threshold voltage with respect to the output voltage of the differentiator 130 (i.e., the negative voltage-V1) is a negative threshold voltage (i.e., -VDD × R1/R2, VDD denotes a positive power supply voltage), the polarity of which can be controlled by the polarity of the output voltage of the pulse shielding circuit 160, and the magnitude of which is set by the parameters of the feedback loop (i.e., the values of R1, R2, and VDD).
For another example, the output voltage of the differentiator 130 is a positive voltage V1, the voltage output by the pulse mask circuit 160 is a negative voltage-VDD, and when the value of V1 is equal to the value of V2 × R1/R2, the level of the input terminal of the comparator 151 is zero, which is equal to the zero level of the reference terminal, so that the output voltage of the comparator 151 is inverted; at this time, the threshold voltage with respect to the output voltage of the differentiator 130 (i.e., the positive voltage V1) is a positive threshold voltage (i.e., VDD × R1/R2, -VDD denotes a negative power supply voltage), the polarity of which can be controlled by the polarity of the output voltage of the pulse shielding circuit 160, the magnitude of which is set by the parameters of the feedback loop (i.e., the values of R1, R2, and-VDD).
The pulse shielding circuit 160 may keep the driving control signal unchanged for a predetermined time period after the comparison result signal is changed or the polarity is inverted.
When the predetermined time length is reached, the driving control signal may be output according to the comparison result signal.
At this time, if the value of the differential signal is smaller than the preset threshold, the polarity of the comparison result signal is not changed, and the polarity of the drive control signal, the polarity of the preset threshold, and the polarity of the drive signal output by the drive circuit 170 are also not changed.
At this time, if the value of the differential signal is equal to or exceeds the preset threshold, the polarity of the comparison result signal is inverted, and the polarity of the driving control signal, the polarity of the preset threshold, and the polarity of the driving signal output by the driving circuit 170 are also inverted; the flipped driving signal is supplied to the coil to generate an inverted magnetic field (which is inverted from the previously generated magnetic field) within the magnetic loop 110, the sampling circuit 130 detects the inverted oscillation signal and outputs an inverted sampling signal (which is inverted from the previously generated magnetic field), the differentiator 140 receives the inverted sampling signal and outputs an inverted differential signal (which is inverted from the previously generated differential signal), and the comparator 150 outputs a comparison result signal based on a comparison of the inverted differential signal with an inverted preset threshold (which is inverted from the previously preset threshold).
If the output terminal of the comparator 150 is connected to the input terminal thereof to provide feedback, since glitches may be included in the comparison result signal output from the comparator 150, controlling the preset threshold value of the comparator based on the rising edge and the falling edge of the glitches may cause the preset threshold value to be frequently inverted unnecessarily; in the embodiment of the present invention, the output terminal of the pulse shielding circuit 160 is connected to the input terminal of the comparator 150 to control the preset threshold, and the driving control signal is kept unchanged for a predetermined time after the comparison result signal is changed, so that the pulse shielding circuit 160 can shield the comparison result signal output by the comparator 150 for the predetermined time, thereby keeping the driving control signal unchanged and simultaneously keeping the preset threshold of the comparator 150 stable.
In one embodiment, the predetermined length of time is greater than or equal to 10 microseconds and less than a half cycle of the oscillating signal.
As illustrated in fig. 4, the pulse masking circuit 160 includes a pulse generator 162 and a latch 163.
An input terminal of the pulse generator 162 is connected to the output terminal of the comparator 150 to receive the comparison result signal (illustrated as "a"), and detects a rising edge and a falling edge of the comparison result signal, and when the rising edge or the falling edge of the comparison result signal arrives, the pulse generator 162 generates a high level pulse signal of a predetermined width as a clock signal.
The output of the pulse generator 162 outputs a clock signal; the data terminal D of the latch 163 is connected to the output terminal of the comparator 150 to receive the comparison result signal, the clock terminal Clk is connected to the output terminal of the pulse generator 162 to receive the clock signal, and the output terminal Q outputs the driving control signal Y based on the comparison result signal and the clock signal.
When the clock signal is high, the latch 163 latches the current driving control signal Y, and at this time, the driving control signal Y output by the output terminal Q does not follow the input signal (i.e., the comparison result signal) received by the data terminal D, i.e., the polarity and magnitude of the driving control signal Y output by the output terminal Q of the latch 163 are kept unchanged regardless of the polarity or magnitude of the input signal received by the data terminal D.
When the clock signal goes low, the driving control signal Y output from the output terminal Q of the latch 163 follows the input signal received by the data terminal D thereof, i.e., the polarity and magnitude of the driving control signal Y output from the output terminal Q of the latch 163 vary with the polarity or magnitude of the input signal received by the data terminal D, respectively.
With this arrangement, the pulse masking circuit 160 can mask the comparison result signal output by the comparator 150 for a predetermined time period, so as to keep the driving control signal output by the comparator unchanged, and also keep the preset threshold value of the comparator 150 stable.
In the latch 163, an input signal received from the data terminal D may be changed, and it takes time to change from one of a high level and a low level to the other of the high level and the low level; if the signal received from data terminal D has not changed while clock terminal Clk receives the clock signal, latch 163 may be caused to latch the signal before the change instead of the desired signal after the change according to the clock signal.
To solve this problem, the pulse masking circuit 160 may include a buffer 161, and the input terminal of the pulse generator 162 is connected to the output terminal of the comparator 150 through the buffer 161. Buffer 161 may cause the timing of the comparison result signal arriving at the D terminal of latch 163 to be earlier than the timing of arriving at the input terminal of pulse generator 162 by a time period, which may be in the range of 1 to 3 nanoseconds (ns), e.g., 1ns, 2 ns.
An input of the driving circuit 170 is connected to an output of the pulse masking circuit 160 to receive the driving control signal. The driving circuit 170 is connected to a voltage source or a current source, and generates a driving signal based on the driving control signal.
The output end of the driving circuit 170 is connected to the other end of each of the at least one coil to form an oscillation loop, so as to provide a driving signal to the at least one coil, so that a magnetic field strength periodically changing is induced on the magnetic ring 110 wound by the at least one coil, and an oscillation signal is generated on the at least one coil; this oscillating signal may be referred to as a magnetically modulated oscillating signal or a base oscillating signal, which is an unmodulated oscillating signal, and the characteristics of the base oscillating signal may be changed by passing the conductor 180 of the current to be measured through the magnetic loop 110, i.e., the signal of the current to be measured is modulated on the base oscillating signal to form a modulated wave (which may be referred to as a modulated oscillating signal).
In some embodiments, as illustrated in fig. 2, the driving circuit 170 has a push-pull output structure, and includes a buffer 171, a PMOS transistor M1, and an NMOS transistor M2, an input terminal of the buffer 171 is connected to an output terminal of the pulse shielding circuit 160, and an output terminal is connected to gates of the M1 and the M2, sources of the M1 and the M2 are respectively connected to one and the other of a positive power Voltage (VDD) and a negative power voltage (-VDD), and drains of the M1 and the M2 are connected to the other end of each of the at least one coil to drive the same to generate the oscillation signal; by the push-pull output structure, the output voltage of the driving circuit 170 can be made to approach the positive and negative power supply voltages to the maximum extent, thereby greatly improving the driving efficiency of the driving circuit 170.
Fig. 5 illustrates a waveform diagram of a correlation signal in an embodiment of the invention.
The drive signal is generated by a drive circuit which may have a rectangular waveform formed of positive and negative levels, the period of the rectangular waveform being T (T2 is shown as half period T/2 in the figure). The positive and negative levels alternately drive the coils, so that the magnetic ring wound by the coils induces a periodically-changing magnetic field strength along the magnetic hysteresis loop, and further an oscillation signal is generated on at least one coil.
The sampling signal is output by the sampling circuit. In some embodiments, the sampled signal is a sampled current; when the driving signal is kept at a positive level or a negative level, the sampling current is gradually increased, and when the magnetic ring enters a magnetic saturation state from a non-magnetic saturation state (corresponding to the moment when the polarity of the driving signal is reversed, such as the moment when the positive level is changed into the negative level or the moment when the negative level is changed into the positive level), the current wound on the magnetic ring and the current on the sampling circuit are rapidly increased.
The differentiated signal is output by a differentiator, which is the rate of change of the sampled signal; compared with the sampling signal, the differential signal based on the sampling signal can more accurately reflect the critical point of the magnetic ring entering the magnetic saturation state from the non-magnetic saturation state, so that the polarity change of the driving signal at the critical point can be controlled more timely.
The comparison result signal a is output by a comparator, which is generated based on the comparison of the differential signal with a preset threshold, and when the value of the differential signal equals or exceeds the preset threshold, the polarity of the comparison result signal a is inverted, and accordingly, the polarity of the drive control signal output by the pulse masking circuit and the polarity of the drive signal output by the drive circuit are also inverted. The preset threshold includes a positive preset threshold (+ VTH) and a negative preset threshold (-VTH), and a range between the positive preset threshold and the negative preset threshold is a threshold window.
When the polarity of the driving signal is reversed, the comparison of the differentiated signal with a preset threshold value will generate short pulses (glitches, such as the short pulses indicated at a and b); the time from the first occurrence of a glitch to the time the comparison result signal a remains stable can be represented by T1.
The clock signal LAT is output by a pulse generator of the pulse mask circuit.
The drive control signal Y is output from the latch of the pulse mask circuit.
When the clock signal LAT is high, the latch latches the current driving control signal Y, which does not change with the comparison result signal a at this time, i.e., the polarity and magnitude of the driving control signal Y output from the latch remain unchanged regardless of the change in polarity or magnitude of the comparison result signal a. For example, in the predetermined time period T3, the clock signal LAT is at a high level, and the comparison result signal is masked (for example, the glitches at a and b are masked) while the drive control signal Y is kept unchanged, so that the preset threshold value is kept stable.
When the clock signal LAT becomes low level, the drive control signal Y changes following the comparison result signal a, that is, the polarity and magnitude of the drive control signal Y output by the latch change with the change in the polarity or magnitude of the comparison result signal a, respectively. For example, at the time of T2 to T3, when the clock signal LAT is at a low level, the polarity and magnitude of the drive control signal Y change with the change in the polarity or magnitude of the comparison result signal a, respectively.
Specifically, when the rising edge (at a) of the comparison result signal a arrives, the drive control signal Y output by the latch is at a high level, and at the same time, the rising edge makes the clock signal LAT output by the pulse generator at a high level, which is maintained for a predetermined time period T3 and makes the drive control signal Y not follow the comparison result signal a; during the time T2-T3 thereafter, the drive control signal Y follows the comparison result signal a (shown as high level in the figure). When the falling edge (at b) of the comparison result signal a arrives, the driving control signal Y output by the latch is at a low level, and at the same time, the falling edge makes the clock signal LAT output by the pulse generator at a high level, which is maintained for a predetermined time period T3 and makes the driving control signal Y not follow the comparison result signal a; during the time T2-T3 thereafter, the drive control signal Y follows the comparison result signal a (shown as low level in the figure). In this way, the desired drive control signal Y can be periodically output.
As illustrated in fig. 5, the predetermined period T3 is greater than T1 and less than T2; in one embodiment, T3 is greater than or equal to 10 microseconds and less than half cycle T/2 of the oscillating signal.
Fig. 6 illustrates another structure of the magnetic modulation oscillation circuit in the embodiment of the present invention.
The magnetic modulated oscillating circuit 300 includes a magnetic ring 210, a first coil 221 and a second coil 222 wound thereon, a sampling circuit 230, a differentiator 240, a comparator 250, a pulse shielding circuit 260, and a driving circuit 270.
The sampling circuit 230 is connected to one end of the first coil 221 and one end of the second coil 222, and samples oscillation signals of the first coil 221 and the second coil 222, respectively, and outputs a first sampling signal and a second sampling signal, where the first sampling signal and the second sampling signal may be sampling currents or sampling voltages.
In a specific implementation, the sampling circuit 230 includes a sampling resistor R1 having a first terminal and a second terminal respectively connected to one terminal of the first coil 221 and one terminal of the second coil 222, and a sampling resistor R1 respectively outputting a first sampling signal (i.e., a first sampling voltage) and a second sampling signal (i.e., a second sampling voltage).
The differentiator 240 has a differential structure with first and second ones of its inputs connected to first and second ones of the outputs of the sampling circuit 230 (e.g., first and second ends of the sampling resistor R1) to receive the first and second sampled signals and output first and second differentiated signals, respectively. Wherein the first differential signal and the second differential signal are in anti-phase with each other. Differentiator 240 may also comprise an input for a common mode Voltage (VCM).
Specifically, the differentiator 240 may include capacitors C1, C2 and resistors R2 and R3. The first end of the capacitor C1 is connected to the first end of the sampling circuit 230, the second end is connected to the positive input end of the operational amplifier 241, the first end of the resistor R2 is connected to the positive input end of the operational amplifier 241, and the second end is connected to the first output end of the operational amplifier 241; the capacitor C2 has a first terminal connected to the second terminal of the sampling circuit 230 and a second terminal connected to the inverting input terminal of the operational amplifier 241, and the resistor R3 has a first terminal connected to the inverting input terminal of the operational amplifier 241 and a second terminal connected to the second output terminal of the operational amplifier 241.
The comparator 250 has a differential structure, and a first input terminal and a second input terminal of the input terminals thereof are respectively connected to a first output terminal and a second output terminal of the output terminals of the differentiator 250 to respectively receive a first differential signal and a second differential signal, which can be compared with a first preset threshold and a second preset threshold, respectively, to output a first comparison result signal and a second comparison result signal. Wherein the first comparison result signal and the second comparison result signal are opposite in phase. The comparator 250 further includes a first reference terminal VRL corresponding to the first input terminal, and a second reference terminal VRH corresponding to the second input terminal.
A first input terminal and a second input terminal of the input terminals of the pulse masking circuit 260 are respectively connected to a first output terminal and a second output terminal of the output terminals of the comparator 250 to receive the first comparison result signal and the second comparison result signal, and the pulse masking circuit 260 may output a first driving control signal based on the first comparison result signal and keep the first driving control signal unchanged for a first predetermined time period after the first comparison result signal is changed, and may also output a second driving control signal based on the second comparison result signal and keep the second driving control signal unchanged for a second predetermined time period after the second comparison result signal is changed. The first drive control signal and the second drive control signal are opposite in phase; and, the first predetermined period of time may be equal to the second predetermined period of time.
In a specific implementation, a first output of the pulse masking circuit 260 may be connected to a first input of the comparator 250 to control the first preset threshold, and a second output of the pulse masking circuit 260 may be connected to a second input of the comparator 250 to control the second preset threshold.
In a particular implementation, the pulse masking circuit 260 may include a first latch, a second latch, a first pulse generator, and a second pulse generator. The input end of the first pulse generator is connected with the first output end of the comparator to receive the first comparison result signal, and the output end of the first pulse generator is connected with the clock end of the first latch to output a first clock signal; the data terminal of the first latch is connected with the first output terminal of the comparator to receive the first comparison result signal, the clock terminal is suitable for receiving the first clock signal, and the output terminal is suitable for outputting a first driving control signal based on the first comparison result signal and the first clock signal; the input end of the second pulse generator is connected with the second output end of the comparator to receive a second comparison result signal, and the output end of the second pulse generator is connected with the clock end of the second latch to output a second clock signal; the data terminal of the second latch is connected to the second output terminal of the comparator to receive the second comparison result signal, the clock terminal is adapted to receive the second clock signal, and the output terminal is adapted to output the second driving control signal based on the second comparison result signal and the second clock signal.
In a specific implementation, the first pulse generator and the second pulse generator may further include a first buffer and a second buffer, respectively. The first buffer can enable the first comparison result signal to reach the first latch firstly and then reach the first pulse generator, and the input end of the first pulse generator is connected with the first output end of the comparator through the first buffer; the second buffer may enable the second comparison result signal to reach the second latch first and then reach the second pulse generator, and the input end of the second pulse generator is connected to the second output end of the comparator through the second buffer.
A first one of the inputs of the driver circuit 270 is connected to a first one of the outputs of the pulse masking circuit 260 to receive the first drive control signal, and a second one of the inputs of the driver circuit 270 is connected to a second one of the outputs of the pulse masking circuit 260 to receive the second drive control signal. A first one of the outputs of the driving circuit 270 is connected to the first coil 210 to provide a first driving signal thereto, and a second one of the outputs of the driving circuit 270 is connected to the second coil 220 to provide a second driving signal thereto. The first driving signal and the second driving signal are opposite in phase.
In a specific implementation, the driving circuit 270 may have a first push-pull output structure and a second push-pull output structure.
The first push-pull output structure comprises a buffer 271, a PMOS transistor M3 and an NMOS transistor M4, wherein the input end of the buffer 271 is connected with the first output end of the pulse shielding circuit 260, the output end of the buffer is connected with the gates of the M3 and the M4, the sources of the M3 and the M4 are respectively connected with one of a positive power supply Voltage (VDD) and a negative power supply voltage (-VDD) and the ground, and the drains of the M3 and the M4 are commonly connected with the other end of the first coil 221 to drive the first coil to generate an oscillation signal.
The second push-pull output structure comprises a buffer 272, a PMOS transistor M5 and an NMOS transistor M6, wherein the input end of the buffer 272 is connected with the second output end of the pulse shielding circuit 260, the output end of the buffer is connected with the gates of the M5 and the M6, the sources of the M5 and the M6 are respectively connected with the other one of the positive power supply Voltage (VDD) and the negative power supply voltage (-VDD) and the ground, and the drains of the M5 and the M6 are commonly connected with the other end of the second coil 222 to drive the second coil to generate the oscillation signal.
Through the first push-pull output structure and the second push-pull output structure, the output voltage of the driving circuit 270 can be made to be close to the positive and negative power supply voltages to the maximum extent, so that the driving efficiency of the driving circuit 270 is greatly improved.
The magnetic modulation oscillation circuit 300 employs the differentiator 240, the comparator 250, the pulse mask circuit 260, the driving circuit 270, and the like having a differential structure, so that the power supply of the driving circuit 270 may be not only a bidirectional power supply (i.e., supplying VDD and-VDD) but also a unidirectional power supply (e.g., supplying VDD or-VDD only).
For example, when the power supply of the driving circuit 270 provides VDD, the voltages of the first driving signal and the second driving signal are one and the other of VDD and zero, and the differential signal between VDD and-VDD, so as to realize forward and reverse driving of the magnetic ring 210, so that the magnetic ring 210 can induce a periodically changing magnetic field strength along the hysteresis loop, thereby generating an oscillating signal on at least one coil.
By providing a single phase power supply, the magnetic modulating oscillating circuit 300 may be integrated within a single Integrated Circuit (IC) chip, which greatly reduces the volume of the magnetic modulating oscillating circuit 300 and facilitates isolated current sensing in a smaller space.
The magnetic loop 210, the first coil 221, the second coil 222, the sampling circuit 230, the differentiator 240, the comparator 250, the pulse shielding circuit 260, the driving circuit 270, the conductor 280, and the first and second buffers, the first and second pulse generators, and the first and second latches in the pulse shielding circuit 260 in the magnetic modulation oscillation circuit 300 have the same or similar structures and functions as the magnetic loop 110, the coil 120, the sampling circuit 130, the differentiator 140, the comparator 150, the pulse shielding circuit 160, the driving circuit 170, the conductor 180, and the buffer 161, the pulse generator 162, and the latch 163 in the pulse shielding circuit 160 in the magnetic modulation oscillation circuit 100, 200, respectively, and reference may be made to the above description of these components.
Fig. 7 is a flow chart of a method of driving a magnetically modulated oscillating circuit according to an embodiment of the invention, the method 400 comprising the steps of:
step a, acquiring an oscillation signal at least one coil and outputting a sampling signal;
step b, processing the sampling signal and outputting a differential signal;
a step c of outputting a comparison result signal based on a comparison of the differential signal and a preset threshold;
d, outputting a driving control signal based on the comparison result signal and keeping the driving control signal unchanged within a preset time after the comparison result signal is changed, wherein the driving control signal controls a preset threshold value;
and e, outputting a driving signal based on the driving control signal to enable at least one coil to generate an oscillating signal.
In the implementation of step a, the oscillation signal at the at least one coil wound on the magnetic loop may be sampled by a sampling circuit and a sampling signal (e.g., a sampling current, a sampling voltage) may be output.
In the execution of step b, a differential signal may be output by a differentiator detecting a rate of change of the sampling signal.
In the execution of step c, the comparison result signal may be output by the comparator based on a comparison of the differential signal and a preset threshold value, wherein a polarity of the preset threshold value may be controlled by the driving control signal output from the pulse masking circuit, and a magnitude of the preset threshold value may be set by a parameter of the feedback loop.
In the execution of step d, the driving control signal may be output based on the comparison result signal through the pulse mask circuit. The pulse shielding circuit keeps the driving control signal unchanged within a preset time length after the comparison result signal is changed; after a preset time, the polarity and the magnitude of the driving control signal output by the pulse shielding circuit are changed along with the change of the polarity or the magnitude of the comparison result signal respectively.
In a particular implementation, the predetermined time period may be greater than or equal to 10 microseconds and less than a half cycle of the oscillating signal.
In a specific implementation, the clock signal may be output based on the comparison result signal, e.g. by the pulse generator outputting the clock signal based on the comparison result signal; the drive control signal may be output based on the comparison result signal and the clock signal, for example, by a latch.
In the execution of step e, a driving signal may be output by the driving circuit based on the driving control signal to cause the at least one coil to generate the oscillation signal.
The method for driving the magnetic modulation oscillation circuit according to the embodiment of the present invention may be implemented based on the magnetic modulation oscillation circuits 100, 200, and 300 described above with reference to fig. 1 to 6, and therefore, the execution of each step and the interrelation between each step in the method for driving the magnetic modulation oscillation circuit may refer to the description of the magnetic modulation oscillation circuits 100, 200, and 300, which is not repeated herein.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (13)
1. A magnetically modulated oscillating circuit, comprising:
the magnetic ring is suitable for enabling at least one conductor through which current to be measured can pass to pass;
at least one coil wound on the magnetic ring;
a sampling circuit connected to one end of each of the at least one coil and adapted to output a sampling signal;
a differentiator having an input coupled to the sampling circuit to receive the sampled signal and adapted to output a differentiated signal;
a comparator having an input connected to the output of the differentiator for receiving the differentiated signal and adapted to output a comparison result signal based on a comparison of the differentiated signal with a preset threshold;
the input end of the pulse shielding circuit is connected with the output end of the comparator to receive the comparison result signal, and the pulse shielding circuit is suitable for outputting a driving control signal and keeping the driving control signal unchanged within a preset time length after the comparison result signal is changed;
and the input end of the driving circuit is connected with the output end of the pulse shielding circuit to receive the driving control signal, and the output end of the driving circuit is connected with the other end of each coil in the at least one coil to drive the other end of each coil to generate an oscillating signal.
2. The magnetically modulated oscillator circuit of claim 1, wherein the output of the pulse mask circuit is coupled to the input of the comparator to control the preset threshold.
3. The magnetically modulated oscillator circuit of claim 1, wherein the predetermined time period is greater than or equal to 10 microseconds and less than a half cycle of the oscillator signal.
4. The magnetically modulated oscillator circuit of claim 1, wherein the at least one coil comprises one coil, the sampling circuit comprises a sampling resistor having one end connected to one end of the one coil and the input end of the differentiator and the other end connected to ground, and the output end of the driving circuit is connected to the other end of the one coil.
5. The magnetically modulated oscillator circuit of claim 4, wherein the pulse masking circuit comprises a pulse generator and a latch, wherein the pulse generator has an input terminal coupled to the output terminal of the comparator to receive the comparison result signal and an output terminal coupled to the clock terminal of the latch to output a clock signal, wherein the latch has a data terminal coupled to the output terminal of the comparator to receive the comparison result signal, a clock terminal coupled to the clock signal, and an output terminal coupled to the drive control signal based on the comparison result signal and the clock signal.
6. The magnetically modulated oscillator circuit of claim 5, wherein the pulse masking circuit further comprises a buffer adapted to pass the comparison result signal to the latch before to the pulse generator, the input of the pulse generator being connected to the output of the comparator through the buffer.
7. The magnetically modulated oscillating circuit of claim 1, wherein the at least one coil comprises a first coil and a second coil, wherein:
the sampling circuit comprises a sampling resistor, wherein a first end and a second end of the sampling resistor are respectively connected with one end of the first coil and one end of the second coil and are respectively suitable for outputting a first sampling signal and a second sampling signal;
a first input terminal and a second input terminal of the input terminals of the differentiator are respectively connected with a first terminal and a second terminal of the sampling resistor to receive the first sampling signal and the second sampling signal and are respectively suitable for outputting a first differential signal and a second differential signal;
a first input terminal and a second input terminal of the input terminals of the comparator are respectively connected to a first output terminal and a second output terminal of the output terminals of the differentiator to receive the first differential signal and the second differential signal and are respectively adapted to compare with a first preset threshold value and a second preset threshold value respectively to output a first comparison result signal and a second comparison result signal;
a first input end and a second input end of the input ends of the pulse shielding circuit are respectively connected with a first output end and a second output end of the output ends of the comparator to receive the first comparison result signal and the second comparison result signal and are respectively suitable for outputting a first driving control signal and a second driving control signal, and respectively keeping the first driving control signal and the second driving control signal unchanged in a first preset time length and a second preset time length after the first comparison result signal and the second comparison result signal are changed;
the first input end and the second input end in the input end of the driving circuit are respectively connected with the first output end and the second output end in the output end of the pulse shielding circuit so as to receive the first driving control signal and the second driving control signal, and the first output end and the second output end in the output end of the driving circuit are respectively connected with the other end of the first coil and the other end of the second coil.
8. The magnetically modulated oscillator circuit of claim 7, wherein the first and second outputs of the pulse masking circuit are connected to the first and second inputs of the comparator, respectively, to control the first and second predetermined thresholds, respectively.
9. The magnetically modulated oscillator circuit of claim 7, wherein the pulse mask circuit comprises a first latch, a second latch, a first pulse generator, and a second pulse generator, wherein: the input end of the first pulse generator is connected with the first output end of the comparator to receive the first comparison result signal, and the output end of the first pulse generator is connected with the clock end of the first latch to output a first clock signal;
a data terminal of the first latch is connected with a first output terminal of the comparator to receive the first comparison result signal, a clock terminal of the first latch receives the first clock signal, and an output terminal of the first latch outputs a first driving control signal based on the first comparison result signal and the first clock signal;
the input end of the second pulse generator is connected with the second output end of the comparator to receive the second comparison result signal, and the output end of the second pulse generator is connected with the clock end of the second latch to output a second clock signal;
the data terminal of the second latch is connected to the second output terminal of the comparator to receive the second comparison result signal, the clock terminal receives the second clock signal, and the output terminal outputs a second driving control signal based on the second comparison result signal and the second clock signal.
10. The magnetically modulated oscillator circuit of claim 9, wherein the first and second pulse generators further comprise first and second buffers, respectively, wherein:
the first buffer is suitable for enabling the first comparison result signal to reach the first latch firstly and then reach the first pulse generator, and the input end of the first pulse generator is connected with the first output end of the comparator through the first buffer;
the second buffer is adapted to enable the second comparison result signal to reach the second latch first and then reach the second pulse generator, and the input end of the second pulse generator is connected with the second output end of the comparator through the second buffer.
11. A method of driving a magnetically modulated oscillator circuit as claimed in any one of claims 1 to 10, comprising:
acquiring an oscillation signal at the at least one coil and outputting a sampled signal;
processing the sampled signal to output a differential signal;
outputting a comparison result signal based on a comparison of the differential signal and a preset threshold;
outputting a driving control signal based on the comparison result signal and keeping the driving control signal unchanged within a preset time length after the comparison result signal is changed, wherein the driving control signal controls the preset threshold;
outputting a drive signal based on the drive control signal to cause the at least one coil to generate the oscillation signal.
12. The method of claim 11, wherein the predetermined time period is greater than or equal to 10 microseconds and less than a half cycle of the oscillating signal.
13. The method of claim 11, comprising: outputting a clock signal based on the comparison result signal, and outputting the driving control signal based on the comparison result signal and the clock signal.
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