CN113961090A - Reducing interference within a sensing device when performing input sensing - Google Patents

Reducing interference within a sensing device when performing input sensing Download PDF

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Publication number
CN113961090A
CN113961090A CN202110318086.2A CN202110318086A CN113961090A CN 113961090 A CN113961090 A CN 113961090A CN 202110318086 A CN202110318086 A CN 202110318086A CN 113961090 A CN113961090 A CN 113961090A
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China
Prior art keywords
period
during
sensor
driving
signal
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CN202110318086.2A
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Chinese (zh)
Inventor
沈国重
伊藤大亮
武山洋士
J·罗什
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Synaptics Inc
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Synaptics Inc
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Priority claimed from US16/830,147 external-priority patent/US11003300B1/en
Priority claimed from US17/142,648 external-priority patent/US11327605B1/en
Application filed by Synaptics Inc filed Critical Synaptics Inc
Publication of CN113961090A publication Critical patent/CN113961090A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04184—Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A system and method for operating a sensor electrode includes driving a first portion of the sensor electrode with a sensing signal during a first time period. The second portion of the sensor electrode is driven with the guard signal during the first period. The second portion is adjacent to the first portion. The guard signal and the sense signal have at least one common characteristic selected from the group consisting of amplitude, phase and frequency. Driving or electrically floating a third portion of the sensor electrode with a direct current signal during the first period. The third portion is adjacent to the second portion but not adjacent to the first portion.

Description

Reducing interference within a sensing device when performing input sensing
Technical Field
The disclosure herein relates generally to electronic devices and more particularly to reducing the effects of interference within sensing devices in display devices.
Background
Input devices including proximity sensor devices may be used in a variety of electronic systems. The proximity sensor device may include a sensing region bounded by a surface in which the proximity sensor device determines the presence, location, force, and/or motion of one or more input objects. The proximity sensor device may be used to provide an interface for an electronic system. For example, a proximity sensor device may be used as an input device for a larger computing system, such as a touch pad integrated in or peripheral to a notebook computer, desktop computer, automotive multimedia system, or internet of things (IoT) device. Proximity sensor devices may also often be used in smaller computing systems such as touch screens integrated in cellular phones.
Disclosure of Invention
In one embodiment, a method for operating a sensor electrode comprises: driving a first portion of the sensor electrodes with the sensing signal during a first period of a first sensing frame; driving a second portion of the sensor electrode with a guard signal during the first period, the second portion disposed adjacent to the first portion, wherein the guard signal and the sense signal have at least one characteristic in common selected from a group consisting of amplitude, phase, and frequency; and driving or electrically floating a third portion of the sensor electrode with the reference signal during the first period, the third portion being adjacent to the second portion but not adjacent to the first portion.
In one embodiment, the method further comprises driving a fourth portion of the sensor electrode with the guard signal during the first period. In one embodiment, the method further comprises driving or electrically floating a fifth portion of the sensor electrode with the reference signal during the first period, the fifth portion being adjacent to the fourth portion but not adjacent to the first portion. In one embodiment, the method further comprises driving the first portion and the third portion with a guard signal during a second period of the first sensing frame; driving a second portion with the reference signal during a second period, wherein the second portion overlaps with a second gate line of the display panel selected for updating during the second period, and wherein the second period is subsequent to the first period; driving a fourth portion of the sensor electrode with the sensing signal during a second period; driving a first portion with the reference signal during a third period of the first sensing frame, wherein the first portion overlaps a third gate line of the display panel selected for updating during the third period, and wherein the third period is subsequent to the second period; driving the second portion with the sensing signal during a third period; and driving the third and fourth portions with the guard signal during the third period.
In one embodiment, the method further comprises: driving a fourth portion of the sensor electrode with the sensing signal during a second period; driving a fifth portion of the sensor electrode with a guard signal during a second period; and driving or electrically floating a sixth portion of the sensor electrode with the reference signal during the second period, the sixth portion being adjacent to the fifth portion but not adjacent to the fourth portion. Wherein the first portion and the fifth portion comprise at least a first one of the common sensor electrodes, the second portion and the sixth portion comprise at least a second one of the common sensor electrodes, and the third portion and the sixth portion comprise at least a third one of the common sensor electrodes. Wherein the sensor electrodes are operated for input sensing during a first sensing frame according to a first order and the sensor electrodes are operated for input sensing during a second sensing frame according to a second order, wherein the first order is different from the second order, and wherein a start of the first sensing frame is delayed from a start of a display frame during which the display panel is updated.
In one embodiment, the method further comprises: driving a seventh portion of the sensor electrode with the sensing signal during a third period; during a third period, driving an eighth portion of the sensor electrode with a guard signal; and during a third period, driving or electrically floating a ninth portion of the sensor electrode with the reference signal, the ninth portion being adjacent to the eighth portion but not adjacent to the seventh portion. Wherein the fourth and eighth portions comprise at least a first of the common sensor electrodes, the fifth and ninth portions comprise at least a second of the common sensor electrodes, and the sixth and ninth portions comprise at least a third of the common sensor electrodes. Wherein the third portion of the sensor electrode overlaps the first gate line of the display panel selected for updating during the first period.
In one embodiment, a processing system includes: a sensor circuit coupled to the sensor electrode and configured to operate the sensor electrode for input sensing during a first sensing frame, the sensor circuit configured to, during the first sensing frame: driving a first portion of the sensor electrode with the sensing signal during a first period; driving a second portion of the sensor electrode with a guard signal during the first period, the second portion being adjacent to the first portion, wherein the guard signal and the sense signal have at least one common characteristic selected from the group consisting of amplitude, phase and frequency; and driving or electrically floating a third portion of the sensor electrode with the reference signal during the first period, the third portion being adjacent to the second portion but not adjacent to the first portion.
In one embodiment, the sensor circuit is further configured to: driving a fourth portion of the sensor electrode with a guard signal during a first period; and driving or electrically floating a fifth portion of the sensor electrode with the reference signal during the first period, the fifth portion being adjacent to the fourth portion but not adjacent to the first portion.
In one embodiment, during the second period of the first sensing frame, the sensor circuit is configured to: driving the first portion and the third portion with a guard signal; driving a second portion with the reference signal, wherein the second portion overlaps a second gate line of the display panel selected for updating during a second period, and wherein the second period is subsequent to the first period; and driving a fourth portion of the sensor electrode with the sensing signal. In one embodiment, during the third period of the first sensing frame, the sensor circuit is further configured to: driving a first portion with a reference signal, wherein the first portion overlaps a third gate line of the display panel selected for updating during a third period, and wherein the third period is after the second period; driving the second portion with the sense signal; and driving the third and fourth portions with the guard signal.
In one embodiment, the sensor circuit is further configured to: driving a fourth portion of the sensor electrode with the sensing signal during a second period; driving a fifth portion of the sensor electrode with the guard signal during a second period; and driving or electrically floating a sixth portion of the sensor electrode with the reference signal during the second period, the sixth portion being adjacent to the fifth portion but not adjacent to the fourth portion. In one embodiment, the first and fifth portions comprise at least a first sensor electrode of a common sensor electrode, the second and sixth portions comprise at least a second electrode of the common sensor electrode, and the third and sixth portions comprise at least a third electrode of the common sensor electrode.
In one embodiment, the sensor electrodes are operated for input sensing during a first sensing frame according to a first order and the sensor electrodes are operated for input sensing during a second sensing frame according to a second order, wherein the first order is different from the second order.
In one embodiment, the first sensing frame occurs during a first display frame and the second sensing frame occurs during the first display frame and a second display frame, and wherein the display panel is updated during the first display frame and the second display frame. In one embodiment, wherein the first sensing frame occurs during a first display frame, the second sensing frame occurs during the first display frame, and the third sensing frame occurs during the first display frame and the second display frame. In one embodiment, the display panel is updated during the first display frame and the second display frame. In one embodiment, the gate lines of the display panel are sequentially selected for updating during a first display frame, and wherein the first order is non-sequential. In one embodiment, the first sensing frame occurs during a first display frame, the second sensing frame occurs during the first display frame, and the third sensing frame occurs during the first display frame and the second display frame, and wherein the display panel is updated during the first display frame and the second display frame.
In one embodiment, the sensor circuit is further configured to: driving a seventh portion of the sensor electrode with the sensing signal during a third period; driving an eighth portion of the sensor electrode with the guard signal during a third period; and driving or electrically floating a ninth portion of the sensor electrode with the reference signal during the third period, the ninth portion being adjacent to the eighth portion but not adjacent to the seventh portion, wherein the fourth and eighth portions include at least a first electrode of the common sensor electrode, the fifth and ninth portions include at least a second electrode of the common sensor electrode, and the sixth and ninth portions include at least a third electrode of the common sensor electrode.
In one embodiment, the third portion of the sensor electrode overlaps the first gate line of the display panel selected for updating during the first period. In one embodiment, the second portion is between the first portion and the third portion. In one embodiment, the sensor circuit is further configured to initiate driving the first sensing frame based on a display update signal indicating a start of a display frame, wherein the start of the first sensing frame is delayed from the start of the display frame.
In one embodiment, an input device includes: a sensor electrode; and a processing system coupled to the sensor electrodes and configured to operate the sensor electrodes for input sensing during a first sensing frame, wherein during the first sensing frame, the processing system is configured to: driving a first portion of the sensor electrode with the sensing signal during a first period; driving a second portion of the sensor electrode with a guard signal during the first period, the second portion being adjacent to the first portion, wherein the guard signal and the sense signal have at least one common characteristic selected from the group consisting of amplitude, phase and frequency; and driving or electrically floating a third portion of the sensor electrode with the reference signal during the first period, the third portion being adjacent to the second portion but not adjacent to the first portion.
In one embodiment, the processing system is further configured to drive a fourth portion of the sensor electrode with the guard signal during the first period. In one embodiment, the processing system is further configured to drive or electrically float a fifth portion of the sensor electrode with the reference signal during the first period, the fifth portion being adjacent to the fourth portion but not adjacent to the first portion.
In one embodiment, the processing system is further configured to: driving a fourth portion of the sensor electrode with the sensing signal during a second period; driving a fifth portion of the sensor electrode with a guard signal during a second period; and driving or electrically floating a sixth portion of the sensor electrode with the reference signal during the second period, the sixth portion being adjacent to the fifth portion but not adjacent to the fourth portion. In one embodiment, the processing system is further configured to drive a seventh portion of the sensor electrodes with the sensing signal during a third period; driving an eighth portion of the sensor electrode with the guard signal during a third period; and driving or electrically floating a ninth portion of the sensor electrode with the reference signal during the third period, the ninth portion being adjacent to the eighth portion but not adjacent to the seventh portion.
In one embodiment, during the second period of the first sensing frame, the processing system is configured to drive the first portion and the third portion with a guard signal; driving a second portion with the reference signal, wherein the second portion overlaps a second gate line of the display panel selected for updating during a second period, and wherein the second period is subsequent to the first period; and driving a fourth portion of the sensor electrode with the sensing signal. In one embodiment, during a third period of the first sensing frame, the processing system is configured to drive a first portion with the reference signal, wherein the first portion overlaps a third gate line of the display panel selected for updating during the third period, and wherein the third period is subsequent to the second period; driving the second portion with the sense signal; and driving the third and fourth portions with the guard signal.
In one embodiment, the input device further comprises an Organic Light Emitting Diode (OLED) display device, and wherein the processing system is further configured to update a display of the display device during the first period. In one embodiment, the sensor electrode is disposed on a first substrate, wherein the first substrate is one of a lens and an encapsulation layer of the OLED display device. In one embodiment, the third portion of the sensor electrode overlaps the first gate line of the display panel selected for updating during the first period. In one embodiment, the processing system is further configured to initiate driving the first sensing frame based on a display update signal indicating a start of a display frame, wherein the start of the first sensing frame is delayed from the start of the display frame. In one embodiment, the sensor electrodes are operated for input sensing during a first sensing frame according to a first order and the sensor electrodes are operated for input sensing during a second sensing frame according to a second order, wherein the first order is different from the second order. In one embodiment, the first sensing frame occurs during a first display frame of a plurality of display frames and the second sensing frame occurs during the first display frame and a second display frame of the plurality of display frames, and wherein the display panel is updated during the first display frame and the second display frame.
Drawings
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.
FIG. 1 is a schematic block diagram of an input device in accordance with one or more embodiments.
FIG. 2 is a schematic block diagram of an input device and a display device in accordance with one or more embodiments.
FIG. 3 is a schematic side view of an input device in accordance with one or more embodiments.
FIG. 4 is a flow diagram of a method for performing capacitive sensing in accordance with one or more embodiments.
FIG. 5 is a timing diagram of a capacitive frame in accordance with one or more embodiments.
6A, 6B, and 6C illustrate a flow diagram of a method for performing capacitive sensing in accordance with one or more embodiments.
FIG. 7 is a timing diagram of a capacitive frame in accordance with one or more embodiments.
FIG. 8 is a schematic side view of a portion of an input device in accordance with one or more embodiments.
FIG. 9 is a flow diagram of a method for performing capacitive sensing in accordance with one or more embodiments.
FIG. 10 is a timing diagram of a capacitive frame in accordance with one or more embodiments.
FIG. 11 is a schematic side view of a portion of an input device in accordance with one or more embodiments.
12A, 12B, 13A1, 13A2, 13B1, and 13B2 are timing diagrams of capacitive frames in accordance with one or more embodiments.
FIG. 14 is a timing diagram for performing display updating and input sensing in accordance with one or more embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. Unless specifically stated, the drawings referred to herein should not be understood as being drawn to scale. Moreover, for clarity of presentation and explanation, the drawings are generally simplified and details or components are omitted. The drawings and discussion are intended to explain the principles discussed below, wherein like reference numerals refer to like elements.
Detailed Description
The following detailed description is merely exemplary in nature and is not intended to limit the disclosure or the application and uses of the disclosure. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding background, brief summary or the following detailed description.
In many input devices, the sensor electrodes are disposed proximate to the display device. In such an input device, the display electrodes of the display device are capacitively coupled with the sensor electrodes. Thus, the capacitance of the sensor electrode increases, thereby increasing the power required to operate the sensor electrode for capacitive sensing. However, by operating the first portion of the sensor electrodes for capacitive sensing and driving the second portion of the sensor electrodes with the guard signal, the capacitive coupling between the sensor electrodes and the display electrodes is reduced, thereby beneficially reducing the power required to operate the sensor electrodes for capacitive sensing.
Fig. 1 illustrates an input device 100 configured to reduce capacitive coupling between sensor electrodes and display electrodes. Input device 100 may be configured to provide input to an electronic system (not shown). Some non-limiting examples of electronic systems include desktop computers, laptop computers, netbook computers, tablets, terminals, kiosks, cellular phones, automotive multimedia centers, and internet of things (IoT) devices, among others.
The input device 100 includes a processing system 110 and sensor electrodes 105. The processing system 110 operates the sensor electrodes 105 to detect one or more input objects 140 in a sensing region of the input device 100. Example input objects 140 include fingers and a stylus, as shown in FIG. 1.
The sensing region of the input device 100 encompasses any space on, around, in, and/or near the input device 100 in which the input device 100 is capable of detecting user input, e.g., user input provided by one or more input objects 140.
The sensor electrodes 105 are coupled to the processing system 110 via traces 150. The exemplary pattern of sensor electrodes 105 illustrated in fig. 1 includes an array of sensor electrodes 105 arranged in a plurality of rows and columns. In one example, sensor electrodes 105 are disposed in rows 170 and 181. It is contemplated that the sensor electrodes 105 may be arranged in other patterns, such as a polar array, a repeating pattern, a non-uniform array, or other suitable arrangement. The sensor electrodes 105 may have a shape that is circular, rectangular, diamond, star, square, non-convex, non-concave, or other suitable geometric shape.
The sensor electrodes 105 may be disposed in a common layer. For example, the sensor electrodes 105 may be disposed on a first side of a common substrate. In other embodiments, the sensor electrodes 105 may be disposed in two or more layers. For example, a portion of the sensor electrode 105 may be disposed on a first layer and another portion of the sensor electrode may be disposed on a second layer. The first and second layers may be provided on different sides of a common substrate, or on different substrates.
The sensor electrodes 105 may include a conductive material such as metal mesh, Indium Tin Oxide (ITO), or the like. Further, the sensor electrodes 105 are ohmically isolated from each other. That is, one or more insulators separate the sensor electrodes and prevent them from electrically shorting to each other.
The processing system 110 includes the sensor circuit 104. Further, the processing system 110 may include the determination module 106. The processing system 110 is configured to operate the sensor electrodes 105 to detect one or more input objects 140 in a sensing region of the input device 100. The processing system 110 resides, in whole or in part, in one or more Integrated Circuit (IC) chips. For example, the processing system 110 may include a single IC chip. Alternatively, the processing system 110 includes multiple IC chips.
The sensor circuitry 104 is coupled to the sensor electrodes 105 via routing traces 150 and is configured to drive the sensor electrodes 105 with sensing signals to detect one or more input objects 140 in a sensing region of the input device 100.
The sensor circuit 104 includes digital and/or analog circuitry. For example, the sensor circuitry 104 includes transmitter (or driver) circuitry configured to drive a sensing signal onto the sensor electrodes 105 and receiver circuitry for receiving a resulting signal from the sensor electrodes 105. The transmitter circuitry may include one or more amplifiers and/or one or more modulators configured to drive the sensing signals onto the sensor electrodes 105. The receiver circuitry may include an Analog Front End (AFE) including integrator circuitry, filter circuitry, and/or demodulator circuitry configured to receive and/or process the resulting signal from sensor electrodes 105.
In one embodiment, the sensor circuitry 104 drives a first one or more of the sensor electrodes 105 with a transcapacitive sensing signal and receives a resulting signal with a second one or more of the sensor electrodes 105 to operate the sensor electrodes 105 for transcapacitive sensing. The sensor electrodes 105 are operated for transcapacitive sensing to detect changes in capacitive coupling between one or more sensor electrodes driven with transcapacitive sensing signals and one or more sensor electrodes operated as receiver electrodes. Capacitive coupling may be reduced when an input object (e.g., input object 140) coupled to system ground is proximate to the sensor electrode. Driving the sensor electrode 105 with the transcapacitive sensing signal includes modulating the sensor electrode 105 relative to a reference voltage (e.g., system ground).
The transcapacitive sense signal is a periodic or aperiodic signal that varies between two or more voltages. Furthermore, the transcapacitive sense signal has a frequency between 100kHz and 1 MHz. In other embodiments, other frequencies may be utilized. The transcapacitive sense signal may have a peak-to-peak amplitude in a range of about 1V to about 10V. However, in other embodiments, the transcapacitive sense signal may have a peak-to-peak amplitude greater than about 10V. Additionally, the transcapacitive sense signal may have a square waveform, a sinusoidal waveform, a triangular waveform, a trapezoidal waveform, or a sawtooth waveform, among others.
In some embodiments, operating the sensor electrode 105 to receive the resulting signal includes holding the sensor electrode 105 at a substantially constant voltage or modulating the sensor electrode 105 relative to the transcapacitive sensing signal. For example, receiving the resulting signal by operating the one or more sensor electrodes 105 to modulate the one or more sensor electrodes 105 relative to the transcapacitive sensing signal includes modulating the one or more sensor electrodes 105 with a signal having an amplitude, phase, waveform, and/or frequency that is different from the amplitude, phase, waveform, and/or frequency of the transmitter signal. The resulting signal includes influence(s) corresponding to one or more transcapacitive sensing signals and/or to one or more environmental interference sources (e.g., other electromagnetic signals).
In one embodiment, the sensor circuitry 104 operates the sensor electrodes 105 for absolute capacitive sensing by driving a first one or more of the sensor electrodes 105 with an absolute capacitive sensing signal and receiving a resulting signal with the driven sensor electrodes. The sensor electrodes 105 are operated for absolute capacitive sensing to detect changes in capacitive coupling between the sensor electrodes driven with absolute capacitive sensing signals and an input object (e.g., input object 140). When an input object (e.g., input object 140) coupled to system ground approaches the sensor electrodes, the capacitive coupling of the sensor electrodes 105 driven with the absolute capacitive sensing signal is altered.
An absolute capacitive sensing signal is a periodic or aperiodic signal that varies between two or more voltages. Furthermore, the absolute capacitive sensing signal has a frequency between 100kHz and 1 MHz. In other embodiments, other frequencies may be utilized. Additionally, the absolute capacitive sensing signal may have a square waveform, a sinusoidal waveform, a triangular waveform, a trapezoidal waveform, or a sawtooth waveform, among others. The absolute capacitive sensing signal may have a peak-to-peak amplitude in a range of about 1V to about 10V. However, in other embodiments, the absolute capacitive sensing signal may have a peak-to-peak amplitude greater than about 10V. In various embodiments, driving the sensor electrodes 105 with the absolute capacitive sensing signal includes modulating the sensor electrodes 105. The resulting signals received when performing absolute capacitive sensing may include effect(s) corresponding to one or more absolute capacitive sensing signals and/or to one or more environmental interference sources (e.g., other electromagnetic signals). The absolute capacitive sensing signal may be the same or different from the transcapacitive sensing signal used in transcapacitive sensing.
The sensor circuit 104 operates a first portion of the sensor electrode 105 for absolute capacitive sensing during a first period of time. In one embodiment, the first portion includes less than all of the sensor electrode 105. In such embodiments, the first portion of the sensor electrode 105 is disposed in the plurality of rows 170 and 181. Each row 170-181 includes one or more of the sensor electrodes 105. In addition, each of the rows 170 and 181 includes the same number of sensor electrodes 105. In other embodiments, one or more of the rows 170 and 181 have a different number of sensor electrodes 105 than another one or more of the sensor electrodes 105. The first portion of the sensor electrodes 105 corresponds to one or more sensor electrodes 105. The first portion of the sensor electrodes 105 corresponds to a first subset of the sensor electrodes 105. In one embodiment, the first portion of sensor electrode 105 corresponds to one or more of rows 170 and 181. The first portion of the sensor electrode may correspond to two or more of rows 170 and 181. In other embodiments, the sensor circuit 104 operates a first portion of the sensor electrode 105 for transcapacitive sensing.
The sensor circuit 104 may simultaneously operate two or more of the sensor electrodes 105 for absolute capacitive sensing. For example, the sensor circuit 104 simultaneously operates each sensor electrode 105 in a first portion of the sensor electrodes 105 for absolute capacitive sensing. The sensor circuit 104 can simultaneously operate each sensor electrode 105 of a common row (e.g., row 170 and 181) for absolute capacitive sensing. Further, the sensor circuit 104 can simultaneously operate each sensor electrode 105 of two or more rows (e.g., two or more of rows 170 and 181) for absolute capacitive sensing. In other embodiments, the sensor circuit 104 operates two or more of the sensor electrodes 105 for transcapacitive sensing. For example, the sensor circuitry 104 simultaneously drives a first one or more of the sensor electrodes 105 with the transmitter signal and simultaneously receives the resulting signal from a second one or more of the sensor electrodes 105. The sensor electrodes 105 driven with the transmitter signal and the sensor electrodes 105 operating as receiver electrodes may be part of different or common rows in the rows 170 and 181.
The sensor circuit 104 drives a second portion of the sensor electrode 105 with the guard signal. The second portion of the sensor electrodes 105 corresponds to one or more of the sensor electrodes 105 that are not included in the first portion of the sensor electrodes 105 and/or that are driven for absolute capacitive sensing (or driven for transcapacitive sensing). The second portion may include less than all of the sensor electrode 105. In such embodiments, the second portion corresponds to a second subset of sensor electrodes 105. In one embodiment, the second portion of the sensor electrodes 105 corresponds to two or more of the sensor electrodes 105 that are not included in the first portion of the sensor electrodes 105. The second portion of the sensor electrode 105 corresponds to one or more of the rows 170 and 181, which are not included in the first portion of the sensor electrode 105. In one embodiment, the second portion of the sensor electrode 105 corresponds to two or more of the rows 170 and 181 that are not included in the first portion of the sensor electrode 105. The second portion of the sensor electrodes 105 corresponds to more sensor electrodes than the first portion of the sensor electrodes 105. Alternatively, the second portion of the sensor electrode 105 corresponds to fewer sensor electrodes than the first portion of the sensor electrode 105. In one embodiment, the first and second portions of sensor electrodes 105 correspond to the same number of sensor electrodes.
The sensor circuit simultaneously drives the sensor electrodes of one or more rows (e.g., row 170) 181 of sensor electrodes 105 with the guard signal. Simultaneously driving the sensor electrodes of one or more rows (e.g., row 170-.
A sensor electrode driven with a guard signal may be referred to as a protected sensor electrode. Driving the sensor electrodes with the guard signal mitigates voltage differences between the protected sensor electrodes and sensor electrodes driven in parallel with the absolute capacitive sensing signal. Thus, by driving the guard signal onto the first one or more sensor electrodes while driving the sense signal onto the second one or more sensor electrodes, there is little or no change in the capacitance between the protected sensor electrode(s) and the sensor electrode(s) driven with the absolute capacitive sense signal.
In one embodiment, the guard signal has at least one characteristic selected from the group consisting of amplitude, phase and frequency in common with the absolute capacitive sense signal. In other words, the guard signal and the absolute sense signal may have a common amplitude, a common phase, a common frequency, or any combination thereof. In one embodiment, one of the amplitude, phase and frequency of the guard signal is common to the absolute capacitive sense signal. In another embodiment, the guard signal comprises a common amplitude and phase or frequency with the absolute capacitive sense signal. In one embodiment, the guard signal includes a common phase and amplitude or frequency with the absolute capacitive sense signal. Alternatively, the guard signal comprises a common frequency and amplitude or phase with the absolute capacitive sense signal. In some embodiments, the amplitude of the guard signal is less than or greater than the amplitude of the absolute capacitive sense signal. In embodiments where the amplitude of the guard signal is less than the amplitude of the absolute capacitive sensing signal, partial guard between the sensor electrodes driven with the guard signal and the sensor electrodes driven with the absolute capacitive sensing signal is implemented such that capacitive coupling between the sensor electrodes is at least partially reduced. In embodiments where the magnitude of the guard signal is greater than the magnitude of the absolute capacitive sense signal, over-protection between the sensor electrode driven with the guard signal and the sensor electrode driven with the absolute capacitive sense signal is achieved.
Additionally, the guard signal and the absolute capacitive sense signal may have a common waveform shape. In one embodiment, the guard signal may be the same as the absolute capacitive sense signal.
The sensor circuit 104 drives a third portion of the sensor electrode 105 with the reference signal. The third portion of the sensor electrode 105 is the sensor electrode 105 that is not included in the first portion of the sensor electrode 105 and the second portion of the sensor electrode 105. Further, the third portion may include less than all of the sensor electrode 105. In such embodiments, the third portion corresponds to a third subset of sensor electrodes 105. The sensor circuit 104 drives one or more rows (e.g., row 170 and 181) of sensor electrodes 105 with a reference signal. One or more of the rows 170-181 of the sensor electrode 105 driven with the reference signal include rows 170-181 that are not operated for absolute capacitive sensing or rows 170-181 that are not driven with the guard signal. Driving one or more rows of sensor electrodes 105 (e.g., rows 170-. The reference signal is a constant voltage signal. For example, the reference signal is a Direct Current (DC) signal. In one embodiment, the reference signal is a ground signal of the input device 100.
In one or more embodiments, the sensor circuit 104 electrically floats a third portion of the sensor electrode 105. The sensor circuit 104 electrically floats one or more of the sensor electrodes 105. The electrically floating sensor electrodes are not actively driven by the sensor circuit 104. For example, the sensor circuit 104 may be decoupled from the one or more sensor electrodes 105 to electrically float the one or more sensor electrodes. Further, the sensor circuitry 104 may maintain the sensor electrodes in a high impedance state to electrically float one or more of the sensor electrodes.
The first, second, and third portions of the sensor electrodes 105 may include the same number of sensor electrodes 105 or different numbers. For example, the third portion may include more sensor electrodes than the first portion and/or the second portion of the sensor electrodes 105. Alternatively, the third portion of the sensor electrode 105 corresponds to fewer sensor electrodes than the first portion and/or the second portion of the sensor electrode 105. In one embodiment, the first, second, and third portions of sensor electrodes 105 correspond to the same number of sensor electrodes.
As described above, the sensor circuit 104 receives a resulting signal from the sensor electrode 105 driven with an absolute capacitive sensing signal. The resulting signal is integrated, filtered, and/or demodulated by the sensor circuit 104. The determination module 106 receives the resulting signal from the sensor circuit 104 and processes the resulting signal to determine a change in the capacitive coupling of the sensor electrode 105. The determination module 106 utilizes the change in capacitive coupling of the sensor electrodes 105 to determine positional information of one or more input objects (e.g., input object 140).
In one or more embodiments, the measurement of the change in capacitive coupling determined from the resulting signals received from the sensor electrodes 105 can be utilized by the determination module 106 to form a capacitive image. A resulting signal for detecting a change in capacitive coupling is received during a capacitive frame. The capacitive frame may correspond to one or more capacitive images. The capacitive frame may be referred to as a sensing frame or a capacitive sensing frame. The capacitive frame may correspond to one or more capacitive images. Further, during each capacitive frame, each of the sensor electrodes 105 is operated for capacitive sensing. For example, during one or more capacitive frames, the sensor electrodes 105 are operated for absolute capacitive sensing. Further, during one or more capacitive frames, the sensor electrodes 105 are operated for transcapacitive sensing. In one or more capacitive frames, the sensor electrodes 105 are operated for absolute capacitive sensing and transcapacitive sensing. Multiple capacitive images may be acquired over multiple time periods, and differences between the images used to derive information about input objects 140 in the sensing region of the input device 100. For example, successive capacitive images acquired during successive time periods can be used to track motion(s) of one or more input objects entering, exiting, and within the sensing region.
"position information" as used herein broadly encompasses absolute position, relative position, velocity, acceleration, and other types of spatial information. Exemplary "zero-dimensional" positional information includes near/far or contact/contactless information. Exemplary "one-dimensional" position information includes position along an axis. Exemplary "two-dimensional" positional information includes motion in a plane. Exemplary "three-dimensional" positional information includes instantaneous or average velocity in space. Further examples include other representations of spatial information. Historical data may also be determined and/or stored regarding one or more types of location information, including, for example, historical data that tracks location, motion, or instantaneous speed over time.
In some embodiments, input device 100 is a touch screen interface that overlaps at least a portion of a display device. For example, as illustrated in fig. 2, the input device 100 is shown overlapping the display of the display device 200. The display device 200 includes a display panel 210 communicatively coupled with a display driver 208 and a gate selection circuit 230. The display panel 210 includes display electrodes that are driven to update the sub-pixel electrodes 226 of the display panel 210. The display electrodes include data lines 222, gate lines 224, and/or emission control lines 223, among others. In one embodiment, the display panel 210 is an Organic Light Emitting Diode (OLED) display. In such an embodiment, the display panel 210 includes data lines 222, gate lines 224, and emission control lines 223. In another embodiment, the display panel 210 is a Light Emitting Device (LED). In such an embodiment, the display panel 210 includes the data lines 222 and the gate lines 224, and does not include the emission control lines 223.
Data lines 222 are coupled to display driver 208 and gate lines 224 are coupled to gate selection circuitry 230. Further, an emission control line 223 is coupled to the emission control circuit. Each of the sub-pixel electrodes 226 is coupled to one of the gate lines 224 and one of the data lines 222. Further, in one or more embodiments, each of the sub-pixel electrodes 226 is coupled to an emission control line 223.
The gate select circuit 230 may be configured to drive gate select and gate deselect signals onto the gate lines 224 to select (activate) and deselect (deactivate) the corresponding subpixels for updating. The gate select signal may be referred to as a voltage gate high signal (V)gh) And the gate deselect signal may be referred to as a voltage gate low signal (V)gl). Driving the gate line 224 with a gate selection signal turns on one or more transistors of the sub-pixels 226 coupled to the driven gate line, thereby selecting (e.g., turning on) the corresponding sub-pixels 226 for display updating. Driving the gate line 224 with a gate deselect signal turns off one or more transistors of the subpixels 226 coupled to drive the gate line, thereby deselecting (e.g., turning on) the corresponding subpixels 226 for display updating.The gate select and deselect signals may be voltage signals. The voltage level of the gate selection signal may be higher than that of the gate deselection signal. For example, the gate select signal has a voltage level greater than or equal to the turn-on voltage of one or more transistors of the subpixel 226. In addition, the gate deselect signal has a voltage level less than the turn-on voltage of one or more transistors of the subpixel 226. In one embodiment, the gate select signal has a voltage level of about 15v and the gate select signal has a voltage level of about-5 v. In other embodiments, the gate select signal has a voltage level greater than or less than 15v and/or the gate deselect signal has a voltage level greater than or less than-5 v.
The gate selection circuit 230 may include one or more shift registers and one or more drivers. Further, gate selection circuitry 230 may be communicatively coupled with display driver 208 and receive control signals from display driver 208 to control the selection and deselection of gate lines 224.
The emission control line 223 is driven by the emission control circuit 240 and controls the luminance of the sub-pixel 226. The emission control circuit 240 may include one or more shift registers and one or more drivers. The emission control circuit 240 drives an emission control signal onto the emission control line 223. The emission control signal controls the duty ratio of the sub-pixel 226 coupled to each emission control line 223, thereby controlling the luminance of the sub-pixel 226.
Display driver 208 includes display driver circuitry configured to drive data lines 222 with subpixel data signals to update selected subpixels 226 and update the display of display device 200. For example, the display driver 208 may drive a display update signal onto the data lines 222 during a corresponding display update period. The display update period is a portion of a display frame. In addition, the display driver 208 transmits control signals to the gate selection circuit 230 and/or the emission control circuit 240 to control the selection and deselection of the gate lines 224 and the brightness of the subpixels 226.
The display driver 208 is configured to update the subpixels 226 to update the image displayed on the display panel 210 during a display frame. The display frame may be updated or refreshed about every 16ms, thereby generating a display frame rate of about 60 Hz. In other embodiments, other display frame rates may be employed. For example, the display frame rate may be 90Hz, 120 Hz, 140Hz, or greater.
During a display frame, each gate line 224 may be sequentially selected (e.g., driven with a gate select signal). For example, the gate lines 224 may be sequentially selected by sequentially driving the gate lines 224 with the gate selection signal and the gate deselection signal according to a common order during each display frame. In one embodiment, the gate lines 224 are sequentially selected from a first gate line of the gate lines 224 to a last gate line of the gate lines 224. The first gate line may be near a first side (end) of the display panel 210, and the last gate line may be near a second side (end) of the display panel 210, the first end being opposite to the second end.
The display driver 208, the sensor circuit 104, and the determination module 106 may be part of a common processing system (e.g., processing system 211). Alternatively, the display driver 208 may be part of a first processing system, and the sensor circuitry 104 and determination module 106 may be part of a second processing system. Further, the display driver 208, the sensor circuit 104, and the determination module 106 may be part of a common IC chip. Alternatively, one or more of the display driver 208, the sensor circuit 104, and the determination module 106 may be provided in a first IC chip, and a second one or more of the display driver 208, the sensor circuit 104, and the determination module 106 may be provided on a second IC chip.
In various embodiments, the sensor circuit 104 is configured to drive the sensor electrodes at a capacitive frame rate during the capacitive frame for capacitive sensing. In one embodiment, during each capacitive frame, each sensor electrode 105 is operated for absolute capacitive sensing. Further, each capacitive frame may include a plurality of periods during which different sensor electrodes 105 are operated for absolute capacitive sensing.
The "capacitive frame rate" (the rate at which successive capacitive images are acquired) may be the same as or different from the rate of the "display frame rate" (the rate at which display images are updated, including refreshing the screen to redisplay the same image). In various embodiments, the capacitive frame rate is an integer multiple of the display frame rate. In other embodiments, the capacitive frame rate is a fraction of the display frame rate. In yet further embodiments, the capacitive frame rate may be any fraction or multiple of the display frame rate. Further, the capacitive frame rate may be a rational fraction of the display rate (e.g., 1/2, 2/3, 1, 3/2, 2). In one or more embodiments, the display frame rate may be changed while the capacitive frame rate remains constant. In other embodiments, the display frame rate may remain constant while the capacitive frame rate is increased or decreased. Alternatively, the capacitive frame rate may be asynchronous to the display refresh rate, or the capacitive frame rate may be a non-rational fraction of the display rate to minimize the interfering "beat" between display updating and input sensing.
In one or more embodiments, capacitive sensing (or input sensing) and display updating may occur during at least partially overlapping periods. For example, sensor circuit 104 is configured to operate sensor electrodes 105 for capacitive sensing, while display driver 208 operates gate lines 224 and data lines 222 to update an image displayed by display panel 210. For example, updating the display panel 210 and operating the sensor electrodes 105 for capacitive sensing may be asynchronous with respect to each other. Further, updating the display panel 210 and operating the sensor electrodes 105 for capacitive sensing may or may not be synchronized with each other.
In one or more embodiments, updating the display panel 210 and operating the sensor electrodes 105 for capacitive sensing may occur during non-overlapping periods. For example, updating the display panel 210 may occur during a display update period, and operating the sensor electrodes 105 for capacitive sensing may occur during a non-display update period. The non-display update period may be a blanking period occurring between the last line of a display frame and the first line of a subsequent display frame (e.g., during a vertical blanking period). Each display line corresponds to one or more gate lines 224 and subpixels 226 coupled to the gate lines 224. Further, the non-display update period may occur between display line update periods of two consecutive display lines of a display frame and is at least as long in time as the display line update period. In such embodiments, the non-display update period may be referred to as a long horizontal blanking period or a long h-blanking period, where the blanking period occurs between two display line update periods within a display frame and is at least as long as the display line update period.
FIG. 3 illustrates a partial side view of input device 100 and display device 200 in accordance with one or more embodiments. In the embodiment of fig. 3, the display panel 210 is an Organic Light Emitting Diode (OLED) display panel. However, in other embodiments, other display types (e.g., Liquid Crystal Displays (LCDs), etc.) may be utilized.
As illustrated, the display panel 210 includes a substrate 328, a subpixel electrode 226, an organic material layer 330, a cathode electrode 340, a display layer 350, and an encapsulation layer 360. The cathode electrode 340 may be a sheet of resistive material configured to overlap the subpixel electrode 226. The cathode electrode 340 may be coupled with the display driver 208 and driven by the display driver 208 to supply a low impedance reference voltage. In embodiments where display panel 210 is an LCD panel, a common voltage (Vcom) electrode layer is utilized in place of cathode electrode 340. In addition, the cathode electrode 340 (or Vcom electrode layer) may be referred to as a reference electrode layer.
The substrate 328 may be a flexible substrate. Alternatively, the substrate 328 may be rigid. Display layer 350 may include one or more polarizers and color filter glasses, among others. As illustrated, the sensor electrodes 105 are disposed on the encapsulation layer 360. In embodiments including a lens, the sensor electrodes 105 may be disposed on the lens instead of the encapsulation layer 360. The lens may be disposed over the encapsulation layer 360 or included in place of the encapsulation layer 360.
Traces 150 may be disposed in a layer between sensor electrodes 105 and display panel 210. Alternatively, the traces 150 may be disposed in a layer of the display panel 210 between the substrate 328 and the encapsulation layer 360.
As discussed above, when the sensor electrode 105 is disposed over the display panel 210, the display electrode of the display panel 210 may be capacitively coupled with the sensor electrode 105, thereby introducing interference into the display panel 210 when performing capacitive sensing. This capacitive coupling may be referred to as background capacitance and increases the capacitance of the sensor electrode 105. By spatially separating the sensor electrode 105 driven for capacitive sensing (e.g., driven with an absolute capacitive sensing signal or a transcapacitive sensing signal) from the gate line(s) 224 selected for display updating, interference introduced into the display panel 210 during display updating may be mitigated, thereby mitigating display artifacts within the display panel 210. By driving a portion of the sensor electrodes with the guard signal while driving another portion of the sensor electrodes for capacitive sensing, interference is mitigated. Furthermore, by driving the second portion of the sensor electrode or the second portion of the electrically floating sensor electrode with the reference signal, background capacitance is mitigated. Advantageously, the ease of detection of an input object is increased, while the power for driving the sensor electrodes is reduced.
Fig. 4 is a flow diagram of a method 400 for reducing background capacitance and interference when performing capacitive sensing in accordance with one or more embodiments. The method 400 is described with reference to fig. 2 and 5. At operation 410, the sensor circuit 104 drives a first portion of the sensor electrode 105 with a sensing signal during a first time period. The sense signal may be an absolute capacitive sense signal. In addition, the sensor circuit 104 acquires a corresponding resulting signal from each driven sensor electrode. For example, the sensor circuit 104 drives each sensor electrode of the row 176 with an absolute capacitive sensing signal during a first time period to acquire a corresponding resultant signal from each driven sensor electrode. The first period may correspond to a first portion of a first capacitive frame. Fig. 5 illustrates a portion of a capacitive frame 500 (e.g., a first capacitive frame). As illustrated, capacitive frame 500 includes at least three periods during which capacitive sensing is performed. For example, capacitive frame 500 includes at least a first period, a second period, and a third period. In various embodiments, the capacitive frame 500 may include additional periods of time such that each of the sensor electrodes 105 is operated for absolute capacitive sensing before the capacitive frame is complete. The additional time period may occur before the first time period, after the third time period, and/or between the first, second, and third time periods.
At operation 420, each sensor electrode of the second portion of sensor electrodes is driven with a guard signal during a first period. For example, the sensor circuit 104 drives each sensor electrode of the row 177 with a guard signal during a first period. In this example, the row selected to obtain the result signal (e.g., row 176) is adjacent to the protected row (e.g., row 177). In various embodiments, during the first period, the display electrodes (e.g., the data line 222, the gate line 224, and the emission control line 223) are operated for display updating. For example, in one embodiment, display driver 208 drives data lines 222 and gate select circuit 230 drives gate lines 224 to update subpixel electrodes 226 during a first period.
In one or more embodiments, the sensor circuit 104 that drives the second portion of the sensor electrodes 105 with the guard signal additionally includes driving the sensor electrodes of one or more of the rows 170 and 179 and 181 with the guard signal during the first period. For example, the sensor electrodes of row 175 may be driven with a guard signal during a first time period. In such an embodiment, the row selected to obtain the result signal (e.g., row 176) is between the two rows protected (e.g., rows 174 and 177).
The sensor electrodes protecting the second portion adjacent to the first portion of the sensor electrodes operated for absolute capacitive sensing reduces the effect of display interference generated by operating the display electrodes for display updating. For example, driving the sensor electrodes of row 177 with a guard signal at least partially reduces the effect of interference emitted by display electrodes (e.g., data lines 222, gate lines 224, and/or cathode electrodes 340) driven for display updates on the sensor electrodes of row 176. Reducing the effect of interference emitted by driving the display electrodes for display updating reduces the effect of interference in the resulting signal received with the sensor electrodes operated for absolute capacitive sensing. Therefore, the influence corresponding to the input object 140 constitutes a larger part of the resulting signal, thus increasing the ease of detection of the input object 140.
At operation 430, a third portion of the sensor electrodes 105 are driven or electrically floated with the DC signal during a first period. The third portion of the sensor electrode 105 is adjacent to the second portion of the sensor electrode and not adjacent to the first portion of the sensor electrode. Operation 430 may include driving each sensor electrode of the third row of sensor electrodes or each sensor electrode of the third row of electrically floating sensor electrodes with the reference signal during the first period. For example, in one embodiment, the sensor electrodes of row 178 are driven by sensor circuit 104 with a reference signal during a first period of time. The sensor circuit 104 additionally drives the sensor electrodes of one or more of the rows 170 & 179 & 181 with the reference signal during the first period. The reference signal may be a constant voltage signal. For example, the reference signal may be a DC signal. In another embodiment, at operation 430, the sensor circuit 104 electrically floats the sensor electrodes of the row 178 during a first time period. For example, the sensor circuit 104 may be decoupled from the sensor electrodes of row 178 during the first period such that the sensor electrodes are not actively driven by the sensor circuit 104. Alternatively, the sensor circuit 104 may place the sensor electrodes of row 178 in a high impedance state. In one or more embodiments, the sensor circuit 104 additionally electrically floats the sensor electrodes of one or more of the rows 170, 175, and 179, 181 during the first period. Driving the rows 170-175 and 179-181 of the sensor electrodes 105 with the reference voltage or electrically floating the rows reduces the background capacitance between the sensor electrodes 105 and the display electrodes of the display panel 210.
As illustrated in fig. 5, during a first period, the sensor electrodes 105 of a first portion of the sensor electrodes 105 are driven with an absolute capacitive sensing signal for absolute capacitive sensing, a second portion of the sensor electrodes 105 are driven with a guard signal, and a third portion of the sensor electrodes 105 are driven or electrically floated with a DC voltage. For example, each row 170-181 is operated for absolute capacitive sensing, driven with a guard signal, or driven or electrically floating with a reference signal. The number of rows 170-181 that are operated for absolute capacitive sensing may be greater or less than two. For example, one or more of the rows 170, 174, and 177, 181 may be operated for absolute capacitive sensing. Alternatively, the rows 170 and 181 that are operated for absolute capacitive sensing may be adjacent to each other or spatially separated from each other. Furthermore, the number of rows 170 and 181 of sensor electrodes 105 operated for absolute capacitive sensing is less than the total number of rows. In one embodiment, the number of rows 170 and 181 of sensor electrodes driven with the guard signal during the first period may be greater than or less than two. For example, one or more of the rows 170, 173, and 178, 181 may additionally be driven with a guard signal. Furthermore, the number of rows 170-181 driven with the guard signal is less than the total number of rows 170-181 not operated for absolute capacitive sensing.
The first portion of the sensor electrode 105 and the fifth and/or sixth portion of the sensor electrode 105 comprise one or more sensor electrodes in common. The second portion of the sensor electrode 105 and the sixth portion of the sensor electrode comprise one or more sensor electrodes in common. The third portion of the sensor electrode 105 and the sixth portion of the sensor electrode 105 include one or more sensor electrodes in common.
With further reference to fig. 5, during the second period, a fourth portion of the sensor electrode 105 is driven with an absolute capacitive sensing signal for absolute capacitive sensing, a fifth portion of the sensor electrode 105 is driven with a guard signal, and a sixth portion of the sensor electrode 105 is driven or electrically floated with a DC voltage. For example, one or more of rows 177 and 178 are driven for capacitive sensing, and at least rows 176 and 179 are driven with a guard signal. The remaining rows are driven or electrically floated with a reference voltage. Further, during the third period, the seventh portion of the sensor electrode 105 is driven with an absolute capacitive sensing signal for absolute capacitive sensing, the eighth portion of the sensor electrode 105 is driven with a guard signal, and the ninth portion of the sensor electrode 105 is driven or electrically floated with a DC voltage. For example, during a third period, one or more of rows 179 and 180 are driven for capacitive sensing, and at least rows 178 and 181 are driven with a guard signal. In addition, the remaining rows are driven or electrically floated with a reference voltage.
The fourth portion of the sensor electrode 105 and the eighth and/or ninth portions of the sensor electrode 105 comprise one or more sensor electrodes in common. The fifth portion of the sensor electrode 105 and the ninth portion of the sensor electrode comprise one or more sensor electrodes in common. The sixth portion of the sensor electrode 105 and the ninth portion of the sensor electrode 105 include one or more sensor electrodes in common.
6A, 6B, and 6C illustrate a flow diagram of a method 600 for performing capacitive sensing in accordance with one or more embodiments. The method 600 is described with reference to fig. 1 and 5. Further, operations 610, 612, and 614 of method 600 are similar to operations 410, 420, and 430 of method 400 of FIG. 4. For example, at operation 610, the sensor circuit 104 drives each sensor electrode of the row 176 with an absolute capacitive sensing signal to acquire a resultant signal from each driven sensor electrode during a first period of a first capacitive frame (e.g., capacitive frame 500).
At operation 612, the sensor circuit 104 drives each sensor electrode of the row 177 with a guard signal during a first period. Row 177 is adjacent to row 176.
At operation 614, the sensor circuit 104 drives the sensor electrodes of the row 178 to a reference voltage or to electrical float during a first period. Row 178 is adjacent row 177, and row 177 is between row 176 and row 178.
At operation 616, each sensor electrode of the fourth row of sensor electrodes is driven with a sense signal during a first period. For example, the sensor circuit 104 drives each sensor electrode of the row 175 with an absolute capacitive sensing signal during a first time period to obtain a resulting signal from each driven sensor electrode. The sensor electrodes driving rows 175 and 176 with absolute capacitive sensing signals may overlap at least partially in time. In addition, the sensor electrodes of rows 175 and 176 are driven simultaneously by sensor circuit 104 with an absolute capacitive sensing signal.
At operation 618, each sensor electrode of the fifth row of sensor electrodes is driven with a guard signal during a first period. For example, the sensor circuit 104 drives each sensor electrode of the row 174 with the guard signal during the first period. Further, row 174 is adjacent to row 175.
At operation 620, each sensor electrode of the sixth row of sensor electrodes is driven or electrically floated with a reference signal during a first period. For example, in one embodiment, during a first period, the sensor electrodes of row 173 are driven by sensor circuit 104 with a reference signal. In one or more embodiments, the sensor circuit 104 additionally drives the sensor electrodes of one or more of the rows 170, 172, and 179, 181 with a reference signal. Alternatively, at operation 620, the sensor circuit 104 electrically floats the sensor electrodes of the row 173 during a first time period. In one or more embodiments, the sensor circuit 104 additionally electrically floats the sensor electrodes of one or more of the rows 170, 172, and 179, 181.
At operation 622, each sensor electrode of the second row of sensor electrodes is driven with a sense signal during a second period of the first capacitive frame. For example, the sensor circuit 104 drives each sensor electrode of the row 177 with an absolute capacitive sensing signal during a second period of a first capacitive frame (e.g., capacitive frame 500) to acquire a corresponding resulting signal from each driven sensor electrode. The second time period corresponds to a second portion of the first capacitive frame and may be continuous with the first time period.
At operation 624, the sensor circuit 104 drives each sensor electrode of the row 176 with a guard signal during a second period.
At operation 626, each sensor electrode of the fourth row of sensor electrodes is driven with the reference signal during the second period of time or each sensor electrode of the fourth row of sensors is electrically floated during the second period of time. In one embodiment, the sensor circuit 104 drives the sensor electrodes of row 175 with the reference signal during the second period. Alternatively, at operation 626, the sensor circuit 104 electrically floats the sensor electrodes of the row 175.
Further, during the second period, the sensor circuit 104 drives the sensor electrodes of row 178 with an absolute capacitive sensing signal. In addition, during the second period, the sensor circuit 104 drives the sensor electrodes of the row 180 with the reference signal, or the sensor circuit 104 electrically floats the sensor electrodes of the row 180. The sensor circuit 104 can also drive the sensor electrodes of the rows 170 and 174 and 181 with the reference signal period or electrically float the sensor electrodes of the rows 170 and 174 and 181 during the second period.
At operation 628, each sensor electrode of the seventh row is driven with the sensing signal during the third period of the first capacitive frame. For example, the sensor circuit 104 drives the sensor electrodes of row 179 with an absolute capacitive sensing signal during the third period to acquire a resultant signal from the driven sensor electrodes of row 179. The third time period corresponds to a third portion of the first capacitive frame (e.g., capacitive frame 500) and may be continuous with the second portion. Further, the first, second and third periods do not overlap with each other.
At operation 630, each sensor electrode of the third row is driven with a guard signal during a third period. For example, the sensor circuit 104 drives each sensor electrode of the row 178 with the guard signal during the third period.
At operation 632, each sensor electrode of the second row is driven with the reference signal during the third period or is electrically floated during the third period. For example, in one embodiment, each sensor electrode of row 177 is driven with a reference signal, or each electrode of row 177 is electrically floated by sensor circuit 104 during a third period.
In addition, the sensor circuit 104 drives the sensor electrodes of the row 180 with the absolute capacitive sensing signal during the third period. In addition, during the third period, the sensor circuit 104 drives the sensor electrodes of the row 181 with the guard signal. Further, during the third period, the sensor circuit 104 drives each sensor electrode of the rows 170 and 177 with the reference signal. Alternatively, during the third period, the sensor circuit 104 electrically floats each sensor electrode of the rows 170 and 177.
Fig. 7 illustrates a period of a capacitive frame 700 in accordance with one or more embodiments. As illustrated in fig. 7, during a first period of time, the sensor circuit 104 operates column 170 and 172 for absolute capacitive sensing. In addition, during the first period, sensor circuit 104 drives a guard signal onto column 173-.
During the second period of FIG. 7, the sensor circuit 104 operates a subset of the rows 170 & 181 for absolute capacitive sensing, drives the subset of the rows 170 & 181 with a guard signal, and drives the subset of the rows 170 & 181 with a reference voltage or electrically floats the subset of the rows 170 & 181 during the period of the capacitive frame 700. For example, during a first period of the capacitive frame 700, the sensor circuit 104 drives the sensor electrodes 105 of rows 170 and 172 for absolute capacitive sensing and drives the guard signal onto the sensor electrodes 105 of rows 173 and 174. In addition, during the first period, the sensor circuit 104 drives the reference signal or the sensor electrode 105 of electrically floating column 175 and 181.
During the second period of the capacitive frame 700, the sensor circuit 104 drives the sensor electrodes 105 of rows 173 & 175 for absolute capacitive sensing and drives the guard signals onto the sensor electrodes 105 of rows 171 & 176 & 177. Further, during the second period, the sensor circuit 104 drives the reference signal or electrically floats the sensor electrodes 105 of the rows 170 and 178 and 181.
During the third time period of FIG. 7, the sensor circuit 104 operates columns 176-178 for absolute capacitive sensing and drives the guard signals onto columns 174-175 and 179-180. Further, during the third period, the sensor circuit 104 drives the reference signal or electrically floating the rows 170 and 178 and 181.
During the fourth period of time of FIG. 7, the sensor circuit 104 operates rows 179 & 181 for absolute capacitive sensing and drives the guard signal onto rows 177 & 181. Further, during the third period, the sensor circuit 104 drives the reference signal or electrically floating row 176.
In other embodiments, the number of rows 170 and 181 driven for absolute capacitive sensing during each period of the capacitive frame may be different than the rows or numbers illustrated in FIG. 7. For example, while fig. 7 illustrates that a subset of three rows are driven for absolute capacitive sensing during each period, in other embodiments, the subset may include more than three rows. Further, in the first one or more periods of the capacitive frame, the number of rows of the subset may be different from the number of rows of the subset in the second one or more periods of the capacitive frame. Further, the number of rows in the subset may vary from capacitive frame to capacitive frame.
In various embodiments, the ordering of the time periods may be different from the ordering illustrated in fig. 7. For example, in one embodiment, the third period of the capacitive frame 700 may occur before the first period of the capacitive frame 700. In other embodiments, other orderings of time periods are possible. Further, each of the subsets of rows 170 and 181 may comprise a contiguous grouping of rows as illustrated in fig. 7. In other embodiments, at least two of the rows 170 and 181 included in each subset are spatially separated from each other.
Fig. 8 is a simplified illustration of a portion of the display panel 210 and the sensor electrodes 105. The sensor electrodes 105 are illustrated in dashed lines so that the gate lines 224 are visible. The data lines 222, the subpixels 226, and the emission control lines 223 have been omitted for the sake of simplicity. Furthermore, although fig. 8 illustrates 36 gate lines (e.g., gate line 224)1-22436) But in other embodiments more than 36 gate lines may be included. For example, the number of gate lines 224 may be thousands. Further, as illustrated in the embodiment of fig. 8, each sensor electrode 105 overlaps with 3 gate lines. However, in other embodiments, each sensor electrode 105 may overlap a different number of gate lines.
Fig. 9 is a flow diagram illustrating a method 500.0 for reducing display artifacts caused by interference introduced when performing capacitive sensing in accordance with one or more embodiments. Method 500.0 is described with reference to fig. 2, 8, 9, and 10. At operation 510, the sensor circuit 104 drives a first portion of the sensor electrode 105 with a sensing signal during a first time period. The sense signal may be an absolute capacitive sense signal. Further, the sensor circuit 104 acquires a corresponding resultant signal from each driven sensor electrode. For example, the sensor circuit 104 drives each sensor electrode of the row 175 with an absolute capacitive sensing signal during a first time period to obtain a corresponding resultant signal from each driven sensor electrode. The first period corresponds to a first portion of the first capacitive frame. Further, the first period corresponds to a first portion of the first display frame. Fig. 10 illustrates a portion of a capacitive frame 600.0 (e.g., a first capacitive frame). The capacitive frame 600.0 overlaps at least a portion of the display frame. As illustrated, capacitive frame 600.0 includes at least three periods during which capacitive sensing is performed. For example, capacitive frame 600.0 includes at least a first time period, a second time period, and a third time period. In various embodiments, capacitive frame 600.0 includes additional time periods such that each of sensor electrodes 105 is operated for absolute capacitive sensing prior to completion of the capacitive frame. The additional time period may occur before the first time period, after the third time period, and/or between the first, second, and third time periods.
At operation 520, each sensor electrode of the second portion of sensor electrodes is driven with a guard signal during a first period. For example, the sensor circuit 104 drives each sensor electrode of the row 173 with a guard signal during a first period. Alternatively, the sensor electrodes of row 173 are driven with a reference voltage during the first period.
At operation 530, a third portion of the sensor electrodes 105 is driven with a reference signal (e.g., a DC signal) during a first period. The second portion of the sensor electrode 105 is disposed between the first portion and the third portion of the sensor electrode 105. Operation 530 includes driving each sensor electrode in the third row of sensor electrodes with the reference signal during the first period. For example, in one embodiment, the sensor electrodes of row 170 are driven by sensor circuit 104 with a reference signal during a first period of time. The sensor electrodes (e.g., third portion) of row 170 and gate line 224 selected for display updating during a first time period1And (4) overlapping. Coupled to the gate line 224 during a first period1Is mapped toThe data lines 222 are selected and driven for display updating during a first period. Driving the sensor electrodes 105 of a row 170 with a reference signal during a first period mitigates against selecting a gate line 2241And disturbances coupled into the display panel 210 when driving the corresponding sub-pixel 226 for display updating.
During a first period, the sensor electrodes 105 of the row 175 (e.g., a first portion of the sensor electrodes 105) are driven with an absolute capacitive sensing signal; driving the sensor electrodes 105 of the row 173 (e.g., a second portion of the sensor electrodes 105) with a guard signal; and the sensor electrodes 105 of the row 170 (e.g., the third portion of the sensor electrodes 105) are driven with reference signals that at least partially overlap one another. In other embodiments, driving the sensor electrodes 105 of row 175 (e.g., a first portion of the sensor electrodes 105) with the absolute capacitive sensing signal, driving the sensor electrodes 105 of row 173 (e.g., a second portion of the sensor electrodes 105) with the guard signal, and driving the sensor electrodes 105 of row 170 (e.g., a third portion of the sensor electrodes 105) with the reference signal occur simultaneously with one another during the first time period.
The sensor circuit 104 additionally drives the sensor electrodes of rows 174 and 176 with a guard signal during the first period. Rows 174 and 176 are adjacent row 175 (e.g., a first portion of sensor electrodes 105). For example, row 174 is positioned on a first side of row 175 and row 176 is positioned on a second side of row 175. In addition, during the first period, the sensor electrodes of rows 171 & 177 & 181 are driven with either the guard signal or the reference signal.
As described above, fig. 10 illustrates a capacitive frame 600.0 that includes at least three periods (a first period, a second period, and a third period). However, in other embodiments, capacitive frame 600.0 may include more than three periods. For example, the additional period may occur after the third period, before the first period, between the first period and the second period, and/or between the second period and the third period. During each period, driving the sensor electrodes 105 of one or more (e.g., one or more portions) of the rows 170 and 181 with a sense signal (e.g., an absolute capacitive sense signal or a transcapacitive sense signal); driving the sensor electrodes 105 of one or more of the rows 170-181 with a guard signal or a reference voltage; driving the sensor electrodes 105 of one or more of the columns 170-181 with a reference voltage; and driving the sensor electrodes 105 of one or more of the rows 170-181 with a guard signal. Further, during each period (e.g., the first period, the second period, and the third period), the sensor electrodes 105 of the rows 170 and 181 adjacent to the sensor electrode 105 of the row driven with the sensing signal are driven with the guard signal.
As illustrated by fig. 10, during a first period, the sensor electrodes 105 of row 170 are driven with a reference voltage, the sensor electrodes 105 of row 175 are driven with a sense signal, and the sensor electrodes 105 of rows 174 and 176 are driven with a guard signal. In addition, the sensor electrodes 105 of rows 171-173 and the sensor electrodes 105 of rows 177-181 are driven with a guard signal or a reference voltage. Alternatively, the sensor electrodes 105 of one or more of the rows 171- & 177- & 181 are electrically floating such that the sensor electrodes 105 are not actively driven.
The display electrodes (e.g., data lines 222, gate lines 224) of the display panel 210 are driven to update the display panel 210. As disclosed above, the capacitive frame 600.0 overlaps at least a portion of the display frame. In one embodiment, the length of the capacitive frame 600.0 and the length of the display frame are the same. Alternatively, the length of the capacitive frame 600.0 is less than the length of the display frame. For example, capacitive frame 600.0 occurs during the display frame and is completed before the end of the display frame.
During the first period, the gate line 224 is driven by the gate selection signal1For updating the display panel 210. In addition, referring to FIG. 8, the sensor electrodes 105 and gate lines 224 of the row 1701Overlap (e.g., disposed at gate line 224)1Above). The varying voltage of the sense or guard signals driven on the sensor electrodes 105 introduces interference into the display electrodes (e.g., gate lines 224, data lines 222, and/or subpixels 226). For example, sensor electrodes 105 driven with a sense signal or a guard signal may adversely affect the utilization of a display via data lines 222The voltage of the voltage-driven selected subpixel 226 is updated. Accordingly, one or more of the subpixels 226 may be driven to an incorrect voltage, resulting in color and/or brightness artifacts (e.g., display artifacts) within the display panel 210. However, driving the sensor electrodes 105 of the rows 170 with the reference voltage may reduce interference introduced into the display panel 210, thereby mitigating display artifacts. For example, driving (or holding) the sensor electrodes 105 disposed over the gate lines 224 and the corresponding subpixels 226 selected for updating with the reference voltages mitigates interference introduced into the display panel 210, thereby beneficially mitigating display artifacts.
With further reference to fig. 10, during a second period of the capacitive frame 600.0, the sensor electrodes 105 of row 176 (e.g., a fourth portion of the sensor electrodes 105) are driven with the sense signal for absolute capacitive sensing. Further, the sensor electrodes 105 of rows 175 and 177 are driven with the guard signal during the second period. The sensor electrodes 105 of row 173 are driven with a reference signal. The sensor electrodes 105 of the rows 170-172, 174, and/or 178-181 are driven with a guard signal or reference voltage.
The second period of time is subsequent to the first period of time. Further, during the second period, the gate line 224 is selected7For display updating. The sensor electrodes 105 of row 173 are arranged at the gate line 2247Above (e.g., with gate line 224)7Overlap) and driving the sensor electrodes 105 of the rows 173 with the reference signal mitigates interference introduced into the display panel 210 during updating, thereby beneficially reducing display artifacts.
During a third period of the capacitive frame 600.0, the sensor electrodes 105 (e.g., a second portion of the sensor electrodes 105) of row 173 are driven with a sense signal for absolute capacitive sensing. Further, the sensor electrodes 105 of rows 172 and 174 are driven with the guard signal during the second period. The sensor electrodes 105 of row 175 are driven with a reference signal. The sensor electrodes 105 of rows 170-171 and/or rows 176-181 are driven with a guard signal or reference voltage.
The third period of time is after the second period of time. Further, during the third period, the gate line 224 is selected16For displayingAnd (4) updating. The sensor electrodes 105 of row 175 are disposed on gate line 22416Above (e.g., with gate line 224)16Overlap) and driving the sensor electrodes 105 of the rows 175 with the reference signal mitigates interference introduced into the display panel 210 during the update, thereby beneficially reducing display artifacts.
As described above, the capacitive frame 600.0 at least partially overlaps the first display frame. During a first display frame, the gate lines 224 may be selected according to a first order. For example, during a first display frame, gate line 224 is from a first gate line of gate lines 224 (e.g., gate line 224)1) Last gate line to gate line 224 (e.g., gate line 224)36) Are selected continuously. However, in other embodiments, other orders may be utilized. For example, gate line 224 is selected first36And finally select gate line 2241. In other embodiments, the first gate line 224 and the selected gate line 224 may be any gate line as long as each gate line 224 is selected during a display frame. The order for selecting the gate lines 224 may be predetermined. For example, the order for selecting the gate lines 224 may be determined during design and/or manufacturing of the display panel 210. Further, the order for selecting the gate lines 224 may be stored, for example, within the display driver 208.
The order for driving the sensor electrodes 105 of rows 170 and 181 with sensing signals (e.g., operating for capacitive sensing) may be different than the order for selecting the gate lines 224 for display updating. For example, the order in which the sensor electrodes 105 of rows 170-181 are driven to sense signals may be determined to ensure that at any given time, the sensor electrodes 105 driven with the sensing signals are not disposed over (e.g., do not overlap) the gate lines 224 selected for display updating. In one embodiment, the order used to select the sensor electrodes 105 is non-sequential. For example, the order for selecting the gate lines 224 is continuous with reference to the first and second sides of the input device (e.g., input device 100), while the order for driving the rows 170 and 181 of the sensor electrodes 105 with the sensing signal is non-continuous with reference to the first and second sides of the input device.
The order of rows 170 and 181 for sensor electrodes 105 may be determined based on the order for driving gate lines 224. For example, the order of the rows 170 and 181 for the sensor electrodes 105 may be determined such that the rows of sensor electrodes 105 driven with the sensing signals do not overlap the gate lines 224 selected for display updating.
Each of the rows 170 & 181 of the sensor electrodes 105 that are not driven with the sense signal during the first, second, and third periods may be driven during the other periods of the capacitive frame 600.0 such that each row 170 & 181 is driven during one of the periods. Further, during each period of the capacitive frame 600.0, the sensor electrodes 105 that overlap the gate lines 224 selected for updating the display panel 210 may be driven with a reference voltage.
FIG. 11 illustrates row 770-777 and gate line 224. Column 770-777 is configured similar to column 170-181 of fig. 2. For example, each of rows 770-777 includes one or more sensor electrodes 105 similar to rows 170-181 of FIG. 2. Each of the rows 770-777 may be referred to as a portion of the sensor electrode 105.
As shown in FIG. 11, row 770-777 overlaps gate line 224. For example, row 770 overlaps gate line 224a, row 771 overlaps gate line 224b, row 772 overlaps gate line 224c, and so on.
Fig. 12A-12B illustrate an exemplary capacitive frame 800 having eight periods. In other embodiments, the capacitive frame 800 may include more or less than eight time periods. The number of periods of the capacitive frame 800 may correspond to the number of rows of sensor electrodes 105. Fig. 12A-12B are described below with respect to fig. 2 and 11.
During each period (e.g., first-eighth period) of the capacitive frame 800, the sensor electrode of a first one of the rows 770-777 is driven with a sense signal and the sensor electrodes of one or more rows adjacent to the first one or more rows are driven with a guard signal. Further, during each period of the capacitive frame 800, the sensor electrodes of the second one or more of the rows 770-777 are driven with a guard signal or a reference signal, and the sensor electrodes of the third one or more of the rows 770-777 are driven with a reference signal. The sensor electrodes of the third one or more rows 770-777 overlap the gate line 224 selected for display updating. The sensor electrodes of row 770-777 driven with the sense, guard, and reference signals may differ by period. Further, the corresponding rows 770-777 driven with the sensing signal are non-consecutive between at least two consecutive periods. For example, as will be described in more detail below, during the sixth period, the sensor electrodes of row 777 are driven with the sense signal, and during the seventh period, the sensor electrodes of row 770 are driven with the sense signal. Further, at least between sequential periods, the corresponding rows 770-777 driven with the reference signal are sequential. For example, from the first period to the eighth period, the row 770-777 is sequentially driven with the reference signal.
During a first period of the capacitive frame (e.g., sense frame) 800, the sensor circuit 104 drives the sensor electrodes 105 of row 770 with the reference signal and drives the sensor electrodes 105 of row 774- & 777 with the guard or reference signal. Further, during the first period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 771 and 773 with the guard signal and drives the sensor electrodes 105 of row 772 with the sense signal. In addition, during the first period of the capacitive frame 800 and during the first display frame, the gate line 224a is selected for updating the display panel 210. The gate lines 224a are sequentially selected for updating the display panel 210 during a first portion of the capacitive frame 800.
During the second period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 771 with the reference signal and drives the sensor electrodes 105 of rows 770 and 775- "777 with the guard or reference signal. Further, during the second period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of the rows 772 and 774 with the guard signal and drives the sensor electrodes 105 of the row 773 with the sense signal. In addition, during the second period of the capacitive frame 800 and during the first display frame, the gate line 224b is selected for updating the display panel 210. The gate lines 224b are sequentially selected for updating the display panel 210 during a second portion of the capacitive frame 800.
During the third period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 772 with the reference signal and drives the sensor electrodes 105 of rows 770-771 and 776-777 with the guard or reference signal. Further, during the third period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of the rows 773 and 775 with the guard signals and drives the sensor electrodes 105 of the row 774 with the sense signals. In addition, during the third period of the capacitive frame 800 and during the first display frame, the gate line 224c is selected for updating the display panel 210. The gate lines 224c are sequentially selected for updating the display panel 210 during a third portion of the capacitive frame 800.
During the fourth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 773 with the reference signal and drives the sensor electrodes 105 of rows 770-773 and 777 with the guard or reference signal. Further, during a fourth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of the rows 774 and 776 with the guard signal and drives the sensor electrodes 105 of the row 775 with the sense signal. In addition, during the fourth period of the capacitive frame 800 and during the first display frame, the gate line 224d is selected for updating the display panel 210. The gate lines 224d are sequentially selected for updating the display panel 210 during the fourth portion of the capacitive frame 800.
During the fifth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 774 with the reference signal and drives the sensor electrodes 105 of row 770-773 with the guard or reference signal. Further, during a fifth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of the rows 775 and 777 with the guard signals and drives the sensor electrodes 105 of the row 776 with the sense signals. In addition, during the fifth period of the capacitive frame 800 and during the first display frame, the gate line 224e is selected for updating the display panel 210. The gate lines 224e are sequentially selected for updating the display panel 210 during the fifth portion of the capacitive frame 800.
During the sixth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 775 with the reference signal and drives the sensor electrodes 105 of rows 770 and 774 with the guard or reference signal. Further, during the sixth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 776 with the guard signal and drives the sensor electrodes 105 of row 777 with the sense signal. In addition, during the sixth period of the capacitive frame 800 and during the first display frame, the gate line 224f is selected for updating the display panel 210. The gate lines 224f are sequentially selected for updating the display panel 210 during the sixth portion of the capacitive frame 800.
During the seventh period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 776 with the reference signal and drives the sensor electrodes 105 of rows 772-. Further, during the seventh period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 771 with the guard signal and drives the sensor electrodes 105 of row 770 with the sense signal. In addition, during the seventh period of the capacitive frame 800 and during the first display frame, the gate line 224g is selected to update the display panel 210. The gate lines 224g are sequentially selected for updating the display panel 210 during the seventh portion of the capacitive frame 800.
During the eighth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of row 777 with the reference signal and drives the sensor electrodes 105 of row 773-776 with the guard or reference signal. Further, during an eighth period of the capacitive frame 800, the sensor circuit 104 drives the sensor electrodes 105 of rows 770 and 772 with the guard signal and drives the sensor electrodes 105 of row 771 with the sense signal. In addition, during the eighth period of the capacitive frame 800 and during the first display frame, the gate line 224h is selected to update the display panel 210. The gate lines 224h are sequentially selected for updating the display panel 210 during the eighth portion of the capacitive frame 800.
In the embodiment of fig. 12A and 12B, the capacitive frame rate and the display frame rate are the same. Thus, during the capacitive frame 800 and the corresponding display frame, all sensor electrodes are operated for input sensing (e.g., driven with a sensing signal) and the display panel 210 is updated. In other embodiments, the capacitive frame rate may be greater than the display frame rate. For example, at least a portion of each of the capacitive frames 910 and 920 occurs during a common display frame as will be described with respect to fig. 13a1, 13a2, 13B1, and 13B 2. The embodiments of fig. 13a1, 13a2, 13B1, and 13B2 are described with respect to fig. 2 and 7.
As described with respect to capacitive frame 800 of fig. 12A and 12B, during each period (e.g., first-eighth period) of capacitive frame 910 or 920, the sensor electrode of the first one of rows 770 and 777 is driven with a sense signal and the sensor electrodes of one or more rows adjacent to the first one or more rows are driven with a guard signal. Further, during each period of the capacitive frame 910 or 920, the sensor electrodes of the second one or more of the rows 770 and 777 are driven with a guard signal or a reference signal, and the sensor electrodes of the third one or more of the rows 770 and 777 are driven with a reference signal. The sensor electrodes of the third one or more rows 770-777 overlap the gate line 224 selected for display updating. As described above with respect to fig. 12A and 12B, the sensor electrodes of row 770-777 driven with the sense signal and the guard signal differ by period. Further, the corresponding rows 770-777 driven with the sensing signal are non-consecutive between at least two consecutive periods. For example, as will be described in more detail below, during the sixth period, row 777 is driven with a sense signal, and during the seventh period, row 770 is driven with a sense signal. Capacitive frames 910 and/or 920 differ from capacitive frame 800 in that the same row of sensor electrodes is driven with a reference signal during at least two consecutive periods of capacitive frames 910 and 920. For example, during the first and second periods of the capacitive frame 910, the sensor electrodes of row 771 are driven with the reference signal. Furthermore, between two other consecutive periods, consecutive rows of sensor electrodes are driven with the reference signal. For example, during the second period of the capacitive frame 910, the sensor electrodes of row 771 are driven with the reference signal, and during the third period of the capacitive frame 910, the sensor electrodes of row 772 are driven with the reference signal.
During a first period of the capacitive frame (e.g., sense frame) 910, the sensor circuit 104 drives the sensor electrodes 105 of row 771 with the reference signal and drives the sensor electrodes 105 of rows 770 and 775 and 777 with the guard or reference signal. Further, during the first period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of the rows 772 and 774 with the guard signal and drives the sensor electrodes 105 of the row 773 with the sense signal. In addition, during a first period of the capacitive frame 910 and during a first display frame, a first one or more of the gate lines 224b are sequentially selected for updating the display panel 210.
During the second period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrode 105 of row 771 with the reference signal and drives the sensor electrode 105 of rows 770, 772, and 776-777 with the guard or reference signal. Further, during a second period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of the rows 773 and 775 with the guard signals and drives the sensor electrodes 105 of the row 774 with the sense signals. In addition, during the second period of the capacitive frame 910 and during the first display frame, the second one or more gate lines 224b are sequentially selected for updating the display panel 210.
During the third period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 772 with the reference signal and drives the sensor electrodes 105 of rows 770-771, 773, and 777 with the guard or reference signal. Further, during a third period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of rows 774 and 776 with the guard signal and drives the sensor electrodes 105 of row 775 with the sense signal. In addition, during the third period of the capacitive frame 910 and during the first display frame, the first one or more of the gate lines 224c are sequentially selected for updating the display panel 210.
During the fourth time period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 772 with the reference signal and drives the sensor electrodes 105 of rows 770-771 and 773-774 with the guard or reference signals. Further, during a fourth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of the rows 775 and 777 with the guard signals and drives the sensor electrodes 105 of the row 776 with the sense signals. In addition, during a fourth period of the capacitive frame 910 and during the first display frame, a second one or more of the gate lines 224c are sequentially selected for updating the display panel 210.
During the fifth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrode 105 of row 773 with the reference signal and drives the sensor electrode 105 of rows 770 and 772 and 774 and 775 with the guard or reference signal. Further, during a fifth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 776 with the guard signal and drives the sensor electrodes 105 of row 777 with the sense signal. In addition, during a fifth period of the capacitive frame 910 and during the first display frame, a first one or more of the gate lines 224d are sequentially selected for updating the display panel 210.
During the sixth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 773 with the reference signal and drives the sensor electrodes 105 of rows 772 and 774- & 777 with the guard or reference signal. Further, during the sixth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 771 with the guard signal and drives the sensor electrodes 105 of row 770 with the sense signal. In addition, during a sixth period of the capacitive frame 910 and during the first display frame, a second one or more of the gate lines 224d are sequentially selected for updating the display panel 210.
During the seventh period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 774 with the reference signal and drives the sensor electrodes 105 of rows 773 and 775- "777 with the guard or reference signals. Further, during a seventh period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of rows 770 and 772 with the guard signal and drives the sensor electrodes 105 of row 771 with the sense signal. In addition, during a seventh period of the capacitive frame 910 and during the first display frame, a first one or more of the gate lines 224e are sequentially selected for updating the display panel 210.
During an eighth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 774 with the reference signal and drives the sensor electrodes 105 of rows 770 and 775- "777 with the guard or reference signal. Further, during an eighth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrodes 105 of row 771 and 773 with the guard signal and drives the sensor electrodes 105 of row 772 with the sense signal. In addition, during an eighth period of the capacitive frame 910 and during the first display frame, a second one or more of the gate lines 224e are sequentially selected for updating the display panel 210.
The capacitive frame (e.g., sensing frame) 920 begins after the capacitive frame 910 is completed. Further, at least a portion of capacitive frame 920 overlaps the same display frame that is overlapped by capacitive frame 910. As will be described in greater detail below, the first through sixth periods of the capacitive frame 920 overlap with the first display frame (e.g., occur during the first display frame), and the seventh and eighth periods of the capacitive frame 920 overlap with the second display frame (e.g., occur during the second display frame). The second display frame is subsequent to the first display frame.
During a first period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 775 with the reference signal and drives the sensor electrodes 105 of rows 770 and 774 with the guard or reference signal. Further, during the first period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 776 with the guard signal and drives the sensor electrodes 105 of row 777 with the sense signal. In addition, during a first period of the capacitive frame 920 and during a first display frame, a first one or more of the gate lines 224f are sequentially selected for updating the display panel 210.
During the second period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 775 with the reference signal and drives the sensor electrodes 105 of rows 772-. Further, during a second period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 771 with the guard signal and drives the sensor electrodes 105 of row 770 with the sense signal. In addition, during the second period of the capacitive frame 920 and during the first display frame, the second one or more gate lines 224f are sequentially selected for updating the display panel 210.
During the third period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 776 with the reference signal and drives the sensor electrodes 105 of rows 773 and 775 and 777 with the guard or reference signal. Further, during a third period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of rows 770 and 772 with the guard signal and drives the sensor electrodes 105 of row 771 with the sense signal. In addition, during the third period of the capacitive frame 920 and during the second display frame, the first one or more of the gate lines 224g are sequentially selected for updating the display panel 210.
During the fourth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 776 with the reference signal and drives the sensor electrodes 105 of rows 770, 774-. Further, during a fourth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of rows 771 and 773 with the guard signal and drives the sensor electrodes 105 of row 772 with the sense signal. In addition, during a fourth period of the capacitive frame 920 and during the first display frame, a second one or more of the gate lines 224g are sequentially selected for updating the display panel 210.
During the fifth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrode 105 of row 777 with the reference signal and drives the sensor electrodes 105 of rows 770-772 and 775-776 with the guard or reference signal. Further, during a fifth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of rows 772 and 774 with the guard signal and drives the sensor electrodes 105 of row 773 with the sense signal. In addition, during a fifth period of the capacitive frame 920 and during the first display frame, a first one or more of the gate lines 224h are sequentially selected for updating the display panel 210.
During the sixth period of the capacitive frame 910, the sensor circuit 104 drives the sensor electrode 105 of row 777 with the reference signal and drives the sensor electrode 105 of rows 770-772 and 776 with the guard or reference signal. Further, during a sixth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of the rows 773 and 775 with the guard signals and drives the sensor electrodes 105 of the row 774 with the sense signals. In addition, during the sixth period of the capacitive frame 920 and during the first display frame, the second one or more of the gate lines 224h are sequentially selected for updating the display panel 210.
During the seventh period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 770 with the reference signal and drives the sensor electrodes 105 of rows 771-. Further, during the seventh period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of rows 774 and 776 with the guard signal and drives the sensor electrodes 105 of row 775 with the sense signal. In addition, during a seventh period of the capacitive frame 920 and during the second display frame, the first one or more of the gate lines 224a are sequentially selected for updating the display panel 210. The second display frame is subsequent to the first display frame.
During the eighth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of row 770 with the reference signal and drives the sensor electrodes 105 of row 771-774 with the guard or reference signal. Further, during an eighth period of the capacitive frame 920, the sensor circuit 104 drives the sensor electrodes 105 of rows 775 and 777 with the guard signals and drives the sensor electrodes 105 of row 776 with the sense signals. In addition, during an eighth period of the capacitive frame 910 and during a second display frame, a second one or more of the gate lines 224a are sequentially selected for updating the display panel 210.
In the embodiments of FIGS. 13A1, 13A2, 13B1, and 13B2, the order for driving row 770-777 with sense signals differs between capacitive frames 910 and 920. Further, the order for driving row 770-777 with the reference signal and/or the guard signal differs between capacitive frames 910 and 920. As illustrated in fig. 13a1, 13a2, 13B1, and 13B2, the sequence for driving row 770-777 is non-consecutive.
While during each period of the capacitive frames 800, 910, and 920, one row of the sensor electrode 105 is driven with the reference signal (e.g., 770-. Two or more rows of sensor electrodes 105 are sequentially driven with a reference signal during a common period of a capacitive frame (e.g., capacitive frames 800, 910, and 920). Such an embodiment may be utilized in periods of capacitive frames in which overlapping gate lines 224 of two different rows of sensor electrodes 105 are selected for updating display panel 210. For example, during a period in which one or more of the gate lines 224a and 224b are selected to update the display panel 210, the sensor electrodes 105 of the rows 770 and 771 are driven with a reference signal. Further, while in the embodiments of fig. 13a1, 13a2, 13B1, and 13B2, two capacitive frames occur during a common display frame (e.g., overlap), in other embodiments, more than two capacitive frames may occur during a common display frame. As the number of capacitive frames occurring during a display frame increases, the capacitive frame rate increases compared to the display frame. Further, as long as the row driven with the reference signal overlaps the gate line 224 selected for updating, the rows 770-777 may be driven in a different order as depicted in fig. 8 and 9.
The capacitive frames 910 and 920 may be used as corresponding capacitive frame types and are repeated when updating the display panel 210. For example, each of the capacitive frames 910 and 920 may occur multiple times as the display panel 210 is updated.
Fig. 14 is an example timing diagram illustrating an embodiment in which the capacitive frame rate (e.g., the sensing frame rate or the capacitive sensing frame rate) is higher than the display frame rate. For example, capacitive frames 910 and 920 occur during display frame 1020. Further, fig. 14 illustrates multiple instances of capacitive frame 920. As illustrated, an instance of capacitive frame 920 occurs during display frames 1020 and 1022. In such instances, capacitive frame 920 may be referred to as cross-display frames 1020 and 1022. During each display frame 1020 and 1022, the gate lines (e.g., gate lines 224 of FIG. 2) are driven in an order from gate line 1 to gate line N, where N is greater than 1.
The display control signal 1010 is used to initiate an update of the display frame. The display control signal 1010 may be a vertical synchronization (or Vsync) signal. With additional reference to FIG. 2, the display control signal 1010 is utilized by the display driver 208 to initiate an update of the display panel 210. A display frame is started (e.g., initiated) based on the Vsync signal. For example, in response to a rising or falling edge of display control signal 1010, a control signal is transmitted from display driver 208 to gate selection circuit 230 to initiate selection of gate line 224. In addition, the display driver 208 initiates driving of the display update signal onto the data line 222 based on the rising or falling edge of the display control signal 1010. The display control signal 1010 is communicated from the display driver 208 to the sensor circuit 104 to initiate (e.g., initiate) input sensing (e.g., drive sensing signals) with the sensor electrodes 105 during a capacitive frame. The delay 1030 is inserted into the beginning of the capacitive frame 910 from the rising or falling edge of the display control signal 1010. Delay 1030 is used to align the timing of capacitive frames 910 and 920 with the selection of gate line 224 for display frames 1020 and 1022. Further, during delay 1030, sensor circuit 104 is ready to drive sensor electrode 105 with a sense signal. Delaying the start of capacitive frame 910 by delay 1030 with reference to the timing of selecting a gate line (e.g., gate line 224 of fig. 2) for display updating advantageously improves the timing of driving capacitive frames 910 and 920 of sensor electrode 105, thereby mitigating display artifacts. Moreover, in one or more embodiments, delaying the start of capacitive frame 910 by delay 1030 allows capacitive frame 920 to overlap with multiple display frames (e.g., display frames 1020 and 1022), thereby further mitigating interference generated by driving sensor electrodes 105 for capacitive sensing.
Although in the embodiment of fig. 14, capacitive frame 920 spans multiple display frames, e.g., display frames 1020 and 1022, in other embodiments both capacitive frames 910 and 920 may begin and end within a single display frame (e.g., display frame 1020). Further, capacitive frame 920 may overlap portions of displays 1020 and 1022 that are different from the portions illustrated in fig. 14.
Thus, the embodiments and examples set forth herein are presented in order to best explain the present technology and its practical application and to thereby enable those skilled in the art to make and use the disclosure. However, those skilled in the art will recognize that the foregoing description and examples have been presented for the purpose of illustration and example only. The description as set forth is not intended to be exhaustive or to limit the disclosure to the precise form disclosed.
In view of the foregoing, the scope of the present disclosure is to be determined by the following claims.

Claims (20)

1. A method for operating a sensor electrode, the method comprising:
driving a first portion of the sensor electrodes with a sensing signal during a first period of a first sensing frame;
driving a second portion of the sensor electrode with a guard signal during the first period, the second portion disposed adjacent to the first portion, wherein the guard signal and the sense signal have at least one characteristic in common selected from a group consisting of amplitude, phase, and frequency; and
driving or electrically floating a third portion of the sensor electrode with a Direct Current (DC) signal during the first period, the third portion being adjacent to the second portion but not adjacent to the first portion.
2. The method of claim 1, further comprising:
driving a fourth portion of the sensor electrode with the guard signal during the first period.
3. The method of claim 1, further comprising:
driving the first portion and the third portion with the guard signal during a second period of the first sensing frame;
driving the second portion with the reference signal during the second period, wherein the second portion overlaps a second gate line of the display panel selected for updating during the second period, and wherein the second period is subsequent to the first period; and
driving a fourth portion of the sensor electrode with the sense signal during the second period.
4. The method of claim 1, further comprising:
driving a fourth portion of the sensor electrode with the sense signal during a second period;
driving a fifth portion of the sensor electrode with the guard signal during the second period; and
driving or electrically floating a sixth portion of the sensor electrode with the reference signal during the second period, the sixth portion being adjacent to the fifth portion but not adjacent to the fourth portion.
5. The method of claim 1, wherein the sensor electrodes are operated for input sensing during a first sensing frame according to a first order and the sensor electrodes are operated for input sensing during a second sensing frame according to a second order, wherein the first order is different from the second order.
6. The method of claim 4, further comprising:
driving a seventh portion of the sensor electrode with the sense signal during a third period;
during the third period, driving an eighth portion of the sensor electrode with the guard signal; and
during the third period, driving or electrically floating a ninth portion of the sensor electrode with the reference signal, the ninth portion being adjacent to the eighth portion but not adjacent to the seventh portion.
7. The method of claim 1, wherein the third portion of the sensor electrode overlaps a first gate line of a display panel selected for updating during the first period.
8. A processing system, comprising:
sensor circuitry coupled to the sensor electrodes and configured to operate the sensor electrodes for input sensing during a first sensing frame, the sensor circuitry during the first sensing frame configured to:
driving a first portion of the sensor electrode with a sensing signal during a first period;
driving a second portion of the sensor electrode with a guard signal during the first period, the second portion adjacent to the first portion, wherein the guard signal and the sense signal have at least one characteristic in common selected from a group consisting of amplitude, phase, and frequency; and
driving or electrically floating a third portion of the sensor electrode with a reference signal during the first period, the third portion being adjacent to the second portion but not adjacent to the first portion.
9. The processing system of claim 8, wherein the sensor circuitry is further configured to:
driving a fourth portion of the sensor electrode with the guard signal during the first period.
10. The processing system of claim 8, wherein during a second period of the first sensing frame, the sensor circuitry is configured to:
driving the first portion and the third portion with the protection signal;
driving the second portion with the reference signal, wherein the second portion overlaps a second gate line of the display panel selected for updating during the second period, and wherein the second period is subsequent to the first period; and
driving a fourth portion of the sensor electrode with the sense signal.
11. The processing system of claim 8, wherein the sensor circuitry is further configured to:
driving a fourth portion of the sensor electrode with the sense signal during a second period;
driving a fifth portion of the sensor electrode with the guard signal during the second period; and
driving or electrically floating a sixth portion of the sensor electrode with the reference signal during the second period, the sixth portion being adjacent to the fifth portion but not adjacent to the fourth portion.
12. The processing system of claim 8, wherein the sensor electrodes are operated for input sensing during the first sensing frame according to a first order and the sensor electrodes are operated for input sensing during a second sensing frame according to a second order, wherein the first order is different from the second order.
13. The processing system of claim 11, wherein the sensor circuitry is further configured to:
driving a seventh portion of the sensor electrode with the sense signal during a third period;
during the third period, driving an eighth portion of the sensor electrode with the guard signal; and
during the third period, driving or electrically floating a ninth portion of the sensor electrode with the reference signal, the ninth portion being adjacent to the eighth portion but not adjacent to the seventh portion.
14. The processing system of claim 10, wherein the third portion of the sensor electrode overlaps a first gate line of a display panel selected for updating during the first period.
15. An input device, comprising:
a sensor electrode; and
a processing system coupled to the sensor electrode and configured to operate the sensor electrode for input sensing during a first sensing frame, wherein during the first sensing frame the processing system is configured to:
driving a first portion of the sensor electrode with a sensing signal during a first period;
driving a second portion of the sensor electrode with a guard signal during the first period, the second portion adjacent to the first portion, wherein the guard signal and the sense signal have at least one characteristic in common selected from a group consisting of amplitude, phase, and frequency; and
during the first period, a third portion of the sensor electrode is driven or electrically floated with a reference signal, the third portion being adjacent to the second portion but not adjacent to the first portion.
16. The input device of claim 15, wherein the processing system is further configured to:
driving a fourth portion of the sensor electrode with the guard signal during the first period; and
driving or electrically floating a fifth portion of the sensor electrode with the reference signal during the first period, the fifth portion being adjacent to the fourth portion but not adjacent to the first portion.
17. The input device of claim 15, wherein the processing system is further configured to:
driving a fourth portion of the sensor electrode with the sense signal during a second period;
driving a fifth portion of the sensor electrode with the guard signal during the second period; and
driving or electrically floating a sixth portion of the sensor electrode with the reference signal during the second period, the sixth portion being adjacent to the fifth portion but not adjacent to the fourth portion.
18. The input device of claim 15, wherein, during the second period of the first sensing frame, the processing system is configured to:
driving the first portion and the third portion with the protection signal;
driving the second portion with the reference signal, wherein the second portion overlaps a second gate line of the display panel selected for updating during the second period, and wherein the second period is subsequent to the first period; and
driving a fourth portion of the sensor electrode with the sense signal.
19. The input device of claim 15, further comprising an Organic Light Emitting Diode (OLED) display device, and wherein the processing system is further configured to update a display of the display device during the first period.
20. The input device of claim 15, wherein the third portion of the sensor electrode overlaps a first gate line of a display panel selected for updating during the first period.
CN202110318086.2A 2020-03-25 2021-03-25 Reducing interference within a sensing device when performing input sensing Pending CN113961090A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US16/830,147 US11003300B1 (en) 2020-03-25 2020-03-25 Partial guarding for a sensing device
US16/830147 2020-03-25
US17/142648 2021-01-06
US17/142,648 US11327605B1 (en) 2021-01-06 2021-01-06 Reducing interference within a display panel while performing input sensing

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CN113961090A true CN113961090A (en) 2022-01-21

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