CN113923117A - Signal processing method - Google Patents

Signal processing method Download PDF

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Publication number
CN113923117A
CN113923117A CN202010651835.9A CN202010651835A CN113923117A CN 113923117 A CN113923117 A CN 113923117A CN 202010651835 A CN202010651835 A CN 202010651835A CN 113923117 A CN113923117 A CN 113923117A
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physical layer
idle mode
low power
state
link partner
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CN202010651835.9A
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CN113923117B (en
Inventor
李佳珉
黄亮维
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Realtek Semiconductor Corp
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Realtek Semiconductor Corp
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08—Configuration management of networks or network elements
    • H04L41/0803—Configuration setting
    • H04L41/0813—Configuration setting characterised by the conditions triggering a change of settings
    • H04L41/0816—Configuration setting characterised by the conditions triggering a change of settings the condition being an adaptation, e.g. in response to network events
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08—Configuration management of networks or network elements
    • H04L41/0803—Configuration setting
    • H04L41/0823—Configuration setting characterised by the purposes of a change of settings, e.g. optimising configuration for enhancing reliability

Abstract

The invention discloses a signal processing method, which is used in a gigabit Ethernet system comprising a tested device and a link partner. Firstly, whether the gigabit ethernet system is subjected to interference from other signal sources is detected by an interference detector. Then, upon detecting that the gigabit ethernet system is subject to interference from other signal sources, the physical layer of the device under test or the physical layer of the link partner sets the request signal indicating whether it is going to enter the low power idle mode to false. The physical layer for which the request signal indicating whether it is to enter the low power idle mode is set to be invalid is the physical layer of the device under test or the physical layer of the link partner depending on which party the interference detector is set to.

Description

Signal processing method
Technical Field
The present invention relates to a signal processing method, and more particularly, to a signal processing method capable of avoiding connection failure due to Low Power Idle (LPI) mode entering and exiting a gigabit ethernet system under interference of other signal sources.
Background
To reduce power consumption of integrated circuits and to achieve power saving, the IEEE 802.3 standard sets out the LPI mode. In the LPI mode, both a Device Under Test (DUT) and a Link Partner (LP) of the gigabit ethernet system stop transmitting data and stop most of the circuit components, thereby achieving power saving. For example, referring to fig. 1A and 1B together, fig. 1A and 1B are Physical Layer (PHY) control state diagrams defined by the IEEE 802.3 standard. As shown in fig. 1A, after entering a SEND IDLE OR DATA (SEND IDLE OR DATA) state, when the PHY of the DUT OR LP is to enter LPI mode, the following five conditions must be simultaneously satisfied:
minwait_timer_done；
loc_rcvr_status＝OK；
rem_rcvr_status＝OK；
loc _ lpi _ req ═ TRUE; and
rem_lpi_req＝TRUE。
it should be noted that loc _ LPI _ req is a request signal indicating whether the local PHY is to enter the LPI mode, and rem _ LPI _ req is a request signal indicating whether the remote PHY is to enter the LPI mode. That is, the local PHY may set loc _ LPI _ req to TRUE (TRUE) or FALSE (FALSE) depending on whether it is going to enter the LPI mode, and receive loc _ LPI _ req from the remote PHY as rem _ LPI _ req. It can be seen that the LPI mode of the gigabit ethernet system is bi-directionally symmetric, so that if one PHY does not issue a request signal to enter LPI mode, the PHYs of both the DUT and LP must continue to be in the SEND IDLE OR DATA state to transmit DATA OR IDLE signals.
In addition, in the LPI mode, since most circuit components are stopped, the resistance of the ethernet system to environmental changes at this time is greatly reduced, and especially if the environment is interfered by other signal sources at this time, the gigabit ethernet system must be adjusted in state within a specified time once leaving the LPI mode, or the filter must be converged in place within a very short time, otherwise the gigabit ethernet system must bear the risk of missing packets, and even more seriously, cause a Link Down (Link Down). Therefore, how to provide a method to avoid the failure of connection due to the LPI mode in and out of the gigabit ethernet system in the presence of other signal source interference is an important issue in the field.
Disclosure of Invention
In view of this, an embodiment of the present invention provides a signal processing method for use in a gigabit ethernet system including a DUT and an LP, the signal processing method including the following steps. Firstly, whether the gigabit ethernet system is subjected to interference from other signal sources is detected by an interference detector. Then, upon detecting that the gigabit ethernet system is subject to interference from other signal sources, the PHY of the DUT or the PHY of the LP sets the request signal indicating whether it is to enter the LPI mode to FALSE, wherein the PHY that sets the request signal indicating whether it is to enter the LPI mode to FALSE is the PHY of the DUT or the PHY of the LP depending on which party the interference detector is set to.
For a better understanding of the features and technical content of the present invention, reference should be made to the following detailed description of the invention and accompanying drawings, which are provided for purposes of illustration and description only and are not intended to limit the invention.
Drawings
Fig. 1A and 1B are physical layer control state diagrams defined by the IEEE 802.3 standard.
Fig. 2 is a flowchart illustrating steps of a signal processing method according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of the PHY for the LP of the signal processing method of fig. 2 being out of LPI mode in an update state such that the PHYs of both the DUT and the LP are out of LPI mode.
Fig. 4 is a schematic diagram of the PHY used by the signal processing method of fig. 2 in the LP exiting the LPI mode in a post-update state, such that the PHYs of both the DUT and the LP exit the LPI mode.
Fig. 5 is a schematic diagram of the PHY used by the signal processing method of fig. 2 in a wait quiet state out of LPI mode, such that the PHYs of both the DUT and the LP are out of LPI mode.
Fig. 6 is a schematic diagram of the PHY for the DUT of the signal processing method of fig. 2 being out of LPI mode in an update state such that the PHYs of both the DUT and the LP are out of LPI mode.
Fig. 7 is a schematic diagram of the PHY for the DUT of the signal processing method of fig. 2 being out of LPI mode in a post-update state, such that the PHYs of both the DUT and the LP are out of LPI mode.
Fig. 8 is a Local LPI Request state diagram (Local LPI Request state diagram) modified according to the signal processing method of fig. 2.
Detailed Description
The following is a description of embodiments of the present invention with reference to specific embodiments, and those skilled in the art will understand the advantages and effects of the present invention from the contents provided in the present specification. The invention is capable of other and different embodiments and its several details are capable of modification and various other changes, which can be made in various details within the specification and without departing from the spirit and scope of the invention. The drawings of the present invention are for illustrative purposes only and are not intended to be drawn to scale. The following embodiments will further explain the related art of the present invention in detail, but the contents are not provided to limit the scope of the present invention.
It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are used primarily to distinguish one element from another element or from one signal to another signal. In addition, the term "or" as used herein should be taken to include any one or combination of more of the associated listed items as the case may be.
Referring to fig. 2, fig. 2 is a flowchart illustrating a signal processing method according to an embodiment of the invention. It should be noted that the signal processing method of fig. 2 can be used in a gigabit ethernet system including DUTs and LPs, but the present invention is not limited to the specific implementation of DUTs and LPs, and those skilled in the art can design the signal processing method according to actual needs or applications. As shown in fig. 2, in step S210, the present embodiment detects whether the gigabit ethernet system is interfered by another signal source through the interference detector. If yes, the embodiment executes step S220; if not, the embodiment returns to step S210. That is, once it is detected that the gigabit ethernet system is interfered by another signal source, the present embodiment performs step S220.
In step S220, the PHY of the DUT or the PHY of the LP sets the request signal indicating whether it is to enter the LPI mode to FALSE, i.e., loc _ LPI _ req ═ FALSE, so that the PHYs of both the DUT and the LP are out of the LPI mode. It should be noted that the interference detector can be implemented in an analog circuit or a digital circuit, and in summary, the present invention is not limited to the specific implementation manner of the interference detector. In addition, the request signal indicating whether to enter the LPI mode is set to FALSE, i.e. whether the PHY to request to leave the LPI mode is the PHY of the DUT or the PHY of the LP can be determined depending on which party the interference detector is set. The PHY is an electronic Circuit required to implement a physical layer function of the OSI model in a Network Interface Controller (Network Interface Controller), and it is generally implemented as an Integrated Circuit (Integrated Circuit).
In addition, when the PHYs of both the DUT and LP are in the SEND IDLE OR DATA state, the filters of the gigabit ethernet system can be kept synchronized and on-line against the incoming signal, so that the immunity to interference will be greatly improved. Therefore, once the interference detector detects that the current gigabit ethernet system is not interfered by other signal sources, the present embodiment can revert to the original setting, that is, the active right to enter the LPI mode is determined by whether the upper layer has packets to transmit.
Further, as shown in fig. 1B, the LPI mode includes an UPDATE (UPDATE) state, a POST UPDATE (POST _ UPDATE) state, a WAIT QUIET (WAIT _ QUIET) state, a QUIET (QUIET) state, and a WAKE (WAKE) state, etc., wherein before entering the QUIET state of the LPI mode, if the PHY of the DUT or LP is to leave the LPI mode, there are only five cases:
the PHY of the LP is out of LPI mode in UPDATE state;
the PHY of the LP is out of LPI mode in POST _ UPDATE state;
the PHY of the LP is out of LPI mode in the WAIT _ QUEIET state;
the PHY of the DUT is out of LPI mode in the UPDATE state; and
the PHY of the DUT is out of LPI mode in the POST _ UPDATE state. Therefore, please refer to fig. 3 to 7 together, and fig. 3 to 7 are schematic diagrams illustrating that the PHY of both the DUT and the LP is out of the LPI mode in the above five cases respectively for the signal processing method of fig. 2.
As shown in fig. 3, when the interference detector is set in the LP and detects that the gigabit ethernet system is interfered by other signal sources when the PHY of the LP is in the UPDATE state of the LPI mode, the PHY of the LP sets a request signal indicating whether it is going to enter the LPI mode to FALSE, i.e., loc _ LPI _ req is FALSE, and SENDs the request signal set to FALSE to the PHY of the DUT, and then the PHY of the LP jumps directly from the UPDATE state of the LPI mode to the SEND DATA state.
In contrast, when the PHY of the DUT receives the request signal set to FALSE from the PHY of the LP when the PHY of the DUT is in the UPDATE state of the LPI mode, that is, at this time, the PHY of the DUT can simultaneously satisfy rem _ LPI _ req and rem _ UPDATE _ done being FALSE, so the PHY of the DUT directly jumps from the UPDATE state of the LPI mode to the SEND IDLE OR DATA state. That is, the PHYs of both the DUT and LP are out of LPI mode.
Next, as shown in fig. 4, when the interference detector is set in the LP and detects that the gigabit ethernet system is interfered by other signal sources when the PHY of the LP is in the POST _ UPDATE state of the LPI mode, the PHY of the LP sets a request signal indicating whether the PHY of the LP is to enter the LPI mode to FALSE, and sends the request signal set to FALSE to the PHY of the DUT, and then WAITs until the PHY of the DUT enters the POST _ UPDATE state of the LPI mode, that is, until the PHY of the LP simultaneously satisfies rem _ UPDATE _ done _ TRUE and loc _ LPI _ req _ FALSE, so that the PHY of the LP accelerates to enter the WAIT _ iet state and QUIET state of the LPI mode in sequence, and then enters the WAKE state of the LPI mode again.
In contrast, when the PHY of the DUT receives the request signal set to FALSE from the PHY of the LP when the PHY of the DUT is in the POST _ UPDATE state of the LPI mode, the PHY of the DUT sequentially enters the WAIT _ WAIT state and the WAIT state of the LPI mode until the PHY of the DUT receives the signal detection value set to TRUE again, that is, signal _ detect is TRUE, and the PHY of the DUT enters the WAKE state of the LPI mode.
Next, as shown in fig. 5, when the interference detector is set in the LP and detects that the gigabit ethernet system is interfered by other signal sources when the PHY of the LP is in the WAIT _ QUIET state of the LPI mode, the PHY of the LP sets the request signal indicating whether it is to enter the LPI mode to FALSE, i.e., loc _ LPI _ req ═ FALSE, and sends the request signal set to FALSE to the PHY of the DUT, and then the PHY of the LP accelerates to enter the QUIET state of the LPI mode and then enters the WAKE state of the LPI mode again.
In contrast, when the PHY of the DUT receives the request signal set to FALSE from the PHY of the LP when the PHY of the DUT is in the QUIET state of the LPI mode, the PHY of the DUT does not enter the WAKE state of the LPI mode until the PHY of the DUT receives the signal detection value set to TRUE again, i.e., signal _ detect ═ TRUE.
In addition, as shown in fig. 6, when the interference detector is set in the DUT and detects that the gigabit ethernet system is interfered by another signal source when the PHY of the DUT is in the UPDATE state of the LPI mode, the PHY of the DUT sets a request signal indicating whether it is to enter the LPI mode to FALSE, that is, loc _ LPI _ req is FALSE, and SENDs the request signal set to FALSE to the PHY of LP, and then the PHY of the DUT jumps directly from the UPDATE state of the LPI mode to the SEND IDLE OR DATA state.
In contrast, when the PHY of the LP receives a request signal from the DUT that the PHY is set to FALSE when the PHY of the LP is in the UPDATE state OR POST _ UPDATE state of the LPI mode, the PHY of the LP jumps directly from the UPDATE state OR POST _ UPDATE state of the LPI mode to the SENDIDLE OR DATA state. Since the details of fig. 6 are as described in fig. 3, the details are not repeated herein.
Finally, as shown in fig. 7, when the interference detector is set at the DUT and detects that the gigabit ethernet system is interfered by other signal sources when the PHY of the DUT is in the POST _ UPDATE state of the LPI mode, the PHY of the DUT sets the request signal indicating whether it is to enter the LPI mode to FALSE, and sends the request signal set to FALSE to the PHY of the LP, and then WAITs until the PHY of the LP enters the POST _ UPDATE state of the LPI mode, that is, until the PHY of the DUT simultaneously satisfies rem _ UPDATE _ done _ TRUE and loc _ LPI _ req _ FALSE, so that the PHY of the DUT accelerates to enter the WAIT _ iet state and the QUIET state of the LPI mode sequentially, and then enters the WAKE state of the LPI mode. It is worth mentioning that in the embodiment of fig. 7, since the PHY of the LP enters the POST _ UPDATE state of the LPI mode earlier than the PHY of the DUT, when the PHY of the DUT sets loc _ LPI _ req to FALSE in the POST _ UPDATE state, the PHY of the DUT already satisfies rem _ UPDATE _ done.
In contrast, when the PHY of the LP receives the request signal set to FALSE from the PHY of the DUT, the PHY of the LP is in the POST _ UPDATE state or the WAIT _ QUIET state of the LPI mode, and the PHY of the LP accelerates to enter the QUIET state of the LPI mode until the PHY of the LP receives the signal detection value set to TRUE again, that is, signal _ detect is TRUE, and the PHY of the LP enters the WAKE state of the LPI mode. Since the details of fig. 7 are as described in fig. 4 and fig. 5, they will not be described herein, and in summary, the present invention can modify the local LPI request state diagram defined by the IEEE 802.3 standard according to the signal processing method of fig. 2.
As shown in fig. 8, compared to the prior art, after entering the local LPI request OFF (LOC LPI REQ OFF) state, when the PHY of the DUT or LP sets LOC _ LPI _ REQ to TRUE, the addition must satisfy the condition: interference _ index is FALSE. ON the contrary, after entering the local LPI request ON (LOC LPI REQ ON) state, when the PHY of the DUT or LP wants to set LOC _ LPI _ REQ to FALSE, the conditions are increased to be satisfied: reference _ index is TRUE. That is, the Interference _ index is a notification signal indicating whether the Interference detector detects that the gigabit ethernet system is interfered by another signal source, and when the Interference _ index is TRUE, it represents that the Interference detector detects that the current gigabit ethernet system is interfered by another signal source, so the PHY of the DUT or LP provided with the Interference detector will set loc _ LPI _ req to FALSE, so that the PHYs of both the DUT and LP are out of the LPI mode. Since other conditions of the local LPI request state diagram are well known to those skilled in the art, details related to fig. 8 will not be further described.
In summary, the signal processing method provided by the embodiment of the present invention may be that, when the interference detector detects that the gigabit ethernet system is interfered by another signal source, the PHY of the DUT or LP provided with the interference detector sets loc _ LPI _ req to FALSE, so that the PHY of both the DUT and the LP is out of the LPI mode. That is, the present invention will only modify the control flow of loc _ LPI _ req to protect the gigabit ethernet system from the risk of connection failure due to interference from other signal sources in LPI mode, and the present invention does not need to add too much hardware to implement.
The above-mentioned embodiments are only preferred embodiments of the present invention, and not intended to limit the scope of the claims of the present invention, so that all equivalent technical changes made by using the contents of the specification and the drawings are included in the scope of the claims of the present invention.
[ notation ] to show
S210-S220, flow steps.

Claims (10)

1. A signal processing method for use in a gigabit ethernet system comprising a device under test and a link partner, the signal processing method comprising:
detecting whether the gigabit Ethernet system is interfered by other signal sources or not by an interference detector; and
upon detecting that the gigabit ethernet system is subject to interference from the other signal sources, the physical layer of the device under test or the physical layer of the link partner sets the request signal indicating whether it is going to enter the low power idle mode to false.
2. The method of claim 1, wherein the physical layer of the link partner or the physical layer of the device under test to which the request signal indicating whether to enter the low power idle mode is set to be false is determined by which party the interference detector is set.
3. The signal processing method of claim 1, wherein when the interference detector is disposed on the link partner and detects that the gigabit Ethernet system is interfered by the other signal source when the physical layer of the link partner is in the update state of the low power idle mode, the physical layer of the link partner sets the request signal indicating whether the physical layer of the link partner is to enter the low power idle mode to be false, and sends the request signal set to be false to the physical layer of the device under test, and then the physical layer of the link partner directly jumps from the update state of the low power idle mode to a send idle or data state.
4. The signal processing method of claim 3, wherein when the physical layer of the device under test receives the request signal from the link partner that the physical layer is set to be false is in the update state of the low power idle mode, the physical layer of the device under test jumps directly from the update state of the low power idle mode to the send idle or data state.
5. The signal processing method of claim 1, wherein when the interference detector is disposed at the link partner and detects that the gigabit ethernet system is interfered by the other signal source when the physical layer of the link partner is in the post-update state of the low power idle mode, the physical layer of the link partner sets the request signal indicating whether the physical layer of the link partner is to enter the low power idle mode to be false, and sends the request signal set to be false to the physical layer of the device under test, and then waits until the physical layer of the device under test enters the post-update state of the low power idle mode, the physical layer of the link partner accelerates to enter a wait quiet state and a quiet state of the low power idle mode in sequence and then enters the wake-up state of the low power idle mode.
6. The signal processing method of claim 5, wherein when the physical layer of the device under test receives the request signal from the physical layer of the link partner that is set to false is in the post-update state of the low-power idle mode, the physical layer of the device under test sequentially enters the waiting quiet state and the quiet state of the low-power idle mode until the physical layer of the device under test receives a signal detection value set to true again, and the physical layer of the device under test enters the awake state of the low-power idle mode.
7. The signal processing method of claim 1, wherein when the interference detector is disposed at the link partner and detects that the gigabit Ethernet system is interfered by the other signal source when the physical layer of the link partner is in a wait quiet state of the low power idle mode, the physical layer of the link partner sets the request signal indicating whether it is to enter the low power idle mode to be false, and sends the request signal set to be false to the physical layer of the device under test, and then the physical layer of the link partner accelerates to enter the quiet state of the low power idle mode and reenters the wake state of the low power idle mode, wherein when the physical layer of the device under test receives the request signal set to be false from the physical layer of the link partner when the physical layer of the device under test is in the quiet state of the low power idle mode, the physical layer of the device under test does not enter the wake-up state of the low power idle mode until a signal detection value set to true is received.
8. The signal processing method of claim 1, wherein when the interference detector is disposed on the device under test and detects that the gigabit Ethernet system is interfered by the other signal sources when the physical layer of the device under test is in the update state of the low power idle mode, the physical layer of the device under test sets the request signal indicating whether the physical layer of the device under test is to enter the low power idle mode to be false, and sends the request signal set to be false to a physical layer of the link partner, and then the physical layer of the device under test directly jumps from the update state of the low power idle mode to a send idle or data state, wherein when the physical layer of the link partner receives the request signal set to be false from the physical layer of the device under test when the physical layer of the link partner is in the update state of the low power idle mode or a post update state, the physical layer of the link partner then jumps directly from the update state or the post-update state of the low power idle mode to the send idle or data state.
9. The signal processing method of claim 1, wherein when the interference detector is disposed on the device under test and detects that the gigabit ethernet system is interfered by the other signal sources when the physical layer of the device under test is in the post update state of the low power idle mode, the physical layer of the device under test sets the request signal indicating whether the physical layer of the device under test is to enter the low power idle mode to be false, and sends the request signal set to be false to the physical layer of the link partner, and waits until the physical layer of the link partner enters the post update state of the low power idle mode, the physical layer of the device under test accelerates to enter a wait quiet state and a quiet state of the low power idle mode in sequence and then enters an awake state of the low power idle mode.
10. The signal processing method of claim 9, wherein when the physical layer of the link partner receives the request signal from the physical layer of the device under test that is set to false is in the post update state or the wait quiet state when the physical layer of the link partner is in the low power idle mode, the physical layer of the link partner speeds up entering the quiet state of the low power idle mode until the physical layer of the link partner receives a signal detection value set to true again, and the physical layer of the link partner enters the wake-up state of the low power idle mode.
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CN102868517A (en) * 2012-08-28 2013-01-09 华为技术有限公司 Clock recovery device and method
CN102970149A (en) * 2011-08-31 2013-03-13 美国博通公司 Energy efficiency Ethernet with low power active idle transmission mode
US20140229751A1 (en) * 2013-02-12 2014-08-14 Broadcom Corporation Network interface with low power data transfer and methods for use therewith
CN105706370A (en) * 2013-10-31 2016-06-22 摩托罗拉解决方案公司 Method and apparatus for mitigating radio frequency interference (rfi) in an electrical device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110007664A1 (en) * 2006-06-22 2011-01-13 Wael Diab Method and system for link adaptive ethernet communications
US20100322078A1 (en) * 2009-06-19 2010-12-23 Broadcom Corporation Parallel Detection of Remote LPI Request and Send Zero Mode
US20110022699A1 (en) * 2009-07-24 2011-01-27 Scott Powell Method And System For PHY Initiated Wake-Up In Energy Efficient Ethernet Networks
CN102970149A (en) * 2011-08-31 2013-03-13 美国博通公司 Energy efficiency Ethernet with low power active idle transmission mode
CN102868517A (en) * 2012-08-28 2013-01-09 华为技术有限公司 Clock recovery device and method
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CN105706370A (en) * 2013-10-31 2016-06-22 摩托罗拉解决方案公司 Method and apparatus for mitigating radio frequency interference (rfi) in an electrical device

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