CN113922860A - Satellite-ground measurement, operation and control integrated baseband processing system for small satellite in medium and low orbit - Google Patents
Satellite-ground measurement, operation and control integrated baseband processing system for small satellite in medium and low orbit Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
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- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
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- Y02D30/00—Reducing energy consumption in communication networks
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Abstract
The invention discloses a satellite-ground measurement, operation and control integrated baseband processing system for a small satellite of middle and low orbit, which comprises: the system comprises a ZYNQ chip-based integrated baseband processing subsystem and a configuration monitoring and displaying module deployed on an upper computer; the comprehensive baseband processing subsystem is used for dynamically reconstructing different modulation and demodulation algorithms according to a parameter configuration command of the configuration monitoring and displaying module, decoding and demodulating telemetering data downloaded by the small satellite according to a corresponding modulation and demodulation algorithm and then sending the telemetering data to the configuration monitoring and displaying module, and coding and modulating command data transmitted by the self-generating or configuration monitoring and displaying module and then sending the command data to the small satellite; and the configuration monitoring and displaying module is used for configuring parameters of the comprehensive baseband processing subsystem, sending commands, storing and displaying the state of downlink telemetering data received by the comprehensive baseband processing subsystem, and communicating with a ground control center.
Description
Technical Field
The invention relates to the technical field of satellite measurement and control communication, in particular to a satellite-ground measurement, operation and control comprehensive baseband processing system for a small satellite with a medium-low orbit.
Background
The medium and low orbit satellite has the obvious characteristics of wide coverage, low cost and the like, and the global coverage is realized by networking a plurality of satellites. In recent years, China vigorously promotes the development of medium and low orbit civilian commercial space flight, the number of medium and low orbit civilian commercial small satellites is increased rapidly, the medium and low orbit satellites are high in speed and short in operation orbit period, ground stations need to be deployed in large quantity, the requirement on ground measurement and control communication equipment is high, the ground measurement and control communication equipment needs to be developed in the directions of miniaturization, portability, movement at any time, universality, flexibility, expandability, reconfigurable performance and the like, and due to the fact that communication protocols and systems of different satellite systems are different, a ground station measurement, operation and control system needs to adapt to different communication modes, satellite-ground communication is achieved, and high-quality service is provided for the civil commercial small satellites better.
However, the existing integrated baseband processing equipment for ground station measurement, operation and control has a single function, and is not reusable in different satellite-ground measurement and control communication tasks, the capacity of a communication link is low, and a large amount of resources are consumed, so that a universal, configurable, reconfigurable, expandable integrated baseband processing system for satellite-ground measurement, operation and control applicable to communication modes between different satellites and grounds is urgently needed.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a satellite-ground measurement, operation and control integrated baseband processing system for a small satellite of a medium-low orbit.
In order to achieve the above object, the present invention provides a satellite-to-ground measurement, operation and control integrated baseband processing system for a small satellite of medium and low orbit, the system comprising: the system comprises a ZYNQ chip-based integrated baseband processing subsystem and a configuration monitoring and displaying module deployed on an upper computer;
the comprehensive baseband processing subsystem is used for dynamically reconstructing different modulation and demodulation algorithms according to a parameter configuration command of the configuration monitoring and displaying module, decoding and demodulating telemetering data downloaded from the minisatellite according to the corresponding modulation and demodulation algorithms and then sending the telemetering data to the configuration monitoring and displaying module, and coding and modulating command data transmitted by the self-generating or configuration monitoring and displaying module and then sending the command data to the minisatellite;
and the configuration monitoring and displaying module is used for configuring parameters of the comprehensive baseband processing subsystem, sending commands, storing and displaying the state of downlink telemetering data received by the comprehensive baseband processing subsystem, and communicating with a ground control center.
As an improvement of the system, the integrated baseband processing subsystem comprises a baseband signal processing module realized based on FPGA and a radio frequency agility module realized based on RF chip, the modules realize high-speed data communication through FMC interface, wherein,
the integrated baseband processing subsystem comprises a baseband signal processing module and a radio frequency agility module realized based on an RF chip, wherein the modules realize high-speed data communication through an FMC interface,
the baseband signal processing module comprises a PS unit and a PL unit, wherein the PS unit is realized based on an ARM (advanced RISC machine), is used for respectively performing bidirectional data interaction with a configuration monitoring and displaying module, a radio frequency agility module and the PL unit, is used for realizing parameter configuration and state display of working modes of an RF (radio frequency) chip and the PL unit, is used for controlling loading of a complete bit stream and a configurable partial bit stream of the PL unit, is used for realizing read-write control of a bidirectional AXI (advanced extensible interface) DMA (direct memory access), and is also used for controlling a DDR (double data rate) 3 memory to realize caching of data; the PL unit is realized based on FPGA, adopts reconfigurable configuration design, is used for configuring communication protocol parameters, is used for processing uplink remote control data sent by the PS unit through a remote control channel and sending the processed uplink remote control data to the radio frequency agility module, and is used for processing downlink remote control data sent by the radio frequency agility module through a remote control channel and sending the processed downlink remote control data to the PS unit;
the PS unit and the PL unit realize the interaction of uplink and downlink data through an AXI-HP high-speed interface, and realize parameter configuration and state display through an AXI-GP interface;
the radio frequency agility module is used for sending telemetering data downloaded by the small satellite to the PL unit after frequency conversion and analog-to-digital conversion, and sending uplink remote control data processed by the PL unit to the small satellite after digital-to-analog conversion and frequency conversion.
As an improvement of the above system, the remote control channel processing specifically includes: the command data transmitted by the self-generating or configuration monitoring and displaying module is extracted, framed according to a configurable communication protocol, serially output by FIFO, encoded through a configured encoding mode, modulated and encoded after scrambling processing and data forming filtering processing, and output to the radio frequency agility module.
As an improvement of the system, the coding mode comprises RS coding, 1/2 rate convolutional coding and 3/4 rate convolutional coding.
As an improvement of the above system, the modulation code is configured according to different communication systems of the satellite system, including BPSK, GMSK, FSK, AFSK, and GFSK.
As an improvement of the above system, the telemetry channel processing specifically includes: and demodulating the downlink telemetering data sent by the radio frequency agility module, decoding and deblurring the downlink telemetering data by a configured decoding mode, performing frame synchronization processing, descrambling, data conditioning and multiplexing processing, and outputting the data to the PS unit.
As an improvement of the above system, the decoding method includes: RS decoding, 1/2 code rate viterbi decoding and 3/4 code rate viterbi decoding, wherein, carry on the space filling before 3/4 code rate viterbi decoding, remove the fuzzy that the convolutional code of different code rates brings through the state machine self-adaptation, and 1/2 code rate viterbi decoding and 3/4 code rate viterbi decoding adopt the same processing method of decoding.
As an improvement of the above system, the demodulation is configured according to different communication systems of the satellite system, including BPSK, GMSK, FSK, AFSK, and GFSK.
As an improvement of the above system, the parameter configuration of the configuration monitoring and displaying module specifically includes:
setting a sending test data type, wherein the test data type comprises fixed data, a PN sequence and user data;
setting a coding mode, a modulation mode, an emission frequency, a sampling rate, a bandwidth, a baseband code type, a code element rate, a maximum modulation frequency offset, a scrambling code order, a scrambling code tap coefficient and a scrambling code initial phase of uplink remote control data;
setting decoding mode, demodulation mode, receiving frequency, sampling rate, bandwidth, code element rate, baseband code type, synchronous head length, frame length, synchronous head fault-tolerant bit number, continuous synchronous frame number for entering frame synchronous state, continuous desynchronizing frame number for entering search state, scrambling code order, scrambling code tap coefficient, scrambling code initial phase, carrier synchronization loop bandwidth and code element synchronization loop bandwidth of downlink telemetering data.
Compared with the prior art, the invention has the advantages that:
1. the system adopts the FPGA to realize various coding and decoding and modulation and demodulation algorithms, and loads and combines the algorithms in a reconstruction mode according to the characteristics of communication links of different low-orbit satellite systems to meet the communication requirements of different satellite-ground measurement and control communication tasks;
2. the invention can cover and expand various different communication protocols and communication transmission systems, is beneficial to the quick response of satellite-ground measurement and control tasks of different satellite systems, shortens the research and development period, can be reused, reduces the production cost, is miniaturized, is portable and convenient to move, and is beneficial to the mass and movable deployment of low-orbit satellite ground stations.
Drawings
FIG. 1 is a block diagram of a satellite-ground measurement, operation and control integrated baseband processing system for a small satellite of middle and low orbit;
FIG. 2 is a flow chart of uplink remote control channel modulation according to the present invention;
fig. 3 is a telemetry downlink channel demodulation process of the present invention.
Detailed Description
The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and examples.
Example 1
As shown in fig. 1, embodiment 1 of the present invention provides a satellite-to-ground measurement, operation and control integrated baseband processing system for a small satellite in a medium-low orbit. The system comprises: the system comprises a ZYNQ chip-based integrated baseband processing subsystem and a configuration monitoring and displaying module deployed on an upper computer; the comprehensive baseband processing subsystem is connected with the upper computer software through a network cable and transmits data through a TCP/IP protocol.
1. The comprehensive baseband processing subsystem is used for realizing remote control and remote measurement processing of signals in different frequency bands according to parameter configuration commands of the configuration monitoring and displaying module, dynamically reconstructing different modulation and demodulation algorithms by combining satellite-ground communication characteristics of different satellite systems and realizing different communication modes; and according to a corresponding adjusting demodulation algorithm, the telemetering data downloaded by the minisatellite is sent to the configuration monitoring and displaying module after being decoded and demodulated, and the command data generated by the self-generating or configuration monitoring and displaying module is sent to the minisatellite after being coded and modulated. The subsystem comprehensive baseband processing subsystem comprises a ZYNQ chip and a radio frequency agility module, wherein XC7z020 in the figure is the ZYNQ chip, the inside of the ZYNQ chip comprises a PS unit (ARM) and a PL unit (FPGA), and the radio frequency agility module is realized based on an RF chip and comprises AD/DA digital-to-analog conversion, up-down frequency conversion, filtering and the like.
(1) And the PS unit comprises a Linux operating system running on the PS, realizes bidirectional AXI DMA read-write control, working mode parameter configuration of an AD9364 chip, PL part communication protocol parameter configuration, DDR3 data cache control, and a TCI/IP protocol realizes data interaction with upper computer software and can be reconfigured and configured.
The read-write control module of the bidirectional AXI-DMA controller is used as a data communication bridge between PS and PL, and data can be transmitted at high speed between an AXI4-Stream interface and an AXI4 memory map interface. Firstly, the AXI4_ DMA uses a Direct Register Mode working Mode, and after a corresponding Register is configured through an AXI4_ Lite interface, the control/state logic module generates an initialization read-write command for the data transmission module to complete DMA data transmission.
The AXI4_ DMA mainly includes two transmission channels of S2MM (Stream to Memory Map) and MM2S (Memory Map to Stream). The read-write processes of the two channels are independent of each other. The S2MM channel writes data into the memory, receives data from the AXI4_ Stream interface, and writes data into the memory in a burst form through the AXI4 interface. The MM2S channel reads data from the memory, and reads data from the memory in a burst form through the AXI4 interface to the AXI4_ Stream interface. The DMA block size can be set, if the type of the sent data is a short message or the size of the last packet of data of a large data file is not enough than one DMA block, the data needs to be supplemented to the DMA block size, and then the rest data can be sent out completely.
(2) The PL unit comprises a read-write control module of a bidirectional AXI-DMA controller, an instruction configuration and state monitoring and displaying module, clock management, remote control channel design, remote measurement channel design and reconfigurable module design; the PS part and the PL part realize the uplink and downlink data interaction of the PS and the PL through an AXI-HP high-speed interface, and realize parameter configuration and state monitoring and display through an AXI-GP interface. The PL unit is connected with the radio frequency agility module through an FMC interface, and high-speed data communication is achieved.
1) The remote control channel design comprises a baseband data module, a data conditioning and multiplexing module, a convolution coding module, a scrambling module, a data forming and filtering module and a remote control modulation module. The baseband data module is used for self-generating and transmitting user data to the data conditioning and multiplexing module, the data conditioning and multiplexing module is used for extracting data or framing the data according to a configurable communication protocol and then serially outputting the data to the convolutional coding module through FIFO (first in first out) and the convolutional coding module is used for coding the data through a configured coding mode and then transmitting the data to the scrambling module, the scrambled data is transmitted to the data forming filtering module, the data is transmitted to the remote control modulation module after being processed by the data forming filtering module, and the remote control modulation module is used for modulating and coding and then outputting the data. As shown in fig. 2, the remote control channel processing procedure is that self-test data or remote control instruction data sent by an upper computer are coded according to a configured coding mode after data conditioning and multiplexing, the coded data are serially output to perform data forming filtering, and then are modulated and output through a configured modulation algorithm.
The baseband data module and the data conditioning and multiplexing module comprise an FPGA self-checking data processing module and a data processing module which is transmitted through a network, the frame length, the frame head and the test data type (fixed data, PN sequence or user data) of a transmission frame can be set in an interface of an upper computer, effective data is analyzed and extracted according to PS and PL related transmission protocols, and framing, parallel-serial conversion and the like are performed.
The convolutional coding module comprises 1/2 and 3/4 code rate coding modes, and the coding process is realized according to the requirements of the CCSDS TM/TC recommendation. For the code rate of 1/2, the design constraint code rate is 1/2, the constraint length is 7bits, the tap coefficients are G1(171octal) and G2(133octal), and the output end of G2 needs to be inverted. For the 3/4 code rate, the design constraint code rate is 3/4, the constraint length and the tap coefficient are consistent with the 1/2 code rate, and the puncturing design processing is needed in the implementation process of the 3/4 code rate.
The polynomial can be configured, and different scrambling modes can be realized by adapting to different polynomials, so that the bit synchronization of receiving end demodulation is prevented from being influenced by long-link 0 or long-link 1.
The data forming filtering module utilizes a root raised cosine filter, when matched filtering is carried out by the root raised cosine filter as the receiving end, the signal-to-noise ratio at the sampling time is highest (namely the effect of the matched filter is finished), and intersymbol interference is not introduced into a certain band-limited flat channel. The value range of the roll-off coefficient alpha in the root-raised cosine filter is 0 to 1, the roll-off coefficient alpha is generally selected according to the size of the bandwidth allocated by a channel to adapt to the transmission requirement, the roll-off coefficient of the module is generally selected from 0.25 to 0.8 in engineering, the default value of the roll-off coefficient is 0.6, and the trailing oscillation of the forming pulse is reduced along with the increase of the roll-off coefficient.
The remote control modulator comprises multiple modulation modes of BPSK, GMSK, FSK, AFSK and GFSK. Different modulation modes can be selected and used according to different communication systems of the satellite system.
2) The telemetering channel design comprises a telemetering demodulation module, a decoding module, a data de-blurring module, a frame synchronization module, a descrambling module and a data conditioning and multiplexing module. And receiving the zero intermediate frequency signal of the AD9364 orthogonal down-conversion, and enabling the signal to enter the FPGA for demodulation after AD sampling, extraction and the like. Carrying out viterbi decoding on the demodulated data, carrying out deblurring processing on the decoded data, and then carrying out frame synchronization processing, descrambling, data conditioning and multiplexing processing. As shown in fig. 3, the telemetry channel processing procedure is to demodulate a signal by a configured demodulation method, shape-filter the demodulated data, perform viterbi deblurring processing for the configured decoding method, decode the demodulated data by a decoding module, deblur the blurs caused by different demodulation methods, and then perform frame synchronization processing, where two state machines are designed for two viterbi decoding methods and frame synchronization status flags to adaptively remove the viterbi blurs.
The telemetering demodulation module comprises multiple demodulation modes of BPSK, GMSK, FSK, AFSK and GFSK, and different demodulation modes can be selected and used according to different communication systems of the satellite system.
The decoding module specifically comprises the following decoding modes: RS decoding, 1/2 code rate viterbi decoding and 3/4 code rate viterbi decoding, wherein, carry out the space filling before 3/4 code rate viterbi decoding, remove the ambiguity that the convolutional code of different code rates brought through the state machine self-adaptation, and 1/2 code rate viterbi decoding and 3/4 code rate viterbi decoding adopt the same decoding module, improve FPGA resource utilization.
And the data de-ambiguity module comprises a BPSK de-ambiguity module and a GMSK demodulation de-ambiguity module. BPSK and GMSK demodulation both have phase ambiguity and different reference phases will result in different decision I/Q baseband levels. BPSK has two ambiguities (I, Q), (-I, -Q), and GMSK has 4 ambiguities (I, Q), (-I, -Q), (I, -Q).
A frame synchronization state machine for detecting frame head sliding is adopted, wherein each state carries out frame synchronization word (can be set) detection, and the frame head fault-tolerant bit number can be set; the search state is changed into an output state (SearchErrorFrames can be set) when frame synchronous words are not searched for by the continuous SearchErrorFrames frames; entering a synchronous state (the checkOfFrame can be set) after continuously synchronizing the checkstate CheckOfFrame frames; and the synchronous state continuously desynchronizes the NonCatchOfFrame and then enters the searching state again (the NonCatchOfFrame can be set).
The polynomial can be configured, and different descrambling modes can be realized by adapting to different polynomials.
And performing serial-parallel conversion on the data, framing according to a communication protocol related to PL and PS, sending all effective data to PS, and storing or forwarding the effective data to an upper computer.
The reconstruction method adopts Partial Reconfiguration (PR) dynamic Reconfiguration technology of FPGA of XILINX company, realizes the Reconfiguration process by using Non-project mode, loads different Reconfigurable Module (RM) configuration modules and expands various different modulation and demodulation modes. The Partial Reconfiguration dynamic reconfigurable technology comprises a PS part and a PL part, wherein the PS part comprises a Configuration program storage part, a BootROM, a DMA data transmission part and a Device Configuration (DevC) Device Configuration part, and the Device Configuration (DevC) Device Configuration mainly utilizes an internal AXI-PCAP bridge to convert 32-bit AXI bus data into 32-bit PCAP protocol data and loads a bit stream file through a PCAP interface in control. The executable file of the configuration program can be stored in an external memory of a NAND Flash, a NOR Flash, a QSPI and an SD card, a BOOT ROM reads a starting mirror image required by a first stage to an ram on a chip by controlling a DMA on a corresponding storage device according to a starting mode configured by ZYNQ, executes an FSBL program, loads a PL part of complete bit stream files through a PCAP interface, loads a u-BOOT program of a second stage starting program when the FSBL is executed, calls a DevC drive function in an application program when other RM modules need to be replaced, starts the DMA to load RM module bit streams in the external memory into a DDR memory, and loads PL configurable part of RM bit stream files through the PCAP interface.
The PL part firstly needs to verify each feasible algorithm, secondly designs a universal algorithm module, wherein the input and output interface part can cover interfaces required by various different algorithms, and different algorithm sub-modules are loaded in the universal algorithm module. And carrying out operations such as comprehensive compilation and the like according to the Vivado dynamic configuration flow to produce a complete bit stream and a part of reconfigurable bit stream files.
(3) The radio frequency agility module comprises an ADC module, a down-conversion module, a DAC module and an up-conversion module; the ADC module is connected with the down-conversion module to realize down-conversion of the radio-frequency signal to a baseband signal, and performs analog-to-digital conversion through the ADC to convert the analog signal to an LVDS signal; the DAC module is connected with the up-conversion module, digital-to-analog conversion is carried out through the DAC module, conversion from LVDS signals to analog signals is achieved, and then the baseband signals are up-converted to radio-frequency signals through the up-conversion module.
2. And the configuration monitoring and displaying module is used for configuring parameters of the comprehensive baseband processing subsystem, sending commands, storing and displaying the state of downlink telemetering data received by the comprehensive baseband processing subsystem, and communicating with a ground control center.
The parameter configuration of the configuration monitoring and displaying module specifically comprises the following steps:
setting a sending test data type, wherein the test data type comprises fixed data, a PN sequence and user data;
setting a coding mode, a modulation mode, an emission frequency, a sampling rate, a bandwidth, a baseband code type, a code element rate, a maximum modulation frequency offset, a scrambling code order, a scrambling code tap coefficient and a scrambling code initial phase of uplink remote control data;
setting decoding mode, demodulation mode, receiving frequency, sampling rate, bandwidth, code element rate, baseband code type, synchronous head length, frame length, synchronous head fault-tolerant bit number, continuous synchronous frame number for entering frame synchronous state, continuous desynchronizing frame number for entering search state, scrambling code order, scrambling code tap coefficient, scrambling code initial phase, carrier synchronization loop bandwidth and code element synchronization loop bandwidth of downlink telemetering data.
The specific treatment process of the whole system is as follows:
firstly, an upper computer configuration monitoring and displaying module interacts with a PS end according to a certain data protocol through a network port, the PS end controls a custom register to drive and carry out parameter configuration and state monitoring on a PL end through an AXI _ GP bus, and the PS end controls an SPI drive to carry out working mode configuration on a radio frequency agility module through an SPI bus, so that the radio frequency agility module works in a preset working mode and can read state parameters of the module. Secondly, the PS end controls the AXI _ DMA drive to carry out data interaction with the PL through an AXI _ HP bus, the PL end mainly carries out digital signal processing, two configurable areas are designed in the digital signal processing part, configuration contents can be selected according to parameter configuration, one is used for reconfiguration of a modulation algorithm, and the other is used for reconfiguration of a demodulation algorithm. And finally, the PL end is connected with the radio frequency agility module through an FMC interface, bidirectional data interaction is carried out through an LVDS data bus, and the radio frequency agility module mainly completes AD/DA digital-to-analog conversion, up-down frequency conversion and filtering processing.
Innovation point
(1) The invention provides a comprehensive baseband processing device suitable for satellite-to-ground measurement, operation and control of a small satellite for middle and low orbit civilian business. The Zynq series chip integrates dual-core ARM, and can utilize ARM (ps) and FPGA (PL) to carry out collaborative development, so as to realize the transmission and processing of baseband data.
(2) The invention provides a comprehensive baseband processing device suitable for satellite-to-ground measurement, operation and control of a medium-low orbit civil commercial small satellite, which adopts a partial reconfiguration dynamic reconfigurable technology of an FPGA (field programmable gate array) to expand various different modulation modes. Therefore, the equipment is universal, reusable and expandable, the resource utilization rate is improved, the cost is reduced, and the development period is shortened.
(3) The invention provides a comprehensive baseband processing device suitable for satellite-to-ground measurement, operation and control of a small satellite for medium and low orbit civilian commerce.
(4) The comprehensive baseband processing equipment suitable for satellite-to-ground measurement, operation and control of the medium and low orbit civilian commercial small satellites provided by the invention integrates universal bus interfaces such as LAN (local area network), is convenient to interact with the current industrial control platform or peripheral equipment, can also be used as independent equipment to work, has the characteristics of flexible configuration, wide application range and strong portability and practicability, and can meet various application requirements.
(5) The invention provides a comprehensive baseband processing device suitable for satellite-to-ground measurement, operation and control of a small satellite for middle and low orbit civilian business, which can realize RS coding, convolutional coding and RS and convolutional cascade coding modes, and can select different coding modes through parameter configuration by an upper computer, wherein the convolutional coding and decoding mode can realize 1/2 and 3/4 code rate convolutional coding and decoding, because the coding module uses fewer FPGA resources relative to the decoding module, two coding modules with different code rates are used in design, two state machines are respectively designed aiming at the fuzzy condition of received signals of the two code rates in decoding, the received coded signals are subjected to deblurring processing, and the signals subjected to the two code rate processing use the same decoding module in a time sharing mode, so that the resource utilization rate is improved.
(6) The comprehensive baseband processing equipment is suitable for satellite-to-ground measurement, operation and control of the small satellites for medium and low orbit civilians and is connected with the notebook computer, so that the baseband signal processing function of the ground measurement and control station can be realized, and the comprehensive baseband processing equipment has the characteristics of miniaturization, mobility and portability.
(7) The invention provides a comprehensive baseband processing device suitable for satellite-to-ground measurement, operation and control of a small satellite for medium and low orbit civilian use.
The comprehensive baseband processing equipment is suitable for satellite-to-ground measurement, operation and control of the medium and low orbit civilian commercial small satellites, can perform transceiving self-closed loop test, and has high reliability.
When multiple application programs are implemented on one hardware platform at the same time, resource usage and data paths of the respective programs may conflict, which increases complexity of control circuit design and increases workload and development difficulty for developers. Through multiple configuration, a plurality of application programs can be loaded into the FPGA in a time-sharing manner according to needs, so that the circuit design is simplified, and the system is more flexible. The characteristic of FPGA multiple configuration can lead a user under specific conditions to select the FPGA with less resources on the chip to realize the function which can be realized by the FPGA with more resources, thereby greatly reducing the development cost and simultaneously improving the utilization rate of the FPGA.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. Although the present invention has been described in detail with reference to the embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (9)
1. A satellite-ground measurement, operation and control integrated baseband processing system for a small satellite in a middle and low orbit is characterized by comprising: the system comprises a ZYNQ chip-based integrated baseband processing subsystem and a configuration monitoring and displaying module deployed on an upper computer;
the comprehensive baseband processing subsystem is used for dynamically reconstructing different modulation and demodulation algorithms according to a parameter configuration command of the configuration monitoring and displaying module, decoding and demodulating telemetering data downloaded by the small satellite according to the corresponding modulation and demodulation algorithms and then sending the telemetering data to the configuration monitoring and displaying module, and coding and modulating command data transmitted by the self-generating or configuration monitoring and displaying module and then sending the command data to the small satellite;
and the configuration monitoring and displaying module is used for configuring parameters of the comprehensive baseband processing subsystem, sending commands, storing and displaying the state of downlink telemetering data received by the comprehensive baseband processing subsystem, and communicating with a ground control center.
2. The integrated baseband processing system for satellite-based measurement, operation and control of middle and low orbit small satellites as claimed in claim 1, wherein the integrated baseband processing subsystem comprises a baseband signal processing module and a radio frequency agility module implemented based on RF chip, the modules implement high speed data communication via FMC interface, wherein,
the baseband signal processing module comprises a PS unit and a PL unit, wherein the PS unit is realized based on an ARM (advanced RISC machine), is used for performing bidirectional data interaction with a configuration monitoring and displaying module, a radio frequency agility module and the PL unit respectively, is used for realizing parameter configuration and state display of working modes of an RF (radio frequency) chip and the PL unit, is used for controlling loading of a complete bit stream and a configurable partial bit stream of the PL unit, is used for realizing read-write control of bidirectional AXIDMA (advanced extensible digital authentication multiple access), and is also used for controlling a DDR3 memory to realize caching of data; the PL unit is realized based on FPGA, adopts reconfigurable configuration design, is used for configuring communication protocol parameters, is used for processing uplink remote control data sent by the PS unit through a remote control channel and sending the processed uplink remote control data to the radio frequency agility module, and is used for processing downlink remote control data sent by the radio frequency agility module through a remote control channel and sending the processed downlink remote control data to the PS unit;
the PS unit and the PL unit realize the interaction of uplink and downlink data through an AXI-HP high-speed interface, and realize parameter configuration and state display through an AXI-GP interface;
the radio frequency agility module is used for sending telemetering data downloaded by the small satellite to the PL unit after frequency conversion and analog-to-digital conversion, and sending uplink remote control data processed by the PL unit to the small satellite after digital-to-analog conversion and frequency conversion.
3. The system according to claim 2, wherein the remote control channel processing specifically comprises: the command data transmitted by the self-generating or configuration monitoring and displaying module is extracted, framed according to a configurable communication protocol, serially output by FIFO, encoded through a configured encoding mode, modulated and encoded after scrambling processing and data forming filtering processing, and output to the radio frequency agility module.
4. The system of claim 3, wherein the coding scheme comprises RS coding, 1/2 rate convolutional coding, and 3/4 rate convolutional coding.
5. The system according to claim 3, wherein the modulation code is configured according to different communication systems of the satellite system, including BPSK, GMSK, FSK, AFSK, and GFSK.
6. The system according to claim 2, wherein the telemetry channel processing specifically comprises: and demodulating the downlink telemetering data sent by the radio frequency agility module, decoding and deblurring the downlink telemetering data by a configured decoding mode, performing frame synchronization processing, descrambling, data conditioning and multiplexing processing, and outputting the data to the PS unit.
7. The system of claim 6, wherein the decoding means comprises: RS decoding, 1/2 code rate viterbi decoding and 3/4 code rate viterbi decoding, wherein, carry on the space filling before 3/4 code rate viterbi decoding, remove the fuzzy that the convolutional code of different code rates brings through the state machine self-adaptation, and 1/2 code rate viterbi decoding and 3/4 code rate viterbi decoding adopt the same processing method of decoding.
8. The system according to claim 6, wherein the demodulation is configured according to different communication systems of the satellite system, including BPSK, GMSK, FSK, AFSK, and GFSK.
9. The system according to claim 1, wherein the configuration of the parameters of the configuration monitor module specifically comprises:
setting a sending test data type, wherein the test data type comprises fixed data, a PN sequence and user data;
setting a coding mode, a modulation mode, an emission frequency, a sampling rate, a bandwidth, a baseband code type, a code element rate, a maximum modulation frequency offset, a scrambling code order, a scrambling code tap coefficient and a scrambling code initial phase of uplink remote control data;
setting decoding mode, demodulation mode, receiving frequency, sampling rate, bandwidth, code element rate, baseband code type, synchronous head length, frame length, synchronous head fault-tolerant bit number, continuous synchronous frame number for entering frame synchronous state, continuous desynchronizing frame number for entering search state, scrambling code order, scrambling code tap coefficient, scrambling code initial phase, carrier synchronization loop bandwidth and code element synchronization loop bandwidth of downlink telemetering data.
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