CN113921496A - Packaging structure and packaging method - Google Patents

Packaging structure and packaging method Download PDF

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Publication number
CN113921496A
CN113921496A CN202111138335.6A CN202111138335A CN113921496A CN 113921496 A CN113921496 A CN 113921496A CN 202111138335 A CN202111138335 A CN 202111138335A CN 113921496 A CN113921496 A CN 113921496A
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pin
signal terminal
terminal
signal
inductance
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刘瑞峰
罗素·莫恩
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Shanghai Orange Group Microelectronics Co ltd
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Shanghai Orange Group Microelectronics Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The application discloses a packaging structure and a packaging method, which can optimize the performance of a receiving end and a transmitting end which are connected to the same pin. The application provides a packaging structure, includes: a wafer capable of being used to form a circuit structure, the wafer having at least two signal terminals for connecting to an external circuit; the packaging shell is used for packaging the wafer and is provided with pins; there are a plurality of the signal terminals connected to the same pin, inductance values between the respective signal terminals and the pin are different, and the inductance values are adjusted by bonding wires connecting the signal terminals and the pin.

Description

Packaging structure and packaging method
Technical Field
The present application relates to the field of chip packaging, and more particularly, to a package structure and a packaging method.
Background
Miniaturization of electronic devices has been a growing trend to save cost and integrate more functionality. Semiconductor package structures are becoming smaller and smaller thanks to improved design techniques and process scales. Sometimes the bottleneck is not the package structure itself, but the package size due to the many necessary pins.
It is desirable to provide a method for reducing the size of a package structure, so as to reduce the size of the package structure and provide better impedance characteristics.
Disclosure of Invention
In view of this, the present application provides a package structure and a packaging method, which can reduce the size of the package structure and have better impedance characteristics.
The application provides a packaging structure, includes: a wafer capable of being used to form a circuit structure, the wafer having at least two signal terminals for connecting to an external circuit; the packaging shell is used for packaging the wafer and is provided with pins; there are a plurality of the signal terminals connected to the same pin, inductance values between the respective signal terminals and the pin are different, and the inductance values are adjusted by bonding wires connecting the signal terminals and the pin.
Optionally, at least one of the plurality of signal terminals connected to the same pin is further grounded through the first capacitor.
Optionally, two signal terminals are connected to the same pin, and of the two signal terminals, a first signal terminal is used for receiving a signal, and a second signal terminal is used for sending a signal.
Optionally, the bonding wires between the first signal terminal and the pins and the bonding wires between the second signal terminal and the pins have different numbers, so that the inductance values between the first signal terminal and the pins and the inductance values between the second signal terminal and the pins are different.
Optionally, the number of bonding wires between the first signal terminal and the pin and the number of bonding wires between the second signal terminal and the pin are set according to the required inductance difference, and the number of bonding wires conforms to the following equation:
Figure BDA0003283093140000021
h is the inductance difference corresponding to a difference between an inductance value between the first signal terminal and the pin and an inductance value between the second signal terminal and the pin, m is the number of bonding wires between the first signal terminal and the pin, n is the number of bonding wires between the second signal terminal and the pin, and L is an inductance value of each bonding wire.
Optionally, the bonding wire between the first signal terminal and the pin and the bonding wire between the second signal terminal and the pin have different lengths, so that the inductance value between the first signal terminal and the pin and the inductance value between the second signal terminal and the pin are different.
Optionally, the length difference of the bonding wire between the first signal terminal and the pin and the length difference of the bonding wire between the second signal terminal and the pin are adjusted according to the required inductance difference.
The present application also provides a packaging method for packaging a wafer, the wafer being capable of being used to form a circuit structure, and the wafer having at least two signal terminals for connection to an external circuit, and the packaging method comprising the steps of: providing a packaging shell, wherein the packaging shell is provided with pins; and connecting a plurality of signal terminals to the same pin, wherein the inductance value between each signal terminal and the pin is different, and the inductance value is adjusted through a bonding wire connecting the signal terminals and the pin.
Optionally, the method further comprises the following steps: at least one of the signal terminals connected to the same pin is grounded through a first capacitor.
Optionally, the inductance value between each signal terminal and the pin is controlled by controlling the number of bonding wires between each signal terminal and the pin.
Optionally, the first signal terminal and the second signal terminal are connected to the same pin, the number of bonding wires is related to an inductance difference, the inductance difference corresponds to a difference between an inductance value between the first signal terminal and the pin and an inductance value between the second signal terminal and the pin, and a relationship between the number of bonding wires and the inductance difference conforms to the following equation:
Figure BDA0003283093140000031
h is the inductance difference, m is the number of bonding wires between the first signal terminal and a pin, n is the number of bonding wires between the second signal terminal and a pin, and L is an inductance value of each of the bonding wires.
Optionally, the inductance value between each signal terminal and the pin is adjusted by controlling the length of the bonding wire between each signal terminal and the pin.
According to the packaging structure and the packaging method, the signal terminals are connected to the pins on the same packaging shell, so that the using amount of the pins on the packaging shell is reduced, and the size of the packaging shell is reduced. In addition, the packaging structure and the packaging method adjust the inductance value between each signal terminal and each pin through the bonding wire arranged between the pin and each signal terminal, so that different inductance values can be obtained between each signal terminal and each pin, and an inductance difference value is obtained between each signal terminal and each pin, so that the impedance matching requirement after each signal terminal is connected to the same pin is met, the impedance distance of each signal terminal during signal receiving and transmitting through the same pin is reduced, and the impedance characteristic of each signal terminal during signal connecting to the outside through the same pin is optimized.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1a is a schematic diagram of a package structure in the prior art;
fig. 1b is a schematic distribution diagram of the receiving terminals and the transmitting terminals of the package structure in fig. 1a on a smith chart.
Fig. 2a is a schematic diagram of the structure after the LC network is added to the receiving terminal.
Fig. 2b is a schematic diagram of the distribution of the receiving terminals and the transmitting terminals on the smith chart in fig. 2 a.
Fig. 3 is a schematic structural diagram of the package structure according to an embodiment of the present application.
Fig. 4 is a schematic structural diagram of the package structure according to an embodiment of the present application.
Fig. 5 is a schematic diagram of the distribution of the receiving terminals and the transmitting terminals on the smith chart in fig. 4.
Fig. 6 is a flowchart illustrating steps of a packaging method according to an embodiment of the present application.
Detailed Description
It has been found that the size of the package structure can be reduced by reducing the number of package pins, so that the package structure should reduce the number of pins as much as possible during the design process of the package structure, such as sharing or reusing the pins.
Research also finds that a plurality of signal terminals on a wafer in a package structure can be connected to the same pin, so that the number of pins used by the package structure is reduced, and the purpose of reducing the size of the package structure is achieved.
However, it has been found that this can cause problems, for example, different signal terminals on the wafer have different impedance characteristics, and if only different signal terminals are shorted to the same pin, the optimum performance of each signal terminal cannot be obtained at the same time, which may result in the performance of the package structure being reduced.
For example, in an rf transceiver chip RFIO, the transmit and receive terminals on the wafer are connected to the same pin, as shown in fig. 1 a. At this time, as can be seen from fig. 1b, the impedance value of the transmission terminal TX, i.e. TX output indicated in fig. 1b, is far different from the impedance value of the reception terminal RX, i.e. RX input indicated in fig. 1b, and the reception terminal RX and the transmission terminal TX cannot simultaneously reach a better impedance matching state.
Research shows that the impedance distance between two signal terminals and a pin can be adjusted by adjusting the difference between the inductances of the two signal terminals and the pin when the receiving terminal RX and the transmitting terminal TX are connected to the same pin, so as to reduce the difference between the impedance of the receiving terminal RX and the impedance of the transmitting terminal TX. For example, referring to fig. 2a, an LC network may be added between the receiving terminal RX and the pin, so that the inductances between the transmitting terminal TX and the receiving terminal RX and the pin have a certain difference. Fig. 2b is a smith chart of the receiving terminal RX and the transmitting terminal TX corresponding to the connection in fig. 2a, where TX denotes the receiving terminal RX and RX denotes the transmitting terminal TX.
It can be seen that, after the LC network is provided, the impedance difference between the receiving terminal RX and the transmitting terminal TX becomes small, the real part of the impedance of the receiving terminal RX is close to the real part of the impedance of the transmitting terminal TX, and the imaginary part of the impedance of the receiving terminal RX is also close to the imaginary part of the impedance of the transmitting terminal TX. This can optimize the impedance distance between the transmission terminal TX and the reception terminal RX after the reception terminal RX and the transmission terminal TX are connected to the same pin, and reduce the probability that the reception terminal RX and the transmission terminal TX cannot operate in an impedance matching state at the same time due to the too large impedance distance after the reception terminal RX and the transmission terminal TX are connected to the same pin.
However, it has been found that when the LC network is applied to the receiving terminal RX, the inductor L on the chip occupies most of the space on the chip in the package structure, which affects the layout design of the integrated circuit on the chip and is not favorable for the miniaturization of the package structure.
Therefore, the present application provides a package structure and a package method, which further overcome the above-mentioned problems.
The package structure and the package method are further described with reference to the drawings and the embodiments.
Referring to fig. 3 and fig. 4, fig. 3 is a schematic structural diagram of the package structure in an embodiment of the present application, and fig. 4 is a schematic structural diagram of the package structure in an embodiment of the present application.
In this embodiment, the package structure includes a die 104 and a package housing 100, wherein the die 104 can be used to form a circuit structure, and the die 104 has at least two signal terminals (including labels 103 and 102 shown in fig. 3) for connecting to an external circuit; a package body 100 for packaging the die 104, wherein the package body 100 is provided with a pin 101; there are a plurality of signal terminals connected to the same pin 101, inductance values between the respective signal terminals and the pin 101 are different, and the inductance values are adjusted by adjusting a bonding wire 106 connecting the signal terminals and the pin 101.
In this embodiment, a plurality of signal terminals are connected to the pins 101 on the same package body 100, thereby reducing the number of pins 101 on the package body 100, and thus reducing the size of the package body 100. Moreover, the package structure adjusts inductance values between each signal terminal and the pin 101 through the bonding wire 106 arranged between the pin 101 and the signal terminals, so that different inductance values can be provided between each signal terminal and the pin 101 to adapt to impedance matching requirements after each signal terminal is connected to the same pin 101, reduce impedance differences when each signal terminal transmits and receives signals through the same pin 101, and optimize impedance characteristics when each signal terminal is connected to the outside through the same pin 101.
In one embodiment, at least one of the signal terminals connected to the same pin 101 is also grounded through the first capacitor C1. At this time, impedance matching can be achieved by adjusting impedance differences when different signal terminals are connected to the same pin 101 through inductance differences of the bonding wires 106, and impedance matching can also be achieved by adjusting impedance differences when different signal terminals are connected to the same pin 101 through the first capacitor.
In some embodiments, there are two signal terminals connected to the same pin 101, and of the two signal terminals, the first signal terminal 102 is used for receiving signals and may correspond to a receiving terminal RX, and the second signal terminal 103 is used for transmitting signals and may correspond to a transmitting terminal TX. The transmission terminal TX and the reception terminal RX of some semiconductor devices generally have a large impedance difference, and therefore, when the transmission terminal TX and the reception terminal RX are connected to the same pin 101, the transmission terminal TX and the pin 101, the reception terminal RX and the pin 101 may be connected by bonding wires 106 having different inductance values, which is beneficial for adjusting the impedance difference between the reception terminal RX and the transmission terminal TX when they are connected to the same pin 101.
In some embodiments, the presence of the two signal terminals not only adjusts the impedance difference between the two signal terminals connected to the pin 101 through the bonding wires 106 having different inductance values, but also adjusts the impedance difference between the two signal terminals through the first capacitor C1 in the previous embodiments.
In the embodiments shown in fig. 3 and 4, the first signal terminal 102 is a receiving terminal RX, the second signal terminal 103 is a transmitting terminal TX, an inductance corresponding to the bonding wire 106 between the receiving terminal RX and the pin 101, and a first capacitor C1 between the receiving terminal RX and the ground form an LC loop between the receiving terminal RX and the pin 101. The LC loop may adjust a real part of the impedance of the reception terminal RX to be close to a real part of the impedance of the transmission terminal TX, and adjust an imaginary part of the impedance of the reception terminal RX to be close to an imaginary part of the impedance of the transmission terminal TX.
In addition, in this embodiment, an additional inductor is not required, and compared with a scheme in which an inductor is additionally provided to adjust impedance, the occupied space on the wafer 104 is saved, the size of the package structure can be further optimized, which is beneficial to realizing the miniaturization of the package structure, and improving the integration level of the package structure.
The impedance distance between the signal terminals connected to the same pin 101 can be adjusted by adjusting the inductance value of the bonding wire 106 connected between the pin 101 and each signal terminal, so that each signal terminal can operate in a better impedance state.
Specifically, the adjustment can be performed from at least two directions, namely, the inductance of the bonding wire 106 between each signal terminal and the pin 101 is adjusted by adjusting the number of the bonding wires 106 between each signal terminal and the pin 101, so as to adjust the impedance distance between each signal terminal. At this time, the bonding wire 106 between the first signal terminal 102 and the pin 101 and the bonding wire 106 between the second signal terminal 103 and the pin 101 have different numbers, so that the inductance value between the first signal terminal 102 and the pin 101 and the inductance value between the second signal terminal 103 and the pin 101 are different.
In this embodiment, the number of bonding wires 106 between the first signal terminal 102 and the lead 101 and the number of bonding wires 106 between the second signal terminal 103 and the lead 101 are set according to the required inductance difference, and the number of bonding wires 106 conforms to the following equation:
Figure BDA0003283093140000071
h is a difference between the required inductances corresponding to the inductance value between the first signal terminal 102 and the pin 101 and the inductance value between the second signal terminal and the pin 101, m is the number of bonding wires 106 between the first signal terminal 102 and the pin 101, n is the number of bonding wires 106 between the second signal terminal 103 and the pin 101, and L is the inductance value of each bonding wire 106.
In this embodiment, the inductance can be adjusted by simply adjusting the number of the bonding wires 106, so that the impedance distance can be adjusted simply and easily.
Secondly, the inductance value between the same pin 101 and each signal terminal is adjusted by adjusting the length of the bonding wire 106 connected between the same pin 101 and each signal terminal, so as to adjust the impedance distance between each signal terminal connected to the pin 101, and thus each signal terminal works in a better impedance state.
Specifically, the bonding wire 106 between the first signal terminal 102 and the pin 101 and the bonding wire 106 between the second signal terminal 103 and the pin 101 have different lengths, so that the inductance value between the first signal terminal 102 and the pin 101 and the inductance value between the second signal terminal 103 and the pin 101 are different.
In this embodiment, the length difference of the bonding wire 106 between the first signal terminal 102 and the lead 101 and the length difference of the bonding wire 106 between the second signal terminal 103 and the lead 101 are adjusted according to the required inductance difference.
In one embodiment, the first method described above is used to adjust the impedance distance when the receive terminal RX and transmit terminal TX are connected to the same pin 101. At this time, the number of the bonding wires 106 between the receiving terminal RX and the pin 101 is a first number, the number of the bonding wires 106 between the transmitting terminal TX and the pin 101 is a second number, and the inductance values corresponding to the bonding wires 106 are the same, and by adjusting the first number and the second number, the inductance difference between the transmitting terminal TX and the receiving terminal RX when the transmitting terminal TX and the receiving terminal RX are connected to the same pin 101 can be adjusted, so that the impedance distance between the input impedance of the receiving terminal RX and the output impedance of the transmitting terminal TX can be adjusted.
Here, as shown in fig. 4, when 1 bonding wire 106 is provided between the receiving terminal RX and the lead 101, if the required difference H is two-thirds of the inductance value, the second number is 3.
It should be noted that when a plurality of bonding wires 106 are disposed between the transmission terminal TX or the reception terminal RX and the lead 101, a corresponding number of bonding pads 105 need to be disposed on the wafer 104, so that each bonding pad 105 can be correspondingly disposed with one bonding wire 106.
Here, as shown in fig. 4, the receiving terminal RX is connected to the lead 101 using one bonding wire 106, and therefore, the number of pads 105 provided on the wafer 104 is also 1. The transmission terminal TX is connected to the pin 101 using n bonding wires 106, and thus the transmission terminal TX end is also provided with n pads 105. In the embodiment shown in fig. 4, n is an integer greater than 2.
In one embodiment, the impedance distance when the receive terminal RX and transmit terminal TX are connected to the same pin 101 is adjusted using the second method described above. At this time, the bonding wire 106 between the receiving terminal RX and the pin 101 has a first length, and the bonding wire 106 between the transmitting terminal TX and the pin 101 has a second length, which correspond to different inductances respectively. By adjusting the first length and the second length, the difference between the inductances of the transmission terminal TX and the reception terminal RX when connected to the same pin 101 can be adjusted, thereby adjusting the impedance distance between the input impedance of the reception terminal RX and the output impedance of the transmission terminal TX.
Corresponding wires can be selected from aluminum wires, gold wires, silver wires, copper wires, aluminum tapes, copper sheets, aluminum-clad copper wires and the like as the bonding wires 106 according to requirements.
In an embodiment, when the inductance value difference is within a first range, the impedance distance between the receiving terminal RX and the transmitting terminal TX when the receiving terminal RX and the transmitting terminal TX are connected to the same pin 101 is smaller than a second threshold, and a device connected to the pin 101 can achieve better impedance matching with the receiving terminal RX and better impedance matching with the transmitting terminal TX. Therefore, the number of the bonding wires 106 or the length of the bonding wires 106 may be adjusted according to the desired first range and the second threshold.
The second threshold may be set as required, and the smaller the second threshold is, the higher the probability that both the receiving terminal RX and the transmitting terminal TX operate in an impedance matching state when the pin 101 is connected to the outside. Fig. 5 is a schematic diagram of the impedance of the receiving terminal RX and the transmitting terminal TX on the smith chart of the package structure in fig. 4. It can be seen that the impedance distance between the receive terminal RX, i.e. RX marked in fig. 5, and the transmit terminal TX, i.e. TX marked in fig. 5, in fig. 5 is closer than the impedance distance between the receive terminal RX and the transmit terminal TX in fig. 1 b. Also, the embodiment shown in fig. 5 saves on-chip inductance compared to the embodiment shown in fig. 2 b.
The embodiment of the application also provides a packaging method.
Fig. 6 is a schematic flowchart illustrating steps of the packaging method according to an embodiment.
In this embodiment, the packaging method is capable of connecting the receiving terminal RX and the transmitting terminal TX to the same pin 101, and comprises the following steps:
step S501: a package housing 100 is provided, said package housing 100 being provided with pins 101.
Step S502 is to connect a plurality of signal terminals to the same pin 101, where inductance values between the signal terminals and the pin 101 are different, and the inductance values are adjusted by the bonding wires 106 connecting the signal terminals and the pin 101.
In this embodiment, the inductance value is adjusted by the bonding wire 106 connecting the signal terminal and the pin 101, so as to adjust the inductance difference between the signal terminals connected to the same pin 101, and thus adjust the impedance distance between the signal terminals connected to the same pin 101, so that the signal terminals connected to the same pin 101 can all operate in a better impedance state.
In one embodiment, the method further comprises the following steps: at least one of the signal terminals connected to the same pin 101 is grounded through a first capacitor.
The signal terminal connected with the first capacitor and the bonding wire 106 together form an LC network, and the first capacitor and the inductance of the bonding wire 106 can be used to adjust the impedance characteristic of the receiving terminal RX.
In one embodiment, the signal terminals include a receiving terminal RX and a transmitting terminal TX, and by adjusting the bonding wire 106 between the receiving terminal RX and the pin 101 and the bonding wire 106 between the transmitting terminal TX and the pin 101, the difference in inductance between the two signal terminals and the pin 101 can be adjusted, so as to adjust the impedance distance.
In this embodiment, the method further comprises the steps of: determining a required impedance distance of an input impedance of the receiving terminal RX and an output impedance of the transmitting terminal TX; the difference in inductance between the receive terminal RX and pin 101, and between the transmit terminal TX and pin 101 is determined from the impedance distance.
For example, if the impedance distance when the receiving terminal RX and the transmitting terminal TX are connected to the same pin 101 needs to be smaller than a second threshold value, so that the receiving terminal RX and the transmitting terminal TX both work in a better impedance state, it is necessary to obtain an inductance difference value corresponding to the second threshold value, and set the bonding wire 106 between the two signal terminals and the pin 101 according to the inductance difference value. Assuming that the second threshold corresponds to the difference in inductance between the two signal terminals and the pin 101 being within a first range, the bond wire 106 may be set according to the first range.
In one embodiment, when adjusting the inductance difference, the inductance value between each signal terminal and the pin 101 can be controlled by controlling the number of bonding wires 106 between each signal terminal and the pin 101.
The first signal terminal 102 and the second signal terminal 103 are connected to the same pin 101, the number of bonding wires 106 is related to an inductance difference corresponding to a difference in inductance value between the first signal terminal 102 and the pin 101 and an inductance value between the second signal terminal and the pin 101, and a relationship between the number of bonding wires 106 and the inductance difference conforms to the following equation:
Figure BDA0003283093140000101
h is the inductance difference, m is the number of bonding wires 106 between the first signal terminal 102 and pin 101, n is the number of bonding wires 106 between the second signal terminal 103 and pin 101, and L is the inductance value of each of the bonding wires 106.
In another embodiment, the inductance value between each signal terminal and the pin 101 can also be adjusted by controlling the length of the bonding wire 106 between each signal terminal and the pin 101.
In the package structure and the package method of the present application, a plurality of signal terminals are connected to the pins 101 on the same package housing 100, so that the usage amount of the pins 101 on the package housing 100 is reduced, and the size of the package housing 100 is reduced. In addition, the package structure and the package method adjust inductance values between each signal terminal and the pin 101 through the bonding wire 106 arranged between the pin 101 and the signal terminal, so that different inductance values can be provided between each signal terminal and the pin 101, and an inductance difference value is provided between each signal terminal and the pin 101, thereby adapting to impedance matching requirements after each signal terminal is connected to the same pin 101, reducing impedance distance when each signal terminal transmits and receives signals through the same pin 101, and optimizing impedance characteristics when each signal terminal is connected to the outside through the same pin 101.
The above-mentioned embodiments are only examples of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent flow transformations made by the contents of the specification and the drawings, such as the combination of technical features between the embodiments and the direct or indirect application to other related technical fields, are also included in the scope of the present application.

Claims (12)

1. A package structure, comprising:
a wafer capable of being used to form a circuit structure, the wafer having at least two signal terminals for connecting to an external circuit;
the packaging shell is used for packaging the wafer and is provided with pins;
there are a plurality of the signal terminals connected to the same pin, inductance values between the respective signal terminals and the pin are different, and the inductance values are adjusted by bonding wires connecting the signal terminals and the pin.
2. The package structure of claim 1, wherein at least one of the plurality of signal terminals connected to the same pin is grounded via a first capacitor.
3. The package structure according to claim 1, wherein there are two signal terminals connected to the same pin, and of the two signal terminals, a first signal terminal is used for receiving signals and a second signal terminal is used for transmitting signals.
4. The package structure of claim 3, wherein the bond wires between the first signal terminal and the pin and the bond wires between the second signal terminal and the pin have different numbers so that an inductance value between the first signal terminal and the pin and an inductance value between the second signal terminal and the pin are different.
5. The package structure of claim 4, wherein the number of bond wires between the first signal terminal and a lead and the number of bond wires between the second signal terminal and a lead are set according to a desired inductance difference, and the number of bond wires conforms to the following equation:
Figure FDA0003283093130000011
h is the inductance difference corresponding to a difference between an inductance value between the first signal terminal and the pin and an inductance value between the second signal terminal and the pin, m is the number of bonding wires between the first signal terminal and the pin, n is the number of bonding wires between the second signal terminal and the pin, and L is an inductance value of each bonding wire.
6. The package structure of claim 3, wherein the bond wire between the first signal terminal and the pin and the bond wire between the second signal terminal and the pin have different lengths such that an inductance value between the first signal terminal and the pin and an inductance value between the second signal terminal and the pin are different.
7. The package structure of claim 6, wherein the difference in the lengths of the bond wires between the first signal terminal and the lead and the bond wires between the second signal terminal and the lead are adjusted according to a desired inductance difference.
8. A packaging method for packaging a die, the die being capable of being used to form a circuit structure, the die having at least two signal terminals for connection to external circuitry, the packaging method comprising the steps of:
providing a packaging shell, wherein the packaging shell is provided with pins;
and connecting a plurality of signal terminals to the same pin, wherein the inductance value between each signal terminal and the pin is different, and the inductance value is adjusted through a bonding wire connecting the signal terminals and the pin.
9. The method of packaging of claim 8, further comprising the steps of: at least one of the signal terminals connected to the same pin is grounded through a first capacitor.
10. The method of packaging of claim 8, wherein an inductance value between each signal terminal and the pin is controlled by controlling a number of bond wires between each signal terminal and the pin.
11. The packaging method according to claim 10, wherein the first signal terminal and the second signal terminal are connected to the same pin, the number of bonding wires is related to an inductance difference corresponding to a difference in inductance value between the first signal terminal and the pin and an inductance value between the second signal terminal and the pin, and the relationship between the number of bonding wires and the inductance difference conforms to the following equation:
Figure FDA0003283093130000021
h is the inductance difference, m is the number of bonding wires between the first signal terminal and a pin, n is the number of bonding wires between the second signal terminal and a pin, and L is an inductance value of each of the bonding wires.
12. The packaging method according to claim 8, wherein an inductance value between each signal terminal and the pin is adjusted by controlling a length of a bonding wire between each signal terminal and the pin.
CN202111138335.6A 2021-09-27 2021-09-27 Packaging structure and packaging method Pending CN113921496A (en)

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