CN113920929A - Display screen bit depth expansion device and method and LED display screen - Google Patents
Display screen bit depth expansion device and method and LED display screen Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000012545 processing Methods 0.000 claims abstract description 69
- 238000000605 extraction Methods 0.000 claims description 36
- 230000015572 biosynthetic process Effects 0.000 claims description 26
- 238000003786 synthesis reaction Methods 0.000 claims description 26
- 230000010365 information processing Effects 0.000 claims description 15
- 230000008569 process Effects 0.000 claims description 11
- 230000007480 spreading Effects 0.000 claims description 8
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- 238000004590 computer program Methods 0.000 description 7
- 235000019557 luminance Nutrition 0.000 description 4
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- 238000000354 decomposition reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000284 extract Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
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- 230000002596 correlated effect Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
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- 230000009467 reduction Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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Abstract
The embodiment of the application provides a display screen bit depth expansion device and method and an LED display screen, and belongs to the technical field of display control. The device includes: a data processing module; a bit depth extension module; and, an output control module; the input end of the bit depth expansion module is connected with the output end of the data processing module; the output end of the bit depth expansion module is connected with the input end of the output control module; the data processing module is used for processing input video data and inputting the processed video data into the bit depth expansion module in a flowing mode, the bit depth expansion module carries out bit depth expansion on the input data and then outputs the data to the output control module, and the output control module inputs the data subjected to the bit depth expansion into the LED lamp panel. According to the LED display screen, the color bit depth of the display screen is expanded on the premise that the cost of the LED display screen is not increased, lower brightness can be displayed on the display screen, and the low-brightness display performance is enhanced.
Description
Technical Field
The application relates to the technical field of display control, in particular to a display screen bit depth expansion device and method and an LED display screen.
Background
At present, the gray scale display of the mainstream LED display screen is realized by a PWM (pulse width modulation) mode, and the gray scale control is realized by the number of PWM pulses in a unit time (usually, the time of one image frame), for example, 8191 PWM pulse counts in the unit time of the display screen with a color bit depth of 13bit, 16383 PWM pulse counts in the unit time of the display screen with a color bit depth of 14 bit. After the control layout of the driving chip of the display screen is determined, the maximum PWM pulse count which can be reached by the driving chip is also determined, so the color bit depth is also determined.
However, due to cost considerations, the LED driving chip generally needs to control the LEDs in multiple rows (columns) in a time-sharing manner, so that the color bit depth of the display screen is positively correlated with the cost.
Meanwhile, most of the current LED driving chips are driven by constant current, so that two methods for adjusting the screen brightness are provided, the driving current of the LED driving chips is adjusted, and the maximum counting of PWM pulses is reduced. In the former, due to the limitation of the LED driving chip in a low current, reducing the driving current increases the current error between the driving chips, and the display unevenness phenomenon appears on the screen to be intensified. The brightness of the screen is usually reduced by reducing the maximum count of PWM pulses, but the reduction of brightness has the side effect of reducing the color bit depth.
In addition, the LED on-time corresponding to 1 PWM pulse in unit time determines the brightness of the first-level gray scale of the display screen, and due to the high brightness characteristic of the LED display screen, the problem that the display brightness of the first-level gray scale is too high often exists, and the LED display screen is particularly applied to indoor display screens.
Therefore, how to solve the above problems is a problem that needs to be solved at present.
Disclosure of Invention
The application provides a display screen bit depth expanding device and method and an LED display screen, and aims to solve the problems.
In a first aspect, the present application provides a display screen bit depth expanding apparatus, where the apparatus includes: a data processing module; a bit depth extension module; and, an output control module; the input end of the bit depth expansion module is connected with the output end of the data processing module; the output end of the bit depth expansion module is connected with the input end of the output control module; the data processing module is used for processing input video data and inputting the processed video data into the bit depth expansion module in a flowing mode, the bit depth expansion module carries out bit depth expansion on the input data and then outputs the data to the output control module, and the output control module inputs the data subjected to the bit depth expansion into the LED lamp panel.
In the implementation process, the bit depth expansion module is arranged, so that the bit depth expansion of the input video data is carried out, the color bit depth of the display screen is expanded on the premise of not increasing the cost of the LED display screen, lower brightness can be displayed on the display screen, and the low-brightness display performance is enhanced.
In a possible embodiment, the data processing module comprises a video decoding module and an image processing module; the input end of the video decoding module is used for receiving video data; the output end of the video decoding module is connected with the input end of the image processing module; and the output end of the image processing module is connected with the input end of the bit depth expansion module.
In a possible embodiment, the bit depth extension module comprises: a frame information processing module; an extension bit extraction module; a valid bit extraction module; a jitter spreading module; and, a data synthesis module;
the input ends of the frame information processing module, the extended bit extraction module and the effective bit extraction module are respectively connected with the output end of the image processing module; the frame information processing module is used for analyzing image frame information and position information of pixels from a data stream input by the image processing module; the output ends of the frame information processing module and the extension bit extraction module are both connected with the input end of the jitter extension module, and the extension bit extraction module is used for extracting low-order bit depth data in a data stream input by the image processing module and sending the low-order bit depth data to the jitter extension module; the output ends of the jitter extension module and the valid bit extraction module are both connected with the input end of the data synthesis module, and the valid bit extraction module is used for extracting high-order bit depth data in a data stream input by the image processing module and sending the high-order bit depth data to the data synthesis module; the jitter extension module is used for determining whether unit brightness data is inserted into a pixel according to the image frame information, the position information of the pixel and the bit depth data of the lower bits, generating new data and sending the new data to the data synthesis module; the output end of the data synthesis module is connected with the input end of the output control module, and the data synthesis module is used for synthesizing the new data and the high-order bit depth data to generate the bit depth data of the preset receiving format of the LED lamp panel.
In a possible embodiment, the frame information processing module includes: a frame rate control module and a position control module; the input ends of the frame rate control module and the position control module are respectively connected with the output end of the image processing module; the output ends of the frame rate control module and the position control module are connected with the input end of the jitter expansion module; the frame rate control module is used for analyzing image frame information from a data stream input by the image processing module; and the position control module is used for analyzing the position information of the pixel from the data stream input by the image processing module.
In a possible embodiment, the bit depth extension module further comprises: a delay module; the input end of the delay module is connected with the output end of the valid bit extraction module, and the output end of the delay module is connected with the input end of the data synthesis module; the delay module is used for delaying the time of inputting the bit depth data of the high order bits output by the effective bit extraction module into the data synthesis module.
In a possible embodiment, at least two of the video decoding module, the image processing module and the output control module are integrated on the same board.
In a possible embodiment, the video decoding module, the image processing module and the output control module are all integrated in the same FPGA chip.
In a possible embodiment, the video decoding module, the image processing module and the output control module are respectively integrated on different boards.
In a second aspect, the present application provides a display screen bit depth expanding method, where the method is applied to the display screen bit depth expanding apparatus according to any one of the first aspects, and the method includes: the data processing module processes input video data to obtain processed video data; the bit depth expansion module carries out bit depth expansion on the processed video data to obtain expanded data; and the output control module inputs the expanded data to the LED lamp panel.
In a third aspect, an embodiment of the present application provides an LED display screen, including: the LED display screen comprises an LED lamp panel and the display screen bit depth expansion device according to any one of the first aspect; the display screen position depth expanding device is connected with the LED lamp panel.
In the implementation process, the display screen bit depth expansion device is arranged to expand the color bit depth of the LED display screen through the display screen bit depth expansion device, so that the cost of the LED display screen can be effectively reduced, meanwhile, the display screen can display lower brightness, and the low-brightness display performance is enhanced.
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In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic functional block diagram of a display screen bit depth expansion apparatus according to an embodiment of the present disclosure;
fig. 2 is a schematic functional block diagram of another display screen bit depth expansion apparatus according to an embodiment of the present disclosure;
fig. 3 is a schematic functional block diagram of another display screen bit depth expansion apparatus according to an embodiment of the present disclosure;
fig. 4 is a schematic functional block diagram of another display screen bit depth expansion apparatus according to an embodiment of the present disclosure;
fig. 5 is a schematic partial pixel diagram illustrating bit depth data of a lower bit in a display screen bit depth expansion apparatus according to an embodiment of the present disclosure;
fig. 6 is a schematic partial pixel diagram illustrating bit depth data of a further extended lower bit in a display screen bit depth extension apparatus according to an embodiment of the present disclosure;
fig. 7 is a flowchart of a method for extending a display screen bit depth according to an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of an LED display screen according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of another LED display screen provided in the embodiment of the present application.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the present application will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Examples
Referring to fig. 1 to 4, a display screen bit depth expanding apparatus 100 includes: a data processing module 110; a bit depth expansion module 130; and an output control module 150.
Wherein, the input end of the bit depth extension module 130 is connected with the output end of the data processing module 110; the output end of the bit depth expansion module 130 is connected with the input end of the output control module 150; the data processing module 110 is configured to process input video data and then input the processed video data to the bit depth expansion module 130, the bit depth expansion module 130 performs bit depth expansion on the input data and then outputs the data to the output control module 150, and the output control module 150 is configured to input the data subjected to bit depth expansion to the LED lamp panel.
The display screen bit depth expansion apparatus 100 is configured to perform bit depth expansion on video data and output the expanded data to an LED screen (LED panel).
It can be understood that the display screen bit depth expanding device 100 may be a component inside the display screen or an external device. Here, the number of the carbon atoms is not particularly limited.
It can be understood that, in this embodiment, by setting the bit depth expansion module 130, bit depth expansion is performed on the input video data, so that the color bit depth of the display screen is expanded on the premise of not increasing the cost of the LED display screen, and meanwhile, the display screen can display lower brightness, thereby enhancing the low-brightness display performance.
That is to say, this application need not to increase the cost (the cost of LED lamp plate and driver chip) of LED display screen itself.
In a possible embodiment, the data processing module 110 comprises a video decoding module 111 and an image processing module 113.
Wherein, the input end of the video decoding module 111 is used for receiving video data; the output end of the video decoding module 111 is connected with the input end of the image processing module 113; an output terminal of the image processing module 113 is connected to an input terminal of the bit depth expansion module 130.
It is understood that the video data may be transmitted to the video decoding module 111 through a video line or by other means (such as wireless transmission). Here, the number of the carbon atoms is not particularly limited.
It is understood that the video decoding module 111 is used to perform a decoding operation on input video data. And the image processing module 113 is used for performing image processing on the decoded data.
In a possible embodiment, at least two of the video decoding module 111, the image processing module 113 and the output control module 150 are integrated on the same board.
In a possible embodiment, the video decoding module 111, the image processing module 113 and the output control module 150 are all integrated in the same FPGA (field programmable gate array) chip.
In a possible embodiment, the video decoding module 111, the image processing module 113 and the output control module 150 are integrated on different boards (i.e. PCB boards).
In a possible embodiment, the bit depth extension module 130 includes: a frame information processing module 131; an extension bit extraction module 132; a valid bit extraction module 133; a jitter spreading module 134; and a data synthesis module 135.
Wherein, the input end of the frame information processing module 131 is connected with the output end of the image processing module 113; an output of the frame information processing block 131 is connected to an input of a jitter spreading block 134. The frame information processing module 131 is configured to parse image frame information and pixel position information from the data stream input by the image processing module 113, and send the image frame information and the pixel position information to the jitter spreading module 134.
In a possible embodiment, the frame information processing module 131 includes: a frame rate control module 1311 and a position control module 1313.
Optionally, an input end of the frame rate control module 1311 is connected to an output end of the image processing module 113; an output terminal of the frame rate control module 1311 is connected to an input terminal of the jitter extension module 134.
The frame rate control module 1311 is configured to parse image frame information from the data stream input by the image processing module 113, and send the image frame information to the jitter extension module 134.
Optionally, an input terminal of the position control module 1313 is connected to an output terminal of the image processing module 113; an output of the position control module 1313 is connected to an input of the jitter spreading module 134.
The position control module 1313 is configured to parse the position information of the pixel from the data stream input by the image processing module 113, and send the position information of the pixel to the jitter spreading module 134.
Optionally, an input of the extended bit extraction module 132 is connected to an output of the image processing module 113, and an output of the extended bit extraction module 132 is connected to an input of the jitter extension module 134.
The extended bit extraction module 132 is configured to extract lower bit depth data in the data stream input by the image processing module 113, and send the lower bit depth data to the jitter extension module 134.
For example, assuming that the preset receiving format received by the LED display screen is 14bit, the received bit depth data is 14bit, the bit depth data input by the image processing module 113 is 16bit, at this time, the extended bit extraction module 132 extracts 2bit depth data (i.e., low bit depth data) from the 16bit depth data, that is, the extended bit extraction module 132 separates the low bit 2bit data in the 16bit depth data, and then enters the jitter control module 134.
Further, for example, as shown in fig. 5, it is an example of the present invention in the case of extending the bit depth of 2 bit. By means of adjacent 4-frame integration, the schematic diagram illustrates the evolution of 4 adjacent pixels in 4-frame time, and describes the cases of 1/4, 2/4 and 3/4 unit luminances generated from top to bottom. Each square indicates the light emission of one pixel, the gray filling indicates 1 luminance unit light emission, and the white indicates no light emission.
When light emission with 1/4 unit brightness is to be generated on one pixel, the light emission with unit brightness is generated only once in 4 continuous frames, and similarly, if light emission with 2/4 unit brightness is to be generated on one pixel, the light emission with unit brightness is generated twice in 4 continuous frames.
Continuing with the above example as an example, as shown in fig. 6, which is further developed based on fig. 5, also for the example of extending the 2-bit depth, according to the LED display screen usually consists of three-color red, green and blue LED lamps, one pixel is decomposed into three pixels of red, green and blue, the upper part of fig. 6 is the development situation of 1/4 units of luminance displayed in example 5, the lower part of fig. 6 is that after the pixels are decomposed, red, green and blue are staggered in time and space, finally, the integration result of the light emission amount on each pixel in 4 frames is equivalent to the result of no decomposition, and a smoother effect can be achieved visually after decomposition.
Optionally, an input of the valid bit extraction module 133 is connected to an output of the image processing module 113, and an output of the valid bit extraction module 133 is connected to an input of the data synthesis module 135.
The significant bit extraction module 133 is configured to extract the high-order bit depth data in the data stream input by the image processing module 113, and send the high-order bit depth data to the data synthesis module 135.
Continuing with the above example as an example, the extended bit extraction module 132 extracts 2-bit depth data (i.e. lower bit depth data) from the 16bit depth data, that is, the extended bit extraction module 132 separates the lower 2-bit data from the 16bit depth data, and at this time, the effective bit extraction module 133 separates the upper 14-bit data from the 16bit depth data.
Optionally, an output of the jitter spreading module 134 is connected to an input of the data synthesis module 135.
The dither expansion module 134 is configured to determine whether to insert one unit luminance data into a pixel according to the image frame information, the position information of the pixel, and the lower bit depth data, generate new data, and send the new data to the data synthesis module 135.
Optionally, an output end of the data synthesis module 135 is connected to an input end of the output control module 150, and the data synthesis module 135 is configured to synthesize the new data and the high-order bit depth data to generate bit depth data in a preset receiving format of the LED lamp panel.
In a possible embodiment, the bit depth extension module 130 further includes: a delay module 136.
Optionally, an input of the delay module 136 is connected to an output of the valid bit extraction module 133, and an output of the delay module 136 is connected to an input of the data synthesis module 135.
The delay module 136 is configured to delay the time when the high-order bit depth data output by the significant bit extraction module 133 is input to the data synthesis module 135. Specifically, the delay module 136 is used to keep the same processing beat as the extension bit extraction module 132, so that the bit depth data of the upper bits and the data output by the jitter extension module 134 to the data synthesis module 135 can be achieved synchronously.
The modules disclosed in the present application may be software functional modules or hardware modules, and are not limited in particular herein.
Referring to a flowchart of a display screen bit depth expanding method shown in fig. 7, the method is applied to a display screen bit depth expanding device, and the method specifically includes the following steps:
step S201, the data processing module processes input video data to obtain processed video data;
step S203, the bit depth expansion module performs bit depth expansion on the processed video data to obtain expanded data;
and S205, the output control module inputs the expanded data to an LED lamp panel.
It should be noted that, the specific implementation manner of step S201 to step S205 may refer to the description in the display screen bit depth expansion apparatus, and is not described herein again.
Referring to the schematic structural diagrams of the LED display screen shown in fig. 8 and 9, the LED display screen 300 includes a display screen bit depth expansion device 100 and an LED lamp panel 400.
The LED lamp panel 400 is connected to the display screen bit depth expansion device 100.
Optionally, the light emitting device in the LED lamp panel 400 may be a mi i LED, a mi cro LED, or an OLED. Here, the number of the carbon atoms is not particularly limited.
Optionally, the LED lamp panel 400 may be formed by splicing a plurality of small-sized lamp panels, or may be a full-page LED lamp panel.
It can be understood that, in the embodiment, by setting the display screen bit depth expanding device 100, the color bit depth of the LED display screen 300 is expanded by the display screen bit depth expanding device 100, so that the cost of the LED display screen 300 can be effectively reduced, and meanwhile, the display screen can display lower brightness, and the low-brightness display performance is enhanced.
Further, the present embodiment also provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processing device, the method for extending the bit depth of the display screen provided in any one of the foregoing embodiments is performed.
The computer program product of the display screen bit depth extension method provided in the embodiment of the present application includes a computer readable storage medium storing a program code, where instructions included in the program code may be used to execute the apparatus described in the foregoing method embodiment, and specific implementation may refer to the method embodiment, and is not described herein again.
It should be noted that the above embodiments may be implemented in whole or in part by software, hardware (e.g., a circuit), firmware, or any other combination. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. The procedures or functions according to the embodiments of the present application are wholly or partially generated when the computer instructions or the computer program are loaded or executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more collections of available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium may be a solid state disk.
It should be understood that the term "and/or" herein is merely one type of association relationship that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. In addition, the "/" in this document generally indicates that the former and latter associated objects are in an "or" relationship, but may also indicate an "and/or" relationship, which may be understood with particular reference to the former and latter text.
In the present application, "at least one" means one or more, "a plurality" means two or more. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.
It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Claims (10)
1. A display screen bit depth expansion apparatus, the apparatus comprising:
a data processing module;
a bit depth extension module; and the number of the first and second groups,
an output control module;
the input end of the bit depth expansion module is connected with the output end of the data processing module; the output end of the bit depth expansion module is connected with the input end of the output control module;
the data processing module is used for processing input video data and inputting the processed video data into the bit depth expansion module in a flowing mode, the bit depth expansion module carries out bit depth expansion on the input data and then outputs the data to the output control module, and the output control module inputs the data subjected to the bit depth expansion into the LED lamp panel.
2. The apparatus of claim 1, wherein the data processing module comprises a video decoding module and an image processing module;
the input end of the video decoding module is used for receiving video data;
the output end of the video decoding module is connected with the input end of the image processing module; and the output end of the image processing module is connected with the input end of the bit depth expansion module.
3. The apparatus of claim 2, wherein the bit depth expansion module comprises:
a frame information processing module;
an extension bit extraction module;
a valid bit extraction module;
a jitter spreading module; and the number of the first and second groups,
a data synthesis module;
the input ends of the frame information processing module, the extended bit extraction module and the effective bit extraction module are respectively connected with the output end of the image processing module; the frame information processing module is used for analyzing image frame information and position information of pixels from a data stream input by the image processing module;
the output ends of the frame information processing module and the extension bit extraction module are both connected with the input end of the jitter extension module, and the extension bit extraction module is used for extracting low-order bit depth data in a data stream input by the image processing module and sending the low-order bit depth data to the jitter extension module;
the output ends of the jitter extension module and the valid bit extraction module are both connected with the input end of the data synthesis module, and the valid bit extraction module is used for extracting high-order bit depth data in a data stream input by the image processing module and sending the high-order bit depth data to the data synthesis module; the jitter extension module is used for determining whether unit brightness data is inserted into a pixel according to the image frame information, the position information of the pixel and the bit depth data of the lower bits, generating new data and sending the new data to the data synthesis module;
the output end of the data synthesis module is connected with the input end of the output control module, and the data synthesis module is used for synthesizing the new data and the high-order bit depth data to generate the bit depth data of the preset receiving format of the LED lamp panel.
4. The apparatus of claim 3, wherein the frame information processing module comprises: a frame rate control module and a position control module;
the input ends of the frame rate control module and the position control module are respectively connected with the output end of the image processing module;
the output ends of the frame rate control module and the position control module are connected with the input end of the jitter expansion module;
the frame rate control module is used for analyzing image frame information from a data stream input by the image processing module;
and the position control module is used for analyzing the position information of the pixel from the data stream input by the image processing module.
5. The apparatus of claim 3 or 4, wherein the bit depth expansion module further comprises:
a delay module;
the input end of the delay module is connected with the output end of the valid bit extraction module, and the output end of the delay module is connected with the input end of the data synthesis module;
the delay module is used for delaying the time of inputting the bit depth data of the high order bits output by the effective bit extraction module into the data synthesis module.
6. The apparatus of claim 2, wherein at least two of the video decoding module, the image processing module, and the output control module are integrated on a same board.
7. The apparatus of claim 2, wherein the video decoding module, the image processing module and the output control module are all integrated in the same FPGA chip.
8. The apparatus of claim 2, wherein the video decoding module, the image processing module and the output control module are integrated on different boards respectively.
9. A display screen bit depth expansion method, which is applied to the display screen bit depth expansion device according to any one of claims 1 to 8, and comprises:
the data processing module processes input video data to obtain processed video data;
the bit depth expansion module carries out bit depth expansion on the processed video data to obtain expanded data;
and the output control module inputs the expanded data to the LED lamp panel.
10. An LED display screen, comprising: the LED lamp panel and the display screen bit depth expanding device as claimed in any one of claims 1 to 8;
the display screen position depth expanding device is connected with the LED lamp panel.
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