CN113917881B

CN113917881B - Radio frequency parameter automatic adjusting system and method based on FPGA

Info

Publication number: CN113917881B
Application number: CN202111513831.5A
Authority: CN
Inventors: 邹毅; 王彦杰; 李垚; 袁纯; 王凌云
Original assignee: Shenzhen Huajie Zhitong Technology Co ltd
Current assignee: Shenzhen Huajie Zhitong Technology Co ltd
Priority date: 2021-12-13
Filing date: 2021-12-13
Publication date: 2022-08-05
Anticipated expiration: 2041-12-13
Also published as: CN113917881A

Abstract

The invention discloses a radio frequency parameter automatic regulating system and method based on FPGA, in the radio frequency parameter automatic regulating system based on FPGA of the invention, including: the scene module is used for acquiring a use scene; the input module is used for acquiring the parameter characteristic vector needing to be re-adjusted and inputting the parameter characteristic vector into the FPGA module; and the FPGA module is used for selecting and configuring a parameter adjusting algorithm according to the parameter characteristic vector and regenerating a new hardware algorithm logic according to the parameter adjusting algorithm. The radio frequency parameter automatic adjusting system is designed by utilizing the hardware programmability, high performance and low power consumption characteristics of the FPGA and introducing the algorithm of machine learning artificial intelligence, and under the novel system architecture, a new machine learning algorithm can be dynamically selected and generated according to the requirements of the current use scene, and the generated machine learning algorithm is guided to automatically adjust and optimize the parameters of each module according to the requirements of the current use scene.

Description

Radio frequency parameter automatic adjusting system and method based on FPGA

Technical Field

The invention relates to the technical field of integrated circuit design, in particular to a radio frequency parameter automatic adjusting system and method based on an FPGA.

Background

The high-efficiency 5G radio frequency front end integrated transceiving system chip relates to the high-efficiency collocation of a plurality of templates such as a transceiving Antenna (Rx/Tx Antenna), a radio frequency Power Amplifier (PA), a Low Noise Amplifier (LNA), a Low Pass Filter (LPF), a Mixer (Mixer), a Variable Gain Amplifier (VGA), an analog-to-digital/digital-to-analog converter (ADC, DAC) and the like, and can meet the requirement of the integral design of an integrated transceiving system.

The modules have respective performance parameters which need to reach the standard and be accurately adjusted and optimized, and due to the interconnection among the modules, the adjustment of the respective parameters can affect the output performance of other modules, so that the overall performance index of the system is affected.

The existing method basically depends on manual adjustment, a field engineer determines which parameters to adjust according to a client scene, and the parameters are gradually adjusted and optimized by applying a try and error method (try and error) according to experience. The method for manually adjusting the parameters not only requires field technicians to have certain corresponding professional knowledge and relevant experience for various different field application scenes, but also has quite time-consuming realization process, and can not quickly readjust the parameters of the whole system according to the field reality when the use environment is changed so as to ensure the optimal overall performance of the system. In addition, the process of manually adjusting the parameters cannot meet the requirements of current 5G deployment on high-efficiency intellectualization and automation, and cannot keep up with the design requirements of future 6G and 7G radio frequency front ends with higher frequency and bandwidth. Therefore, it is an urgent need to quickly, accurately and effectively optimize and adjust the parameters of each module of the 5G rf front-end transceiver system.

Disclosure of Invention

In view of the above problems, the present invention provides an automatic rf parameter adjusting system and method based on FPGA, which solves the problem that parameters cannot be adaptively adjusted again when the usage scenario changes in the existing rf front-end module.

According to a first aspect of the present invention, an FPGA-based radio frequency parameter automatic adjusting system is disclosed, which comprises:

the scene module is used for acquiring a use scene;

the input module is used for acquiring the parameter characteristic vector needing to be re-adjusted and inputting the parameter characteristic vector into the FPGA module;

and the FPGA module is used for selecting and configuring a parameter adjusting algorithm according to the parameter characteristic vector and regenerating a new hardware algorithm logic according to the parameter adjusting algorithm.

Optionally, for the FPGA-based radio frequency parameter automatic adjustment system, the FPGA module has a storage resource, and the usage scenario is stored in the storage resource.

Optionally, for the FPGA-based radio frequency parameter automatic adjustment system, the restriction condition of the obtaining usage scenario includes at least one of frequency, power, and accuracy.

Optionally, for the FPGA-based radio frequency parameter automatic adjusting system, the input module includes at least one of a BB ADC/DAC, an OFFSET DAC, a BG LPF, a BG VGA, a Mixer, an RF LO, an RF PA, and an LNA.

Optionally, for the FPGA-based radio frequency parameter automatic adjustment system, the parameter feature vector includes: at least one of a bias voltage, a bias current, a number of DC offset controls, a number of bandwidth adjustment bits, a number of gain adjustment bits, and a filter coefficient.

According to a second aspect of the present invention, there is provided a method for automatically adjusting radio frequency parameters based on an FPGA, comprising:

acquiring a use scene;

acquiring a parameter feature vector needing to be re-adjusted and inputting the parameter feature vector into an FPGA module;

and selecting and configuring a parameter adjusting algorithm according to the parameter feature vector, and regenerating a new hardware algorithm logic according to the parameter adjusting algorithm.

Optionally, for the method for automatically adjusting radio frequency parameters based on the FPGA, acquiring a use scenario includes: inputting a new usage scenario description or calling a pre-stored usage scenario.

Optionally, for the FPGA-based radio frequency parameter automatic adjustment method, selecting and configuring a parameter adjustment algorithm according to the parameter feature vector, and regenerating a new hardware algorithm logic according to the parameter adjustment algorithm includes:

and selecting a corresponding parameter adjusting algorithm by using a machine learning algorithm library predefined by the FPGA according to the parameter characteristic vector, automatically selecting the machine learning algorithm from the machine learning algorithm library, and configuring the algorithm according to requirements.

Optionally, the step of, for the FPGA-based radio frequency parameter automatic adjustment method, and regenerating a new hardware algorithm logic according to the parameter adjustment algorithm includes: the selected parameter adjusting algorithm is called into an EEPROM of the FPGA and then operated by a RAM called by the FPGA, and programming is realized on the internal configurable logic module, the output and input module and the internal connecting line.

Optionally, the method for automatically adjusting the radio frequency parameters based on the FPGA further includes: acquiring real-time parameter data samples, automatically adjusting and optimizing parameters according to the requirements of the initial client application scene, and terminating when an adjusting and optimizing termination condition is reached;

in the parameter adjusting process, when the extracted feature vector needs to be modified, the parameters needing to be introduced are re-extracted.

Compared with the prior art, the radio frequency parameter automatic regulating system based on the FPGA comprises: the scene module is used for acquiring a use scene; the input module is used for acquiring the parameter characteristic vector needing to be re-adjusted and inputting the parameter characteristic vector into the FPGA module; and the FPGA module is used for selecting and configuring a parameter adjusting algorithm according to the parameter characteristic vector and regenerating a new hardware algorithm logic according to the parameter adjusting algorithm. The radio frequency parameter automatic adjusting system is designed by utilizing the hardware programmability, high performance and low power consumption characteristics of the FPGA and introducing the algorithm of machine learning artificial intelligence, and under the novel system architecture, a new machine learning algorithm can be dynamically selected and generated according to the requirements of the current use scene, and the generated machine learning algorithm is guided to automatically adjust and optimize the parameters of each module according to the requirements of the current use scene.

Drawings

Fig. 1 is a schematic diagram of an FPGA-based rf parameter automatic adjusting system according to the present invention.

Fig. 2 is a first schematic flow chart of the method for automatically adjusting radio frequency parameters based on the FPGA of the present invention.

Fig. 3 is a schematic flow diagram of a method for automatically adjusting radio frequency parameters based on an FPGA according to the second embodiment of the present invention.

Detailed Description

The system and method for automatic adjustment of rf parameters based on FPGA of the present invention will be described in more detail with reference to the schematic drawings, in which preferred embodiments of the present invention are shown, it being understood that those skilled in the art can modify the invention described herein while still achieving the advantageous effects of the present invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.

The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.

Example one

The embodiment 1 provides an FPGA-based rf parameter automatic adjusting system, and the embodiment described below with reference to the drawings is exemplary and is only used for explaining the present invention, and is not to be construed as limiting the present invention.

Referring to fig. 1, an embodiment of the present invention discloses an FPGA-based rf parameter automatic adjusting system, which includes:

the scene module is used for acquiring a use scene;

The FPGA module introduces a machine learning artificial intelligence algorithm, and can automatically select the algorithm and perform optimization updating.

Therefore, the radio frequency parameter automatic adjusting system based on the FPGA provides possibility for self-adaption parameter readjustment under the condition of using scene change.

Example two

This embodiment 2 may be further improved on the basis of embodiment 1, and the description thereof will be omitted for the same or similar parts. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. Specifically, the present embodiment includes:

in the embodiment of the present invention, the FPGA module has a storage resource, and the usage scenario is stored in the storage resource, such as a solid state disk SSD. The usage scenario may be invoked directly from a storage resource. For scenes that do not yet exist in the storage resource, it can be obtained by direct input.

Specifically, generally, a simpler scene such as a mobile phone terminal or an industrial internet of things can be stored.

The description of the usage scenario is determined by the client application, and the final selection of parameters is directly related to the actual needs of the final client application, including the requirements on operating frequency, power, accuracy, etc., therefore, the constraints on acquiring the usage scenario include at least one of frequency, power, accuracy.

In an embodiment of the present invention, the input module includes at least one of BB ADC/DAC, OFFSET DAC, BG LPF, BG VGA, Mixer, RF LO, RF PA, LNA. In addition, the input module may also include other types according to actual needs, and those skilled in the art may adjust the input module according to needs.

Further, the parameter feature vector includes: at least one of a bias voltage, a bias current, a DC offset control number, a number of bandwidth adjustment bits, a number of gain adjustment bits, and a filter coefficient.

And selecting a corresponding parameter adjusting algorithm by using a machine learning algorithm library predefined by the FPGA through the generated parameter characteristic vector, automatically selecting the machine learning algorithm from the machine learning algorithm library, and configuring the algorithm according to requirements.

In the embodiment of the present invention, the configuration of the parameter adjustment algorithm will depend on the relationship between the actually selected parameter feature vectors and the called algorithm.

After the algorithm is selected, the system can utilize the high-performance Reconfigurable computing Logic (Reconfigurable Logic) of the FPGA module to regenerate a new hardware algorithm Logic according to the algorithm. This step can be realized by calling the algorithm selected by the algorithm library into an EEPROM (nonvolatile electrically-written and electrically-erased programmable read only memory) related to the FPGA, and then running the algorithm by a RAM (random access memory) called by the FPGA, so as to program the internal configurable Logic module clb (configurable Logic Block), the Input/Output module I/OB (Input/Output Block), and the Interconnect (Interconnect).

Furthermore, the FPGA module can also control the tuning process, for example, according to the convergence of the inputted optimization conditions and other factors, such as the operation time and power consumption. Especially for the application sensitive to the time delay of the parameter adjusting process, the convergence of the optimization condition can be temporarily relaxed to shorten the operation time, so that the adjusted parameters can be directly put into use.

The invention can also obtain new data samples in the online operation process, gradually improve the parameter adjusting performance and finally reach a satisfactory convergence value.

Furthermore, the FPGA module may further re-extract parameters to be introduced when the extracted parameter feature vector needs to be modified in the parameter adjusting process, and then re-configure the algorithm according to the current actual situation.

In the invention, a large number of parameters which need to be adjusted of each module of the radio frequency can be adjusted based on the programmable flexibility of the FPGA, so the solution based on the invention has unique expansibility.

The invention fully utilizes the high-performance reconfigurable characteristic of the FPGA to dynamically adjust states of a using scene on a parameter adjusting algorithm to generate different algorithm logics, thereby having excellent self-adaptability.

The FPGA module can prefabricate a large number of learning algorithm libraries or trained algorithm models, and can rapidly deploy corresponding algorithms to adjust and optimize parameters during scene change. Meanwhile, the framework of the invention also utilizes the good human-computer interface of the FPGA, can deploy or update a new algorithm or model, can adapt to wider application environment and has good flexibility.

EXAMPLE III

The embodiment 3 provides an FPGA-based radio frequency parameter automatic adjustment method, and the embodiment described below with reference to the drawings is exemplary and is only used for explaining the present invention, and is not to be construed as limiting the present invention.

Referring to fig. 2, embodiment 3 of the present invention discloses an FPGA-based radio frequency parameter automatic adjustment method, including:

step S1, acquiring a use scene;

step S2, acquiring the parameter feature vector needing to be re-adjusted and inputting the parameter feature vector into the FPGA module;

and step S3, selecting and configuring a parameter adjusting algorithm according to the parameter feature vector, and regenerating a new hardware algorithm logic according to the parameter adjusting algorithm.

Specifically, for step S1, acquiring the usage scenario includes: inputting a new usage scenario description or calling a pre-stored usage scenario.

For step S3, the steps of selecting and configuring a parameter tuning algorithm according to the parameter feature vector, and regenerating a new hardware algorithm logic according to the parameter tuning algorithm include:

and selecting a corresponding parameter adjusting algorithm by using a machine learning algorithm library predefined by the FPGA according to the parameter characteristic vector, automatically selecting a machine learning algorithm from the machine learning algorithm library, and configuring the algorithm according to requirements.

For example, in one example, the parametric feature vector includes: bias voltage, bias current, number of dc offset controls, number of bandwidth adjustment bits, number of gain adjustment bits, and filter coefficients.

In this step, for the above feature vectors, considering the non-linear correlation and the parameter complexity between them, the algorithm library may use an Artificial Neural Network (ANN) with 5 neurons, and the algorithm library is configured by the weighting coefficient (weight) and the initial bias value (initial bias) of the corresponding Artificial Neural Network.

In addition, the step can also select a parameter adjusting algorithm according to the requirements of the use scene, such as the strength of an input signal, the strength of an interference signal, the temperature of the system and the like.

Further, after the algorithm is selected, the system can utilize the high-performance Reconfigurable computing Logic (Reconfigurable Logic) of the FPGA module to regenerate a new hardware algorithm Logic according to the algorithm. For example: the selected parameter adjusting algorithm is called into an EEPROM of the FPGA and then operated by a RAM called by the FPGA, and programming is realized on the internal configurable logic module, the output and input module and the internal connecting line.

When the FPGA module starts to operate, the system of the present invention shown in fig. 1 automatically generates a new parameter tuning algorithm that has been configured, and the FPGA module is implemented on hardware logic, and can start to operate.

Further, the step S3 further includes:

the method comprises the steps of automatically adjusting parameters according to the requirements (such as minimum power consumption or optimal gain) of an initial client application scene by acquiring real-time parameter data samples, and terminating when an adjusting termination condition is reached;

In the embodiment of the present invention, the termination condition of the tuning process is fully controllable, and can be determined according to the convergence of the input optimization condition and other factors, such as the running time and the power consumption. Especially for the application sensitive to the time delay of the parameter adjusting process, the convergence of the optimized condition can be temporarily relaxed to shorten the operation time, so that the adjusted parameter can be directly put into use.

Further, if the method of the present invention is adopted and the requirements are not met after adjustment, algorithm selection can be performed manually.

Referring to fig. 3, in this example, three different algorithms can be generated according to actual requirements, and the algorithms are algorithms for describing the adjustment of the bandwidth, the filter coefficient and the gain respectively for the input scene. According to different adjusted targets, the generated specific machine learning algorithm is different (example algorithm 1, algorithm 2 and algorithm 3), and the feature vector of the corresponding machine learning algorithm is also dynamically generated. The generated algorithm is converted into hardware logic which can be accepted by the FPGA module in real time and is deployed into the corresponding FPGA module. And finally, the FPGA is called to execute and outputs required parameters. The process can simultaneously ensure that the user can be controlled to directly influence the selection of the algorithm at any time.

Having described preferred embodiments of the invention, further alterations and modifications may be effected to these embodiments by those skilled in the art once apprised of the basic inventive concept, and it is therefore intended that the appended claims be interpreted to include preferred embodiments and all such alterations and modifications as fall within the scope of the invention. Various modifications and variations of the present invention may be made by those skilled in the art without departing from the spirit and scope of the present invention, and it is intended that the present invention also include the modifications and variations of the present invention provided they come within the scope of the appended claims and their equivalents.

Claims

1. An FPGA-based radio frequency parameter automatic adjustment method is characterized by comprising the following steps:

acquiring a use scene required by a client;

acquiring a parameter characteristic vector needing to be re-adjusted and optimized according to the use scene, and inputting the parameter characteristic vector into the FPGA module;

selecting a corresponding parameter adjusting algorithm by using a machine learning algorithm library predefined by an FPGA (field programmable gate array), and automatically selecting a machine learning algorithm from the machine learning algorithm library;

regenerating a new hardware algorithm logic according to the parameter adjusting algorithm, and automatically adjusting and optimizing according to the requirements of the initial application scene by acquiring real-time parameter data samples;

judging whether the requirements are met, if so, outputting adjusted parameters; and if not, re-selecting the parameter adjusting algorithm, and re-optimizing.

2. The FPGA-based radio frequency parameter automatic adjustment method of claim 1, wherein obtaining a usage scenario comprises: inputting a new usage scenario description or calling a pre-stored usage scenario.

3. The FPGA-based rf parameter auto-tuning method of claim 1 wherein the step of selecting and configuring a parameter tuning algorithm based on the parameter eigenvector and regenerating a new hardware algorithm logic based on the parameter tuning algorithm comprises:

4. The FPGA-based rf parameter auto-tuning method of claim 1, wherein the step of regenerating a new hardware algorithm logic based on the parameter tuning algorithm comprises: the selected parameter adjusting algorithm is called into an EEPROM of the FPGA and then operated by a RAM called by the FPGA, and programming is realized on the internal configurable logic module, the output and input module and the internal connecting line.

5. The FPGA-based rf parameter auto-adjustment method of claim 1, further comprising: acquiring real-time parameter data samples, automatically adjusting and optimizing parameters according to the requirements of the initial client application scene, and terminating when an adjusting and optimizing termination condition is reached;

6. The FPGA-based rf parameter auto-adjustment method of claim 1, further comprising: and if the requirements still cannot be met after adjustment, algorithm selection is carried out manually.

7. An automatic radio frequency parameter adjusting system based on an FPGA is characterized by comprising:

the scene module is used for acquiring a use scene required by a client;

the FPGA module is used for selecting and configuring a parameter adjusting algorithm according to the parameter characteristic vector and regenerating a new hardware algorithm logic according to the parameter adjusting algorithm; the FPGA module introduces a machine learning artificial intelligence algorithm, and can automatically select and configure the algorithm; acquiring real-time parameter data samples, and automatically adjusting and optimizing according to the requirements of an initial application scene;

and the judging module is used for judging whether the tuning result meets the requirement or not, outputting the adjusted parameters when the tuning result meets the requirement, and selecting the parameter adjusting algorithm when the tuning result does not meet the requirement.

8. The FPGA-based rf parameter auto-adjustment system of claim 7, wherein the FPGA module has a storage resource in which the usage scenarios are stored.

9. The FPGA-based rf parameter auto-adjustment system of claim 7, wherein the constraints of the acquisition usage scenario include at least one of frequency, power, and accuracy.

10. The FPGA-based RF parameter auto-adjustment system of claim 7, wherein the input module includes at least one of a BB ADC/DAC, an OFFSET DAC, a BG LPF, a BG VGA, a Mixer, an RF LO, an RF PA, and an LNA.

11. The FPGA-based rf parameter auto-adjustment system of claim 7, wherein the parameter feature vector comprises: at least one of a bias voltage, a bias current, a number of DC offset controls, a number of bandwidth adjustment bits, a number of gain adjustment bits, and a filter coefficient.