CN113916132A - Signal processing method, device, equipment and medium for silicon wafer height measurement - Google Patents
Signal processing method, device, equipment and medium for silicon wafer height measurement Download PDFInfo
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- G01B11/00—Measuring arrangements characterised by the use of optical techniques
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- G—PHYSICS
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Abstract
The present disclosure provides a signal processing method for silicon wafer height measurement, comprising: acquiring a motion table position signal, wherein the motion table position signal comprises a motion table position pulse signal and a motion table position coordinate signal; carrying out time delay processing on the motion platform position pulse signal, and generating a driving signal according to the motion platform position pulse signal before and after the time delay processing so as to drive the measurement of the height signal; and carrying out digital filtering processing on the height signal, and carrying out fitting calculation on the position coordinate signal of the moving table and the filtered height signal to obtain height data of the silicon wafer. The present disclosure also provides a signal processing device electronic apparatus and a computer readable storage medium for silicon wafer height measurement.
Description
Technical Field
The present disclosure relates to the field of semiconductor manufacturing, and in particular, to a signal processing method, apparatus, device, and medium for measuring a height of a silicon wafer.
Background
In the semiconductor manufacturing, because the surface of the silicon wafer has fluctuation, in order to ensure that the surface of the silicon wafer is positioned within the range of available focal depth during exposure, the height and the gradient of the silicon wafer are accurately measured by using a silicon wafer height measuring method so as to accurately control the motion table to adjust the position of the silicon wafer.
When the height of the silicon wafer is measured by adopting an optical triangulation method principle based on moire fringes and a spatial light splitting technology, measurement signals are a pair of O light and E light signals with phase difference pi, and the O light and the E light signals are synchronously acquired by utilizing a hardware synchronous triggering technology. When synchronous acquisition is carried out, the position signal of the motion platform is a pulse signal, so that the motion platform is easily influenced by level noise, and particularly, large spike burrs can trigger the circuit to act to cause false triggering. Ways traditionally used to reduce false triggers include: adding a ground capacitor to the signal line, and suppressing voltage jitter by utilizing the charge and discharge of the capacitor; or some large spike spurs are filtered out by an RC low pass filter. Because the capacitance and the resistance are influenced by factors such as parasitic parameters, process precision, temperature and the like, and absolute errors are large, the problems of complex circuit structure, low precision and high cost exist when the traditional mode is adopted to reduce false triggering.
In addition, when the measurement signal is transmitted, the measurement signal is susceptible to interference of temperature, vibration, electrical noise and the like, and measurement accuracy is affected. In the silicon wafer height measuring method based on the moire fringe and optical triangulation principle, only some simplified circuit designs and simple RC low-pass filtering methods are available at present, the influence of noise of measuring signals cannot be effectively reduced, the obtained silicon wafer height precision is low, and the precision control of a motion table on the adjustment of the position of the silicon wafer is influenced, so that the improvement of the yield of a chip is influenced.
BRIEF SUMMARY OF THE PRESENT DISCLOSURE
Based on this, one aspect of the present disclosure provides a signal processing method for silicon wafer height measurement, including: acquiring a motion table position signal, wherein the motion table position signal comprises a motion table position pulse signal and a motion table position coordinate signal; carrying out time delay processing on the motion platform position pulse signal, and generating a driving signal according to the motion platform position pulse signal before and after the time delay processing so as to drive the measurement of the height signal; and carrying out digital filtering processing on the height signal, and carrying out fitting calculation on the position coordinate signal of the moving table and the filtered height signal to obtain height data of the silicon wafer.
According to an embodiment of the present disclosure, the generating a driving signal to drive the measurement of the height signal according to the stage position pulse signal before and after the delay processing includes: comparing the pulse signal of the motion platform before time delay with the pulse signal after time delay to extract the rising edge and the falling edge of the pulse signal of the motion platform; and judging whether the interval time of the rising edge and the falling edge is the same as the high level continuous period of the motion platform position pulse signal or not, and if so, generating a driving signal to drive the measurement of the height signal.
According to an embodiment of the present disclosure, the fitting calculation of the motion table position coordinate signal and the filtered height signal includes: and fitting and calculating the position coordinate signal and the height signal of the motion platform by adopting a polynomial fitting method based on least square.
According to the embodiment of the present disclosure, the fitting calculation of the motion stage position coordinate signal and the height signal by using a least-squares-based polynomial fitting method includes: performing polynomial fitting by adopting the primarily measured height signal and the position coordinate signal of the motion platform to obtain a fitting coefficient; and calculating by adopting the height signal measured again and the fitting coefficient to obtain the height and the inclination of the silicon wafer.
According to an embodiment of the present disclosure, before the performing the time-delay processing on the motion stage position pulse signal, the method further includes: and performing IIR digital filtering processing on the motion platform position pulse signal by adopting a moving average filtering or amplitude limiting filtering mode.
According to an embodiment of the present disclosure, the digitally filtering the height signal includes: and filtering the height signal by combining FIR digital low-pass filtering and first-order lag filtering.
Another aspect of the present disclosure provides a signal processing apparatus for measuring a height of a silicon wafer, including: the device comprises an acquisition module, a processing module and a processing module, wherein the acquisition module is used for acquiring a motion table position signal, and the motion table position signal comprises a motion table position pulse signal and a motion table position coordinate signal; the control module is used for carrying out time delay processing on the motion platform position pulse signal and generating a driving signal according to the motion platform position pulse signal before and after the time delay processing so as to drive the measurement of the height signal; and the signal processing module is used for performing digital filtering processing on the height signal and performing fitting calculation on the position coordinate signal of the moving table and the filtered height signal to obtain height data of the silicon wafer.
Another aspect of the present disclosure also provides an electronic device, including: one or more processors; memory for storing one or more programs, wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method described above.
Another aspect of the present disclosure also provides a computer-readable storage medium having stored thereon executable instructions that, when executed by a processor, cause the processor to implement the method described above.
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The above and other objects, features and advantages of the present disclosure will become more apparent from the following description of embodiments of the present disclosure with reference to the accompanying drawings, in which:
fig. 1 schematically shows a part of the optical-mechanical structure corresponding to the signal processing method applied in the embodiment of the present disclosure.
Fig. 2 schematically shows a flowchart of a signal processing method for silicon wafer height measurement according to an embodiment of the present disclosure.
Fig. 3 schematically shows a block diagram of a signal processing apparatus provided in an embodiment of the present disclosure.
Fig. 4 schematically shows a block diagram of a signal processing apparatus according to still another embodiment of the present disclosure.
FIG. 5 schematically illustrates a silicon wafer tilt calculation schematic diagram provided by an implementation of the present disclosure.
Fig. 6 schematically shows a processing result diagram of the signal processing method provided by the embodiment of the present disclosure.
Fig. 7 schematically shows a graph of a calculation result of the height of a silicon wafer after the signal processing method provided by the embodiment of the present disclosure is applied.
Fig. 8 schematically shows a block diagram of an electronic device adapted to implement the above described method according to an embodiment of the present disclosure.
Detailed Description
For the purpose of promoting a better understanding of the objects, aspects and advantages of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawings. It is to be understood that the described embodiments are only a few, and not all, of the disclosed embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The terms "comprises," "comprising," and the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.
In the present disclosure, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integral; can be mechanically connected, electrically connected or can communicate with each other; either directly or indirectly through intervening media, either internally or in any other suitable relationship. The specific meaning of the above terms in the present disclosure can be understood by those of ordinary skill in the art as appropriate.
In the description of the present disclosure, it is to be understood that the terms "longitudinal," "length," "circumferential," "front," "rear," "left," "right," "top," "bottom," "inner," "outer," and the like are used in the orientation or positional relationship indicated in the drawings for convenience in describing the present disclosure and for simplicity in description, and are not intended to indicate or imply that the referenced subsystems or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present disclosure.
Throughout the drawings, like elements are represented by like or similar reference numerals. Conventional structures or constructions will be omitted when they may obscure the understanding of the present disclosure. And the shapes, sizes and positional relationships of the components in the drawings do not reflect the actual sizes, proportions and actual positional relationships. Furthermore, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim.
Similarly, in the above description of exemplary embodiments of the disclosure, various features of the disclosure are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various disclosed aspects. Reference to the description of the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the disclosure. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present disclosure, "a plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise.
The embodiment of the disclosure aims to provide a signal processing method for silicon wafer height measurement, which comprises the processing of a motion table position signal and the processing of a measured height signal. The digital signal processing method is adopted to carry out smoothing processing on the position signal of the motion platform and filter unnecessary narrow pulses and level burrs, thereby reducing the false triggering probability of synchronous acquisition. And the measurement signal is subjected to digital filtering processing, and the height of the silicon wafer is calculated by utilizing a polynomial fitting method based on least square, so that the measurement error is reduced, and the measurement precision is improved. The following sets forth a detailed description of specific embodiments.
Fig. 1 schematically shows a structure diagram of a portion of an optical machine corresponding to the signal processing method in the embodiment.
As shown in fig. 1, the optical-mechanical part includes an illumination light source 1, a projection grating 2, a first double telecentric system 3, a first reflector 4, a first reflector 6, a second double telecentric system 7, a spatial light splitting system 8, a detection grating 9 and a photodetector array 10. The illumination light source 1 generates illumination light beams which are uniformly irradiated to the projection grating 2 to form measurement light beams, the measurement light beams are emitted from the first double telecentric system 3, reflected by the first reflecting mirror 4, the second reflecting mirror 6 and the surface of the silicon wafer 5 to enter the second double telecentric system 7, changed into O light and E light which are completely separated in space through the spatial light splitting system 8, formed into detection light beams through the detection grating 9 and received by the photoelectric detector array 10. The signal processing method of the embodiment of the present disclosure is used to process the detection light of the photodetector array 10.
Fig. 2 schematically shows a flowchart of a signal processing method for silicon wafer height measurement according to an embodiment of the present disclosure.
As shown in fig. 2, the signal processing method may include, for example, operations S201 to S203.
In operation S201, a motion stage position signal is acquired, wherein the motion stage position signal includes a motion stage position pulse signal and a motion stage position coordinate signal.
According to the embodiment of the disclosure, after the moving table travels to the designated position, the moving table position signal is collected. Wherein, the motion platform position signal includes two routes of signals: a motion platform position pulse signal and a motion platform position coordinate signal. The motion platform position pulse signal is a continuous high-level signal with a fixed period and is used for generating an analog-to-digital conversion driving signal and realizing synchronous triggering of silicon wafer height measurement. The position coordinate signal of the motion platform is used for transmitting the current position coordinate of the motion platform and performing fitting calculation when data fitting is performed.
In operation S202, the stage position pulse signal is delayed, and a driving signal is generated according to the stage position pulse signal before and after the delay to drive the measurement of the height signal.
According to the embodiment of the disclosure, generating the driving signal to drive the measurement of the height signal according to the stage position pulse signal before and after the delay processing includes: IIR digital filtering processing is carried out through the motion platform position pulse signal digital filtering unit, after the IIR digital filtering processing is carried out, the motion platform position pulse signal before time delay and the motion platform position pulse signal after time delay are compared through the time delay unit, and therefore the rising edge and the falling edge of the motion platform position pulse signal are extracted. And judging whether the interval time of the rising edge and the falling edge is the same as the high level continuous period of the motion platform position pulse signal, and if so, generating a driving signal to drive the measurement of the height signal. The IIR digital filtering process may adopt a moving average filtering or a limiting filtering mode. The method can remove large peak burr interference, thereby reducing the false triggering probability of synchronous acquisition.
In operation S203, the height signal is digitally filtered, and the position coordinate signal of the motion stage and the filtered height signal are subjected to fitting calculation to obtain the height and inclination of the silicon wafer.
According to an embodiment of the present disclosure, fitting the motion stage position coordinate signal to the filtered height signal includes: and filtering the height signal by combining FIR digital low-pass filtering and first-order lag filtering. And fitting and calculating the position coordinate signal of the moving table and the filtered height signal by adopting a polynomial fitting method based on least square. Specifically, polynomial fitting is carried out by adopting a height signal of primary measurement and a position coordinate signal of the motion table to obtain a fitting coefficient; and calculating by adopting the height signal measured again and the fitting coefficient to obtain the height and the inclination of the silicon wafer. The method can reduce the influence of random noise in the measurement signal, thereby reducing the measurement error and improving the measurement precision.
Based on the same inventive concept, the embodiment of the disclosure also provides a signal processing device for measuring the height of the silicon wafer.
Fig. 3 schematically shows a block diagram of a signal processing apparatus provided in an embodiment of the present disclosure.
As shown in fig. 3, the signal processing apparatus 300 may include, for example, an obtaining module 310, a control module 320, and a signal processing module 330.
An obtaining module 310, configured to obtain a motion platform position signal, where the motion platform position signal includes a motion platform position pulse signal and a motion platform position coordinate signal;
and the control module 320 is used for performing time delay processing on the motion table position pulse signal and generating a driving signal according to the motion table position pulse signal before and after the time delay processing so as to drive the measurement of the height signal.
And the signal processing module 330 is configured to perform digital filtering on the height signal, and perform fitting calculation on the motion stage position coordinate signal and the filtered height signal to obtain silicon wafer height data.
Fig. 4 schematically shows a block diagram of a signal processing apparatus according to still another embodiment of the present disclosure.
As shown in fig. 4, the acquisition module 310 may include, for example, a motion stage position signal receiving unit 311, a photodetector array 312, an analog-to-digital conversion unit 313, and a data acquisition control unit 314 according to an embodiment of the present disclosure.
The moving table position signal receiving unit 311 is configured to receive a moving table position signal. And a photodetector array 312 for receiving the detection light and converting it into multiple analog signals. The analog-to-digital conversion unit 313 is configured to convert the multiple analog signals into multiple digital signals. The data acquisition control unit 314 is used for receiving and transmitting the multi-channel digital signals and the position coordinates of the motion platform.
According to the embodiment of the present disclosure, the control module 320 may include, for example, a pulse filtering unit 321, a delay unit 322, and an output control unit 323.
The pulse filtering unit 321 is configured to perform filtering processing on the motion stage position pulse signal by using moving average filtering or clipping filtering. The delay unit 322 is used for performing delay processing on the filtered motion stage position pulse signal. The output control unit 323 is configured to generate a driving signal according to the position pulse signal of the motion stage before and after the delay processing, so as to drive the analog-to-digital conversion unit 323 to convert the multiple analog signals into multiple digital signals.
According to an embodiment of the present disclosure, the signal processing module 330 may include, for example, a data buffering unit 331, a digital filtering unit 332, a first data storage unit 333, a first data calculation unit 334, a fitting calculation unit 335, a second data storage unit 336, a second data calculation unit 337, and a data output control unit 338.
And the data buffer unit 331 is used for buffering the plurality of paths of digital electric signals and the position coordinate signal of the motion table. The digital filtering unit 332 is configured to perform filtering processing on the multiple paths of digital electrical signals by combining FIR digital low-pass filtering and first-order lag filtering. The first data storage unit 333 is used to store the stage position coordinate signal. The first data calculating unit 334 is configured to calculate an original height value of the silicon wafer according to the filtered multiple paths of digital electrical signals. The fitting calculation unit 335 calculates the height of the silicon wafer from the position coordinate signal of the motion stage in the first data storage unit 333, the original value of the height of the silicon wafer calculated by the first data calculation unit 334, and the fitting coefficient of the second data storage unit 336 using a least-squares-based polynomial fitting method. The fitting coefficient obtained by performing the fitting calculation for the first time is stored in the second data storage unit 336, and the fitting coefficient is called to calculate the height of the silicon wafer when performing the fitting calculation again. The second data calculating unit 337 is used to calculate the silicon wafer inclination using the calculated silicon wafer height. The data output control unit 338 is used for communicating with the motion table and outputting the height data and the inclination data of the silicon wafer so as to control the motion table to adjust the position of the silicon wafer in real time.
According to an embodiment of the present disclosure, the silicon wafer height calculation formula may be, for example:
wherein, IeAnd IoRespectively, e light intensity and o light intensity, offset formed by the light splitting of the light splitting parteAnd offsetoBackground noise at the photodetector for e-light and o-light, G is the scaling factor,
p is the grating period and alpha is the angle of incidence of the measurement light.
FIG. 5 schematically illustrates a silicon wafer tilt calculation schematic diagram provided by an implementation of the present disclosure.
As shown in fig. 5, the calculation formula is:
wherein, Δ h is the height difference of the silicon wafer, and Δ x is the distance between the detection points of the photoelectric detector array.
In addition, the signal processing apparatus 300 of the embodiment of the present disclosure may be implemented by an FPGA chip, and the signal processing speed is increased by using the high efficiency of hardware calculation, so as to accurately control the motion stage to adjust the position of the silicon wafer in real time. The system can be realized by adopting a Xilinx Artix-7 series chip XC7A35TFGG484, and the frequency of an active crystal oscillator adopted by a system clock is 50 MHz; the motion platform position signal receiving unit consists of an SMB interface and an optical coupler; the measurement signal is transmitted to the data buffer unit 331 through a SERDES (SERializer/DESerializer), wherein the SERDES chip is implemented using an SN65LV1023ADB/SN65LV1224BDB chip of texas instruments. The data buffer unit 331 is implemented by a ping-pong structure, and performs data receiving and transmitting simultaneously, and the ping-pong structure may be implemented in a true dual port RAM.
In order to more clearly illustrate the effects of the signal processing method and apparatus provided by the embodiments of the present disclosure, the following description is further assisted with the test results.
Fig. 6 schematically shows a processing result diagram of the signal processing method provided by the embodiment of the present disclosure.
As shown in fig. 6, where a represents the actual motion stage position signal, which includes level glitch, narrow pulse smaller than high level holding time, etc., if the rising edge is directly extracted as the driving signal of the analog-to-digital conversion module, as a result, as shown in b in fig. 6, redundant driving signals N1 and N2 appear, resulting in false triggering. The signal processing method for extracting the rising edge of the position signal of the moving platform according to the disclosed embodiment is shown as c in fig. 6.
Fig. 7 schematically shows a graph of a calculation result of the height of a silicon wafer after the signal processing method provided by the embodiment of the present disclosure is applied.
As shown in fig. 7, a in fig. 7 shows a mean error comparison curve of the heights of the silicon wafers obtained before and after the application of the public signal processing method, b in fig. 7 shows a precision comparison curve of the heights of the silicon wafers obtained before and after the application of the public signal processing method, c in fig. 7 shows a comparison curve of the heights of the silicon wafers obtained before and after the application of the public signal processing method, wherein S1 shows that the signal processing method of the present disclosure is not applied, S2 shows that the signal processing method of the present disclosure is applied, and as can be seen from a and b in fig. 7, the mean error and precision of the heights of the silicon wafers are improved and are closer to the ideal height after the application of the signal processing method of the present disclosure. The middle error of the height of the silicon wafer at each position point in the linear range (plus or minus 1.25um) can be reduced by 2.7-44.2 nm, the precision can be reduced by 2.6-31.0 nm, and the measurement precision of the height of the silicon wafer is effectively improved.
Any number of modules, sub-modules, units, sub-units, or at least part of the functionality of any number thereof according to embodiments of the present disclosure may be implemented in one module. Any one or more of the modules, sub-modules, units, and sub-units according to the embodiments of the present disclosure may be implemented by being split into a plurality of modules. Any one or more of the modules, sub-modules, units, sub-units according to embodiments of the present disclosure may be implemented at least in part as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in any other reasonable manner of hardware or firmware by integrating or packaging a circuit, or in any one of or a suitable combination of software, hardware, and firmware implementations. Alternatively, one or more of the modules, sub-modules, units, sub-units according to embodiments of the disclosure may be at least partially implemented as a computer program module, which when executed may perform the corresponding functions.
For example, any plurality of the acquisition module 310, the control module 320 and the signal processing module 330 may be combined and implemented in one module/unit/sub-unit, or any one of the modules/units/sub-units may be split into a plurality of modules/units/sub-units. Alternatively, at least part of the functionality of one or more of these modules/units/sub-units may be combined with at least part of the functionality of other modules/units/sub-units and implemented in one module/unit/sub-unit. According to an embodiment of the present disclosure, at least one of the obtaining module 310, the controlling module 320 and the signal processing module 330 may be implemented at least partially as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in hardware or firmware by any other reasonable manner of integrating or packaging a circuit, or may be implemented in any one of three implementations of software, hardware and firmware, or in a suitable combination of any of the three implementations. Alternatively, at least one of the acquisition module 310, the control module 320 and the signal processing module 330 may be at least partially implemented as a computer program module, which when executed may perform a corresponding function.
It should be noted that, the signal processing apparatus portion in the embodiment of the present disclosure corresponds to the signal processing method portion in the embodiment of the present disclosure, and the specific implementation details thereof are also the same, and are not described herein again.
Fig. 8 schematically shows a block diagram of an electronic device adapted to implement the above described method according to an embodiment of the present disclosure. The electronic device shown in fig. 8 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure.
As shown in fig. 8, an electronic device 800 according to an embodiment of the present disclosure includes a processor 801 that can perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM)802 or a program loaded from a storage section 808 into a Random Access Memory (RAM) 803. The processor 801 may include, for example, a general purpose microprocessor (e.g., a CPU), an instruction set processor and/or associated chipset, and/or a special purpose microprocessor (e.g., an Application Specific Integrated Circuit (ASIC)), among others. The processor 801 may also include onboard memory for caching purposes. The processor 801 may include a single processing unit or multiple processing units for performing different actions of the method flows according to embodiments of the present disclosure.
In the RAM803, various programs and data necessary for the operation of the electronic apparatus 800 are stored. The processor 801, the ROM802, and the RAM803 are connected to each other by a bus 804. The processor 801 performs various operations of the method flows according to the embodiments of the present disclosure by executing programs in the ROM802 and/or RAM 803. Note that the programs may also be stored in one or more memories other than the ROM802 and RAM 803. The processor 801 may also perform various operations of method flows according to embodiments of the present disclosure by executing programs stored in the one or more memories.
According to embodiments of the present disclosure, method flows according to embodiments of the present disclosure may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable storage medium, the computer program containing program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program can be downloaded and installed from a network through the communication section 809 and/or installed from the removable medium 811. The computer program, when executed by the processor 801, performs the above-described functions defined in the system of the embodiments of the present disclosure. The systems, devices, apparatuses, modules, units, etc. described above may be implemented by computer program modules according to embodiments of the present disclosure.
The present disclosure also provides a computer-readable storage medium, which may be contained in the apparatus/device/system described in the above embodiments; or may exist separately and not be assembled into the device/apparatus/system. The computer-readable storage medium carries one or more programs which, when executed, implement the method according to an embodiment of the disclosure.
According to an embodiment of the present disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium. Examples may include, but are not limited to: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
For example, according to embodiments of the present disclosure, a computer-readable storage medium may include the ROM802 and/or RAM803 described above and/or one or more memories other than the ROM802 and RAM 803.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions. Those skilled in the art will appreciate that various combinations and/or combinations of features recited in the various embodiments and/or claims of the present disclosure can be made, even if such combinations or combinations are not expressly recited in the present disclosure. In particular, various combinations and/or combinations of the features recited in the various embodiments and/or claims of the present disclosure may be made without departing from the spirit or teaching of the present disclosure. All such combinations and/or associations are within the scope of the present disclosure.
Claims (9)
1. A signal processing method for silicon wafer height measurement, comprising:
acquiring a motion table position signal, wherein the motion table position signal comprises a motion table position pulse signal and a motion table position coordinate signal;
carrying out time delay processing on the motion platform position pulse signal, and generating a driving signal according to the motion platform position pulse signal before and after the time delay processing so as to drive the measurement of the height signal;
and carrying out digital filtering processing on the height signal, and carrying out fitting calculation on the position coordinate signal of the moving table and the filtered height signal to obtain height data of the silicon wafer.
2. The signal processing method of claim 1, wherein the generating a driving signal to drive the measurement of the height signal according to the stage position pulse signals before and after the delay processing comprises:
comparing the motion platform position pulse signal before time delay with the motion platform position pulse signal after time delay to extract the rising edge and the falling edge of the motion platform position pulse signal;
and judging whether the interval time of the rising edge and the falling edge is the same as the high level continuous period of the motion platform position pulse signal or not, and if so, generating a driving signal to drive the measurement of the height signal.
3. The signal processing method of claim 1, wherein the fitting the motion stage position coordinate signal to the filtered height signal comprises:
and fitting and calculating the position coordinate signal and the height signal of the motion platform by adopting a polynomial fitting method based on least square.
4. The signal processing method of claim 3, the fitting calculation of the motion stage position coordinate signal and the height signal using a least squares based polynomial fitting method comprising:
performing polynomial fitting by adopting the primarily measured height signal and the position coordinate signal of the motion platform to obtain a fitting coefficient;
and calculating by adopting the height signal measured again and the fitting coefficient to obtain the height and the inclination of the silicon wafer.
5. The signal processing method of claim 1, prior to the time-delay processing the motion stage position pulse signal, the method further comprising:
and filtering the position pulse signal of the moving table by adopting a moving average filtering or amplitude limiting filtering mode.
6. The signal processing method according to claim 1, wherein the digitally filtering the height signal includes:
and filtering the height signal by combining FIR digital low-pass filtering and first-order lag filtering.
7. A signal processing apparatus for silicon wafer height measurement, comprising:
the device comprises an acquisition module, a processing module and a processing module, wherein the acquisition module is used for acquiring a motion table position signal, and the motion table position signal comprises a motion table position pulse signal and a motion table position coordinate signal;
the control module is used for carrying out time delay processing on the motion platform position pulse signal and generating a driving signal according to the motion platform position pulse signal before and after the time delay processing so as to drive the measurement of the height signal;
and the signal processing module is used for performing digital filtering processing on the height signal and performing fitting calculation on the position coordinate signal of the moving table and the filtered height signal to obtain height data of the silicon wafer.
8. An electronic device, comprising:
one or more processors;
a memory for storing one or more programs,
wherein the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the method of any of claims 1-6.
9. A computer readable storage medium having stored thereon executable instructions which, when executed by a processor, cause the processor to carry out the method of any one of claims 1 to 6.
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