CN113905416A - VoLTE message processing method and device - Google Patents
VoLTE message processing method and device Download PDFInfo
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- H04W28/00—Network traffic management; Network resource management
- H04W28/02—Traffic management, e.g. flow control or congestion control
- H04W28/10—Flow control between communication endpoints
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3009—Header conversion, routing tables or routing tags
Abstract
The invention discloses a VoLTE message processing method, which comprises the following steps: matching the received messages by utilizing a pre-configured Session Initiation Protocol (SIP) signaling feature table; when the message hits the SIP signaling feature table, copying the message and sending the message to each other line card of the chassis-type switching equipment for post-learning processing of subsequently received messages; when the message does not hit the SIP signaling feature table, matching the message by using a signaling mapping table; when the message hits the signaling mapping table, copying the message and sending the message to each other line card of the chassis-type switching equipment for post-learning processing of subsequently received messages; and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table. The problem of processing performance bottleneck of a single line card CPU for inputting a large number of VoLTE messages by a single port in the prior art can be solved.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a method and an apparatus for processing a Voice over Long-Term Evolution (VoLTE) packet.
Background
VoLTE is a Long Term Evolution (LTE) voice over Internet Protocol Multimedia Subsystem (IMS) network solution defined by the 3rd Generation Partnership Project (3 GPP) standard. The signaling plane message of VoLTE adopts SIP protocol, and the data plane message adopts RTP/RTCP protocol.
Session Initiation Protocol (SIP): is a multimedia communication protocol established by the Internet Engineering Task Force (IETF).
Real-time Transport Protocol (RTP) and RTP Control Protocol (RTP Control Protocol, RTCP): RTP/RTCP enabling real-time voice, video communication and applications in IP networks has become a mainstream technology and development direction for network applications. RTP for transmitting data in real time. The information provided by the protocol includes: time stamps (for synchronization), sequence numbers (for packet loss and reordering detection), and payload format (for specifying the coding format of the data). RTCP, for QoS feedback and for synchronizing media streams.
The chassis type switching device is a slot type switching device, provides greater flexibility and expandability, and a user can randomly select modules with different numbers, different rates and different interface types according to the requirements of a client scene so as to adapt to the requirements of ever-changing networks. The hardware of the chassis type switching equipment mainly comprises a chassis, a management board, a service line card, a switching network card, a power supply, a fan and the like, wherein the management board is a main control engine of the equipment and is used for providing the management and control functions of the equipment and the protocol processing function of a data plane; the service line card (short for line card) is an external physical interface for providing service transmission and finishes message receiving and sending; the exchange network card is connected with each line card through the internal link of the exchange network board and the backboard, and provides the functions of data forwarding exchange, distribution, scheduling, control and the like among the cross-connection line cards.
When the VoLTE message passes through the CPU of the line card, the CPU of the line card directly analyzes the signaling message of the VoLTE, and performs message identification and filtration on the VoLTE message input subsequently according to the analysis result, thereby filtering out an SIP message, an RTP/RTCP message and other messages. However, when the CPU of a single line card processes a VoLTE packet input by a single port, a performance bottleneck problem may be faced, for example, the CPU of a single line card can only process a VoLTE packet containing 10G, and then to process a packet exceeding 10G, the performance of the CPU of a single line card can only be improved, and the implementation cost of this implementation method is relatively severe.
Disclosure of Invention
The embodiment of the invention provides a processing method and a processing device of a VoLTE message, which are used for solving the problem of processing performance bottleneck of a single line card CPU (Central processing Unit) for inputting a large number of VoLTE messages into a single port in the prior art. According to the embodiment of the invention, a method for processing a long term evolution voice bearer VoLTE message is provided, and the method is applied to a line card contained in a chassis type switching device and comprises the following steps:
matching the received messages by utilizing a pre-configured Session Initiation Protocol (SIP) signaling feature table;
when the message hits the SIP signaling feature table, copying the message and sending the message to each other line card of the chassis-type switching equipment, so that each other line card can learn according to the message and process the subsequently received message;
when the message does not hit the SIP signaling feature table, matching the message by using a signaling mapping table;
when the message hits the signaling mapping table, copying the message and sending the message to each other line card of the chassis-type switching equipment so that each other line card can learn according to the message and process the subsequently received message;
and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table.
Further, the method further comprises:
when the message hits the SIP signaling feature table, acquiring quintuple information of the message;
and updating the five-tuple information into the signaling mapping table.
Further, the method further comprises:
and when the message does not hit the signaling mapping table, the message is sent to a Central Processing Unit (CPU) of any line card randomly or according to a preset rule for processing.
Further, when the packet hits the SIP signaling feature table, after the packet is copied and sent to each line card included in the chassis-type switching device to perform post-learning processing on a subsequently received packet, the method further includes:
and outputting the message from a specified port according to a preset rule.
According to an embodiment of the present invention, there is also provided a device for processing a long term evolution voice bearer VoLTE packet, where the device is applied to a line card included in a chassis-type switching device, and the device includes: the device comprises a first matching module, a first processing module, a second matching module and a second processing module; wherein the content of the first and second substances,
the first matching module is used for matching the received messages by utilizing a pre-configured Session Initiation Protocol (SIP) signaling feature table;
the first processing module is used for copying the message and sending the message to each other line card of the chassis-type switching equipment when the message hits the SIP signaling feature table, so that each other line card can learn according to the message and process the subsequently received message;
the second matching module is used for matching the message by using a signaling mapping table when the message does not hit the SIP signaling feature table;
the second processing module is configured to copy the packet and send the packet to each of the other line cards of the chassis-type switching device when the packet hits the signaling mapping table, so that each of the other line cards learns and processes a subsequently received packet according to the packet;
and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table.
Further, the apparatus further comprises: the updating module is used for acquiring quintuple information of the message when the message hits the SIP signaling feature table; and updating the five-tuple information into the signaling mapping table.
Further, the first processing module is further configured to send the packet to a central processing unit CPU of any line card randomly or according to a preset rule for processing when the packet misses the signaling mapping table.
Further, when the packet hits the SIP signaling feature table, the packet is copied and sent to each line card included in the chassis-type switching device to perform post-learning processing on a subsequently received packet, and the first processing module is further configured to output the packet from an assigned port according to a preset rule.
According to the embodiment of the invention, the electronic equipment comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory complete mutual communication through the communication bus;
a memory for storing a computer program;
a processor for implementing the above method steps when executing the program stored in the memory.
According to an embodiment of the present invention, there is also provided a computer-readable storage medium having stored therein a computer program, which when executed by a processor, performs the above-mentioned method steps.
The invention has the following beneficial effects:
according to the VoLTE message processing method and device provided by the embodiment of the invention, the received messages are matched by utilizing the pre-configured SIP signaling feature table; when the message hits the SIP signaling feature table, copying the message and sending the message to each other line card of the chassis-type switching equipment, so that each other line card can learn according to the message and process the subsequently received message; when the message does not hit the SIP signaling feature table, matching the message by using a signaling mapping table; when the message hits the signaling mapping table, copying the message and sending the message to each other line card of the chassis-type switching equipment so that each other line card can learn according to the message and process the subsequently received message; and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table. In the embodiment of the invention, the received message is identified, the SIP signaling message is screened out, the SIP signaling message is copied for each line card and is sent to the CPU of each line card for learning, and because the proportion of the total flow of the input message of the signaling message is small, the CPU of each line card can learn the related information of the current multimedia service by copying the signaling message, so that after each line card learns the SIP signaling message, the subsequent received parallel input VoLTE messages can be identified and forwarded, the parallel processing of the VoLTE messages is realized, the problem of performance bottleneck of processing a large number of VoLTE messages by a single line card CPU is solved, and the message processing efficiency is improved.
Drawings
Fig. 1 is a flowchart of a processing method of a VoLTE packet in an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a VoLTE message processing apparatus in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device shown in the present application.
Detailed Description
Aiming at the problem of performance bottleneck of a large amount of VoLTE processed by a single line card CPU in the prior art, the VoLTE message processing method provided by the embodiment of the invention realizes the parallel processing of the current multimedia service message by a plurality of line card CPUs through recognizing the signaling message and copying and sending the signaling message to the CPU of each line card to learn the relevant information of the current multimedia service. The flow of the method of the present invention is shown in fig. 1, and the method is applied to a line card included in a chassis-type switching device, and the method comprises the following steps:
here, the SIP signaling feature table includes all feature values of SIP signaling, and specifically may include 16 SIP signaling character strings representing the feature values; when the message hits any one feature value in the SIP signaling feature table, the message hit in the SIP signaling feature table can be determined.
102, when the message hits the SIP signaling feature table, copying the message and sending the message to each other line card of the chassis-type switching equipment so that each other line card can learn and process the subsequently received message;
specifically, each of the other line cards learns the packet by learning the SIP protocol content in the packet, extracting the quintuple information to be used by the signaling and RTP/RCTP packets and forming a flow table C according to the SIP protocol interaction content, and when the CPU learns the packet and receives the packet again, the learned signaling packet may be directly discarded if the CPU learns the packet, and the RTP/RTCP packet may be forwarded according to the specified requirement of the flow table C if the CPU learns the RTP/RCTP packet, or may be forwarded according to the specified requirement if the CPU of the other line cards learns the SIP protocol content in the packet.
103, when the message does not hit the SIP signaling feature table, matching the message by using a signaling mapping table;
here, the signaling mapping table contains five tuple information of a packet hitting the SIP signaling feature table. Specifically, the five-tuple information in the embodiment of the present invention may include a source IP address, a source port, a destination IP address, a destination port, and a transport layer protocol.
Generally speaking, a signaling message may be transmitted in segments, and each segment of the signaling message divided into multiple segments of signaling messages does not necessarily include a field representing a signaling characteristic, so that it is necessary to further determine the portion of the signaling message by using a signaling mapping table to prevent from missing the signaling messages that do not include the field representing the signaling characteristic.
specifically, each of the other line cards learns the packet by learning the SIP protocol content in the packet, extracting the quintuple information to be used by the signaling and RTP/RCTP packets and forming a flow table C according to the SIP protocol interaction content, and when the CPU learns the packet and receives the packet again, the learned signaling packet may be directly discarded if the CPU learns the packet, and the RTP/RTCP packet may be forwarded according to the specified requirement of the flow table C if the CPU learns the RTP/RCTP packet, or may be forwarded according to the specified requirement if the CPU of the other line cards learns the SIP protocol content in the packet.
And discarding the message after each other line card finishes learning the message.
Further, the method further comprises:
when the message hits the SIP signaling feature table, acquiring quintuple information of the message;
and updating the five-tuple information into the signaling mapping table. Here, the five-tuple information may include a source IP address, a source port, a destination IP address, a destination port, and a transport layer protocol. When the signaling mapping table does not contain the quintuple information, adding the quintuple information into the table; when the signaling mapping table already contains the source IP address and the source port of the quintuple information, updating the corresponding quintuple information in the signaling mapping table according to the newly received quintuple information, further, when the aging time is configured, if the aging time is exceeded, the quintuple information can be deleted if the aging time is not updated, otherwise, the aging is not carried out.
Further, the method further comprises:
and when the message does not hit the signaling mapping table, the message is sent to a Central Processing Unit (CPU) of any line card randomly or according to a preset rule for processing.
Specifically, in the embodiment of the present invention, when a message misses in the SIP signaling feature table, the message may be further matched by using a signaling mapping table, and if the message still misses in the signaling mapping table, it indicates that the message misses in the SIP signaling feature table, and also misses in the signaling mapping table, at this time, it is determined that the message is not an SIP signaling message, and therefore, the message may be randomly sent to a CPU of any line card to be processed according to a mode of processing the message by using an existing line card.
Further, when the packet hits the SIP signaling feature table, the packet is copied and sent to each line card included in the chassis-type switching device, so that after each other line card learns and processes a subsequently received packet according to the packet, the method further includes:
and outputting the message from a specified port according to a preset rule.
Based on the same inventive concept, an embodiment of the present invention provides a processing apparatus for a VoLTE packet, where the apparatus may be applied to a line card included in a chassis-type switching device, and a structure of the apparatus is shown in fig. 2, where the apparatus includes: a first matching module 21, a first processing module 22, a second matching module 23, and a second processing module 24; wherein the content of the first and second substances,
the first matching module 21 is configured to match the received message with a pre-configured session initiation protocol SIP signaling feature table; here, the SIP signaling feature table includes all feature values of SIP signaling, and specifically may include 16 SIP signaling character strings representing the feature values; when the message hits any one feature value in the SIP signaling feature table, the message hit in the SIP signaling feature table can be determined.
The first processing module 22 is configured to, when the packet hits the SIP signaling feature table, copy the packet and send the packet to each of the other line cards of the chassis-type switching device, so that each of the other line cards learns and processes a subsequently received packet according to the packet; specifically, each of the other line cards learns the packet by learning the SIP protocol content in the packet, extracting the quintuple information to be used by the signaling and RTP/RCTP packets and forming a flow table C according to the SIP protocol interaction content, and when the CPU learns the packet and receives the packet again, the learned signaling packet may be directly discarded if the CPU learns the packet, and the RTP/RTCP packet may be forwarded according to the specified requirement of the flow table C if the CPU learns the RTP/RCTP packet, or may be forwarded according to the specified requirement if the CPU of the other line cards learns the SIP protocol content in the packet.
The second matching module 23 is configured to, when the packet misses the SIP signaling feature table, match the packet by using a signaling mapping table;
here, the signaling mapping table contains five tuple information of a packet hitting the SIP signaling feature table. Specifically, the five-tuple information in the embodiment of the present invention may include a source IP address, a source port, a destination IP address, a destination port, and a transport layer protocol.
Generally speaking, a signaling message may be transmitted in segments, and each segment of the signaling message divided into multiple segments of signaling messages does not necessarily include a field representing a signaling characteristic, so that it is necessary to further determine the portion of the signaling message by using a signaling mapping table to prevent from missing the signaling messages that do not include the field representing the signaling characteristic.
The second processing module 24 is configured to copy the packet and send the packet to each of the other line cards of the chassis-type switching device when the packet hits the signaling mapping table, so that each of the other line cards learns and processes a subsequently received packet; specifically, each of the other line cards learns the packet by learning the SIP protocol content in the packet, extracting the quintuple information to be used by the signaling and RTP/RCTP packets and forming a flow table C according to the SIP protocol interaction content, and when the CPU learns the packet and receives the packet again, the learned signaling packet may be directly discarded if the CPU learns the packet, and the RTP/RTCP packet may be forwarded according to the specified requirement of the flow table C if the CPU learns the RTP/RCTP packet, or may be forwarded according to the specified requirement if the CPU of the other line cards learns the SIP protocol content in the packet.
And discarding the message after each other line card finishes learning the message.
And the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table.
Further, the apparatus further comprises: the updating module is used for acquiring quintuple information of the message when the message hits the SIP signaling feature table; and updating the five-tuple information into the signaling mapping table. Here, the five-tuple information may include a source IP address, a source port, a destination IP address, a destination port, and a transport layer protocol. When the signaling mapping table does not contain the quintuple information, adding the quintuple information into the table; when the signaling mapping table already contains the source IP address and the source port of the quintuple information, updating the corresponding quintuple information in the signaling mapping table according to the newly received quintuple information, further, when the aging time is configured, if the aging time is exceeded, the quintuple information can be deleted if the aging time is not updated, otherwise, the aging is not carried out.
Further, the first processing module 22 is further configured to send the packet to a central processing unit CPU of any line card randomly or according to a preset rule for processing when the packet misses the signaling mapping table. Specifically, in the embodiment of the present invention, when a message misses in the SIP signaling feature table, the message may be further matched by using a signaling mapping table, and if the message still misses in the signaling mapping table, it indicates that the message misses in the SIP signaling feature table, and also misses in the signaling mapping table, at this time, it is determined that the message is not an SIP signaling message, and therefore, the message may be randomly sent to a CPU of any line card to be processed according to a mode of processing the message by using an existing line card.
Further, when the packet hits the SIP signaling feature table, the packet is copied and sent to each line card included in the chassis-type switching device to perform post-learning processing on a subsequently received packet, and then the first processing module 22 is further configured to output the packet from an assigned port according to a preset rule.
It should be understood that the implementation principle and the process of the VoLTE packet processing apparatus provided in the embodiment of the present invention are similar to those in fig. 1 and the embodiment shown above, and are not described again here.
According to the VoLTE message processing method and device provided by the embodiment of the invention, the received messages are matched by utilizing the pre-configured SIP signaling feature table; when the message hits the SIP signaling feature table, copying the message and sending the message to each other line card of the chassis-type switching equipment, so that each other line card can learn according to the message and process the subsequently received message; when the message does not hit the SIP signaling feature table, matching the message by using a signaling mapping table; when the message hits the signaling mapping table, copying the message and sending the message to each other line card of the chassis-type switching equipment so that each other line card can learn according to the message and process the subsequently received message; and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table. In the embodiment of the invention, the received message is identified, the SIP signaling message is screened out, the SIP signaling message is copied for each line card and is sent to the CPU of each line card for learning, and because the proportion of the total flow of the input message of the signaling message is small, the CPU of each line card can learn the related information of the current multimedia service by copying the signaling message, so that after each line card learns the SIP signaling message, the subsequent received parallel input VoLTE messages can be identified and forwarded, the parallel processing of the VoLTE messages is realized, the problem of performance bottleneck of processing a large number of VoLTE messages by a single line card CPU is solved, and the message processing efficiency is improved.
An electronic device is further provided in the embodiment of the present application, please refer to fig. 3, which includes a processor 510, a communication interface 520, a memory 530 and a communication bus 540, wherein the processor 510, the communication interface 520 and the memory 530 complete communication with each other through the communication bus 540.
A memory 530 for storing a computer program;
the processor 510 is configured to implement the processing method of the VoLTE packet according to any of the embodiments described above when executing the program stored in the memory 530.
The communication interface 520 is used for communication between the electronic apparatus and other apparatuses.
The Memory may include a Random Access Memory (RAM) or a Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.
The Processor may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but also Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components.
In the scheme, the received messages are identified, the SIP signaling messages are screened out, the SIP signaling messages are copied for each line card and sent to the CPU of each line card for learning, and the occupation ratio of the signaling messages in the total input message flow is small, so that the CPU of each line card can learn the related information of the current multimedia service by copying the signaling messages, and therefore, after each line card learns the SIP signaling messages, the subsequent VoLTE messages which are input in parallel can be identified and forwarded, the parallel processing of the VoLTE messages is realized, the problem of performance bottleneck of processing a large number of VoLTE messages by the CPU of a single line card is solved, and the message processing efficiency is improved.
Accordingly, an embodiment of the present application further provides a computer-readable storage medium, where instructions are stored in the computer-readable storage medium, and when the instructions are run on a computer, the computer is caused to execute the VoLTE message processing method in any of the foregoing embodiments.
In the scheme, the received messages are identified, the SIP signaling messages are screened out, the SIP signaling messages are copied for each line card and sent to the CPU of each line card for learning, and the occupation ratio of the signaling messages in the total input message flow is small, so that the CPU of each line card can learn the related information of the current multimedia service by copying the signaling messages, and therefore, after each line card learns the SIP signaling messages, the subsequent VoLTE messages which are input in parallel can be identified and forwarded, the parallel processing of the VoLTE messages is realized, the problem of performance bottleneck of processing a large number of VoLTE messages by the CPU of a single line card is solved, and the message processing efficiency is improved.
Those of ordinary skill in the art will understand that: the figures are merely schematic representations of one embodiment, and the blocks or flow diagrams in the figures are not necessarily required to practice the present invention.
From the above description of the embodiments, it is clear to those skilled in the art that the present invention can be implemented by software plus necessary general hardware platform. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which may be stored in a storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments or some parts of the embodiments.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for apparatus or system embodiments, since they are substantially similar to method embodiments, they are described in relative terms, as long as they are described in partial descriptions of method embodiments. The above-described embodiments of the apparatus and system are merely illustrative, and the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
In addition, in some of the flows described in the above embodiments and the drawings, a plurality of operations are included in a specific order, but it should be clearly understood that the operations may be executed out of the order presented herein or in parallel, and the sequence numbers of the operations, such as 201, 202, 203, etc., are merely used for distinguishing different operations, and the sequence numbers themselves do not represent any execution order. Additionally, the flows may include more or fewer operations, and the operations may be performed sequentially or in parallel. It should be noted that, the descriptions of "first", "second", etc. in this document are used for distinguishing different messages, devices, modules, etc., and do not represent a sequential order, nor limit the types of "first" and "second" to be different.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While alternative embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following appended claims be interpreted as including alternative embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made in the embodiments of the present invention without departing from the spirit or scope of the embodiments of the invention. Thus, if such modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to encompass such modifications and variations.
Claims (10)
1. A processing method for a long term evolution voice-over-LTE (Voice over Long term evolution) message is characterized in that the method is applied to a line card contained in a chassis type switching device and comprises the following steps:
matching the received messages by utilizing a pre-configured Session Initiation Protocol (SIP) signaling feature table;
when the message hits the SIP signaling feature table, copying the message and sending the message to each other line card of the chassis-type switching equipment, so that each other line card can learn according to the message and process the subsequently received message;
when the message does not hit the SIP signaling feature table, matching the message by using a signaling mapping table;
when the message hits the signaling mapping table, copying the message and sending the message to each other line card of the chassis-type switching equipment so that each other line card can learn according to the message and process the subsequently received message;
and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table.
2. The method of claim 1, further comprising:
when the message hits the SIP signaling feature table, acquiring quintuple information of the message;
and updating the five-tuple information into the signaling mapping table.
3. The method of claim 1, further comprising:
and when the message does not hit the signaling mapping table, the message is sent to a Central Processing Unit (CPU) of any line card randomly or according to a preset rule for processing.
4. The method according to claim 1, wherein after copying and sending the message to each line card included in the chassis switching device for post-learning processing of subsequently received messages when the message hits in the SIP signaling feature table, the method further comprises:
and outputting the message from a specified port according to a preset rule.
5. A processing device for a long term evolution voice-over-LTE (voice over long term evolution) message is applied to a line card contained in a chassis type switching device, and comprises the following components: the device comprises a first matching module, a first processing module, a second matching module and a second processing module; wherein the content of the first and second substances,
the first matching module is used for matching the received messages by utilizing a pre-configured Session Initiation Protocol (SIP) signaling feature table;
the first processing module is used for copying the message and sending the message to each other line card of the chassis-type switching equipment when the message hits the SIP signaling feature table, so that each other line card can learn according to the message and process the subsequently received message;
the second matching module is used for matching the message by using a signaling mapping table when the message does not hit the SIP signaling feature table;
the second processing module is configured to copy the packet and send the packet to each of the other line cards of the chassis-type switching device when the packet hits the signaling mapping table, so that each of the other line cards learns and processes a subsequently received packet according to the packet;
and the signaling mapping table comprises quintuple information of the message hitting the SIP signaling feature table.
6. The apparatus of claim 5, further comprising: the updating module is used for acquiring quintuple information of the message when the message hits the SIP signaling feature table; and updating the five-tuple information into the signaling mapping table.
7. The apparatus according to claim 5, wherein the first processing module is further configured to, when the packet misses in the signaling mapping table, send the packet to a central processing unit CPU of any line card for processing, randomly or according to a preset rule.
8. The apparatus according to claim 5, wherein when the packet hits the SIP signaling feature table, the first processing module is further configured to copy the packet and send the copied packet to each line card included in the chassis-type switching device for post-learning processing of a subsequently received packet, and then output the packet from a designated port according to a preset rule.
9. An electronic device, characterized in that the electronic device comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus;
a memory for storing a computer program;
a processor for implementing the method steps of any of claims 1-4 when executing a program stored on a memory.
10. A computer-readable storage medium, characterized in that a computer program is stored in the computer-readable storage medium, which computer program, when being executed by a processor, carries out the method steps of any one of claims 1 to 4.
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