CN113900816B - Multi-depth buffer activation retransmission method and device - Google Patents
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
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Abstract
The embodiment of the invention provides a multi-depth buffer activation retransmission method and a device, wherein the method comprises the following steps: the cache memory receives the access request, acquires the request address of the access request, and judges whether the access request hits or not according to the request address; if the miss occurs, a memory access request is sent to enter an off-target buffer, and a first retransmission identification bit is set; when the cache memory receives a subsequent miss request, acquiring a subsequent address of the subsequent miss request, and performing address correlation judgment with the request address; when the target is irrelevant, a subsequent miss request is sent to enter a miss buffer, and a second retransmission identification bit is set; after detecting that the access request and the subsequent miss request in the off-target buffer are loaded from the main memory, the access request in the off-target buffer is retransmitted by activating a retransmitting step. By adopting the method, the out-of-order emission and the out-of-order completion of the access request can be supported, and the correctness of the re-sent out target-off request is ensured, so that the performance and the efficiency of the data Cache are improved.
Description
Technical Field
The present invention relates to the field of computer processors, and in particular, to a method and apparatus for multi-depth buffer activation retransmission.
Background
The data Cache (Cache memory) is an important component of a computer storage system, and the design of the high-performance data Cache has a decisive influence on the performance and the efficiency of the computer storage system and also has a crucial effect on the overall performance of the computer system.
In the execution process of the data Cache, in order to ensure the correctness of program execution, the access sequence needs to be ensured. In the process of program execution, address-related access requests need to ensure the execution order and the completion order to ensure the correctness of the program, but address-unrelated access requests can be executed out-of-order and completed out-of-order. The current data Cache only ensures that the next request can be executed after the previous access request is successfully completed, the access requests are sequentially executed and sequentially completed, and the access requests which are not related to the address also need to be sequentially executed and completed, so that when the Cache encounters the access requests which are related to the address, the next access request can be executed only after the previous access request is completed, and the access requests which are not related to the address cannot be executed by inserting empty stream, thereby having great influence on the performance of the Cache.
Disclosure of Invention
Aiming at the problems existing in the prior art, the embodiment of the invention provides a multi-depth buffer activation retransmission method and device.
The embodiment of the invention provides a multi-depth buffer activation retransmission method, which comprises the following steps:
when a cache memory receives a memory access request, acquiring a request address of the memory access request, judging whether the memory access request hits or not according to the request address, wherein the cache memory comprises a request buffer and an off-target buffer;
when the access request misses the cache memory, sending the access request to enter the off-target buffer, and setting a first retransmission identification bit corresponding to the access request in the request buffer;
when the cache memory receives a subsequent miss request of the access request, acquiring a subsequent address of the subsequent miss request, and performing address correlation judgment according to the subsequent address and the request address;
when the correlation judgment result is irrelevant, sending the subsequent miss request to enter the miss buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit;
and after the access request and the subsequent miss request in the off-target buffer are detected to finish loading from the main memory, retransmitting the access request in the off-target buffer according to the retransmission sequence through a preset activated retransmission step.
In one embodiment, the method further comprises:
and when the access request hits the cache memory, accessing corresponding data in the cache memory according to the access request, acquiring a request source of the access request, and returning the corresponding data in the cache memory according to the request source.
In one embodiment, the method further comprises:
and when the correlation judgment result is correlated, setting a first retransmission identification bit corresponding to the subsequent miss request in the request buffer.
In one embodiment, the method further comprises:
and transmitting a transmission completion signal to an active retransmission device in the request buffer, wherein the active retransmission device retransmits the access request with the same retransmission identification bit according to the retransmission sequence according to the transmission completion signal.
In one embodiment, the method further comprises:
acquiring a first identification time corresponding to the first retransmission identification bit, a second identification time corresponding to the second retransmission identification bit, and comparing the first identification time with the second identification time;
and setting the retransmission sequence according to the time sequence in the comparison result.
The embodiment of the invention provides a multi-depth buffer activation retransmission device, which comprises:
the first receiving module is used for acquiring a request address of the access request when the cache memory receives the access request, judging whether the access request hits or not according to the request address, wherein the cache memory comprises a request buffer and an off-target buffer;
a first setting module, configured to send the memory access request to the off-target buffer when the memory access request misses the cache memory, and set a first retransmission identification bit corresponding to the memory access request in the request buffer;
the second receiving module is used for acquiring a subsequent address of the subsequent miss request when the cache memory receives the subsequent miss request of the access request, and judging the address correlation according to the subsequent address and the request address;
the second setting module is used for sending the subsequent miss request to enter the miss buffer when the correlation judgment result is irrelevant, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit;
and the detection module is used for retransmitting the access request in the off-target buffer according to the retransmission sequence through a preset activated retransmission step after the access request and the subsequent miss request in the off-target buffer are detected to be loaded from the main memory.
In one embodiment, the apparatus further comprises:
and the access module is used for accessing corresponding data in the cache memory according to the access request when the access request hits the cache memory, acquiring a request source of the access request, and returning the corresponding data in the cache memory according to the request source.
In one embodiment, the apparatus further comprises:
and a third setting module, configured to set a first retransmission identification bit corresponding to the subsequent miss request in the request buffer when the correlation determination result is correlated.
The embodiment of the invention provides an electronic device, which comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor realizes the steps of the multi-depth buffer activation retransmission method when executing the program.
Embodiments of the present invention provide a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the multi-depth buffer activation retransmission method described above.
When a cache memory receives an access request, a request address of the access request is acquired, whether the access request hits or not is judged according to the request address, and the cache memory comprises request buffering and off-target buffering; when the access request does not hit the cache memory, sending the access request to enter the off-target buffer, and setting a first retransmission identification bit corresponding to the access request in the request buffer; when the cache memory receives a subsequent miss request of the access request, acquiring a subsequent address of the subsequent miss request, and judging the address correlation according to the subsequent address and the request address; when the correlation judgment result is irrelevant, sending a subsequent miss request to enter an off-target buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit; after detecting that the memory access request and the subsequent miss request in the off-target buffer are loaded from the main memory, retransmitting the memory access request in the off-target buffer according to a retransmission sequence through a preset activated retransmission step. Thus, the multi-depth buffer structure in dynamic operation can support out-of-order transmission and completion of access requests, and simultaneously ensure the correctness of the off-target requests after retransmission, thereby improving the performance and efficiency of the data Cache.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a multi-depth buffer activated retransmission method according to an embodiment of the present invention;
FIG. 2 is a block diagram of a multi-depth buffer activated retransmission apparatus in accordance with an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a flow chart of a multi-depth buffer activated retransmission method according to an embodiment of the present invention, as shown in fig. 1, where the embodiment of the present invention provides a multi-depth buffer activated retransmission method, including:
step S101, when a cache memory receives a memory access request, a request address of the memory access request is obtained, whether the memory access request hits or not is judged according to the request address, and the cache memory comprises a request buffer and an off-target buffer.
Specifically, a request buffer and an off-target buffer are set in a CACHE memory (CACHE), and the request buffer and the off-target buffer respectively buffer the received access request and the off-target request. The request buffer receives all access requests and stores the access requests in sequence. The off-target buffer receives all off-target requests and stores them in sequence. And receiving the access request in the cache memory, acquiring the request address of the access request, and judging whether the access request hits or not according to the request address.
Step S102, when the memory access request misses the cache, the memory access request is sent to enter the off-target buffer, and a first retransmission flag bit corresponding to the memory access request is set in the request buffer.
Specifically, when the access request misses the cache memory, the access request is arranged to enter an off-target buffer, and a first retransmission identification bit corresponding to the access request is set in the request buffer, wherein the retransmission identification bit is used for identifying whether the access request needs to be re-executed after the data is successfully added back from the main memory load due to off-target.
In addition, when the access request hits the cache memory, the corresponding data in the cache memory is accessed according to the access request, the request source of the access request is obtained, and the corresponding data in the cache memory is returned according to the request source.
Step S103, when the cache memory receives a subsequent miss request of the access request, a subsequent address of the subsequent miss request is obtained, and an address correlation judgment is performed according to the subsequent address and the request address.
Specifically, when the cache memory receives a subsequent access request and the subsequent access request finds out of target through hit judgment, the subsequent miss request needs to enter an out-of-target buffer. And acquiring a subsequent address of a subsequent miss request, and performing address correlation judgment according to the subsequent address and the request address.
Step S104, when the correlation judgment result is irrelevant, sending the subsequent miss request to enter the miss buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit.
Specifically, when the correlation judgment result is that the subsequent miss request is not correlated with the discard request, sending the subsequent miss request to enter an miss buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit, wherein the retransmission sequence is used for identifying the sequence of access requests needing to be retransmitted, the access requests needing to be retransmitted are all generated due to miss and address correlation with the requests in the miss buffer, at the moment, the access sequence needs to be identified through the retransmission sequence to ensure the accuracy of program execution, the determination of the retransmission sequence is specifically to obtain a first identification time corresponding to the first retransmission identification bit, the second identification time corresponding to the second retransmission identification bit, and comparing the first identification time with the second identification time, and setting the retransmission sequence according to the time sequence in the comparison result.
In addition, when the correlation determination result is correlated, a first retransmission flag bit corresponding to a subsequent miss request is set in the request buffer.
Step S105, after detecting that the memory access request and the subsequent miss request in the off-target buffer complete loading from the main memory, retransmitting the memory access request in the off-target buffer according to the retransmission sequence through a preset activated retransmission step.
Specifically, after detecting that the memory access request and the subsequent miss request in the off-target buffer finish loading from the main memory, retransmitting the memory access request in the off-target buffer according to a retransmission sequence through a preset activation retransmission step, specifically: when the off-target request in the off-target buffer finishes the loading operation from the main memory, the access request in the request buffer is activated and retransmitted at the moment, so that the access request related to the address can be executed again in sequence and finished in sequence. The active retransmission device receives the completion signal from the off-target buffer, and when the request in the off-target buffer completes the filling operation, the completion signal is sent to the active retransmission device, and the active retransmission device retransmits the access request with the retransmission identification bit in the request buffer.
The embodiment of the invention provides a multi-depth buffer activation retransmission method, when a cache memory receives an access request, a request address of the access request is obtained, whether the access request hits or not is judged according to the request address, and the cache memory comprises request buffering and off-target buffering; when the access request does not hit the cache memory, sending the access request to enter the off-target buffer, and setting a first retransmission identification bit corresponding to the access request in the request buffer; when the cache memory receives a subsequent miss request of the access request, acquiring a subsequent address of the subsequent miss request, and judging the address correlation according to the subsequent address and the request address; when the correlation judgment result is irrelevant, sending a subsequent miss request to enter an off-target buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit; after detecting that the memory access request and the subsequent miss request in the off-target buffer are loaded from the main memory, retransmitting the memory access request in the off-target buffer according to a retransmission sequence through a preset activated retransmission step. Thus, the multi-depth buffer structure in dynamic operation can support out-of-order transmission and completion of access requests, and simultaneously ensure the correctness of the off-target requests after retransmission, thereby improving the performance and efficiency of the data Cache.
Fig. 2 is a DMA data exchange apparatus supporting data transposition according to an embodiment of the present invention, including: a first receiving module S201, a first setting module S202, a second receiving module S203, a second setting module S204, and a detecting module S205, wherein:
the first receiving module S201 is configured to obtain a request address of a memory access request when the memory access request is received by a cache memory, and determine whether the memory access request hits according to the request address, where the cache memory includes a request buffer and an off-target buffer.
The first setting module S202 is configured to send the access request to the off-target buffer when the access request misses the cache, and set a first retransmission identification bit corresponding to the access request in the request buffer.
And a second receiving module S203, configured to, when the cache memory receives a subsequent miss request of the access request, acquire a subsequent address of the subsequent miss request, and perform address correlation judgment according to the subsequent address and the request address.
And the second setting module S204 is configured to send the subsequent miss request to enter the miss buffer when the correlation determination result is irrelevant, set a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and set a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit.
And the detection module S205 is configured to retransmit the memory access request in the off-target buffer according to the retransmission sequence through a preset active retransmission step after detecting that the memory access request in the off-target buffer and the subsequent miss request complete loading from the main memory.
In one embodiment, the apparatus may further include:
and the access module is used for accessing corresponding data in the cache memory according to the access request when the access request hits the cache memory, acquiring a request source of the access request, and returning the corresponding data in the cache memory according to the request source.
In one embodiment, the apparatus may further include:
and a third setting module, configured to set a first retransmission identification bit corresponding to the subsequent miss request in the request buffer when the correlation determination result is correlated.
In one embodiment, the apparatus may further include:
and the transmission module is used for transmitting a transmission completion signal to an active retransmission device in the request buffer, and the active retransmission device retransmits the access request with the same retransmission identification bit according to the retransmission sequence according to the transmission completion signal.
In one embodiment, the apparatus may further include:
the comparison module is used for acquiring the first identification time corresponding to the first retransmission identification bit and the second identification time corresponding to the second retransmission identification bit, and comparing the first identification time with the second identification time.
And the fourth setting module is used for setting the retransmission sequence according to the time sequence in the comparison result.
For specific limitations of the multi-depth buffer activated retransmission apparatus, reference may be made to the above limitations of the multi-depth buffer activated retransmission method, and no further description is given here. The various modules in the multi-depth buffer activation retransmission apparatus described above may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
Fig. 3 illustrates a physical schematic diagram of an electronic device, as shown in fig. 3, where the electronic device may include: a processor (processor) 301, a memory (memory) 302, a communication interface (Communications Interface) 303 and a communication bus 304, wherein the processor 301, the memory 302 and the communication interface 303 perform communication with each other through the communication bus 304. The processor 301 may call logic instructions in the memory 302 to perform the following method: when the cache memory receives the access request, acquiring a request address of the access request, judging whether the access request hits or not according to the request address, wherein the cache memory comprises a request buffer and an off-target buffer; when the access request does not hit the cache memory, sending the access request to enter the off-target buffer, and setting a first retransmission identification bit corresponding to the access request in the request buffer; when the cache memory receives a subsequent miss request of the access request, acquiring a subsequent address of the subsequent miss request, and judging the address correlation according to the subsequent address and the request address; when the correlation judgment result is irrelevant, sending a subsequent miss request to enter an off-target buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit; after detecting that the memory access request and the subsequent miss request in the off-target buffer are loaded from the main memory, retransmitting the memory access request in the off-target buffer according to a retransmission sequence through a preset activated retransmission step.
Further, the logic instructions in memory 302 described above may be implemented in the form of software functional units and stored in a computer readable storage medium when sold or used as a stand alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, embodiments of the present invention further provide a non-transitory computer readable storage medium having stored thereon a computer program, which when executed by a processor is implemented to perform the transmission method provided in the above embodiments, for example, including: when the cache memory receives the access request, acquiring a request address of the access request, judging whether the access request hits or not according to the request address, wherein the cache memory comprises a request buffer and an off-target buffer; when the access request does not hit the cache memory, sending the access request to enter the off-target buffer, and setting a first retransmission identification bit corresponding to the access request in the request buffer; when the cache memory receives a subsequent miss request of the access request, acquiring a subsequent address of the subsequent miss request, and judging the address correlation according to the subsequent address and the request address; when the correlation judgment result is irrelevant, sending a subsequent miss request to enter an off-target buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit; after detecting that the memory access request and the subsequent miss request in the off-target buffer are loaded from the main memory, retransmitting the memory access request in the off-target buffer according to a retransmission sequence through a preset activated retransmission step.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A multi-depth buffer activated retransmission method, comprising:
when a cache memory receives a memory access request, acquiring a request address of the memory access request, judging whether the memory access request hits or not according to the request address, wherein the cache memory comprises a request buffer and an off-target buffer;
when the access request misses the cache memory, sending the access request to enter the off-target buffer, and setting a first retransmission identification bit corresponding to the access request in the request buffer;
when the cache memory receives a subsequent miss request of the access request, acquiring a subsequent address of the subsequent miss request, and performing address correlation judgment according to the subsequent address and the request address;
when the correlation judgment result is irrelevant, sending the subsequent miss request to enter the miss buffer, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit;
and after the access request and the subsequent miss request in the off-target buffer are detected to finish loading from the main memory, retransmitting the access request in the off-target buffer according to the retransmission sequence through a preset activated retransmission step.
2. The multi-depth buffer activated retransmission method according to claim 1, further comprising, after determining whether the access request hits according to the request address:
and when the access request hits the cache memory, accessing corresponding data in the cache memory according to the access request, acquiring a request source of the access request, and returning the corresponding data in the cache memory according to the request source.
3. The multi-depth buffer activated retransmission method according to claim 1, further comprising, after performing address correlation judgment according to the subsequent address and the request address:
and when the correlation judgment result is correlated, setting a first retransmission identification bit corresponding to the subsequent miss request in the request buffer.
4. The multi-deep buffer active retransmission method according to claim 1, wherein the retransmitting the request in the off-target buffer according to the retransmission sequence through a preset active retransmission step, comprises:
and transmitting a transmission completion signal to an active retransmission device in the request buffer, wherein the active retransmission device retransmits the access request with the same retransmission identification bit according to the retransmission sequence according to the transmission completion signal.
5. The multi-depth buffer activated retransmission method according to claim 1, wherein the setting of a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit comprises:
acquiring a first identification time corresponding to the first retransmission identification bit, a second identification time corresponding to the second retransmission identification bit, and comparing the first identification time with the second identification time;
and setting the retransmission sequence according to the time sequence in the comparison result.
6. A multi-depth buffer activated retransmission apparatus, the apparatus comprising:
the first receiving module is used for acquiring a request address of the access request when the cache memory receives the access request, judging whether the access request hits or not according to the request address, wherein the cache memory comprises a request buffer and an off-target buffer;
a first setting module, configured to send the memory access request to the off-target buffer when the memory access request misses the cache memory, and set a first retransmission identification bit corresponding to the memory access request in the request buffer;
the second receiving module is used for acquiring a subsequent address of the subsequent miss request when the cache memory receives the subsequent miss request of the access request, and judging the address correlation according to the subsequent address and the request address;
the second setting module is used for sending the subsequent miss request to enter the miss buffer when the correlation judgment result is irrelevant, setting a second retransmission identification bit corresponding to the subsequent miss request in the request buffer, and setting a retransmission sequence according to the first retransmission identification bit and the second retransmission identification bit;
and the detection module is used for retransmitting the access request in the off-target buffer according to the retransmission sequence through a preset activated retransmission step after the access request and the subsequent miss request in the off-target buffer are detected to be loaded from the main memory.
7. The multi-depth buffer activated retransmission apparatus as described in claim 6, further comprising:
and the access module is used for accessing corresponding data in the cache memory according to the access request when the access request hits the cache memory, acquiring a request source of the access request, and returning the corresponding data in the cache memory according to the request source.
8. The multi-depth buffer activated retransmission apparatus as described in claim 6, further comprising:
and a third setting module, configured to set a first retransmission identification bit corresponding to the subsequent miss request in the request buffer when the correlation determination result is correlated.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor performs the steps of the multi-depth buffer activated retransmission method according to any one of claims 1 to 5 when the program is executed.
10. A non-transitory computer readable storage medium having stored thereon a computer program, which when executed by a processor performs the steps of the multi-depth buffer activation retransmission method according to any one of claims 1 to 5.
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| CN108874691A (en) * | 2017-05-16 | 2018-11-23 | 龙芯中科技术有限公司 | Data prefetching method and Memory Controller Hub |
| CN109582214A (en) * | 2017-09-29 | 2019-04-05 | 华为技术有限公司 | Data access method and computer system |
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| US10380034B2 (en) * | 2017-07-14 | 2019-08-13 | International Business Machines Corporation | Cache return order optimization |
| US11269774B2 (en) * | 2018-10-15 | 2022-03-08 | Texas Instruments Incorporated | Delayed snoop for improved multi-process false sharing parallel thread performance |
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| CN101873193A (en) * | 2009-04-27 | 2010-10-27 | 中兴通讯股份有限公司 | Method for sending wireless link layer state bag |
| CN106100803A (en) * | 2010-01-28 | 2016-11-09 | 汤姆森特许公司 | The method and apparatus determined is retransmitted for making |
| CN108874691A (en) * | 2017-05-16 | 2018-11-23 | 龙芯中科技术有限公司 | Data prefetching method and Memory Controller Hub |
| CN109582214A (en) * | 2017-09-29 | 2019-04-05 | 华为技术有限公司 | Data access method and computer system |
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