CN113891523B

CN113891523B - Driving circuit, driving chip, driving system and driving method suitable for pulsating voltage

Info

Publication number: CN113891523B
Application number: CN202010635084.1A
Authority: CN
Inventors: 费小泂; 孟豪
Original assignee: Cool Silicon Semiconductor Technology Shanghai Co ltd
Current assignee: Cool Silicon Semiconductor Technology Shanghai Co ltd
Priority date: 2020-07-03
Filing date: 2020-07-03
Publication date: 2023-09-05
Anticipated expiration: 2040-07-03
Also published as: CN113891523A

Abstract

The invention relates to a driving circuit, a driving chip, a driving system and a driving method suitable for pulsating voltage. A plurality of drive circuits connected in series are supplied with a pulsating voltage. The driving circuit is used for driving one or more paths of light emitting diodes, and each path of light emitting diode pipeline is connected in series with the constant current unit of the driving circuit between the power input end and the potential reference end. The driving circuit has a voltage detection module that detects a voltage drop between the power supply input terminal and the potential reference terminal. The voltage detection module compares the voltage drop with a threshold voltage: when the voltage drop is higher than the threshold voltage, the trigger driving circuit enters a first working mode, and when the voltage drop is lower than the threshold voltage, the trigger driving circuit enters a second working mode. In the first operation mode, the constant current of the constant current unit is allowed to drive the light emitting diode. And in the second working mode, the constant current unit is forbidden to output constant current to the light emitting diode.

Description

Driving circuit, driving chip, driving system and driving method suitable for pulsating voltage

Technical Field

The invention mainly relates to the field of illumination display, in particular to a driving circuit, a driving chip, a driving system and a driving method which are applicable to pulsating voltage in the illumination display occasion containing a solid-state light-emitting diode light source.

Background

For the application scene of electric power energy such as alternating current commercial power, most occasions are to rectify alternating current commercial power into pulsating direct current in advance and to reuse a filter capacitor to stabilize the pulsating direct current, and the direct current voltage with fewer ripples output by the filter capacitor is provided for various loads. Usually, the DC voltage of the filter capacitor is further boosted or down converted to form voltages with different levels for the load in cooperation with the DC-DC converter. This relates to passive or active power factor correction and to how to improve the total harmonic distortion and to pulse width modulation of switching power supplies. The filter capacitor of the conventional electrolytic capacitor is large in size and high in price, and the converter also has the characteristics of low element efficiency and complex modulation.

In the field of illuminated displays, the number of pixels that a single driver chip can drive is limited, and if it is attempted to integrate very large-scale pixels in a display system, many driver chips must be cascaded. The pixel point is provided with three primary color light emitting diodes. The pulse dimming technique is to change the time width of the light emitting diode to be turned on or off in a certain period of time, and simultaneously, to require the current flowing through the light emitting diode during the on-state to be a constant current value, thereby realizing the brightness change. According to the standard chromaticity diagram defined by the glasman law and the international committee for illumination, it is necessary to allocate the reference color components of the pixel points in a predetermined intensity range, and all colors that can be perceived by the vision system can be obtained depending on the gray-scale variation of the reference color. For the field of illumination display, it is needed to design a driving scheme which can adapt to the situation of unstable voltage fluctuation such as pulsating voltage.

Disclosure of Invention

The application relates to a system suitable for pulsating voltages, comprising:

a plurality of driving circuits connected in series, the driving circuits being supplied with power by a pulsating voltage;

the driving circuit comprises a power input end and a potential reference end, wherein the power input end of the next driving circuit is coupled to the potential reference end of the adjacent previous driving circuit in a plurality of driving circuits connected in series;

the driving circuit is used for driving one or more paths of light emitting diodes, and each path of light emitting diode pipeline and the constant current unit of the driving circuit are connected in series between the power input end and the potential reference end;

the driving circuit is provided with a voltage detection module for detecting voltage drop between a power input end and a potential reference end;

the voltage detection module compares the voltage drop to a threshold voltage:

triggering the driving circuit to enter a first working mode when the voltage drop is higher than the threshold voltage;

triggering the driving circuit to enter a second working mode when the voltage is lower than the threshold voltage;

in a first operation mode, allowing the constant current unit to provide constant current to perform constant current driving on the light emitting diode;

In the second operation mode, the constant current unit is prohibited from outputting constant current to the light emitting diode.

The system for pulsating voltage, wherein each driving circuit comprises:

the system comprises a plurality of pulse width modulation modules, a plurality of light emitting diodes and a plurality of light emitting diodes, wherein each pulse width modulation module forms a corresponding pulse width modulation signal according to gray data matched with one light emitting diode matched with the pulse width modulation module;

in each of the driving circuits: when the pulse width modulation signal corresponding to any one light emitting diode has an effective logic value, the any one light emitting diode is lightened and flows through constant current provided by the constant current unit.

In the system suitable for pulsating voltage, when the driving circuit is in the first working mode, each pulse width modulation module of the driving circuit is started, so that the light emitting diode is driven; and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit, and not performing driving operation on the light emitting diode.

The system for pulsating voltage described above, in each driving circuit: each cycle period common to the multiple pulse width modulated signals is divided into a plurality of time periods, with the effective logic value of each pulse width modulated signal being distributed over a respective one of the time periods.

In the system suitable for pulsating voltage, a capacitor is arranged between the power input end of the driving circuit and the potential reference end.

Each driving circuit further comprises a data transmission module with a decoder and is used for decoding gray data from received communication data and forwarding the communication data;

the plurality of driving circuits receive communication data in a cascade connection mode: the driving circuit receives the communication data, extracts the communication data belonging to the current stage, and forwards the received remaining other communication data to the next stage connected in cascade.

In the system applicable to pulsating voltage, when the driving circuit is in the first working mode, the data transmission module of the driving circuit is started to receive communication data and forward the communication data; and when the driving circuit is in the second working mode, the data transmission module of the driving circuit is disabled, and communication data is not received or forwarded.

In the system applicable to the pulsating voltage, communication data is sent to the plurality of driving circuits only when the driving circuits are in the first working mode; when the driving circuit is in the second working mode, the communication data are not sent to the driving circuits.

The system for pulsating voltages described above, each of the driving circuits further being provided with a load connected in parallel with the plurality of light emitting diodes; the load and the constant current unit are connected in series between the power input end and the potential reference end; the result of the nor operation of the multiple pulse width modulation signals is regarded as a control signal, and the constant current provided by the constant current unit is switched to flow through the load when the control signal has an effective logic value.

When the driving circuit is in the first working mode, the pulse width modulation modules of the driving circuit are started, so that the driving operation is carried out on the light emitting diode and the load; and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit, and not performing driving operation on the light emitting diode and the load.

The system suitable for pulsating voltage, the voltage detection module includes: the voltage divider is arranged between the power input end and the potential reference end, samples the voltage drop and obtains a voltage division value of which the voltage drop is reduced according to a preset proportion; the comparator is used for comparing the divided voltage value with a preset voltage, the threshold voltage is reduced according to the preset proportion to obtain the preset voltage, and the comparator generates a comparison result: when the divided value exceeds the preset voltage, the comparison result triggers the driving circuit to enter the first working mode, and when the divided value is lower than the preset voltage, the comparison result triggers the driving circuit to enter the second working mode.

The system suitable for pulsating voltage, the voltage detection module further comprises: a resistor, a switch and a zener diode connected in series between the power input end and the potential reference end; the output end of the comparator is coupled to the control end of the switch, when the voltage division value exceeds the preset voltage, the switch is turned on, the voltage-stabilizing diode is turned on, and when the voltage division value is lower than the preset voltage, the switch is turned off.

The system suitable for pulsating voltage, the voltage detection module further comprises: a resistor and a current source connected in series between the power input end and the potential reference end; the comparison result of the comparator also determines whether the current source is switched on or not, the current source is switched on when the divided voltage value exceeds the preset voltage, and the current source is switched off when the divided voltage value is lower than the preset voltage.

The system suitable for pulsating voltage, the voltage detection module comprises: a resistor, a zener diode, a junction field effect transistor connected in series between the power input terminal and the potential reference terminal; the Zener diode and the resistor are connected in series between the first end of the junction field effect transistor and the power input end; the control terminal of the junction field effect transistor is coupled to the potential reference terminal and the second terminal of the junction field effect transistor is coupled to the potential reference terminal through another clamping resistor;

A comparator for comparing the voltage of the first or second terminal with a threshold voltage, the comparator generating a comparison result;

the comparison result triggers the driving circuit to enter a first working mode when the voltage of the first end or the second end exceeds the threshold voltage;

the comparison result triggers the driving circuit to enter the second working mode when the voltage of the first end or the second end is lower than the threshold voltage.

In the system suitable for pulsating voltage, the voltage drop of any one of the driving circuits is only turned on when the zener diode is reversely broken down and the voltage detection module of the any one of the driving circuits is not lower than the threshold voltage; when the voltage of any one of the driving circuits is lower than the threshold voltage, the zener diode is turned off and the voltage detection module of the any one of the driving circuits is turned off.

The system suitable for pulsating voltage, the voltage detection module includes: a resistor, a zener diode and a current source connected in series between the power input end and the potential reference end; the voltage drop of any one of the driving circuits is only when the voltage drop is not lower than the threshold voltage and the zener diode is reversely broken down to be conducted, and the current source is turned on, otherwise, the current source is turned off;

A comparator for comparing the voltage of the anode of the zener diode with a threshold voltage, the comparator generating a comparison result;

the comparison result triggers the driving circuit to be in a first working mode when the voltage of the anode of the Zener diode exceeds the threshold voltage;

the comparison result triggers the driving circuit to be in the second working mode when the voltage of the anode of the Zener diode is lower than the threshold voltage.

The application relates to a method suitable for pulsating voltage, which is characterized in that:

connecting a plurality of driving circuits in series, wherein each driving circuit comprises a power input end and a potential reference end, and a capacitor device is connected between the power input end and the potential reference end of each driving circuit;

the method comprises the following steps:

obtaining pulsating voltage after rectifying by using alternating current to supply power for a plurality of driving circuits connected in series;

in each of the driving circuits, comparing the voltage drop with a threshold voltage using the voltage detection module:

When the voltage drop is higher than the threshold voltage, triggering the driving circuit to enter a first working mode;

when the voltage is lower than the threshold voltage, triggering the driving circuit to enter a second working mode;

The voltage detection module comprises a voltage divider arranged between the power input end and the potential reference end, and is used for sampling the voltage drop and obtaining a voltage division value of which the voltage drop is reduced according to a preset proportion; the comparator is used for comparing the divided voltage value with a preset voltage, the threshold voltage is reduced according to a preset proportion to obtain the preset voltage, and a comparison result is generated by the comparator;

when the divided voltage value exceeds the preset voltage, the comparison result triggers the driving circuit to enter a first working mode,

and when the voltage division value is lower than the preset voltage, the comparison result triggers the driving circuit to enter a second working mode.

In the above method, the voltage detection module further includes: a resistor, a switch and a zener diode connected in series between the power input terminal and the potential reference terminal; the output end of the comparator is coupled to the control end of the switch, when the voltage division value exceeds the preset voltage, the switch is turned on, the voltage-stabilizing diode is turned on, and when the voltage division value is lower than the preset voltage, the switch is turned off.

In the above method, the voltage detection module further includes: a resistor and a current source connected in series between the power input terminal and the potential reference terminal; the comparison result of the comparator also determines whether the current source is switched on, the current source is switched on when the divided value exceeds the preset voltage, and the current source is switched off when the divided value is lower than the preset voltage.

In the above method, the voltage detection module includes: a resistor and a zener diode connected in series between the power input terminal and the potential reference terminal, a junction field effect transistor; the Zener diode and the resistor are connected in series between the first end of the junction field effect transistor and the power input end; the control terminal of the junction field effect transistor is coupled to the potential reference terminal and the second terminal of the junction field effect transistor is coupled to the potential reference terminal through another clamping resistor;

In the method, the voltage drop of any one of the driving circuits is only turned on when the zener diode is reversely broken down and the voltage detection module of the any one of the driving circuits is not lower than the threshold voltage; when the voltage of any one of the driving circuits is lower than the threshold voltage, the zener diode is turned off, and the voltage detection module of the any one of the driving circuits is turned off.

In the above method, the voltage detection module includes: a resistor, a zener diode and a current source which are connected in series between the power input end and the potential reference end; the voltage drop of any one of the driving circuits is only turned on when the voltage drop is not lower than the threshold voltage and the zener diode is reversely broken down to be turned on, otherwise, the current source is turned off;

In the above method, each of the driving circuits includes: the system comprises a plurality of pulse width modulation modules, a plurality of light emitting diodes and a plurality of light emitting diodes, wherein each pulse width modulation module forms a corresponding pulse width modulation signal according to gray data matched with one light emitting diode matched with the pulse width modulation module; in each driving circuit, each cycle period shared by the multiple pulse width modulation signals is divided into a plurality of time periods, and the effective logic value of each pulse width modulation signal is distributed in a corresponding time period;

when the pulse width modulation signal corresponding to any one light emitting diode has an effective logic value, the any one light emitting diode is lightened and flows through the constant current provided by the constant current unit.

In the method, each driving circuit is also provided with a load connected with the multiple light emitting diodes in parallel; the load and the constant current unit are connected in series between the power input end and the potential reference end; the result of the nor operation of the multi-channel pulse width modulation signal is regarded as a control signal, and when the control signal is a valid logic value, the constant current of the constant current unit is switched to flow through the load.

In the method, when the driving circuit is in the first working mode, each pulse width modulation module of the driving circuit is started so as to drive the light emitting diode and the load; and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit, and not performing driving operation on the light emitting diode and the load.

In the above method, each driving circuit further includes a data transmission module with a decoder, for decoding gray data from the received communication data and for forwarding the communication data; the driving circuits receive communication data in a cascade connection mode: each driving circuit receives the communication data, extracts the communication data belonging to the current stage and forwards the received rest other communication data to the next stage connected with the driving circuit in cascade; when the driving circuit is in a first working mode, enabling a data transmission module of the driving circuit to receive communication data and forward the communication data; and when the driving circuit is in the second working mode, disabling the data transmission module of the driving circuit, and not receiving the communication data or forwarding the communication data.

The application relates to a driving circuit suitable for pulsating voltage, comprising:

a power supply input terminal and a potential reference terminal;

the constant current unit, one or more light emitting diodes driven by the driving circuit and the constant current unit are connected in series between the power input end and the potential reference end;

a voltage detection module for detecting a voltage drop between the power input terminal and the potential reference terminal;

The voltage detection module compares the voltage drop to a threshold voltage:

in a second working mode, the constant current unit is forbidden to output constant current to the light emitting diode;

the driving circuits are supplied with power by a ripple voltage on the premise that the driving circuits are connected in series.

The above-mentioned driving circuit suitable for pulsating voltage, the voltage detection module includes: the voltage divider is arranged between the power input end and the potential reference end, samples the voltage drop and obtains a voltage division value of the voltage drop which is reduced according to a preset proportion; the comparator is used for comparing the divided voltage value with a preset voltage, the threshold voltage is reduced according to the preset proportion to obtain the preset voltage, and the comparator generates a comparison result;

The above-mentioned driving circuit suitable for ripple voltage, voltage detection module still includes: a resistor, a switch and a zener diode connected in series between the power input end and the potential reference end; the output end of the comparator is coupled to the control end of the switch, and when the divided value exceeds the preset voltage, the switch is turned on, the zener diode is turned on, and when the divided value is lower than the preset voltage, the switch is turned off.

The above-mentioned driving circuit suitable for ripple voltage, voltage detection module still includes: a resistor and a current source connected in series between the power input end and the potential reference end; the comparison result of the comparator also determines whether the current source is switched on or not, the current source is switched on when the divided voltage value exceeds the preset voltage, and the current source is switched off when the divided voltage value is lower than the preset voltage.

The above-mentioned driving circuit suitable for pulsating voltage, the voltage detection module includes: a resistor, a zener diode, a junction field effect transistor connected in series between the power input terminal and the potential reference terminal; the Zener diode and the resistor are connected in series between the first end of the junction field effect transistor and the power input end; the control terminal of the junction field effect transistor is coupled to the potential reference terminal and the second terminal of the junction field effect transistor is coupled to the potential reference terminal through another clamping resistor;

In the driving circuit suitable for pulsating voltage, the voltage drop of any one of the driving circuits is only turned on when the voltage drop is not lower than the threshold voltage, so that the zener diode is reversely broken down; when the voltage of any one of the driving circuits is lower than the threshold voltage, the zener diode is turned off and the voltage detection module of the any one of the driving circuits is turned off.

The above-mentioned drive circuit suitable for ripple voltage, voltage detection module includes: a resistor, a zener diode and a current source connected in series between the power input end and the potential reference end; the voltage drop of any one of the driving circuits is only when the voltage drop is not lower than the threshold voltage and the zener diode is reversely broken down to be conducted, and the current source is turned on, otherwise, the current source is turned off;

The driving circuit suitable for the pulsating voltage comprises a plurality of pulse width modulation modules, wherein each pulse width modulation module forms a corresponding pulse width modulation signal according to gray data matched with one light emitting diode matched with the pulse width modulation module, and the multiple light emitting diodes correspond to multiple pulse width modulation signals; in each driving circuit, when a pulse width modulation signal corresponding to any one light emitting diode has an effective logic value, the any one light emitting diode is lightened and flows through a constant current provided by a constant current unit.

The driving circuits suitable for pulsating voltages described above are each equipped with three kinds of light emitting diodes red, green and blue.

When the driving circuit is in the first working mode, each pulse width modulation module of the driving circuit is started, so that the driving operation is carried out on the light emitting diode; and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit, and not performing driving operation on the light emitting diode.

The driving circuit suitable for pulsating voltage described above, wherein each driving circuit: each cycle period common to the multiple pulse width modulated signals is divided into a plurality of time periods, and the effective logic value of each pulse width modulated signal is distributed in a corresponding one of the time periods.

The driving circuits suitable for pulsating voltages, each driving circuit is also provided with a load connected with a plurality of light emitting diodes in parallel; the load and the constant current unit are connected in series between a power input end and a potential reference end; the result of the nor operation of the multiple pulse width modulation signals is regarded as a control signal, and the constant current provided by the constant current unit is switched to flow through the load when the control signal has an effective logic value.

When the driving circuit is in the first working mode, each pulse width modulation module of the driving circuit is started, so that the driving operation is carried out on the light emitting diode and the load; and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit, and not performing driving operation on the light emitting diode and the load.

The driving circuit suitable for the pulsating voltage comprises a data transmission module with a decoder, a data processing module and a data processing module, wherein the data transmission module is used for decoding gray data from received communication data and forwarding the communication data; the driving circuits receive communication data in a cascade connection mode: after each driving circuit receives the communication data, the driving circuit extracts the communication data belonging to the current stage and forwards the received rest other communication data to the next stage connected with the driving circuit in cascade.

When the driving circuit is in the first working mode, the data transmission module of the driving circuit is started to receive communication data and forward the communication data; and when the driving circuit is in the second working mode, disabling the data transmission module of the driving circuit, and not receiving the communication data or forwarding the communication data.

The application relates to a driving chip suitable for pulsating voltage, which is characterized by comprising a driving circuit suitable for pulsating voltage as described above and below.

a power supply input terminal and a potential reference terminal; the constant current unit is connected between the power input end and the potential reference end in series with one or more light emitting diodes driven by the driving circuit; a voltage detection module for detecting a voltage drop between the power input terminal and the potential reference terminal; on the premise that a plurality of driving circuits are connected in series, a ripple voltage supplies power for the driving circuits; the voltage detection module compares the voltage drop with a threshold voltage;

the voltage detection module includes: the voltage divider is arranged between the power input end and the potential reference end, samples the voltage drop and obtains a voltage division value of the voltage drop which is reduced according to a preset proportion; the comparator is used for comparing the divided voltage value with a preset voltage, the threshold voltage is reduced according to a preset proportion to obtain the preset voltage, and a comparison result is generated by the comparator;

The voltage division value exceeds a preset voltage, the representation voltage drop is higher than a threshold voltage, and the comparison result triggers the driving circuit to enter a first working mode; the divided value is lower than a preset voltage, the representation voltage is lower than a threshold voltage, and the comparison result triggers the driving circuit to enter a second working mode; in a first working mode, the constant current unit is allowed to provide constant current so as to implement constant current driving on the light emitting diode; in the second working mode, the constant current unit is forbidden to output constant current to the light emitting diode.

Each driving circuit comprises a plurality of pulse width modulation modules, each pulse width modulation module forms a corresponding pulse width modulation signal according to gray data matched with one light emitting diode matched with the pulse width modulation module, and the multiple light emitting diodes correspond to multiple pulse width modulation signals; in each driving circuit, whether any one light emitting diode flows through the constant current of the constant current unit or not is controlled by one pulse width modulation signal corresponding to the any one light emitting diode; when the driving circuit is in a first working mode, starting each pulse width modulation module of the driving circuit so as to drive the light emitting diode; and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit and not performing driving operation on the light emitting diode.

Each driving circuit further comprises a data transmission module with a decoder, wherein the data transmission module is used for decoding gray data from received communication data and forwarding the communication data; the plurality of driving circuits receive communication data in a cascade connection mode: after receiving the communication data, the driving circuit extracts the communication data belonging to the current stage and forwards the received rest other communication data to the next stage connected with the driving circuit in cascade; when the driving circuit is in the first working mode, the data transmission module of the driving circuit is started to receive communication data and forward the communication data; and when the driving circuit is in the second working mode, the data transmission module of the driving circuit is disabled, and communication data is not received or forwarded.

The voltage detection module includes: a zener diode and a junction field effect transistor connected in series between the power input terminal and the potential reference terminal; the zener diode is connected between the first end of the junction field effect transistor and the power input end; the control terminal of the junction field effect transistor is coupled to the potential reference terminal, and the second terminal of the junction field effect transistor is coupled to the potential reference terminal through another clamping resistor; a comparator for comparing the voltage of the first end or the second end with a threshold voltage, and generating a comparison result by the comparator; the voltage of the first end or the second end exceeds the threshold voltage to represent that the voltage drop is higher than the threshold voltage, and the comparison result triggers the driving circuit to enter a first working mode; the voltage of the first end or the second end is lower than a threshold voltage, the voltage is represented to be lower than the threshold voltage, and the comparison result triggers the driving circuit to enter a second working mode;

allowing the constant current unit to provide constant current in the first working mode so as to implement constant current driving on the light emitting diode; and in the second working mode, the constant current unit is forbidden to output constant current to the light emitting diode.

the voltage detection module includes: a zener diode and a current source connected in series between the power input end and the potential reference end; the voltage drop of any one of the driving circuits is only turned on when the voltage drop is not lower than the threshold voltage and the zener diode is reversely broken down to be turned on, otherwise, the current source is turned off; a comparator for comparing the voltage of the anode of the zener diode with a threshold voltage, the comparator generating a comparison result; the voltage of the anode of the Zener diode exceeds the threshold voltage to represent that the voltage drop is higher than the threshold voltage, and the comparison result triggers the driving circuit to be in a first working mode; the voltage of the anode of the Zener diode is lower than the threshold voltage, the representation voltage is lower than the threshold voltage, and the comparison result triggers the driving circuit to be in a second working mode;

connecting a plurality of driving circuits in series, wherein the driving circuits comprise a power input end and a potential reference end;

the method comprises the following steps:

rectifying alternating current to obtain pulsating voltage to supply power for the driving circuits connected in series;

when the pulse voltage is higher than a preset voltage value, enabling each driving circuit to enter a first working mode;

when the pulse voltage is lower than the preset voltage value, enabling each driving circuit to enter a second working mode;

whereby each of said drive circuits is high frequency switched between a first mode of operation and a second mode of operation;

In each of the driving circuits, the voltage detection module compares the voltage drop with a threshold voltage:

triggering the driving circuit to enter a first working mode when the pulse voltage is higher than the preset voltage value and the voltage drop is higher than the threshold voltage;

triggering the driving circuit to enter a second working mode when the pulse voltage is lower than the preset voltage value and the voltage is caused to be lower than the threshold voltage;

Drawings

So that the manner in which the above recited objects, features and advantages of the present invention can be understood in detail, a more particular description of the invention, briefly summarized below, may be had by reference to the appended drawings.

Fig. 1 shows a series of gradation data transmitted from a master node assigned to a plurality of driving circuits as display data.

Fig. 2 is a schematic diagram of a plurality of driving circuits connected in series between the positive and negative poles of a stabilized dc power supply.

Fig. 3 shows that the ac mains supply is rectified by a rectifier to supply a plurality of driving circuits with pulsating voltage.

Fig. 4 shows that ripple voltage is not uniformly distributed to each driving circuit, resulting in a difference in voltage drop.

Fig. 5 is a driving circuit with a voltage detection module between a power input terminal and a potential reference terminal.

Fig. 6 is a topology diagram of a drive circuit with a comparator and zener diode and a voltage divider.

Fig. 7 is a topology diagram of a drive circuit with a zener diode and a junction field effect transistor.

FIG. 8 is an alternative example of generating multiple PWM signals by each PWM module in the driving circuit.

Fig. 9 is a schematic waveform diagram of the pwm module generating the multiple pwm signals and the control signals.

Fig. 10 is a schematic diagram of an alternative topology of a drive circuit with a comparator and current source and a voltage divider.

Fig. 11 is an alternative topology schematic of a drive circuit with series zener diodes and current sources in series.

Fig. 12 shows that ripple voltages are distributed as uniformly as possible to the respective driving circuits, and that the voltage drop is suppressed from appearing to be different.

Fig. 13 is a schematic diagram of a pulsating voltage to power a driving circuit and to power a light emitting diode in series with the driving circuit.

Fig. 14 shows the ripple voltage entering the first operation mode around the peak and the second operation mode around the valley.

Fig. 15 is a schematic diagram of an alternative configuration of a voltage detection module with a comparator and a voltage divider of the driving circuit.

Fig. 16 is a schematic diagram of an alternative configuration of a voltage detection module with a comparator and a zener diode and a current source.

Fig. 17 is an alternative topology of a voltage detection module with a comparator and zener diode and junction field effect transistor.

Detailed Description

The following will provide a clear and complete description of the aspects of the invention in connection with various embodiments. All solutions obtained by a person skilled in the art without making any inventive effort fall within the scope of protection of the present invention.

Referring to fig. 1, the screen resolution of the display system refers to the precision of the screen image, and generally refers to how many pixels the display system can display at maximum. Because the dots, lines and surfaces on the screen are all composed of pixel points, the more pixels the display system can display, the finer the picture, and the more and more clear the information can be displayed in the screen area, so the screen resolution is a very important performance index for the display system. In the occasions of building brightening, commercial lighting and the like, pixel points are provided with cascade driving chips IC1-ICK and other slave nodes, and a master node MST sends communication data to the slave nodes. Communication between the master node and the slave node allows for the use of standardized communication protocols or customized non-standardized communication protocols. The master node and the slave node are respectively provided with an interface circuit for realizing data communication, and the number of the slave nodes, namely the positive integer K, exceeds 1. The display technology is more common in communication, and a plurality of transmission lines, for example, four transmission lines are used for realizing transmission of communication signals: the clock signal line, the data signal line, the loading signal line and the output enabling signal line work together, communication data are sequentially transmitted in series respectively and are mutually matched through four-wire signals to control slave nodes of each level. Communication protocols using only three lines in total of data lines and clock lines and latch lines are also the dominant communication schemes for display technologies. When the pixel point distance is larger, double-line transmission is adopted, and double-line transmission of the data line and the clock line is a compromise between the number of data lines and the transmission rate. While the generic multi-wire protocol is suitable for communicating and transferring communication data between a master node and a number of cascade-connected slave nodes, alternative single-wire communications are more suitable as a preferred embodiment for transmission of display data, with the advantage that only a single data line is required for transmission of cascade data.

Referring to fig. 1, a pixel or a lamp, which is conventional in the field of illumination display, is used as a basic display unit. Each independent pixel point adopts the mixed color of red, green and blue three primary colors to obtain full color. If each color has eight bits of gray data, then any single reference color will have 256 gray levels, and the three primary color mixes can constitute about sixteen megacolors. Further, if it is assumed that each color has up to ten bits of gradation data, and any single-color reference color has 1024 gradation levels, then three primary colors can constitute nearly billion colors after being mixed. Gray scale data known in the industry often carries duty cycle information. The red, green and blue light bead RGB-LEDs are widely used as pixel points or light points in the fields of display screens, illumination, decoration and the like. Of course, the three primary colors as an example may be replaced by any other colors in each pixel. The slave node is often a so-called constant current driving chip in the industry and has the functions of gray scale adjustment and brightness adjustment, and an output current channel provided by the constant current driving chip for the solid-state light source can be provided with a function of dimming by using a pulse width modulation signal. The slave node does not need an additional communication function if it is configured to directly perform gray scale adjustment by using the locally stored gray scale data, and the slave node needs to be equipped with a communication function if it needs to receive external communication data and to extract and refresh the gray scale data on line to perform gray scale adjustment.

Referring to fig. 1, any slave node can automatically shape the subsequent data after receiving the data of the current stage and forward the subsequent data to the next stage by the data forwarding function, and the signal is not distorted or attenuated as the cascade becomes far. If the master node MST passes the first data source to the first driver chip IC1 and the second data source to the second driver chip IC2, and so on, the kth data source is passed to the kth driver chip ICK. Let K be a positive integer greater than 1. The slave nodes comprise, for example, light emitting diode driving chips and the data sources comprise respective gray data of the three primary colors red, green and blue. The controller included in the master node MST is selected from a field programmable gate array, a processor, a state machine, a microprocessor, a logic circuit, a software-driven control device, a complex programmable logic device, a semi-custom ASIC or a single chip microcomputer, etc., and is used for processing communication data. The transmission mode of the data source comprises multi-line transmission or single-line serial transmission. In the single-wire transmission, data transmission in a return-to-one code coding format or data transmission in a return-to-zero code coding format is most common, and manchester coding is also classified into a single-wire transmission scheme. The communication mode under single-wire transmission conditions generally requires the slave node to have a data forwarding function: for example, when each slave node receives the communication data transmitted from the master node, it needs to first extract the data source belonging to its own unit, and forward the other data sources not belonging to its own unit to the slave node at the later stage connected in cascade. The communication aspect requires that the driver chips IC1 to ICK are in cascade connection.

Referring to fig. 2, the core function of the voltage converter DC is to convert a voltage of one level to a desired target voltage level through a different form of topology. The voltage converter DC performs voltage conversion and provides a stable output voltage to power the plurality of driving circuits 100 connected in series. The voltage converter DC, also called a switching converter, may be a topology such as a buck converter or a boost converter or a CUK or SEPIC or ZETA or buck-boost converter, the circuit topology for voltage conversion mentioned here belongs in the industry to a so-called non-isolated voltage converter.

Referring to fig. 2, the purpose of providing a stable voltage can be achieved by an isolated voltage converter instead of the non-isolated voltage converter, without being limited to the non-isolated voltage converter, but the isolated voltage converter requires the use of a high frequency transformer to transfer energy. Even if the non-isolated voltage converter or the isolated voltage converter is replaced by an ac switching power supply, a stable voltage can be provided. The non-isolated voltage converter or the isolated voltage converter belongs to a direct current switching power supply and is used for realizing direct current to direct current, and an alternating current switching power supply suitable for alternating current commercial power conversion scenes can realize alternating current to direct current and provide stable direct current output voltage for a plurality of driving circuits 100 connected in series.

Referring to fig. 2, a power input terminal VCC is generally defined as a power supply terminal of each functional module in the driving circuit 100, and a total input current flows from the power input terminal VCC. The potential reference GND opposite thereto is generally defined as the potential reference ground of the drive circuit 100, from which the total output current flows. In the industry, the driving circuit can be designed into a separated circuit form and also can be designed into a driving chip with high integration level.

Referring to fig. 2, the driving circuits 100 are arranged in one or more columns on the power supply path. The power supply input VCC of the first drive circuit 100 in each column as the head of the column is coupled to the power supply positive pole VP, while the potential reference GND of the last drive circuit 100 as the tail of the column is coupled to the power supply negative pole VN. The power supply input terminal of the latter driving circuit is also arranged in each column to be coupled to the potential reference terminal of the former driving circuit. In the present example, the power supply input VCC of the second drive circuit 100 is coupled to the current outflow end, i.e. the potential reference end GND, of the adjacent first drive circuit 100, as is provided in the first column. The power supply input VCC of the third driving circuit 100 is connected to the current outflow terminal, i.e., the potential reference terminal GND, of the adjacent second driving circuit 100 in the first column. And a power supply input VCC of the fourth drive circuit 100 may be arranged in the first column, for example, coupled to the current outflow end, i.e. the potential reference end GND, of the adjacent third drive circuit 100. The power supply input VCC of the last drive circuit 100 in the first column is coupled to the current outflow end, i.e. the potential reference end GND, of the penultimate drive circuit 100. For example, the power supply input VCC of the next to last drive circuit 100 can be arranged in the first column and coupled to the current outlet of the next to last drive circuit 100, i.e. the potential reference GND. From this, it can be seen that: the power supply input terminals of the rear driver chips in each column of the power supply system are coupled to the potential reference terminals of the adjacent front driver circuits until all the driver circuits in each column are connected in series or superimposed between the positive VP and the negative VN of the external power supply. As a voltage stabilizing option, a capacitor CZ may be provided between the power supply input VCC and the potential reference GND of each driving circuit. The total output current of the previous driving circuit is considered to be the total input current of the next driving circuit in each column, or the total input current of all driving circuits in each column is considered to be equal, which is determined by the series arrangement of all driving circuits. The power supply input terminal of a subsequent drive circuit of the plurality of drive circuits connected in series is coupled to the potential reference terminal of an adjacent previous drive circuit.

Referring to fig. 2, a cascaded multi-stage drive circuit is still utilized for illustration. Note that the cascade driving circuits described above are arranged in a column form on the power supply path, i.e., the driving chips are connected in series. The master node MST transmits communication data to each level of driving chips and the master node may use a data transmitting terminal such as a server or a microprocessor. When transmitting communication data to a plurality of driving chips and the like which are present in cascade: the signal output terminal DO of the previous or next stage driving chip may be configured to be coupled to the signal input terminal DI of the next or next stage driving chip through a coupling capacitor C. Assume that three driving chips are cascade-connected and twenty-four bits of gradation data are allocated to each driving chip. After the first driving chip receives the twenty four bits of data from the main node, but the first driving chip forwards the twenty four bits of data to the second driving chip. The first driver chip receives the third twenty-four bits of data from the master node, and the third twenty-four bits of data are forwarded to the second driver chip according to the forwarding rule, and the total bits required by the second driver chip reach the expected number, so that the second driver chip forwards the third twenty-four bits of data to the third driver chip. In this example, three driving chips are used as a cascade architecture to illustrate the transmission rule of communication data, and in fact, the number of driving chips is not limited.

Referring to fig. 2, the driving circuits 100 are also arranged in communication in a single column or multiple columns. The signal input terminal DI of the first driving circuit 100 in the first row as the head receives the communication data of the master node MST. The first column is further provided with a signal output DO of the preceding drive circuit coupled to a signal input DI of the following drive circuit. For example, in a first column, the signal input DI of the second drive circuit 100 is arranged to be coupled to the so-called signal output DO of an adjacent first drive circuit 100, i.e. the drive circuit of the preceding stage. In connection with cascading of the drive circuits, for example, it is provided that the signal input DI of the third drive circuit 100 in the first column is coupled to the so-called signal output DO of the adjacent second drive circuit 100, i.e. the drive circuit of the preceding stage. In connection with cascading of the drive circuits, for example, the signal input DI of the fourth drive circuit 100 is arranged in the first column to be coupled to the so-called signal output DO of the adjacent third drive circuit 100, i.e. the drive circuit of the preceding stage. The last driver circuit 100 in the first column as the column tail has the signal output terminal DO floating if it is the last driver circuit of the plurality of driver circuits, and the signal output terminal DO of the column tail driver circuit 100 may continue to transfer communication data to the subsequent stage if it is not the last driver circuit of the plurality of driver circuits.

Referring to fig. 2, the driving circuits 100 are also arranged in communication in a single column or multiple columns. The second column is also provided with a signal output DO of the preceding drive circuit coupled to a signal input DI of the following drive circuit. For example, in the second column, the signal output DO of the second drive circuit 100 is arranged to be coupled to the so-called signal input DI of an adjacent first drive circuit 100, i.e. the latter drive circuit. In connection with cascading of the drive circuits, for example, the signal output DO of the third drive circuit 100 is arranged in the second column to be coupled to the so-called signal input DI of the next second drive circuit 100, i.e. the drive circuit of the next stage. In connection with cascading of the drive circuits, for example, the signal output DO of the fourth drive circuit 100 is arranged in the second column to be coupled to the so-called signal input DI of the next third drive circuit 100, i.e. the drive circuit of the next stage. The last driver circuit 100 in the second column, which is the column tail, allows communication data to be received from the last driver circuit 100 in the first column driver circuit. The last driving circuit 100 in the same second column, which is the column tail, also allows to receive the communication data from the master node MST. The communication data of the first row on the left side is transferred from the head to the tail of the row, and the communication data of the second row on the right side is transferred from the tail to the head of the row.

Referring to fig. 2, the voltage converter DC is regarded as a power supply or a direct current power source, and the driving circuit 100 is a consumer and is correspondingly regarded as a power unit or a power consuming unit. A plurality of driving circuits 100 are connected in series between the positive pole VP and the negative pole VN of the dc power supply provided by the voltage converter. The power switches necessary for the voltage converter DC, which are necessarily subject to electromagnetic and radio frequency interference due to the need to implement pulse width modulation, often use various auxiliary circuits for their voltage conversion purposes, which are inherent limitations of the voltage converter DC.

Referring to fig. 3, the rectifier 200 is exemplified as a bridge rectifier, and may rectify alternating current into direct current. The industry's so-called rectification includes full wave rectification and half wave rectification. Rectifying to obtain pulsating direct current VDC, which is also called pulsating voltage. If the voltage converter is eliminated and the pulsating direct current VDC is directly applied to the driving circuit 100 in the power supply and single system, the above-described drawbacks and disadvantages of the voltage converter are readily resolved. On the premise that the supply voltage between the positive electrode VP and the negative electrode VN in fig. 2 is stable, the driving circuit 100 is usually provided with a voltage stabilizing module, so that the voltage drop between the power supply input terminal VCC and the so-called potential reference terminal GND is almost a fixed value. In fig. 3, the supply voltage between the positive pole VP and the negative pole VN is not stable, and the voltage stabilizing module of the driving circuit 100 becomes a latch, so that the voltage drop between the power supply input VCC and the so-called potential reference GND has no adaptive regulation capability, and needs to be removed.

Referring to fig. 3, the pulsating direct current VDC is regarded as a direct current pulsating voltage, and the driving circuit 100 is still a consumer and is correspondingly regarded as a power unit or a power consuming unit. The driving circuits 100 are connected in series between the positive pole VP and the negative pole VN of a dc power source such as a pulsating dc VDC. It should be noted that the voltage and direction of the DC power supplied by the voltage converter DC are hardly changed with time, and the voltage and direction of the pulsating voltage supplied by the pulsating DC VDC are changed with time, but the direction is unchanged. The total current IS or cascode current characterizes the current flowing through all the drive circuits 100. The total output current of the previous driving circuit 100 in each column is regarded as the total input current of the next driving circuit 100, and the total input currents of all driving circuits 100 are equal.

Referring to fig. 4, the pulsating direct current VDC resulting from rectification of the alternating current VAC is characterized significantly: the voltage always changes with time. The voltage drop experienced across each drive circuit 100 tends to exhibit non-linear characteristics in response to voltage variations in the pulsating direct current VDC. The positive integer N is greater than 1, and N driving circuits 100 are connected in series between the positive electrode VP and the negative electrode VN of the power source such as the pulsating direct current VDC. The voltage drop experienced by the first driving circuit 100 itself is DIV1, the voltage drop experienced by the second driving circuit 100 itself is DIV2, and so on until the so-called nth driving circuit 100 itself is DIVN. The voltage difference between the voltage drops DIV1, DIV2, … … DIVN is small when the voltage value of the pulsating direct current VDC is not large, such as near the valley, so as not to affect the normal operation of the driving circuit 100. However, once the voltage level of the pulsating direct current VDC increases slightly, such as out of the vicinity of the valley, the voltage difference between the voltage drops DIV1, DIV2, … … DIVN increases, which negatively affects the normal operation of the driving circuit 100.

Referring to fig. 4, the sum of voltage drops of the respective driving circuits 100 is a voltage of the pulsating direct current VDC. Expressed as a function, i.e. the sum of the voltage drops div1+div2+ … … +divn is equal to the voltage of the pulsating direct current VDC. The figure is purposely drawn with a shaded portion of the pulsating direct current VDC, which indicates that the voltage value of the pulsating direct current VDC has increased sufficiently to make a large voltage difference between the series voltage drops DIV1, DIV2, … … DIVN. For example, resulting in voltage drop DIV2 being much larger than voltage drop DIV1 and voltage drop DIVN being much smaller than voltage drop DIV1. In essence, the voltage of the pulsating direct current is not uniformly distributed to each driving circuit 100, and the voltage distribution of the driving circuits in the serial scenario has great randomness and unpredictability. The driving circuit 100 with larger voltage drop at two ends is often in an overvoltage state, so that abnormal situations of high power consumption and high heat quantity occur. The driving circuit 100 with a small voltage drop across it may be under-voltage and may not operate normally. The lifetime of the drive circuit 100, which is typically at an overvoltage, is over in advance, resulting in the entire row of drive circuits 100 entering an unusable environment. The reason for this is that the voltage added by the pulsating direct current is always concentrated at one or a few driving circuits.

Referring to fig. 5, the driving circuit is configured with three pulse width modulation modules MOD1 and MOD2 and MOD3 and accordingly can drive three light emitting diodes. Each pulse width modulation module forms a corresponding pulse width modulation signal according to the gray data matched with the light emitting diode of the path matched with the pulse width modulation module. The first pulse width modulation module MOD1 forms a first path pulse width modulation signal PWM according to gray data matched with the first path light emitting diode LED1 matched with the first path pulse width modulation module MOD1 ₁ The first path of light emitting diode LED1 serving as a light source is controlled by a first path of pulse width modulation signal PWM corresponding to the first path of light emitting diode if a constant current provided by a constant current unit flows ₁ . The second pulse width modulation module MOD2 forms a second path pulse width modulation signal PWM according to the gray data matched with the second path light emitting diode LED2 matched with the second pulse width modulation module MOD2 ₂ The second path of light emitting diode LED2 as a light source is controlled by the second path of pulse width modulation signal PWM corresponding to the second path of light emitting diode if the constant current provided by the constant current unit flows ₂ . The third pulse width modulation module MOD3 forms a third pulse width modulation signal PWM according to the gray data matched with the third light emitting diode LED3 matched with the third pulse width modulation module MOD3 ₃ The third light emitting diode LED3 as a light source is controlled by the third pulse width modulation signal PWM corresponding to the third light emitting diode if the constant current provided by the constant current unit flows ₃ . Any one light emitting diode can be a single light emitting diode or a series connection structure of a plurality of light emitting diodes with the same color.

Referring to fig. 5, the data transmission module DAT of the driving circuit has a decoding function, includes a decoder and is capable of decoding input serial data according to a predetermined communication protocol, for example, the driving circuit can decode gray-scale data from received communication data or can decode current adjustment data. In fact, the decoder restores the signal with the preset encoding rule in the communication data into the common binary data, and the restored data are slightly different in use so that the naming rules are different.

Referring to fig. 5, three light emitting diodes are schematically shown based on convenience of explanation, it should be understood that the specific number of light sources is not limiting and is only used for reference. Assuming that the data transmission module DAT decodes multiple groups of gray data in the communication data, the first pulse width modulation module MOD1 forms a first pulse width modulation signal PWM corresponding to the first light emitting diode LED1 according to the gray data allocated to the first light emitting diode LED1 ₁ While it can be known from the same principle that the second pulse width modulation module MOD2 forms a second pulse width modulation signal PWM corresponding to the second light emitting diode LED2 according to the gray scale data assigned to the second light emitting diode LED2 ₂ . And according to the same principle, it can also be known that the third pulse width modulation module MOD3 forms a third pulse width modulation signal PWM corresponding to the third light emitting diode LED3 according to the gray data assigned to the third light emitting diode LED3 ₃ . Each pulse width modulation module in the driving circuit forms a corresponding pulse width modulation signal according to the gray data matched with the corresponding or matched light emitting diode. Specifically, each pulse width modulation module forms a pulse width modulation signal corresponding to each light emitting diode according to the gray data allocated to each light emitting diode. In addition, the multi-channel light emitting diode can also comprise white light emitting diode besides red, green and blue three primary color light sources, or two green and red and blue alternatives. If more LED light sources are needed for illuminating the display scene, three LEDs can be added to more paths of LEDs, and if less LED light sources are needed for illuminating the display scene, the three LEDs can be reduced to one to two diodes.

Referring to FIG. 5, the LEDs are all connected toThe common constant current units are connected in series. The first path of light emitting diode LED1 is connected with the common constant current unit CC1 in series through a first switch S1 matched with the first path of light emitting diode LED, the second path of light emitting diode LED2 is connected with the common constant current unit CC1 in series through a second switch S2 matched with the second path of light emitting diode LED, and the third path of light emitting diode LED3 is connected with the common constant current unit CC1 in series through a third switch S3 matched with the third path of light emitting diode LED. Another load, such as a resistor RX, is connected in series with the common constant current unit CC1 through a fourth switch S4 associated therewith. When the pulse width modulation signal corresponding to any one light emitting diode has an effective logic level, the common constant current unit CC1 is started and any one light emitting diode is switched to be connected in series with the common constant current unit CC1 to be lightened. When the first pulse width modulation signal has an active logic level, for example, a high level, the first switch S1 is turned on, so that the common constant current unit CC1 is further enabled, and the first light emitting diode LED1 is switched to be connected in series with the common constant current unit CC1 to be turned on. When the second pulse width modulation signal has a high logic value, the second switch S2 is turned on to further enable the common constant current unit CC1 and the second light emitting diode LED2 is switched to be connected in series with the common constant current unit CC1 to be turned on. When the third pulse width modulation signal has an active logic level such as a high level, the third switch S3 is turned on, so that the constant current unit CC1 is further enabled, and the third light emitting diode LED3 is switched to be in series with the common constant current unit CC1 and is turned on. Several input ends of the NOR gate 101 are respectively input with the first to third paths of pulse width modulation signals PWM ₁ To PWM ₃ The control signal CTL output from the output terminal of the nor gate 101 controls whether the fourth switch S4 is turned on. When the control signal CTL has an active logic level such as a high level, the fourth switch S4 is turned on and causes the constant current cell CC1 to be enabled and the load, e.g. the resistor RX, to be switched in series with the common constant current cell CC 1. The first to third switches are controlled by first to third pulse width modulated signals which are turned on in an active logic level, e.g., high state, and turned off in an inactive logic level, e.g., low state. Whether each path of light emitting diode flows through the constant current provided by the common constant current unit connected in series with the light emitting diode or not is still controlled by one path of pulse width modulation signal corresponding to the light emitting diode. Resistor RX is availableA load such as a light emitting diode or a conventional diode that does not emit light. The positions of any one switch and the light emitting diode connected in series with the switch can be exchanged, and the first to fourth switches Guan Youchen gate the switch. And when the effective logic value of the pulse width modulation signal corresponding to any one light emitting diode is present, the gating switch equipped with the any one light emitting diode is turned on, and the any one light emitting diode is lightened and flows through the constant current provided by the constant current unit. As a pixel allows only the three illustrated leds to be left out, while the load, e.g. the resistor RX, etc. is discarded, the nor gate 101 may be discarded and the load, e.g. the resistor RX together with the switch S4 may also be discarded.

Referring to fig. 5, allowing the cascade connection between the driving circuit and the other communication circuits also allows the cascade connection between the driving circuits so that they all have a data forwarding function. One of the core functions of the driving circuit is to drive a plurality of light emitting diodes matched with the driving circuit to light according to the display requirement, and when the three primary colors are mixed, the relative brightness ratio of the three primary colors of red, green and blue is changed, so that different colors can be obtained. Changing the brightness ratio of the LEDs of various colors by changing the lighting time of the LEDs of red, green and blue colors in the cycle period during the color mixing of the three primary colors is equivalent to changing the relative brightness ratio of the three primary colors so as to obtain different colors when the gray level of the LEDs is changed. In an alternative example, it may be assumed that the first to third LEDs LED1 to LED3 are red, green, blue primary colors or diodes of other colors, and three primary color LEDs are temporarily taken as examples and other light source portions are omitted. The data transmission module DAT of the driving circuit is provided with a decoder, decodes the input serial data according to a preset communication protocol and decodes gray data from the received communication data, and the driving circuit adjusts the color of the pixel according to the gray data distributed to the red, green and blue or other light emitting diodes. In an alternative example, the mechanism by which the data transmission module DAT receives and forwards communication data is illustrated by taking the data decoder and the data forwarding function as examples. The signal input terminal DI receives communication data provided from the outside, and the decoder needs to decode or decode the data information carried in the communication data, which has the meaning of being able to restore the data in the pre-coding format which cannot be directly displayed by the light emitting diode into a conventional binary code which is easy to identify and execute, and the binary code obtained by decoding can be temporarily stored in the register, and considering that the data refreshing of the register may be updated more quickly, another buffer space or latch can be used to store the decoded data. The encoding formats of Manchester encoding and decoding technology or return-to-normal encoding and decoding technology, return-to-zero encoding and decoding technology and the like are applicable to single-wire data transmission protocols or communication protocols of the data transmission module DAT.

Referring to fig. 5, a so-called data transmission module DAT performs data reproduction or data transfer, and performs so-called data transfer tasks, such as transferring communication data to a rear-stage drive circuit. The simplest forwarding mode of the data transmission module DAT is that communication data received by the signal input end DI is allowed to be directly output from the signal output end DO, and driving circuits or other communication circuits which are connected in cascade are respectively extracted from a single data line according to an address distribution rule to the communication data which is consistent with the address of the communication data and belongs to the communication data. And as an alternative forwarding scheme, it is necessary to cooperate with statistics of communication data belonging to each stage of driving circuit, and after each stage of driving circuit captures communication data belonging to the current stage in each frame of communication data, forwarding the rest of other communication data received by each stage of driving circuit to a post-stage communication data receiver cascaded with the driving circuit, where the post-stage communication data receiver can be the post-stage driving circuit or other communication circuits. For example, each stage of driving circuit needs to cooperate with counting whether the total bit number of the communication data belonging to the stage is completely received, and the counting result is that once the communication data belonging to the stage of driving circuit is decoded and completely received, the data transmission module DAT is triggered to forward and remove the communication data received by the signal input terminal DI from the signal output terminal DO. The data forwarding process also allows shaping of the data: because the communication data has the signal attenuation problem in the forwarding stage of the multi-stage driving circuit, the more the number of the cascade stages of the driving circuit is, the more the signal distortion attenuation is, so that the communication data can be shaped when the communication data is forwarded. If the return-to-zero code or the return-to-one code requires that the high level or the low level of each bit of communication data meet a preset duty ratio in the transmission process, the high level or the low level duty ratio of each bit of communication data can be reconstructed in the transmission process in order to ensure that the communication data are not attenuated. Shaping forwarding corresponds to: each bit of data having a predetermined duty cycle is first received and decoded by the data transmission module DAT, which adjusts the duty cycle of each bit of data until the duty cycle thereof is restored to the predetermined duty cycle. That is, the predetermined duty ratio of a certain bit of data received by the signal input terminal DI of the data transmission module DAT and the actual duty ratio of the certain bit of data forwarded and output by the signal output terminal DO of the data transmission module DAT are roughly equal, and the signal attenuation distortion is recovered by shaping the data. An alternative forwarding scheme may also configure an encoder for the data transmission module DAT and employ re-encoding techniques to implement forwarding: after the communication data is decoded and temporarily stored in the storage space of the data transmission module DAT, the temporary storage data is recoded and output by an encoder capable of recoding binary data, and the relay effect of decoding and storing the data and recoding and outputting the data according to a preset coding format ensures that the data can be smoothly transmitted. Data forwarding or shaping is within the scope of the prior art.

Referring to fig. 5, if the driving circuit uses locally stored gray data as a display resource, the driving circuit can completely discard the data transmission module DAT playing a role in communication. In contrast, if the driving circuit is operated in a mode of collecting gray data on line, the data transmission module DAT needs to be maintained. The use of local gray data resources is often the occasion that the requirement on the richness of the display content is not high, and the use of external gray data resources can update the display content in real time.

Referring to FIG. 5, the first pulse width modulation module MOD1 is referred to as R M according to the gray scale data assigned to the first LED1]To R < 0 ]]Form a first path of pulse width modulation signal PWM corresponding to the first path of light emitting diode LED1 ₁ . Gray scale data R [ M ]]To R < 0 ]]Also expressed as R < M > 0]Assume that the data are used to characterize redGray scale data of the light emitting diode light source. First path pulse width modulation signal PWM ₁ Having periods of high level and periods of low level within a cyclic duty cycle, e.g. the first pulse width modulated signal PWM ₁ The constant current unit CC1 may be instructed to supply the generated constant current to the first path light emitting diode LED1 during the high level period. Conversely, in the low level period, the first path of pulse width modulation signal PWM ₁ The constant current unit CC1 may be instructed to turn off and not provide the generated constant current to the first light emitting diode LED1 any more, so that it cannot be turned on. The first pulse width modulation signal is equivalent to the first pulse width modulation signal, and the on time and the off time of the red light emitting diode in the period of the first pulse width modulation signal are determined. The positive integer M used to represent the number of bits of the gray data is greater than 1, the most common bit being the 8 bits R7]To R < 0 ]]The total 8 bits of data can provide 256 gray levels for the red led and 65536 gray levels if 16 bits are taken. The number of bits of gradation data is not limited to a specific number of bits of 8 or 16, and the specific number of bits is described here for convenience of explanation. The first path of pulse width modulation signal essentially reflects the duty ratio information carried by the gray data matched with the red light emitting diode. Whether the red light emitting diode flows through the constant current provided by the constant current unit CC1 connected in series with the red light emitting diode or not is controlled by the corresponding first path pulse width modulation signal PWM ₁ The constant-current lighting time of the red light emitting diode in the period of the first path pulse width modulation signal is controlled by the first path pulse width modulation signal PWM corresponding to the red light emitting diode ₁ To determine. The expression mode of the data can be referred to the teaching material EDA technology and the literature materials such as Verilog-HDL which are compiled by authors such as Pan Song.

Referring to FIG. 5, the second pulse width modulation module MOD2 is referred to as G [ M ] according to the gray scale data distributed to the second light emitting diode LED2]To G0]Form a second pulse width modulation signal PWM corresponding to the second light emitting diode LED2 ₂ . Gray scale data G [ M ]]To G0]Also expressed as Gm 0]It is assumed that these data are used to characterize the gray scale data of the green led light source. Second path pulse width modulation signal PWM ₂ Having high and low periods of time during a cyclical operating cycleTime periods, e.g. the second pulse width modulation signal PWM ₂ The constant current unit CC1 may be instructed to supply the generated constant current to the second path light emitting diode LED2 during the high level period. Conversely, in the low level period, the second pulse width modulation signal PWM ₂ The constant current unit CC1 may be instructed to turn off and not to supply the generated constant current to the second light emitting diode LED2 any more, which makes it non-conductive. The second pulse width modulation signal is equivalent to the first pulse width modulation signal, and the on time and the off time of the green light emitting diode in the second pulse width modulation signal period are determined. The positive integer M representing the number of bits of the gradation data is, for example, 8 bits, i.e., G7 ]To G0]The total 8 bits of data can provide 256 gray levels for the green led and 65536 gray levels if 16 bits are taken. The second pulse width modulation signal essentially represents the duty cycle information carried by the gray data matched by the green light emitting diode. Whether the green light emitting diode flows through the constant current provided by the constant current unit CC1 connected in series with the green light emitting diode or not is controlled by the second path of pulse width modulation signal PWM corresponding to the constant current unit CC1 ₂ The constant-current lighting time of the green light emitting diode in the period of the second path pulse width modulation signal is controlled by the second path pulse width modulation signal PWM corresponding to the green light emitting diode ₂ To determine.

Referring to FIG. 5, the third pulse width modulation module MOD3 is referred to as BM according to the gray scale data distributed to the third light emitting diode LED3]To B0]Form a third pulse width modulation signal PWM corresponding to the third light emitting diode LED3 ₃ . Gradation data B [ M ]]To B0]Also expressed as B [ M:0 ]]It is assumed that these data are used to characterize the gray scale data of the blue led light source. Third path pulse width modulation signal PWM ₃ Having high and low periods of time within a cyclic duty cycle, e.g. the third three-way pulse width modulated signal PWM ₃ The constant current unit CC1 may be instructed to supply the generated constant current to the third light emitting diode LED3 during the high level period. Conversely, in the low level period, the third path of pulse width modulation signal PWM ₃ Can instruct the constant current unit CC1 to turn off and no longer provide the generated constant current to the third light emitting diode LED3, making it non-conductive. The third pulse width modulation signal is equivalent to the fact that the on time and the off time of the blue light emitting diode in the third pulse width modulation signal period are determined. The positive integer M representing the number of bits of the gradation data is, for example, 8 bits, that is, B [ M ]]To B0]The total 8 bits of data can provide 256 gray levels for the blue led and 65536 gray levels if 16 bits are taken. The third pulse width modulation signal essentially represents the duty cycle information carried by the gray data matched by the blue light emitting diode. Whether the blue light emitting diode flows through the constant current provided by the constant current unit CC1 connected in series with the blue light emitting diode or not is controlled by the third path pulse width modulation signal PWM corresponding to the constant current unit CC1 ₃ The constant-current lighting time of the blue light emitting diode in the period of the third pulse width modulation signal is controlled by the third pulse width modulation signal PWM corresponding to the blue light emitting diode ₃ To determine.

Referring to fig. 5, in setting the programmable constant current cell, the embodiment of adjusting the magnitude of the constant current supplied from the constant current cell CC1 is diversified. The current regulation data decoded by the driving circuit and distributed to the constant current unit CC1 is expressed as Y [ X:0] in the figure, and the positive integer X representing the number of data bits is larger than 1. The data transmission module can be used for decoding the gray data and the current regulation data. Such as current regulation data, is used to fine tune the magnitude of the constant current provided by the constant current cell. The technical solution of fine tuning the current value by using the binary value is well known to those skilled in the art, so the present application will not be repeated. Although the constant current adjustment data Y X0 can be used to adjust the magnitude of the constant current supplied by the constant current unit, in fact, the constant current supplied by the constant current unit CC1 is allowed to be a fixed current value designed in advance without adjustment by the current adjustment data, which is not necessary.

Referring to fig. 5, the driving circuit 100 includes a power input terminal VCC and a potential reference terminal GND, and includes a voltage detection module 103 disposed between the power input terminal VCC and the potential reference terminal GND. The driving circuit 100 includes a load or light source and a constant current cell CC1 provided between a power supply input terminal VCC and a potential reference terminal GND. Note that the current flows in from the power supply input terminal VCC and flows out from the potential reference terminal GND. The driving circuit 100 is used as an energy consumption unit, for example, a driving circuit capable of performing constant current driving on a load such as a conventional diode or a light emitting diode or a resistor, and particularly is a pixel driving chip for driving various solid-state light sources in the field of display screens. In addition to including the above-mentioned individual components, the industry driver circuit 100 is an option, not an essential one: it also allows the driving circuit 100 to integrate a protection circuit such as an over-temperature protection or a start-up protection or an electrostatic protection or an instantaneous voltage protection or a spike current bleeder circuit with a bandgap circuit, and to integrate an oscillator with a power-on reset circuit with a clock circuit or a communication module, etc. These modules or circuits are necessary or optional parts of the driving circuit in terms of constant current driving of the load or the light source, and in the field of driving chips with high integration level of the driving circuit, the foregoing are well known to those skilled in the art and will not be described herein. The constant current generated by the constant current unit CC1 generally adopts a pulse width modulation method in a strategy of driving the light source, for example, a pulse width modulation module specifically described in the figure is used to generate a pulse width modulation signal and used for controlling on-off of the constant current unit. The constant current at full amplitude is now applied to the light source in a repetitive pulse sequence of on or off: the constant current is output and loaded to the light source when the constant current is on if the pulse width modulation signal has high level logic, and is directly cut off from the light source when the constant current is off if the pulse width modulation signal has low level logic. Pulse width modulation falls within the category of the prior art.

Referring to fig. 5, the characteristics of the pulsating direct current VDC or pulsating voltage from the alternating current: the voltage must be cycled from a minimum value, i.e., a valley, to a maximum value, i.e., a peak, and then from the maximum value, i.e., the peak, to a minimum value, i.e., a valley, again. The key of the voltage detection module 103 is: in the stage that the voltage of the pulsating direct current increases from low to high, the voltage drop of each of the driving circuits 100 in series needs to be adjusted, and if the voltage detection module 103 of each driving circuit 100 controls the voltage drop of the driving circuit to be raised in this stage, the sum div1+div2+ … … +divn of the voltage drops of all the driving circuits 100 in series also increases, and the adjustment trend of the voltage drops conforms to the increasing rule of the pulsating direct current VDC in this stage. More importantly, since each driving circuit 100 actively raises its own voltage drop in the series configuration, the voltage added by the pulse direct current VDC is unlikely to be concentrated at one or a few driving circuits 100, but the voltage added by the pulse direct current VDC is evenly distributed to the driving circuits 100. In the stage of dynamic pulsation change of the pulse direct current VDC, the present embodiment better solves the problem that the voltage difference between the voltage drops DIV1, DIV2, … … DIVN becomes large. The tendency of the voltage of the pulsed dc power to increase does not cause only one or a few of the drive circuits to become a heat source to concentrate, and the heat imparted to the system by the pulsed dc power is distributed to the individual drive circuits in a series configuration. The reason is that each driving circuit 100 controls its own voltage drop to raise it is equivalent to actively drawing a part of the heat to itself.

Referring to fig. 5, although the voltage detection module 103 has a voltage adjusting function, if the voltage detection module 103 continuously affects the voltage drop of the driving circuit 100, the unavoidable disadvantage is brought about. Assuming that the voltage drop of the driving circuit 100 is pulled by the voltage detection module 103 during the voltage drop phase of the pulsating dc current and cannot be recovered, the sum div1+div2+ … … +divn of the voltage drops of all the driving circuits 100 connected in series is also clamped. This irreducibility of the voltage drop does not follow the decreasing law of the pulsed direct current VDC at this stage. For example, the forced voltage regulation function of the voltage detection module 103 near the valley of the pulsating dc current may interfere with the proper operation of the driving circuit 100, when the pulsating dc current is reduced to a very low voltage level and the voltage detection module 103 is about to maintain the original high voltage level, which undoubtedly may lead to systematic disturbances between power supply and power consumption. Furthermore, if the voltage detection module 103 is viewed from the power consumption point of view, it is sure that the voltage detection module is continuously raised to consume a great amount of energy and generate a very high temperature.

Referring to fig. 5, in the stage of decreasing the voltage of the pulsating direct current VDC from high to low, if the voltage detection module 103 of the driving circuit 100 exits the control of its own voltage drop, for example, the first driving circuit 100 exits the control of its own voltage drop DIV1, the second driving circuit 100 exits the control of its own voltage drop DIV2, and so on until the nth driving circuit 100 exits the control of its own voltage drop DIVN. The sum div1+div2+ … … +divn of the voltage drops of all the driving circuits 100 connected in series is no longer clamped, and the voltage drops have a callability which is consistent with the decreasing rule of the pulsed direct current VDC at this stage. It is understood that once the pulsating dc voltage drops to a very low voltage level, the voltage detection module 103 is not accurate to disturb the voltage drop, so that the contradiction between supply and demand between power supply and power consumption is successfully solved and the power consumption problem of the voltage detection module 103 is optimized.

Referring to fig. 6, in an alternative example, the voltage detection module 103 comprises a voltage divider 105 connected between the power supply input VCC and said potential reference GND. The voltage divider 105, as with divider resistors R1 and R2, samples the voltage drop between the power supply input VCC and the potential reference GND in the figure, and samples the divided value of the voltage drop at the interconnection node of both resistors R1 and R2. The voltage detection module 103 comprises a first resistor RL1 and a switch MQ and a zener diode SR connected between the power supply input VCC and said potential reference GND. The switch is typically a bipolar transistor, a mosfet, or the like. The positions of the switch and the first resistor and the zener diode can be interchanged, such as the interchange position of the switch and the first resistor, or the interchange position of the first resistor and the zener diode, or the interchange position of the switch and the zener diode, so long as the serial connection relation between the switch and the zener diode is maintained.

Referring to fig. 6, the control terminal of the switch MQ is the base of a bipolar transistor, or the control terminal of the switch MQ is the gate of a semiconductor field effect transistor. The first terminal of the switch MQ is coupled to the power supply input via a first resistor RL1 and the corresponding second terminal of the switch is coupled to the cathode or anode of the zener diode SR. The anode or the cathode of the zener diode SR is coupled to the potential reference terminal. The first and second ends of the switch MQ are for example the emitter and collector of the bipolar transistor or the collector and emitter of the bipolar transistor, respectively. The first and second ends of the switch MQ are also for example the drain and source of a field effect transistor or the source and drain of a field effect transistor, respectively.

Referring to fig. 6, in an alternative example, the voltage detection module 103 includes a comparator a. The comparator a is used for comparing the divided value obtained by the voltage divider 105 with a preset voltage VTH, and the divided value and the preset voltage VTH are respectively input to a non-inverting input terminal and an inverting input terminal of the voltage comparator a. When the divided voltage exceeds the preset voltage VTH, the comparison result is high level and the output terminal of the comparator a is coupled to the control terminal of the switch MQ, so that the switch MQ is turned on, so that the aforementioned zener diode SR is turned on at this time and generates a current flowing through the first resistor RL1 and the switch MQ. Since the voltage must rise from the lowest value, i.e. the valley value, to the highest value, i.e. the peak value, during each period of the pulsating direct current, the voltage divider 105 of each driving circuit will detect an increase in the divided voltage value as the pulsating direct current increases, the switch MQ will be turned on at this stage to cause an increase in the voltage across the first resistor RL1, which voltage regulation corresponds to raising the voltage drop between the power supply input VCC and the potential reference GND. If the comparison result is low and the output terminal of the comparator a is coupled to the control terminal of the switch MQ, the switch MQ is turned off, so that the zener diode SR is turned off at this time and no current flows through the first resistor RL1 and the switch MQ. Since the voltage must drop from the highest value, i.e. the peak value, to the lowest value, i.e. the valley value, during each period of the pulsating direct current, the voltage divider 105 of each driving circuit will also detect a decrease in the divided voltage value, and the switch MQ will be turned off at this stage, resulting in the voltage detection module 103 losing the voltage regulation function. The voltage detection module 103 exits the raising control of the self voltage drop in a phase where the voltage of the pulsating direct current decreases from high to low.

Referring to fig. 6, in an alternative example, the voltage detection module 103 includes a comparator a. The comparator A still compares the divided value obtained by the voltage divider 105 with the predetermined voltage VTH. The divided value and the preset voltage VTH may be input to the inverting input terminal and the non-inverting input terminal of the voltage comparator a, respectively. The switch MQ is modified in this example to be turned on under control of a low level and turned off under control of a high level. The comparison is low when the divided value exceeds the preset voltage VTH and the output of the comparator a is coupled to the control terminal of the switch MQ, so the switch MQ is turned on, which tends to cause the divided value of the voltage divider 105 of each driving circuit to increase as the pulsating direct current increases. The response of the voltage detection module is analyzed again when the diametrically opposite result is generated. The comparison is high when the divided voltage value is below the preset voltage VTH and the output of the comparator a is coupled to the control terminal of the switch MQ, so the switch MQ is turned off, which tends to cause the divided voltage value of the voltage divider 105 of each driving circuit to decrease as the pulsating direct current decreases. Whether the switch is turned on high or low depends on the selection type, e.g., N-type transistors or P-type transistors.

Referring to fig. 6, in an alternative example, in an increasing phase of each period of the pulsating direct current, since the voltage division value detected by the voltage divider 105 of each driving circuit increases as the pulsating direct current increases, the switch MQ is turned on at this phase to cause the voltage detection module 103 to start controlling its voltage drop. This voltage regulation corresponds to activating the enable voltage detection module 103 during the voltage increase phase of the pulsating direct current. It is considered that the voltage detection module of the driving circuit in the series structure is enabled to further control the voltage drop of the driving circuit to be raised when the voltage of the pulsating direct current increases from low to high, for example, when the voltage of the pulsating direct current exceeds a predetermined voltage value. The voltage of the pulsating direct current exceeds the predetermined voltage value sufficient to trigger the switch MQ of each driving circuit to be turned on. Note that the voltage detection module of the driving circuit controls the time node at which the self voltage drop is raised, i.e. the switching MQ on-time point, may occur at any time during the phase when the voltage of the pulsating direct current VDC increases from low to high. The predetermined voltage value VH as shown in fig. 12-13, also referred to in the context of the present application as a predetermined voltage level or a predetermined voltage reference, is illustrated with the shaded portion representing the voltage section where the pulsating direct current is above the predetermined voltage value VH.

Referring to fig. 6, in an alternative example, in the decreasing phase of each period of the pulsating direct current, since the voltage division value detected by the voltage divider 105 of each driving circuit is also decreased along with the decreasing of the pulsating direct current, the switch MQ is turned off at this phase to enable the voltage detection module 103 to start to exit the control of the voltage drop. This voltage regulation may pull the voltage drop between the power supply input VCC and the potential reference GND low, because in some situations the switch MQ turns off to switch off the first resistor RL1 and the voltage drop of the first resistor RL1 drops sharply. The voltage detection module of the driving circuit in the series structure can exit the raising control of the voltage drop of the driving circuit when the voltage of the pulsating direct current is reduced from high to low, for example, when the voltage of the pulsating direct current is lower than the preset voltage value. The voltage of the pulsating direct current is below the predetermined voltage value sufficient to trigger the switch MQ of each driving circuit to be turned off. The exit time node of the drive circuit's voltage detection module exiting the elevation control of its own voltage drop may occur at any point in time during this phase of the voltage decrease of the pulsating direct current VDC from high to low, i.e. the point in time when the switch MQ is turned off.

Referring to fig. 7, in an alternative example, the voltage detection module 103 includes a third resistor RL3 and a zener diode ZR and a junction field effect transistor JFET connected between the power supply input terminal VCC and the potential reference terminal. The control terminal of the junction field effect transistor JFET is coupled to the potential reference terminal GND and the second terminal of the junction field effect transistor JFET is also coupled to the potential reference terminal GND via a clamping resistor R3. The first and second ends of the junction field effect transistor JFET are, for example, the drain and source, respectively, or the source and drain, respectively. The control terminal of the JFET is the depletion-mode JFET gate control terminal. The zener diode ZR is connected in series with the third resistor RL3 between the first terminal of the junction field effect transistor JFET and the power supply input terminal VCC. The cathode or anode of the zener diode ZR is coupled to the power input terminal through a third resistor RL3, and the anode or anode of the zener diode ZR is coupled to the first terminal of the junction field effect transistor JFET. Essentially the positions of the zener diode ZR and the third resistor RL3 can be interchanged, for example the cathode or the cathode of the zener diode ZR is coupled to the power input terminal, while the anode or the anode of the zener diode ZR is coupled to the first terminal of the junction field effect transistor JFET through the third resistor RL 3.

Referring to fig. 7, in an alternative example, the voltage detection module 103 of the driving circuit 100 is turned on when the voltage drop of the driving circuit 100 is not lower than the threshold voltage and is sufficient to cause the zener diode ZR to be reverse-broken down. The opposite is the case when the voltage of the driving circuit 100 drops below the threshold voltage, the zener diode ZR is turned off and not on, and there is no doubt that the voltage detection module 103 of the driving circuit 100 is turned off at this time. The threshold voltage, also called the threshold voltage, is a precondition for determining whether the zener diode ZR is turned on. The voltage drop exceeding the threshold voltage of the zener diode ZR means that the zener diode ZR is turned on and that the junction field effect transistor JFET and the third resistor RL3 have current. Since the voltage must rise from a minimum value, i.e. the valley value, to a maximum value, i.e. the peak value, within each cycle of the pulsating direct current. Since the voltage drop experienced by each driving circuit 100 follows an increase as the voltage of the pulsating direct current increases, the zener diode ZR is turned on at this stage to cause an increase in the voltage across the third resistor RL 3. This voltage regulation behavior corresponds to a step up of the voltage drop between the power supply input VCC and the potential reference GND. The threshold voltage thus corresponds to a breakdown voltage equivalent to whether the zener diode is reverse broken down.

Referring to fig. 7, in an alternative example, if the voltage drop does not exceed the threshold voltage of the zener diode ZR, it means that the zener diode ZR is turned off, and the junction field effect transistor JFET and the third resistor RL3 have no current. Since the voltage must drop from the highest value, i.e. the peak value, to the lowest value, i.e. the valley value, within each period of the pulsating direct current, the zener diode ZR is turned off at this stage and the voltage detection module 103 loses the voltage regulation function, since the voltage drop experienced by each driving circuit 100 follows the drop as the voltage of the pulsating direct current drops. The voltage detection module 103 exits the elevation control of the voltage drop corresponding to the phase of decreasing the pulsating direct current from high to low.

Referring to fig. 7, if the voltage drop of the driving circuit 100 is sufficient to make the zener diode ZR breakdown on, since the second terminal of the JFET is coupled to the potential reference terminal GND through the clamp resistor R3, current flows from the second terminal of the JFET to the clamp resistor R3. The forward voltage across the clamp resistor R3 is considered to be the source gate voltage or drain gate voltage of the junction field effect transistor JFET. Note that the forward voltage across the clamp resistor R3 is opposite in sign to the gate-source or gate-drain voltage of the junction field effect transistor. When the current flowing through the clamping resistor R3 changes to a voltage across the clamping resistor that is exactly equal to the pinch-off voltage of the JFET, the JFET will nearly enter the pinch-off state and provide a small amount of leakage current to maintain the voltage across the clamping resistor R3 equal to the pinch-off voltage.

Referring to fig. 7, in an alternative example, in an increasing phase of each cycle of the pulsating direct current, since the voltage value born by the zener diode ZR of each driving circuit increases as the pulsating direct current increases, the zener diode ZR turns on at this phase to cause the voltage detection module 103 to start controlling its own voltage drop. This voltage regulation corresponds to enabling the voltage detection module 103 during the voltage increase phase of the pulsating direct current. It is considered that the voltage detection module of the driving circuit in the series structure is enabled to further control the voltage drop of the driving circuit to be raised in a stage that the voltage of the pulsating direct current increases from low to high, for example, when the voltage of the pulsating direct current exceeds a predetermined voltage value. The voltage of the pulsating direct current exceeding the predetermined voltage value is sufficient to trigger the zener diode ZR of each driving circuit to be turned on. The voltage detection module of the driving circuit controls the time node at which the self voltage drop is raised, i.e. the time point at which the zener diode ZR is turned on, at any time during the stage when the voltage of the pulsating direct current VDC increases from low to high.

Referring to fig. 7, in an alternative example, in a decreasing stage of each cycle of the pulsating direct current, since the voltage value born by the zener diode ZR of each driving circuit is also decreased as the pulsating direct current decreases, the zener diode ZR is turned off at this stage to start the voltage detection module 103 to exit the control of the voltage drop. This voltage regulation may pull down the voltage drop between the power supply input VCC and the potential reference GND, because the zener diode ZR turns off to cut off the third resistor RL3 and the voltage drop of the third resistor RL3 drops abruptly in some cases. The voltage detection module of the driving circuit in the series structure can exit the raising control of the voltage drop of the driving circuit when the voltage of the pulsating direct current is reduced from high to low, for example, when the voltage of the pulsating direct current is lower than the preset voltage value. The voltage of the pulsating direct current is below the predetermined voltage value sufficient to trigger the zener diode ZR of each driving circuit to be turned off. The exit time node at which the voltage detection module of the driving circuit exits the elevation control of the self voltage drop may occur at any point in time at which the voltage of the pulsating direct current VDC decreases from high to low, i.e., the point in time at which the zener diode ZR is turned off.

Referring to fig. 8, it must first be elucidated that: it is in essence within the scope of the prior art how to generate pwm signals using pwm modules, however, given that the present application relates to pwm signals, examples of pwm signals using gray scale data are still given, but this is not meant to limit the manner in which pwm signals are generated. The first pulse width modulation module MOD1 controlling the red light emitting diode is configured with a data comparator CMP10 and a counting module CNT. The counting module CNT outputs the counting data Q [ M:0 ]]And the counting module CNT may be triggered to count by the illustrated clock signal CLK. The first pulse width modulation module MOD1 matches the gray data R [ M:0 ] of the first path of light emitting diode LED1 matched with the first pulse width modulation module MOD1]And count data Q [ M:0]Comparing to generate the first path pulse width modulation signal PWM ₁ The data comparison is performed by the comparator CMP 10.

Referring to fig. 8, a second pulse width of the green primary led is controlledThe modulation module MOD2 is configured with a data comparator CMP20 and a counting module CNT. The counting module CNT outputs the counting data Q [ M:0 ]]And the counting module CNT may be triggered to count by the illustrated clock signal CLK. The second pulse width modulation module MOD2 matches the gray data G [ M:0 ] of the second path of Light Emitting Diodes (LEDs) 2 matched with the second pulse width modulation module MOD2 ]And count data Q [ M:0]Comparing to generate the second pulse width modulation signal PWM ₂ The data comparison is performed by the comparator CMP 20.

Referring to fig. 8, a third pulse width modulation module MOD3 controlling the blue primary light emitting diode is configured with a data comparator CMP30 and a count module CNT. The counting module CNT outputs the counting data Q [ M:0 ]]And the counting module CNT may be triggered to count by the illustrated clock signal CLK. The third pulse width modulation module MOD3 matches the gray data BM:0 of the third light emitting diode LED3 matched with the third pulse width modulation module MOD3]And count data Q [ M:0]Comparing to generate the third path pulse width modulation signal PWM ₃ The data comparison is performed by the comparator CMP 30.

Referring to fig. 8, the frequency of the clock signal CLK in the variable frequency mode may be changed. The clock signal CLK counted by the trigger counting module CNT when the comparator CMP10 is enabled is of a first frequency, and the clock signal CLK counted by the trigger counting module CNT when the comparator CMP20 is enabled is of a second frequency, and the clock signal CLK counted by the trigger counting module CNT when the comparator CMP30 is enabled is of a third frequency, for example. The first frequency to the third frequency are identical in the non-frequency conversion mode and may be different in the frequency conversion mode.

Referring to fig. 9, the first to third pulse width modulation signals PWM in the driving circuit 100 ₁ -PWM ₃ Each so-called cycle period T in common is divided into a plurality of periods such as periods TM1 and TM2 and TM3. The number of pulse width modulated signals is typically the same as the number of periods into which the cycle period is divided, i.e. there are several pulse width modulated signals dividing each cycle period into several periods. For example, the number of signals of the pulse width modulation signal is three in this example so that each cycle period is also divided into three periods as shown. In an alternative embodiment of the present invention,requiring that the effective logic value of each pulse width modulated signal be distributed over a corresponding period of time: for example, a first pulse width modulation signal PWM ₁ The effective logic values, such as high level, of (a) are distributed in the corresponding first period (TM 1), such as the second pulse width modulation signal (PWM) ₂ The effective logic values, such as high level, of (a) are distributed in the corresponding second period (TM 2), such as the third path pulse width modulation signal (PWM) ₃ The effective logic values such as high level are distributed in the corresponding third period TM3. The period TM1 is used for arranging the first path of pulse width modulation signal PWM ₁ As compared to the second period TM2 for arranging the second pulse width modulated signal PWM ₂ As compared with the third period TM3 for arranging the third PWM signal PWM ₃ Such as a high level. Based on the above alternative embodiment, the first path of pulse width modulation signal PWM ₁ If a high level occurs, the high level is distributed only in the first period TM1 instead of the periods TM2 and TM3, the first period TM1 naturally allowing the distribution of the first pulse width modulation signal PWM ₁ Is set to a low level of (1). Second path pulse width modulation signal PWM ₂ If a high level occurs, the high level is distributed only in a second period TM2 instead of periods TM1 and TM3, the second period TM2 of course allowing the second pulse width modulation signal PWM to be distributed ₂ Is set to a low level of (1). Third path pulse width modulation signal PWM ₃ If a high level occurs, its high level is distributed only in a third period TM3 instead of periods TM1 and TM2, the third period TM3 of course allowing the distribution of the third pulse width modulation signal PWM ₃ Is set to a low level of (1). In an alternative embodiment, the time length of each period is counted by triggering a counter by a clock signal matched with the time length. When the pulse width modulation signal corresponding to any one light emitting diode has an effective logic value, the any one light emitting diode is lightened and flows through the constant current of the constant current unit.

Referring to fig. 9, the first to third pulse width modulation signals PWM have been described above ₁ To PWM ₃ The result of performing the nor operation is regarded as the control signal CTL. First path pulse width modulation signal PWM in first period TM1 ₁ Is low level of (1) such that the control signal CTL is highLevel, second pulse width modulation signal PWM in second time period TM2 ₂ The low level of (2) causes the control signal CTL to be high level, the third PWM signal PWM for the third period TM3 ₃ The low level of (2) causes the control signal CTL to be high. When the control signal CTL has a valid logic value, for example, when a high level is present, the fourth switch S4 is turned on, which causes a constant current provided by the constant current unit CC1 to flow through a load, such as a resistor RX, connected in series with the fourth switch S4. The load is connected with the multiple light emitting diodes in parallel, and the load and the constant current unit are connected in series between the power input end and the potential reference end. When the control signal has an effective logic value, the constant current provided by the constant current unit is switched to flow through the load, and at the moment, no constant current flows through the light emitting diodes LED1-LED 3. Considering that the ripple characteristic of the ripple voltage naturally causes an unavoidable turn-off time zone of the voltage detection module 103, the meaning of switching the constant current to the flowing load is to avoid the abnormality of the driving circuit 100 that the current is almost cut off. Furthermore, even if the voltage detection module 103 IS turned on, if there IS no load such as the branch of the resistor RX, the actual current flowing through the driving current 100 may no longer meet the requirement of the total current IS when the three-way pulse width modulation signal IS at the low level.

Referring to fig. 8, there are various schemes in which each cycle period common to the pulse width modulation signals is divided into a plurality of periods, and the effective logic value of each pulse width modulation signal is distributed only in a corresponding one of the periods. In an alternative embodiment, it may be assumed, for example, that the complete count data Q [ M+2:0 of the count module CNT]Containing specified high-order data Q [ M+2:M+1 ]]And contains the specified low bit data Q [ M:0 ]]The low-order count data Q [ M:0]Can be used for comparison with gray data matched to the various colors to produce so-called pulse width modulated signals. High order data Q [ M+2:M+1]It can be used to select which pulse width modulated signal to output from among the multiple pulse width modulated signals. High order data Q [ M+2:M+1]The input as a channel selection signal or address code, for example, when it is 00, triggers the channel switch MUX1 to switch on, the channel switch MUX1 allowing the count data to be compared with the gray data matched by the red LED solid state light source, the first time period TM1The time length of the pulse width modulation signal is counted by a clock signal triggering counting module ₁ Is naturally arranged within the first period TM 1. High order data Q [ M+2:M+1 ]The input of the channel selection signal or address code, for example, when the input is 01, triggers the channel switch MUX2 to be turned on, the channel switch MUX2 allows the counting data to be compared with the gray scale data matched with the green light emitting diode solid state light source, the time length of the second time period TM2 triggers the counting module to count by the clock signal, and the second pulse width modulation signal PWM ₂ Is naturally arranged within the second period TM 2. High order data Q [ M+2:M+1]The input as channel selection signal or address code triggers the channel switch MUX3 to be turned on when it is 10, the channel switch MUX3 allows the count data to be compared with the gray data matched with the blue LED solid-state light source, the time length of the third time period TM3 triggers the count module to count by the clock signal, and the third pulse width modulation signal PWM ₃ Is naturally arranged within the third period TM 3. The low count data will cause the high count data to carry once after each count phase is full so the high count data will increment itself. The channel switches MUX1-MUX3 may be channel switches of a data selector or a multiplexer or a multiplexing switch, with any one channel switch being on and the other channel switches being off.

Referring to fig. 9, there are other alternatives in which each cycle period common to the pwm signals is divided into a plurality of periods, and the effective logic value of each pwm signal is distributed only in a corresponding one of the periods. In an alternative embodiment, for example, only the first pulse width modulation module MOD1 is enabled during the first period TM1, and the remaining two other pulse width modulation modules are disabled from outputting any pulse width modulation signal to provide gray scale data rjm 0]And count data Q [ M:0]Comparing to generate the first pulse width modulation signal PWM in the first period TM1 ₁ . In an alternative embodiment, for example, only the second pulse width modulation module MOD2 is enabled for the second period TM2, the remaining two pulse width modulation modules being disabled from outputAny pulse width modulation signal, gradation data GM: 0]And count data Q [ M:0]Comparing to generate the second pulse width modulation signal PWM in the second period TM2 ₂ . In an alternative embodiment, for example, only the third pulse width modulation module MOD3 is enabled for the third period TM3, and the remaining two other pulse width modulation modules are disabled from outputting any pulse width modulation signal to output the gray data B [ M:0 ]And count data Q [ M:0]Comparing to generate the third PWM signal within the third period TM3 ₃ . The end of the first period is followed by the second period and the end of the second period is followed by the third period, which three periods constitute a single basic cycle period and each current cycle period immediately after the end of the next cycle period.

Referring to fig. 10, in an alternative example, the voltage detection module 103 comprises a voltage divider 105 connected between the power supply input VCC and said potential reference GND. The voltage divider 105, for example with voltage dividing resistors R1 and R2, samples the voltage drop between the power supply input VCC and the potential reference GND in the figure, obtaining a divided value of the voltage drop at the interconnection node between the resistors R1 and R2. The voltage detection module 103 comprises a second resistor RL2 and a current source CS2 connected in series between the power supply input VCC and said potential reference GND, which can be substantially interchanged in position and provided that the series relationship between them is preserved.

Referring to fig. 10, in an alternative example, the voltage detection module 103 includes a comparator a. The comparator a is used for comparing the divided value obtained by the voltage divider 105 with the preset voltage VTH. The divided value and the preset voltage VTH are input to the non-inverting input terminal and the inverting input terminal of the voltage comparator a, respectively. If the divided voltage exceeds the preset voltage VTH, the comparison result is high and the output result of the comparator a is used to control the current source CS2, the current source CS2 is turned on, so that a current flowing through the second resistor RL2 and the current source CS2 is generated. The voltage must rise from the lowest value, i.e. the valley value, to the highest value, i.e. the peak value, during each period of the pulsating direct current, and the voltage divider 105 of the driving circuit detects an increased divided voltage value along with the increase of the voltage, so that the current source CS2 is turned on at this stage to directly cause the voltage value across the second resistor RL2 to increase synchronously, and the voltage drop between the power input VCC and the potential reference GND is raised. If the comparison result is low, the current source CS2 is turned off, so that the current source CS2 is turned off and no current flows through the second resistor RL2 and the current source CS 2. The voltage must drop from the highest value, i.e. the peak value, to the lowest value, i.e. the valley value, during each period of the pulsating direct current, and the voltage division value detected by the voltage divider 105 decreases as the pulsating voltage decreases, so that the current source CS2 is shut off at this stage to directly induce the voltage values across the second resistor RL2 to decrease synchronously, which results in the voltage detection module 103 losing the voltage regulation function. The voltage detection module 103 exits the raising control of the self voltage drop corresponding to the stage where the voltage of the pulsating direct current decreases from high to low.

Referring to fig. 10, in an alternative example, the voltage detection module 103 includes a comparator a. The comparator A still compares the divided value obtained by the voltage divider 105 with the predetermined voltage VTH. The divided value and the preset voltage VTH may be input to the inverting input terminal and the non-inverting input terminal of the voltage comparator a, respectively. The current source CS2 is instead turned on under control of a low level and turned off under control of a high level in the present example. If the divided value exceeds the preset voltage VTH, the comparison result is low and the output result of the comparator a is used to control the current source CS2, the current source CS2 is turned on, which tends to increase the divided value of the voltage divider 105 of each driving circuit with an increase in pulsating direct current. The response of the voltage detection module is analyzed again when the diametrically opposite result is generated. When the divided value is lower than the preset voltage VTH, the comparison result is high level and the output result of the comparator a still controls the current source CS2, and the current source CS2 is turned off, which often results in that the divided value of the voltage divider 105 of each driving circuit is also reduced along with the reduction of the pulsating direct current. The current source CS2 allows to be connected in series with a switch not shown in the figure and the comparator a controls the on or off of this switch, which is still an example of the comparator determining whether the current source is on or not, the current source CS2 and the switch connected in series therewith being considered as a whole. Or the current source CS2 itself is also allowed to have a switch not shown in the figure and the comparator a controls the switch to be turned on or off, which if turned on means letting the current source output a constant current and which turned off means that the current source has no current output, which is still an example of the comparator determining whether the current source is turned on or not, the current source CS2 being considered as a whole together with the switch it has. Take as an example a current source such as a voltage-to-current converter (V/I converter) with an operational amplifier and a power tube: the output of the operational amplifier is coupled to the control terminal of the power tube and the constant current output by the power tube is controlled by the operational amplifier, and the power tube is commonly a bipolar transistor and a field effect transistor. For example, a switch provided with a voltage-to-current converter may be arranged between the output of the operational amplifier and the control terminal of the power tube, or a switch provided with a voltage-to-current converter may be arranged at the current inflow terminal of the power tube or at the current outflow terminal of the power tube, the comparator a controlling the switch to be turned on or off, which switch, if turned on, means that the current source outputs a constant current and which switch is turned off means that the current source does not output a current. How to switch the current source CS2 off or on with a signal of a comparison result or the like can be realized by means of prior art.

Referring to fig. 10, in an alternative example, in an increasing phase of each period of the pulsating direct current, since the voltage division value detected by the voltage divider 105 of each driving circuit increases as the pulsating direct current increases, the current source CS2 is turned on at this phase so that the voltage detection module 103 starts to control its voltage drop. This voltage regulation corresponds to enabling the voltage detection module 103 during the voltage increase phase of the pulsating direct current. It is considered that the voltage detection module of the driving circuit in the series structure is enabled to further control the voltage drop of the driving circuit to be raised in a stage that the voltage of the pulsating direct current increases from low to high, for example, when the voltage of the pulsating direct current exceeds a predetermined voltage value. The voltage of the pulsating direct current exceeding the predetermined voltage value is sufficient to trigger the current source CS2 of each driving circuit to be turned on. Note that the time node at which the voltage detection module of the driving circuit controls the self voltage drop to be raised may occur at any timing at which the voltage of the pulsating direct current VDC increases from low to high, i.e., the time point at which the current source CS2 is turned on.

Referring to fig. 10, in an alternative example, in a decreasing stage of each period of the pulsating direct current, since the voltage division value detected by the voltage divider 105 of each driving circuit is also decreased as the pulsating direct current decreases, the current source CS2 is turned off at this stage to enable the voltage detection module 103 to start to exit the control of the voltage drop. This voltage regulation may pull down the voltage drop between the power input VCC and the potential reference GND, because the current source CS2 is turned off in some situations, so that the second resistor RL2 is turned off and the voltage drop of the second resistor RL2 drops abruptly. The voltage detection module of the driving circuit in the series structure can exit the raising control of the voltage drop of the driving circuit when the voltage of the pulsating direct current is reduced from high to low, for example, when the voltage of the pulsating direct current is lower than the preset voltage value. A voltage of the pulsating direct current below the predetermined voltage value is sufficient to trigger the current source CS2 of each driving circuit to be switched off. The exit time node at which the voltage detection module of the driving circuit exits the elevation control of its own voltage drop, i.e. the point in time at which the current source CS2 is turned off, may occur at any time during this stage of the voltage decrease of the pulsating direct current VDC from high to low.

Referring to fig. 11, in an alternative example, the voltage detection module 103 includes a fourth resistor RL4 and a series zener diode ZR connected between the power supply input terminal VCC and the potential reference terminal, and a current source CS3. The positions of the three can be substantially interchanged and only the serial relationship between the three can be maintained. The number of the series connection of the zener diodes ZR can be designed according to practical requirements. In general, a larger number of zener diodes ZR in series means a corresponding higher threshold voltage required for reverse breakdown, and a smaller number of zener diodes ZR in series means a corresponding lower threshold voltage required for reverse breakdown. For example, the cathode or anode of the zener diode ZR is coupled to the power input terminal through the fourth resistor RL4 and the current source CS3 is disposed between the anode or cathode of the zener diode ZR and the potential reference terminal, note that this is only an alternative example of the three being connected in series. A greater number of zener diodes ZR may also be used in fig. 7.

Referring to fig. 11, in an alternative example, the voltage detection module 103 of the driving circuit 100 is turned on only when the voltage drop of the driving circuit 100 is not lower than the threshold voltage and is sufficient for the zener diode ZR to be reverse-broken down. The opposite is the case when the voltage of the driving circuit 100 drops below the threshold voltage, the zener diode ZR is turned off and not on, and there is no doubt that the voltage detection module 103 of the driving circuit 100 is turned off at this time. A reasonable threshold voltage designed in advance is a precondition for determining whether the zener diode ZR is turned on. The voltage drop exceeding the threshold voltage of the zener diode ZR means that the zener diode ZR is turned on, and the zener diode ZR, the current source CS3, and the fourth resistor RL4 have current. Since the voltage must rise from a minimum value, i.e. the valley value, to a maximum value, i.e. the peak value, within each cycle of the pulsating direct current. Since the voltage drop experienced by each driving circuit 100 follows an increase as the voltage of the pulsating direct current increases, the zener diode ZR is turned on at this stage and thus causes the voltage across the fourth resistor RL4 to increase. The voltage detection module and the current source are turned on because the voltage of the pulsating direct current rises to a voltage drop higher than the threshold voltage. This voltage regulation behavior corresponds to a step up of the voltage drop between the power supply input VCC and the potential reference GND.

Referring to fig. 11, in an alternative example, if the voltage drop does not exceed the threshold voltage of the zener diode ZR, it means that the zener diode ZR is turned off, and the zener diode ZR, the current source CS3, and the fourth resistor RL4 have no current. Since the voltage must drop from the highest value, i.e. the peak value, to the lowest value, i.e. the valley value, during each period of the pulsating direct current, the zener diode ZR is turned off at this stage and the voltage detection module 103 loses the voltage regulation function, since the voltage drop experienced by each driving circuit 100 follows the drop as the voltage of the pulsating direct current decreases. The voltage detection module and the current source are turned off because the voltage of the pulsating direct current drops to a voltage drop lower than the threshold voltage. The voltage detection module 103 exits the elevation control of the voltage drop corresponding to the phase of decreasing the pulsating direct current from high to low.

Referring to fig. 11, in an alternative example, in an increasing phase of each cycle of the pulsating direct current, since the voltage value born by the zener diode ZR of each driving circuit increases as the pulsating direct current increases, the zener diode ZR is turned on at this phase and the voltage detection module 103 starts to control its voltage drop. This voltage regulation corresponds to enabling the voltage detection module 103 during the voltage increase phase of the pulsating direct current. It is considered that the voltage detection module of the driving circuit in the series structure is enabled to further control the voltage drop of the driving circuit to be raised in a stage that the voltage of the pulsating direct current increases from low to high, for example, when the voltage of the pulsating direct current exceeds a predetermined voltage value. The voltage of the pulsating direct current exceeding the predetermined voltage value is sufficient to trigger the zener diode ZR of each driving circuit to be turned on. The voltage detection module of the driving circuit controls the time node at which the self voltage drop is raised, i.e. the time point at which the zener diode ZR is turned on, at any time during the stage when the voltage of the pulsating direct current VDC increases from low to high.

Referring to fig. 11, in an alternative example, in a decreasing stage of each cycle of the pulsating direct current, since the voltage value born by the zener diode ZR of each driving circuit is also decreased as the pulsating direct current decreases, the zener diode ZR is turned off at this stage to start the voltage detection module 103 to exit the control of the voltage drop. This voltage regulation may pull the voltage drop between the power supply input VCC and the potential reference GND low, because the zener diode ZR turns off to cut off the fourth resistor RL4 and the voltage drop of the fourth resistor RL4 drops abruptly in some cases. The voltage detection module of the driving circuit in the series structure can exit the raising control of the voltage drop of the driving circuit when the voltage of the pulsating direct current is reduced from high to low, for example, when the voltage of the pulsating direct current is lower than the preset voltage value. The voltage of the pulsating direct current is below the predetermined voltage value sufficient to trigger the zener diode ZR of each driving circuit to be turned off. The exit time node at which the voltage detection module of the driving circuit exits the elevation control of the self voltage drop may occur at any point in time at which the voltage of the pulsating direct current VDC decreases from high to low, i.e., the point in time at which the zener diode ZR is turned off.

Referring to fig. 11, the constant current unit and the current source are also referred to as a constant current source module (CurrentSource) and consider the generated stable reference current or constant current as a driving current. The load or the light source and the constant current source module are connected in series to stabilize the current and realize the purpose of constant current control. Or the constant current source module is matched by a current mirror structure so that the current flowing through the current mirror is equal to or proportional to the reference current, the current mirror (currentMirror) is a specific form of the constant current source module, and the mirror current of the current mirror is equal to or proportional to the input reference current, and the current mirror is characterized in that the mirror current flowing through the current mirror copies or copies the reference current input to the current mirror according to a certain proportion. The constant current drive can also be applied to the load or light source by flowing the mirror current through the load or light source. In the present application, the circuit capable of generating a stable reference current or constant current can be assigned to the definition of the constant current cell CC1 or the current sources CS2-CS3, and the constant current source module similar to the voltage-current converter is an alternative example of the constant current cell or the current source. It can be seen that the circuit topology of the constant current cell or current source that generates a constant output current shown in the figure is not unique in nature but diverse.

Referring to fig. 12, pulsed direct current VDC derived from alternating current is known to have pulsating characteristics. The voltage of the pulsating direct current increases from low to high, and the driving circuits 100 connected in series actively regulate the voltage drop of each driving circuit 100, so that the voltage detection module 103 of each driving circuit 100 controls the voltage drop of each driving circuit to be regulated upwards. Each driving circuit 100 in the series structure raises its own voltage drop, so that the voltage portion to which the pulse direct current VDC is added is no longer concentrated at one or a few driving circuits 100, but the voltage of the pulse direct current VDC is uniformly distributed to the driving circuits 100. The hatched portion shows that the difference between the voltage drops DIV1, DIV2, … … DIVN of the respective driving circuits is already small, although the voltage value of the pulsating direct current VDC is increasing. The voltage of the pulsating direct current is reduced from high to low, and the driving circuits 100 connected in series still actively regulate the respective voltage drops, so that the voltage detection module 103 of each driving circuit 100 is designed to exit the up-regulation control of the voltage drop of the driving circuit 100 at this stage. The shaded part of the pulse direct current in the figure shows that the voltage detection module is controlling the voltage drop of the voltage detection module to be adjusted upwards and lifted, and the non-shaded part of the pulse direct current in the figure shows that the voltage detection module is exiting the control of the voltage drop of the voltage detection module to be adjusted upwards. For example, if the pulse direct current is higher than the preset voltage value VH, each driving circuit controls the voltage drop of the driving circuit to be up-regulated and raised, and if the pulse direct current is lower than the preset voltage value VH, each driving circuit exits up-regulated control of the voltage drop of the driving circuit.

Referring to fig. 12, a waveform diagram of the pulsed direct current VDC over several cycles is depicted. The arrow of current IS represents the cascode current flowing through the series connection of the plurality of drive circuits 100. The total input current and the total output current of each driving circuit 100 are equal to the current IS. The voltage drop of the voltage detection module 103 of each driving circuit IS controlled to rise by the voltage detection module 103 of each driving circuit in a phase of increasing the voltage of the pulsating direct current VDC from low to high, and the current IS rises accordingly, because the voltage detection module 103 IS activated and generates a current flowing through the voltage detection module 103. The rising action of the series current may occur at any time during the phase of increasing the voltage of the pulsating direct current from low to high. By contrast, the voltage detection module 103 of each driving circuit exits the raising control of the voltage drop of itself in a stage where the voltage of the pulsating direct current VDC decreases from high to low, with a consequent decrease in the current IS, because the voltage detection module 103 IS disabled by dormancy and the current flowing through the voltage detection module 103 IS reduced. The reduction of the series current may occur at any time during the phase of the voltage of the pulsating direct current decreasing from high to low. In a system adapting to pulsating direct current, from the aspects of power supply and power consumption, the input current waveform of the system basically follows the pulsating voltage waveform, so that the input current voltage is almost the same frequency and the same phase, the active power sucked from a power supply can be maximized, and the system has higher power factor and better total harmonic distortion index. In some examples, the power factor may be lacking if the voltage detection module is not introduced and the cascode current is kept constant. More importantly, the problems of electromagnetic interference and electromagnetic compatibility are perfectly solved because a voltage converter link between alternating current and direct current is abandoned.

Referring to fig. 13, the driving circuit 100 described above, taking the driving of the light source as an example, may supply a constant current to a load or the light source to perform constant current driving on the load. The drive circuit is in turn typically in the form of an integrated circuit or chip. The load or light source and constant current cell CC1 is described above as being connected between the power supply input VCC and the potential reference GND. In an alternative example, the constant current cell CC1 may be directly connected between the power supply input VCC and the potential reference GND. The light source and the constant current unit are allowed to be connected in series between the power supply input terminal and the potential reference terminal, and the load and the constant current unit are also allowed to be connected in series between the power supply input terminal and the potential reference terminal, as described above. However, as an entirely different embodiment from the previous, the present example allows a single existing constant current unit to be directly connected between the power input and the potential reference, as the solid state light source can be shifted to the light emitting diode LED4 in series with the respective driving circuit 100 and as shown. In the illustrated embodiment, both the light emitting diode W, such as white light, and the constant current unit CC1 are designed to be connected between the power input terminal VCC and the potential reference terminal GND. The light emitting diode W is omitted and the constant current cell CC1 is directly connected between the power input terminal VCC and the potential reference terminal GND. Whether in the embodiment in which the light emitting diode W is retained or in the embodiment in which the light emitting diode W is omitted, the driving circuit 100 may eliminate the data transmission module DAT and the so-called pulse width modulation modules MOD1-MOD3, etc., since the light emitting diode W and the light emitting diode LED4 do not need to employ the so-called pulse dimming technique in the present example. Note that the voltage detection module 103 that regulates the voltage drop still needs to remain in this example because this is a precondition. The present example allows the led to be controlled by the pwm module without on-line capture of gray scale data, thus providing better flexibility and lower cost. Of course, if pulse dimming technology is still desired for the led W, the data transmission module and the pulse width modulation module may also remain.

Referring to fig. 13, the series-connected driving circuits 100 are also connected in series with one or more light emitting diodes LEDs 4, such as white light diodes. The driving circuits 100 may be grouped together without being broken up by the light emitting diodes LED4, i.e. without inserting the light emitting diodes LED4 between the driving circuits 100, or the driving circuits 100 may be dispersed among the light emitting diodes, i.e. with inserting the light emitting diodes LED4 between the driving circuits 100. For example, in a plurality of driving circuits 100 connected in series, the power supply input VCC of the latter driving circuit 100 may be directly coupled to the potential reference GND of the former driving circuit 100. The power input VCC of the latter driving circuit 100 may also be indirectly coupled to the potential reference GND of the former driving circuit 100 via said light emitting diode LED4. The light emitting diodes LED4 may be interposed between the plurality of driving circuits, or the driving circuits may be interposed between the plurality of light emitting diodes LED4. The potential reference GND of the previous drive circuit is connected to the anode of the light emitting diode LED4 and the cathode of said light emitting diode LED4 is coupled to the power supply input VCC of the subsequent drive circuit. It IS characterized that the total current IS flowing through all driving circuits also flows through all light emitting diodes LED4. The driving circuits connected in series are also shown connected in series with one or more light emitting diodes LEDs 4 between the positive and negative poles of the power supply. The driving circuits of this example control the voltage drop of the driving circuits to raise the voltage drop of the driving circuits is equivalent to actively taking a part of the voltage drop to the driving circuits. The driving circuits connected in series can be replaced by loads such as resistors besides the light emitting diode LED4. It should be noted that this example is slightly different from the previous embodiments: the pulsating voltage is applied across the respective light emitting diodes LED4 in addition to the respective driving circuit 100, and the sum of the voltage drops div1+div2+ … … +divn requires an additional addition of the voltage across the respective light emitting diodes LED4 to be equal to the value of the pulsating direct current VDC, but the present example still conforms to the operation mechanism of the driving circuit for switching between the first and second operation modes.

Referring to fig. 13, there is a disadvantage in connecting a constant current device in series with a solid-state type light source. It should be appreciated that when the constant current device is connected in series with the led light source, once the series of led and constant current device is powered by the power supply voltage, the physical characteristics of the led light source determine an unavoidable negative disadvantage: the vast majority of the voltage that increases during the minute fluctuations of the supply voltage is carried by the constant current device. At the same time, even if the power supply voltage fluctuates slightly, the increase degree of the voltage part borne by the light-emitting diode is relatively negligible, and the constant current device is easy to damage. In the present application, the driving circuit 100 is connected in series with one or more light emitting diodes LEDs 4, and most of the voltage increased by the pulsating direct current in the pulsating step is applied to the driving circuit 100, so that the driving circuit 100 actively increases its voltage drop to share the voltage increased portion of the pulsating direct current with each driving circuit 100. The voltage regulating scheme not only protects the driving circuit 100 from being damaged easily, but also solves the defect that the voltage increased by the pulsating direct current is always concentrated at one or a few driving circuits, and the driving circuit 100 serving as a main heat source is also dispersed. The aging process of the light source of the light emitting diode and the high-temperature gathering effect damaging the driving circuit are relieved. The driving circuits raise the voltage drop of the driving circuits under the condition of pulse voltage supply and simultaneously raise the cascade current, and the driving circuits withdraw from the control of raising the voltage drop of the driving circuits and simultaneously lower the cascade current, so that the change of the cascade current almost follows the change of the pulse voltage and the active power extracted from the power supply is maximized. The system meets the aims of improving the power factor and reducing the harmonic pollution to the power grid, which are proposed in the industry, and the system can be connected to the power grid to purify the power grid, and even if the traditional active power factor correction circuit or passive power factor correction circuit is not introduced, the system has better power factor value and total harmonic distortion index.

Referring to fig. 13, most of the present embodiment and the embodiments described above are configured to supply power to a plurality of driving circuits connected in series by a dc voltage source, which is mainly exemplified by pulsating dc VDC. The regulated voltage, in the form of a substantially non-pulsating voltage, may also be considered a dc voltage source to power the plurality of driving circuits in series. Typically, a plurality of drive circuits in series are powered by a regulated voltage, such as provided by the voltage converter DC described above. Note that the regulated voltage is referred to as a pulsating voltage, and the voltage value of the regulated voltage is also allowed to be adjustable. For example, the voltage converter outputs stable voltages with different voltage levels to supply power to the driving circuits connected in series. However, unlike a pulsating voltage, the voltage magnitude and direction of the stabilized voltage hardly change transiently with time. The technical characteristics of the driving circuit in the pulsating voltage supply mode are also applicable to the stable voltage supply mode. For example, the plurality of driving circuits may be supplied with a steady voltage or a ripple voltage on the condition that the plurality of driving circuits are connected in series: and when the voltage of the stable voltage or the pulsating voltage is not lower than the preset voltage value, the voltage detection module is activated and started, so that the voltage detection module of each driving circuit controls the voltage drop of the driving circuit to be raised. Or the voltage detection module is disabled in a dormant mode when the voltage of the stable voltage or the pulsating voltage is lower than the preset voltage value, and the voltage detection module of each driving circuit does not carry out raising and up-regulating control on the voltage drop of the driving circuit. The driving circuit can be powered by a DC voltage such as a pulsating voltage or a steady voltage. For example, on the premise of using a stable voltage as a power supply voltage, the voltage level of the stable voltage is regulated to be equal to that of the direct current voltage, and the voltage level of the direct current voltage enters a stage of increasing from low to high, and a plurality of driving circuits are connected in series, so that the voltage detection module of each driving circuit controls the voltage drop of the driving circuit to be raised. The voltage level of the regulated stable voltage is equal to that of the direct current voltage, and the voltage value enters a stage of reducing from high to low, and a plurality of driving circuits are connected in series, so that the voltage detection module of each driving circuit can withdraw from the lifting control of the voltage drop of the driving circuit. The wide voltage scheme combines both ripple and regulated voltages. In order to show that the power supply, i.e. the dc voltage, is allowed to be a stable voltage in the form of a pulsating or non-pulsating voltage.

Referring to fig. 14, the driving circuit 100 has a voltage detection module 103 that detects a voltage drop between the power supply input terminal VCC and the potential reference terminal GND. The voltage detection module 103 of the first driving circuit 100 detects the voltage drop DIV1 borne by itself, and the voltage detection module 103 of the first driving circuit 100 compares the voltage drop DIV1 borne by itself with a threshold voltage (threshold voltage). The voltage drop DIV1 is higher than the threshold voltage to trigger the first driving circuit 100 to enter the first operation mode, and in contrast, the voltage drop DIV1 is lower than the threshold voltage to trigger the first driving circuit 100 to enter the second operation mode. The first driving circuit 100 is shown in the second operation mode in a period t1 in which the ripple voltage starts from the valley timing, and the voltage drop DIV1 is lower than the threshold voltage and enters the second operation mode because the ripple voltage is not very large in this period. The subsequent increase in the ripple voltage causes the voltage drop DIV1 to increase, and the first driving circuit 100 is in the first operation mode during the period t2, where the ripple voltage is large enough to make the voltage drop DIV1 higher than the threshold voltage and enter the first operation mode. Then, the voltage drop DIV1 is reduced due to the decrease of the ripple voltage, and the first driving circuit 100 is in the second operation mode in the period t3, where the ripple voltage is not large enough to make the voltage drop DIV1 lower than the threshold voltage and enter the second operation mode. The period t1-t3 is exactly the total duration of a single cycle of the pulsating voltage with periodicity, the period t1 is the beginning period of the single cycle, the period t2 is the more intermediate period of the single cycle and the period t3 is the ending period of the single cycle. The first operating mode is represented by the interval RG1 and the second operating mode is represented by the interval RG 2. Illustrating: the pulsating voltage must be cycled from a lowest value, i.e., a waveform valley, to a highest value, i.e., a waveform peak, and then from the highest value, i.e., a waveform peak, to a lowest value, i.e., a waveform valley, in each cycle. For example, if the pulse voltage is higher than the predetermined voltage value VH, the respective driving circuits may thereby enter the first operation mode, whereas if the pulse voltage is lower than the predetermined voltage value VH, the respective driving circuits may thereby enter the second operation mode, the periods t1 and t3 are cases where the predetermined voltage value VH is greater than the pulse voltage and the period t2 is cases where the predetermined voltage value VH is smaller than the pulse voltage.

Referring to fig. 14, in addition to this, the voltage detection module 103 of the second driving circuit 100 detects the voltage drop DIV2 borne by itself, and the voltage detection module 103 of the second driving circuit 100 compares the voltage drop DIV2 borne by itself with a threshold voltage (threshold voltage). The voltage drop DIV2 is higher than the threshold voltage to trigger the second driving circuit 100 to enter the first operation mode, and in contrast, the voltage drop DIV2 is lower than the threshold voltage to trigger the second driving circuit 100 to enter the second operation mode. The second driving circuit 100 is shown in the second operation mode in a period t1 in which the ripple voltage starts from the valley timing, and the voltage drop DIV2 is lower than the threshold voltage and enters the second operation mode because the ripple voltage is not very large in this period. The voltage drop DIV2 increases as a result of the increase in the ripple voltage, and the second driving circuit 100 is in the first operation mode during the period t2, where the ripple voltage is large enough to make the voltage drop DIV2 higher than the threshold voltage and enter the first operation mode. The subsequent decrease in the ripple voltage causes the voltage drop DIV2 to decrease, and the second driving circuit 100 is in the second operation mode during the period t3, where the ripple voltage is not large enough to make the voltage drop DIV2 lower than the threshold voltage and enter the second operation mode. The period t1-t3 is exactly the total duration of a single cycle of the pulsating voltage with periodicity, the period t1 is the beginning period of the single cycle, the period t2 is the more intermediate period of the single cycle and the period t3 is the ending period of the single cycle. The first operating mode is represented by the interval RG1 and the second operating mode is represented by the interval RG 2. The voltage drop DIV2 is equal to the threshold voltage, which is a critical state that allows the driving circuit to enter the first operation mode or allows the driving circuit to enter the second operation mode.

Referring to fig. 14, in addition to this, the voltage detection module 103 of the nth driving circuit 100 detects the voltage drop DIVN borne by itself, and the voltage detection module 103 of the nth driving circuit 100 compares the voltage drop DIVN borne by itself with a threshold voltage (threshold voltage). When the voltage drop DIVN is higher than the threshold voltage, the nth driving circuit 100 is triggered to enter the first operation mode, and when the voltage drop DIVN is lower than the threshold voltage, the nth driving circuit 100 is triggered to enter the second operation mode. The N-th driving circuit 100 is shown in the second operation mode in a period t1 that the ripple voltage extends from the moment of the trough, and the voltage drop DIVN is lower than the threshold voltage and enters the second operation mode because the ripple voltage is not very large in this period. The voltage drop DIVN increases due to the increase of the ripple voltage, and the nth driving circuit 100 is in the first operation mode during the period t2, where the ripple voltage is large enough to make the voltage drop DIVN higher than the threshold voltage and enter the first operation mode. The subsequent decrease in the ripple voltage causes the voltage drop DIVN to decrease, and the nth driving circuit 100 is in the second operation mode during the period t3, where the ripple voltage is not large enough to make the voltage drop DIVN lower than the threshold voltage and enter the second operation mode. The period t1-t3 is exactly the total duration of a single cycle of the pulsating voltage with periodicity, the period t1 is the beginning period of the single cycle, the period t2 is the more intermediate period of the single cycle and the period t3 is the ending period of the single cycle. The first operating mode is represented by the interval RG1 and the second operating mode is represented by the interval RG 2. The other driving circuits 100 are not described in detail. In addition, the voltage comparison function of the voltage detection module can be realized by means of the voltage detection technology (voltage detection) disclosed in the prior art: it is detected whether the voltage drop is above or below a threshold voltage. In other words, the voltage detection module that compares the voltage drop to the threshold voltage is not limited to the disclosure of embodiments of the present application, such as fig. 6-11 and 15-17.

Referring to fig. 14, the first operation mode, section RG1, allows the constant current unit CC1 to supply current to perform constant current driving on light emitting diodes, such as the aforementioned LEDs 1-LED3 or a load such as RX. The second mode of operation, interval RG2, prohibits the constant current unit CC1 from outputting current to light emitting diodes, e.g. LEDs 1-LED3, or to a load, e.g. RX. In consideration of the fact that the voltage value of the pulsating voltage is smaller or the transferred energy is lower in the second working mode, the driving circuit does not drive the light source or the load at the moment, so that the power consumption and the requirement on input energy can be reduced. The driving circuit can perform constant current driving on the light source or the load to achieve the display effect when the voltage value of the pulsating voltage is higher or the energy transferred is enough in the first working mode. Although the light source is not illuminated in the second mode of operation, the display effect of the system is not affected because the image remains in the brain for a period of time after the image observed by the vision system disappears due to the vision retention phenomenon. Furthermore, if a capacitor CZ is connected between the power input terminal and the potential reference terminal of each driving circuit, the capacitor CZ is discharged during the second operation mode, so as to release energy for the driving circuit, and the constant current unit CC1 is disabled from outputting a constant current to the load such as a resistor or the light emitting diode during the second operation mode, so that the capacity of the capacitor CZ can be designed to be smaller to save the cost.

Referring to fig. 13, the first operation mode, i.e., the interval RG1, allows the constant current unit CC1 to supply a constant current to perform constant current driving on a solid state light source portion, such as the light emitting diode W described above. The second operation mode, section RG2, prohibits the constant current unit CC1 from outputting a constant current to the solid state light source part, as referred to as led W. The frequency of the pulsating voltage is about twice that of the alternating current commercial power, and the frequency advantage of the pulsating voltage can cater to the so-called visual retention or visual suspension or afterglow effect which occurs in two sections, so that the energy consumption and electromagnetic interference phenomena of the section RG2 are greatly reduced. In addition, the voltage value of the pulsating voltage in the interval is small, so that the cascade current is difficult to maintain at a required normal level, and the expected display effect cannot be realized by partial pixel points in the display system: some pixels may be displayed according to the desired gray data and other pixels may not be displayed according to the desired gray data during the interval RG2, thereby generating visual pollution. Or some pixels which can be driven in the system have bright spots and other pixels which cannot be driven in the system have dark spots, so that poor display effect of the display system is caused. The design of the drive circuit to enter the first mode of operation or to enter the second mode of operation, and the high frequency switching of the drive circuit between the first and second modes of operation, can better overcome these doubts.

Referring to fig. 14, in an alternative but not necessary example, each of the driving circuits 100 is put into the first operation mode when the ripple voltage is higher than the predetermined voltage value VH, and each of the driving circuits 100 is put into the second operation mode when the comparison ripple voltage is lower than the predetermined voltage value VH. Thereby enabling each drive circuit 100 to switch at high frequencies between the first mode of operation and the second mode of operation. For example in the previous cycle: each drive circuit 100 enters the second mode of operation during time periods t1 and t3 and each drive circuit 100 enters the first mode of operation during time period t 2. The same switching phenomenon of the operation mode occurs in the driving circuit in a cycle immediately after the latter cycle: each drive circuit 100 enters the second mode of operation during time periods t1 and t3 and each drive circuit 100 enters the first mode of operation during time period t 2. In an alternative example, the ripple voltage is higher than the predetermined voltage value VH to make the voltage drop higher than the threshold voltage, and the driving circuit enters the first operation mode; the voltage level of the pulse is lower than the predetermined voltage level VH, which lowers the voltage level below the threshold voltage level, and the driving circuit enters the second operation mode.

Referring to fig. 15, in an alternative example, the voltage detection module 103 includes a voltage divider 105 disposed between the power input VCC and the potential reference GND, and the voltage divider 105 samples a voltage drop, such as DIVN, and obtains a divided value in which the voltage drop is scaled down by a predetermined ratio. The voltage divider 105 with the voltage dividing resistors R1 and R2 in the figure samples the voltage drop between the power supply input VCC and the potential reference GND, and samples the voltage drop at the interconnection node of both resistors R1 and R2 to a divided value of a voltage drop, for example, DIVN.

Referring to fig. 15, the voltage detection module 103 asserts a comparison of a threshold voltage (threshold voltage) with the voltage drop described previously, such as a DIVN. If the voltage drop, such as the DIVN, is scaled down by a predetermined ratio to obtain a divided voltage value and the threshold voltage is scaled down by a predetermined ratio to obtain a predetermined voltage VTH, the comparison result obtained by comparing the divided voltage value and the predetermined voltage VTH by the voltage detection module 103 is equivalent to the comparison result obtained by comparing the voltage drop, such as the DIVN, with the threshold voltage. The comparator A compares the divided value with a preset voltage VTH, and when the divided value exceeds the preset voltage VTH, the comparison result triggers the driving circuit 100 to enter a first working mode; when the relative divided voltage value is lower than the preset voltage VTH, the comparison result triggers the driving circuit 100 to enter the second operation mode. In an alternative example, the so-called preset ratio may be set equal to R2/(r1+r2), for example. Or in the alternative, for example, the so-called preset ratio may be set to any predetermined preset ratio coefficient value less than 1 but greater than 0.

Referring to fig. 15, in the first operation mode, the constant current unit CC1 is allowed to supply a constant current to perform constant current driving on the light emitting diode or the load. The pwm modules MOD1-MOD3 can perform constant current driving on the light emitting diodes LED1-LED3 or the load such as the resistor RX according to the above-mentioned operation mechanism. Or in the embodiment of fig. 13, constant current driving is performed on the light emitting diode W by allowing the Xu Hengliu unit CC1 to supply a constant current.

Referring to fig. 15, in the second operation mode, the constant current cell CC1 is inhibited from outputting current. For example, the comparison result triggers the pwm modules MOD1-MOD3 to prohibit the output of the pwm signal and the prohibition control signal CTL, so as to achieve the purpose of prohibiting the constant current unit CC1 from outputting current to the light emitting diode. Or in fig. 13 the constant current cell CC1 is disabled from supplying a constant current to the light emitting diode W. The way how the constant current cell CC1 is inhibited from outputting a constant current is diversified and not unique. Illustrating: assuming that the constant current cell CC1 is provided in series with a switch not shown in the drawing and the on or off of this switch is controlled by the comparison result of the voltage detection module, which is an example in which the comparator decides whether the constant current cell is on or not, the constant current cell CC1 and the switch connected in series therewith are regarded as a whole. Or the constant current cell CC1 itself allows to have a switch not illustrated in the figure and the comparator a controls the on or off of this switch, which on means that the constant current cell outputs a constant current and off means that the constant current cell has no current output, still being an example of the comparator determining whether the constant current cell is on or not, the constant current cell CC1 being considered as a whole together with the switch provided. Taking a constant current unit such as a voltage-current converter (V/I converter) with an operational amplifier and a power tube as an example: the output of the operational amplifier is coupled to the control of the power transistor and the operational amplifier controls the magnitude of the constant current output by the power transistor, which is typically a bipolar transistor and a field effect transistor. For example, a switch provided with a voltage-to-current converter may be provided between the output terminal of the operational amplifier and the control terminal of the power tube, or a switch provided with a voltage-to-current converter may be provided at the current inflow terminal of the power tube or at the current outflow terminal of the power tube, the comparator a controlling on or off of this switch, this switch being turned on meaning that the constant current unit outputs a constant current and this switch being turned off meaning that the constant current unit does not output a current. How to turn the constant current cell CC1 off or on with a signal of a comparison result or the like can be realized by means of the prior art.

Referring to fig. 15, in the second operation mode, the constant current cell CC1 is inhibited from outputting current. There are other embodiments as to how to prohibit the constant current unit from outputting a constant current. For example, a first pulse width modulation signal PWM ₁ And the comparison result is passed through AND gate and then used for controlling first switch S1, for example second pulse width modulation signal PWM ₂ And the result of the comparison is passed through an AND gate and then a second switch S2, e.g. a third path pulse width modulation signal PWM ₃ The comparison result controls the third switch S3 via and gate phase and then, similarly, for example, the so-called control signal CTL and the comparison result control the fourth switch S4 via and gate phase and then. When the comparison result is high level, the first to third switches are controlled by the first to third pulse width modulation signals and the fourth switch is controlled by the control signal. The first to fourth switches are controlled to be turned off by the comparison result if the comparison result is at a low level so that the constant current unit CC1 has no current output, which is equivalent to disabling the respective pulse width modulation modules and not performing any form of constant current driving operation on the light emitting diode. Other examples of prohibiting the constant current unit from outputting the current include that the pwm modules MOD1 to MOD3 and the nor gate 101 cannot output the pwm signal and the control signal when they are directly powered off under the triggering of the comparison result, which is equivalent to disabling each pwm module and not performing any form of constant current driving operation on the light emitting diode. The constant current unit CC1 can not output power under the trigger of the comparison result A constant current is supplied to the light source or load. In an alternative embodiment, when the driving circuit is in the first operation mode, the respective pulse width modulation module MOD1-MOD3 is enabled for constant current driving operation of the light emitting diodes, for example for driving the light emitting diodes LED1-LED 3. In an alternative embodiment, when the driving circuit is in the second operation mode, the respective pulse width modulation module MOD1-MOD3 is disabled and no constant current driving operation is performed on the light emitting diodes, such as no driving operation is performed on the light emitting diodes LED1-LED 3. If it is used that the load is in the first mode of operation when the driving circuit is in the first mode of operation, the respective pulse width modulation module MOD1-MOD3 is enabled for driving the light emitting diodes and the load, for example for operating the light emitting diodes LED1-LED3 and the load. If it is used that the load is in the second operation mode when the driving circuit is in the second operation mode, disabling the respective pulse width modulation module MOD1-MOD3 does not operate the light emitting diodes as well as the load, e.g. does not perform constant current driving operation of the light emitting diodes LED1-LED3 and the load.

Referring to fig. 15, in the second operation mode, the constant current cell CC1 is inhibited from outputting current. There are other embodiments of how to prohibit the constant current unit from outputting a constant current. Such as the first pulse width modulation signal PWM ₁ By a first controllable switch, not shown, for controlling the first switch S1, e.g. the second pulse width modulation signal PWM ₂ By a second controllable switch, not shown, for controlling the second switch S2, e.g. the third pulse width modulation signal PWM ₃ The third switch S3 is then controlled by a third controllable switch, not shown, and the fourth switch S4 is similarly controlled by a fourth controllable switch, not shown, as is the so-called control signal CTL. The first to fourth controllable switches are controlled by the comparison result, the pulse width modulation signal is allowed to pass freely through the controllable switches if the controllable switches are on, and the pulse width modulation signal is not allowed to pass through the controllable switches if the controllable switches are off. When the comparison result is high level, the first to third switches are controlled by the first to third pulse width modulation signals and the fourth switch is controlled by the control signal, respectively, because the comparison result at the moment enables all the first to fourth controllable switches to be turned on. The diametrically opposite case is if the comparison result isWhen the voltage is low, the first to fourth controllable switches are all turned off, and the pulse width modulation signal cannot pass through the controllable switches, that is, the first to third switches cannot be controlled by the first to third pulse width modulation signals and the fourth switch cannot be controlled by the control signal. The constant current unit CC1 has no current output, equivalent to disabling the pulse width modulation module and not performing any form of driving operation on the light emitting diode.

Referring to fig. 15, in the first operation mode, the data transmission module DAT of the driving circuit 100 is enabled so as to normally receive communication data and normally forward communication data. The data transmission module DAT can execute the task of receiving communication data and the task of forwarding communication data according to the communication operation mechanism.

Referring to fig. 15, in the second operation mode, the data transmission module DAT of the driving circuit 100 is disabled and neither communication data is received nor forwarded. There are various ways how to disable the data transfer module DAT. If the communication data and the comparison result are transmitted to the data transmission module DAT from the signal input end DI after being compared with the and gate phase, the communication data can be smoothly transmitted to the data transmission module DAT from the signal input end DI when the comparison result is at a high level. On the contrary, when the comparison result is low level, the communication data cannot be transmitted to the data transmission module DAT from the signal input end DI, so that the communication data cannot be transmitted to the data transmission module DAT, and the data transmission module does not naturally output the communication data, and the situation at the moment is equivalent to that the data transmission module DAT is forbidden, the communication data is not received and is not forwarded. There are further alternative embodiments as to how to disable the data transfer module: if the communication data is transmitted to the data transmission module DAT after passing through a switch arranged at the signal input end DI, the switch is controlled by the comparison result. When the comparison result is high, the switch of the signal input terminal is turned on, and the communication data can be transmitted from the signal input terminal DI to the data transmission module DAT. The completely opposite situation is that if the comparison result is low, the switch arranged at the signal input terminal is turned off, and the communication data transferred to the data transmission module of the driving circuit cannot be naturally transferred from the signal input terminal DI to the data transmission module DAT, and the situation is equivalent to disabling the data transmission module DAT and not receiving the communication data nor forwarding the communication data. Still other alternative embodiments of disabling the data transfer module are: for example, the data transmission module DAT can not receive communication data and forward the communication data when the data transmission module DAT is directly powered off under the triggering of the comparison result, which is equivalent to disabling the data transmission module DAT.

Referring to fig. 15, in an alternative example, communication data is sent to a plurality of the driving circuits 100 only when the driving circuits 100 are in the first operation mode; and when the driving circuit 100 is in the second operation mode, no communication data is transmitted to a plurality of the driving circuits 100. For example, setting the master node MST to synchronize also judges and compares the relationship between the ripple voltage and the aforementioned predetermined voltage value VH. When the master node MST determines that the pulse voltage is higher than the predetermined voltage value, the driving circuit enters the first working mode, and the master node MST sends communication data to the plurality of driving circuits connected in cascade. In contrast, when the master node MST determines that the pulse voltage is lower than the predetermined voltage value, the driving circuit enters the second operation mode, and the master node MST does not send communication data to the plurality of driving circuits connected in cascade. The communication action occurs only in the period t2 and there is no communication action in the periods t1 and t 3.

Referring to fig. 16, the foregoing voltage detection module 103 is changed to the example, and the remaining other solutions of the driving circuit in fig. 15 are still applicable to the embodiment of fig. 16. A series of zener diodes ZR and a current source CS3 are connected in series between the power supply input terminal VCC and the potential reference terminal GND. The comparator AM compares the voltage at the anode of the zener diode ZR with the designed threshold voltage VL. For example, the two parameters are input to the non-inverting input terminal and the inverting input terminal of the comparator AM, respectively, and the comparison result is generated by the comparator. The voltage drop of the driving circuit 100 is only turned on when the voltage drop is not lower than the threshold voltage and the zener diode ZR is reversely broken down to be turned on, otherwise, the voltage drop is lower than the threshold voltage and the current source CS3 is turned off to not flow current. The voltage at the anode of the zener diode will rise and exceed the threshold voltage VL when the voltage detection module 103 is on, and the voltage at the anode of the zener diode will not rise and fall below the threshold voltage VL when the opposite voltage detection module 103 is off. For example, the threshold voltage VL may have a voltage value close to or slightly higher than the voltage level of the potential reference terminal. The cathode or anode of the zener diode ZR may be coupled to the power supply input VCC through a fourth resistor RL4, and a current source CS3 is provided between the anode or anode of the zener diode ZR and the potential reference, see the embodiment of fig. 11. Or the zener diode ZR cathode or cathode is designed to be directly coupled to the power supply input VCC. The voltage at the anode of the zener diode ZR exceeds the threshold voltage VL, which characterizes the voltage drop higher than the threshold voltage and the comparison triggers the driving circuit to enter the first operation mode. And if the voltage of the anode of the Zener diode ZR is lower than the threshold voltage, the characterization voltage is lower than the threshold voltage, and the comparison result triggers the driving circuit to enter a second working mode.

Referring to fig. 17, the foregoing voltage detection module 103 is changed to the example, and the remaining other solutions of the driving circuit in fig. 15 are still applicable to the embodiment of fig. 17. A series of zener diodes ZR and junction field effect transistors JFETs are connected in series between the power supply input VCC and the potential reference GND. The zener diode ZR is connected between the first terminal of the junction field effect transistor and the power input terminal VCC, and the control terminal of the junction field effect transistor JFET is coupled to the potential reference terminal GND and the second terminal of the junction field effect transistor JFET is coupled to the potential reference terminal GND through a clamping resistor R3. The comparator AM compares the voltage at the first or second terminal of the junction field effect transistor JFET with the threshold voltage VL. For example, the two parameters are input to the non-inverting input terminal and the inverting input terminal of the comparator AM, respectively, and the comparison result is generated by the comparator. The voltage drop of the driving circuit 100 is only turned on when the voltage drop is not lower than the threshold voltage and the zener diode ZR is reversely broken down to be turned on, otherwise, the voltage drop is turned off when the voltage drop is lower than the threshold voltage and no current flows. The voltage at the first end or the second end of the junction field effect transistor will rise and exceed the threshold voltage VL when the voltage detection module 103 is turned on, and the voltage at the first end or the second end of the junction field effect transistor will not rise and be lower than the threshold voltage VL when the voltage detection module is turned off. The threshold voltage is close to or slightly higher than the voltage level at the potential reference terminal. The cathode or anode of the zener diode ZR may be coupled to the power input terminal VCC through a third resistor RL3, and a transistor JFET is provided between the anode or anode of the zener diode ZR and the potential reference terminal, see the embodiment of fig. 7. Or the zener diode ZR cathode or cathode is designed to be directly coupled to the power supply input VCC. The voltage at the first end or the second end of the junction field effect transistor JFET exceeds the threshold voltage to represent that the voltage drop is higher than the threshold voltage, and the comparison result triggers the driving circuit to enter a first working mode. In the opposite case, the voltage at the first terminal or the second terminal of the JFET is lower than the threshold voltage VL, the characterization voltage drops below the threshold voltage and the comparison result triggers the driving circuit to enter the second operation mode. In the second working mode, the power consumption of the driving circuit can be greatly reduced by closing the pulse width modulation function and the data communication function, and the capacitance of the capacitor CZ can be designed to be smaller or even the capacitor is abandoned so as to save the cost and prolong the service life of the system. Because the capacitor is affected by environmental temperature and ripple current, the service life of the capacitor is shorter than that of other devices.

The foregoing description and drawings set forth exemplary embodiments of the specific structure of the embodiments, and the foregoing invention provides presently preferred embodiments, without being limited to the precise details. Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above description. It is therefore intended that the following appended claims be interpreted as covering all alterations and modifications as fall within the true spirit and scope of the invention. Any and all equivalent ranges and contents within the scope of the claims should be considered to be within the intent and scope of the present invention.

Claims

1. A system for pulsating voltages, comprising:

the voltage detection module compares the voltage drop to a threshold voltage:

in the second working mode, the constant current unit is forbidden to output constant current to the light emitting diode, and the light emitting diode is not driven.

2. The system for pulsating voltages according to claim 1, wherein:

each of the driving circuits includes:

in each of the driving circuits:

3. The system for pulsating voltages according to claim 2, wherein:

when the driving circuit is in a first working mode, starting each pulse width modulation module of the driving circuit so as to drive the light emitting diode;

and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit.

4. The system for pulsating voltages according to claim 2, wherein:

in each of the driving circuits:

each cycle period common to the multiple pulse width modulated signals is divided into a plurality of time periods, with the effective logic value of each pulse width modulated signal being distributed over a respective one of the time periods.

5. The system for pulsating voltages according to claim 1, wherein:

a capacitive device is connected between the power input terminal and the potential reference terminal of each of the driving circuits.

6. The system for pulsating voltages according to claim 1, wherein:

each driving circuit further comprises a data transmission module with a decoder, wherein the data transmission module is used for decoding gray data from received communication data and forwarding the communication data; and is also provided with

The driving circuits receive communication data in a cascade connection mode:

and after each driving circuit receives the communication data, extracting the communication data belonging to the current stage and forwarding the received rest other communication data to the next stage connected with the driving circuit in cascade.

7. The system for pulsating voltages according to claim 6, wherein:

when the driving circuit is in a first working mode, a data transmission module of the driving circuit is started to receive communication data and forward the communication data;

and when the driving circuit is in the second working mode, disabling the data transmission module of the driving circuit, and not receiving the communication data or forwarding the communication data.

8. The system for pulsating voltages according to claim 6, wherein:

transmitting communication data to a plurality of said drive circuits only when said drive circuits are in a first mode of operation;

and when the driving circuit is in the second working mode, the communication data is not sent to a plurality of driving circuits.

9. The system for pulsating voltages according to claim 4, wherein:

each of the driving circuits is further provided with a load connected in parallel with the plurality of light emitting diodes;

The load and the constant current unit are connected in series between a power input end and a potential reference end;

the result of the nor operation of the multiple pulse width modulation signals is regarded as a control signal, and when the control signal has an effective logic value, the constant current provided by the constant current unit is switched to flow through the load.

10. The system for pulsating voltages according to claim 9, wherein:

when the driving circuit is in a first working mode, starting each pulse width modulation module of the driving circuit so as to drive the light emitting diode and the load;

and when the driving circuit is in the second working mode, disabling each pulse width modulation module of the driving circuit, and not performing driving operation on the light emitting diode and the load.

11. The system for pulsating voltages according to claim 1, wherein:

the voltage detection module includes:

the voltage divider is arranged between the power input end and the potential reference end, samples the voltage drop and obtains a voltage division value of the voltage drop which is reduced according to a preset proportion;

the comparator is used for comparing the divided voltage value with a preset voltage, the threshold voltage is reduced according to the preset proportion to obtain the preset voltage, and the comparator generates a comparison result;

and when the voltage division value is lower than the preset voltage, triggering the driving circuit to enter a second working mode by the comparison result.

12. The system for pulsating voltages according to claim 11, wherein:

the voltage detection module further includes:

a resistor, a switch and a zener diode connected in series between the power input end and the potential reference end;

the output end of the comparator is coupled to the control end of the switch, the switch is turned on when the divided value exceeds the preset voltage, the zener diode is turned on, and the switch is turned off when the divided value is lower than the preset voltage.

13. The system for pulsating voltages according to claim 11, wherein:

the voltage detection module further includes:

a resistor and a current source connected in series between the power input end and the potential reference end;

the comparison result of the comparator also determines whether the current source is switched on, the current source is switched on when the divided value exceeds the preset voltage, and the current source is switched off when the divided value is lower than the preset voltage.

14. The system for pulsating voltages according to claim 1, wherein:

the voltage detection module includes:

a resistor, a zener diode, a junction field effect transistor connected in series between the power input terminal and the potential reference terminal;

the Zener diode and the resistor are connected in series between the first end of the junction field effect transistor and the power input end;

the control terminal of the junction field effect transistor is coupled to the potential reference terminal and the second terminal of the junction field effect transistor is coupled to the potential reference terminal through another clamping resistor;

the voltage of the first end or the second end exceeds the threshold voltage, and the comparison result triggers the driving circuit to enter a first working mode;

the voltage of the first or the second end is lower than the threshold voltage, and the comparison result triggers the driving circuit to enter a second working mode.

15. The system for pulsating voltages according to claim 14, wherein:

the voltage drop of any one of the driving circuits is only switched on when the voltage drop is not lower than the threshold voltage, so that the zener diode is reversely broken down;

When the voltage of any one of the driving circuits is lower than the threshold voltage, the zener diode is turned off, and the voltage detection module of the any one of the driving circuits is turned off.

16. The system for pulsating voltages according to claim 1, wherein:

the voltage detection module includes:

a resistor, a zener diode and a current source connected in series between the power input end and the potential reference end;

the voltage drop of any one of the driving circuits is only turned on when the voltage drop is not lower than the threshold voltage and the zener diode is reversely broken down to be turned on, otherwise, the current source is turned off;

and if the voltage of the anode of the Zener diode is lower than the threshold voltage, the comparison result triggers the driving circuit to be in a second working mode.

17. A method for pulsating voltage, characterized by:

the method comprises the following steps:

supplying power to a plurality of driving circuits connected in series by utilizing pulsating voltage obtained after alternating current rectification;

18. The method according to claim 17, wherein:

the voltage detection module includes:

19. The method according to claim 18, wherein:

the voltage detection module further includes:

20. The method according to claim 18, wherein:

the voltage detection module further includes:

21. The method according to claim 17, wherein:

the voltage detection module includes:

22. The method according to claim 21, wherein:

23. The method according to claim 17, wherein:

the voltage detection module includes:

24. The method according to claim 17, wherein:

each of the driving circuits includes:

in each of the driving circuits:

each cycle period shared by the multiple pulse width modulation signals is divided into a plurality of time periods, and the effective logic value of each pulse width modulation signal is distributed in a corresponding time period;

25. The method according to claim 24, wherein:

26. The method according to claim 25, wherein:

27. The method according to claim 17, wherein:

The driving circuits receive communication data in a cascade connection mode:

each driving circuit receives the communication data, extracts the communication data belonging to the current stage and forwards the received rest other communication data to the next stage connected with the driving circuit in cascade;

28. A driving circuit adapted for pulsating voltage, comprising:

a power supply input terminal and a potential reference terminal;

the voltage detection module compares the voltage drop to a threshold voltage:

in a second working mode, the constant current unit is forbidden to output constant current to the light emitting diode, and the light emitting diode is not driven;

29. The drive circuit for a pulsating voltage according to claim 28, wherein:

The voltage detection module includes:

30. The drive circuit for a pulsating voltage according to claim 29, wherein:

the voltage detection module further includes:

31. The drive circuit for a pulsating voltage according to claim 29, wherein:

the voltage detection module further includes:

32. The drive circuit for a pulsating voltage according to claim 28, wherein:

the voltage detection module includes:

33. The drive circuit for a pulsating voltage according to claim 32, wherein:

34. The drive circuit for a pulsating voltage according to claim 28, wherein:

the voltage detection module includes:

35. The drive circuit for a pulsating voltage according to claim 28, wherein:

each of the driving circuits includes:

in each of the driving circuits:

36. The drive circuit for a pulsating voltage according to claim 35, wherein:

each of the driving circuits is provided with light emitting diodes of three primary colors red, green and blue.

37. The drive circuit for a pulsating voltage according to claim 35, wherein:

38. The drive circuit for a pulsating voltage according to claim 35, wherein:

in each of the driving circuits:

39. The drive circuit for a pulsating voltage according to claim 38, wherein:

40. The driving circuit for a pulsating voltage according to claim 39, wherein:

41. The drive circuit for a pulsating voltage according to claim 28, wherein:

The driving circuits receive communication data in a cascade connection mode:

42. The driving circuit for a pulsating voltage according to claim 41, wherein:

43. The drive circuit for a pulsating voltage according to claim 28, wherein:

44. A driving chip adapted for a pulsating voltage, comprising a driving circuit adapted for a pulsating voltage according to any of claims 28 to 43.

45. A driving circuit adapted for pulsating voltage, comprising:

a power supply input terminal and a potential reference terminal;

on the premise that a plurality of driving circuits are connected in series, a ripple voltage supplies power for the driving circuits;

the voltage detection module compares the voltage drop with a threshold voltage;

The voltage detection module includes:

the voltage division value exceeds the preset voltage, the voltage drop is represented to be higher than the threshold voltage, and the comparison result triggers the driving circuit to enter a first working mode;

the voltage division value is lower than the preset voltage, the voltage is represented to be lower than the threshold voltage, and the comparison result triggers the driving circuit to enter a second working mode;

46. The driving circuit for a pulsating voltage according to claim 45, wherein:

each of the driving circuits includes:

in each driving circuit, whether any one light emitting diode flows through the constant current of the constant current unit or not is controlled by one pulse width modulation signal corresponding to the any one light emitting diode;

47. The driving circuit for a pulsating voltage according to claim 45, wherein:

The driving circuits receive communication data in a cascade connection mode:

48. A driving circuit adapted for pulsating voltage, comprising:

a power supply input terminal and a potential reference terminal;

the voltage detection module includes:

a zener diode and a junction field effect transistor connected in series between the power input terminal and the potential reference terminal;

the zener diode is connected between the first end of the junction field effect transistor and the power input end;

the voltage of the first end or the second end exceeds a threshold voltage, the voltage drop is represented to be higher than the threshold voltage, and the comparison result triggers the driving circuit to enter a first working mode;

the voltage of the first end or the second end is lower than a threshold voltage, the voltage is represented to be lower than the threshold voltage, and the comparison result triggers the driving circuit to enter a second working mode;

49. A driving circuit adapted for pulsating voltage, comprising:

a power supply input terminal and a potential reference terminal;

the voltage detection module includes:

a zener diode and a current source connected in series between the power input end and the potential reference end;

the voltage of the anode of the Zener diode exceeds a threshold voltage, the voltage drop is represented to be higher than the threshold voltage, and the comparison result triggers the driving circuit to be in a first working mode;

the voltage of the anode of the Zener diode is lower than a threshold voltage, the voltage is represented to be lower than the threshold voltage, and the comparison result triggers the driving circuit to be in a second working mode;

50. A method for pulsating voltage, characterized by:

the method comprises the following steps:

supplying power to a plurality of driving circuits connected in series by using pulsating voltage obtained by rectification of alternating current;