CN113890558B - Hardware circuit structure compatible with LTEBand5 downlink carrier aggregation function - Google Patents
Hardware circuit structure compatible with LTEBand5 downlink carrier aggregation function Download PDFInfo
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- CN113890558B CN113890558B CN202111305877.8A CN202111305877A CN113890558B CN 113890558 B CN113890558 B CN 113890558B CN 202111305877 A CN202111305877 A CN 202111305877A CN 113890558 B CN113890558 B CN 113890558B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/0001—Arrangements for dividing the transmission path
- H04L5/0003—Two-dimensional division
- H04L5/0005—Time-frequency
- H04L5/0007—Time-frequency the frequencies being orthogonal, e.g. OFDM(A), DMT
- H04L5/001—Time-frequency the frequencies being orthogonal, e.g. OFDM(A), DMT the frequencies being arranged in component carriers
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Abstract
The invention relates to a hardware circuit structure compatible with LTEBand5 downlink carrier aggregation function, which comprises: the first chip is provided with a communication interface of LTEBand5 and communication interfaces of other frequency bands; the control switch is provided with a first control pin and a second control pin, the first control pin is electrically connected with the communication interface of the LTEBand5 of the first chip, and the control switch can be selectively communicated with the first control pin or the second control pin; when the first chip is communicated with the first control pin, signal processing of all frequency bands is carried out through the first chip; when the second control pin is communicated, a second chip with a communication interface of LTEBand5 can be accessed to the second control pin, the signal processing of LETBand5 is carried out through the second chip, and the signal processing of other frequency bands is carried out through the first chip. The circuit of the invention can be flexibly selected according to different sales markets and certification requirements, thereby achieving the purpose of reducing the hardware cost.
Description
Technical Field
The invention relates to the technical field of mobile phone communication, in particular to a hardware circuit structure compatible with an LTEBand5 downlink carrier aggregation function.
Background
At present, according to the requirements of China Unicom and China telecom operators, a mobile phone product must support a downlink carrier aggregation function (downlink carrier aggregation: frequency spectrums of two frequency bands simultaneously receive information, increase the transmission rate of data and increase the throughput, for example, the carrier aggregation is carried out by the LTEband1 and the LTEband 5) with the LTEband5 (LTE: fourth generation mobile communication technology; radio frequency band specified by band5:3gpp, transmission frequency 824-849MHz and reception frequency 869-894 MHz) under specific conditions. Therefore, when the chip is designed, if the chip wants to pass the certification test of the operator, the mobile phone product must be designed with a corresponding hardware circuit, i.e. two chips are used to support the downlink carrier aggregation function with lte band 5. However, when the same mobile phone is sold in a market where the lte band5 downlink carrier aggregation function is not needed, the cost is increased and the price advantage is reduced due to such a hardware design. If different mobile phone circuits are designed for different markets, a corresponding circuit board processing line needs to be configured, so that the increased cost is higher, and therefore, it is urgently needed to provide a circuit structure capable of solving the above problems.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a hardware circuit structure compatible with an LTEBand5 downlink carrier aggregation function, and solves the problems that two chips are designed to meet the aggregation function in the design of the existing mobile phone circuit, so that the hardware cost is increased and the price advantage is reduced in the market without the aggregation function.
The technical scheme for realizing the purpose is as follows:
the invention provides a hardware circuit structure compatible with LTEBand5 downlink carrier aggregation function, which comprises:
the first chip is provided with a communication interface of LTEBand5 and communication interfaces of other frequency bands; and
the control switch is provided with a first control pin and a second control pin, the first control pin is electrically connected with the communication interface of the LTEBand5 of the first chip, and the control switch can be selectively communicated with the first control pin or the second control pin;
when the control switch is communicated with the first control pin, signal processing of all frequency bands is carried out through the first chip;
when the control switch is communicated with the second control pin, a second chip with a communication interface of LTEBand5 can be connected to the second control pin, the second chip is used for processing signals of LETBand5, and the first chip is used for processing signals of other frequency bands.
The invention designs a control switch in a hardware circuit structure, and can select a corresponding link through the control switch to realize whether to support the selection of the aggregation function, when the aggregation function needs to be supported, the control switch is selectively communicated with a second control pin, so that a second chip can be connected at the position of the second control pin, and the two chips can realize the aggregation function, when the aggregation function does not need to be supported, the control switch is selectively connected with a first control pin, and the second chip can not be accessed at the moment, and a communication interface of LTEband5 is also arranged on the first chip, so that the first chip can realize the signal processing of all frequency bands, and one chip is saved, thereby reducing the hardware cost and increasing the price advantage.
The hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function is further improved in that the communication interface of the LTEBand5 of the first chip comprises a first LTEBand5 transmitting port, a first LTEBand5 main set receiving port and a first LTEBand5 diversity receiving port;
the control switches are three and are respectively electrically connected with the first LTEBand5 transmitting port, the first LTEBand5 main set receiving port and the first LTEBand5 diversity receiving port.
The hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function is further improved in that when a second chip is connected, the second control pin is electrically connected with a communication interface of LETBand5 of the second chip.
The hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function is further improved in that a communication interface of the LTEBand5 of the second chip comprises a second LTEBand5 transmitting port, a second LTEBand5 main set receiving port and a second LTEBand5 diversity receiving port;
and three control switches are respectively electrically connected with the second LTEBand5 transmitting port, the second LTEBand5 main set receiving port and the second LTEBand5 diversity receiving port.
The hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function is further improved in that the second chip is connected with the first chip.
The hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function is further improved in that communication interfaces of other frequency bands of the first chip comprise other frequency band transmitting ports, other frequency band main set receiving ports and other frequency band diversity receiving ports.
The hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function is further improved in that the control switch is a single-pole double-throw switch.
Drawings
Fig. 1 is a schematic diagram of a hardware circuit structure compatible with the lte band5 downlink carrier aggregation function according to the present invention.
Fig. 2 is a circuit structure diagram of a hardware circuit structure supporting an aggregation function, which is compatible with the lte band5 downlink carrier aggregation function.
Fig. 3 is a circuit structure diagram of a hardware circuit structure compatible with the lte band5 downlink carrier aggregation function, which does not support the aggregation function.
Fig. 4 is a diagram illustrating a fixed hardware circuit supporting an aggregation function in the prior art.
Detailed Description
The invention is further described with reference to the following figures and specific examples.
Referring to fig. 1, the invention provides a hardware circuit structure compatible with the lte band5 downlink carrier aggregation function, which is used to solve the problem that the hardware cost is increased because a circuit structure cannot be flexibly changed in the existing fixed hardware circuit structure design so that two chips are still arranged on a circuit board that does not need to support the downlink carrier aggregation function. The hardware circuit structure of the invention reserves LETBand5 transmitting and receiving links on two chips, uses a control switch to select the corresponding link, sets two chips on the circuit aiming at the condition that the downlink carrier aggregation function needs to be supported, and can save one chip and realize the signal processing of all frequency bands aiming at the condition that the downlink carrier aggregation function does not need to be supported, thereby enabling the circuit to flexibly select according to different sales markets and authentication requirements and achieving the purpose of reducing the hardware cost. The following describes a hardware circuit structure compatible with the lte band5 downlink carrier aggregation function according to the present invention with reference to the accompanying drawings.
Referring to fig. 1, a schematic diagram of a hardware circuit structure compatible with the lte band5 downlink carrier aggregation function according to the present invention is shown. The following describes a hardware circuit structure compatible with the lte band5 downlink carrier aggregation function according to the present invention with reference to fig. 1.
As shown in fig. 1, the hardware circuit structure compatible with the LTEBand5 downlink carrier aggregation function of the present invention includes a first chip 21 and a control switch 22, wherein the first chip 21 has a communication interface 212 of LTEBand5 and a communication interface 211 of other frequency bands for implementing signal processing of the corresponding frequency band; the control switch 22 has a first control pin 221 and a second control pin 222, the control switch 22 can be selectively communicated with the first control pin 221 or the second control pin 222, the first control pin 221 is electrically connected with the communication interface 212 of the LTEBand5 of the first chip 21, when the control switch 22 is electrically connected with the first control pin 221, the first chip 21 performs signal processing of all frequency bands, at this time, the second chip 23 may not be accessed, the specific circuit structure is shown in fig. 3, the first chip 21 can perform signal processing of the LTEBand5 frequency band and signal processing of other frequency bands except the LTEBand5 frequency band, after the second chip 23 is omitted, the hardware cost can be reduced, and the circuit at this time does not support the downlink carrier aggregation function. When the control switch 22 is electrically connected to the second control pin 222, a second chip 23 having a communication interface 231 of LTEBand5 may be connected to the second control pin 222, and a specific circuit structure may be as shown in fig. 2, where the circuit supports a downlink carrier aggregation function, performs signal processing of LTEBand5 through the second chip 23, and performs signal processing of other frequency bands through the first chip 21.
The invention can flexibly select whether to mount the second chip or not by controlling the link selection of the switch, can save the setting of the second chip aiming at the condition of not supporting the downlink carrier aggregation function, thereby reducing the hardware cost, can meet the normal use requirement of the circuit under the condition of not mounting the second chip, does not need to change the circuit board processing production line, and only needs to save the process step of mounting the second chip. And when the downlink carrier aggregation function needs to be supported, mounting a second chip and electrically connecting the second chip with a second control pin of the control switch.
As shown in fig. 4, a conventional fixed hardware circuit structure is shown, which includes a first chip 11 and a second chip 12, wherein the first chip 11 is provided with a first transmitting port 111, a first main set receiving port 112 and a first diversity receiving port 113, the second chip is provided with a second transmitting port 121, a second main set receiving port 122 and a second diversity receiving port 123, the first transmitting port 111, the first main set receiving port 112 and the first diversity receiving port 113 are used to implement signal processing of other frequency bands except for the LTEBand5 frequency band, and the second transmitting port 121, the second main set receiving port 122 and the second diversity receiving port 123 are used to implement signal processing of the LTEBand5 frequency band. The DRX _ CA on the first chip 11 is connected to the DRX _ CA on the second chip 12, the PRX _ CA on the first chip 11 is connected to the PRX _ CA on the second chip 12, wherein DRX (diversity receive) is a diversity receive part, PRX (primary receive) is a receive part of the main set, CA (carrier aggregation) represents carrier aggregation, and the connection between the first chip 11 and the second chip 12 is used for implementing the carrier aggregation function.
The requirement of the downlink aggregation carrier function is needed in the market of china, but for the markets of other countries, the requirement does not need to support the aggregation carrier function, and when manufacturers produce circuit boards, if adaptive circuit boards are developed and designed according to the market requirements of each country, multiple types of production line equipment need to be configured, so that a large amount of cost needs to be invested, and the cost is too high compared with the cost of adding one chip.
The invention provides a flexible and selectable circuit design for solving the problem of hardware waste caused by the fact that two fixed chips are arranged in the existing fixed hardware circuit structure, so that a second chip can be selectively mounted according to actual needs, and the problem of hardware waste caused by the fact that the second chip needs to be mounted is solved.
In one embodiment of the present invention, as shown in fig. 1, the communication interface 212 of the LTEBand5 of the first chip 21 includes a first LTEBand5 transmitting port 2121, a first LTEBand5 main set receiving port 2122, and a first LTEBand5 diversity receiving port 2123;
the control switch 22 has three control ports, which are electrically connected to the first LTEBand5 transmitting port 2121, the first LTEBand5 main set receiving port 2122 and the first LTEBand5 diversity receiving port 2123.
Specifically, the first LTEBand5 transmit port 2121 is connected to the first control pin 221 of one control switch 22, the first LTEBand5 main set receive port 2122 is connected to the first control pin 221 of another control switch 22, and the first LTEBand5 diversity receive port 2123 is connected to the first control pin 221 of the last control switch 22. When each control switch 22 is connected to the first control pin 221, the communication interface 212 of the first t-band 5 of the first chip 21 can process t-band 5 signals.
In one embodiment of the present invention, as shown in fig. 2, when the second chip 23 is connected, the second control pin 222 is electrically connected to the communication interface 231 of the LETBand5 of the second chip 23.
Further, the communication interface 231 of the lte band5 of the second chip 23 includes a second lte band5 transmission port 2311, a second lte band5 main set receiving port 2312 and a second lte band5 diversity receiving port 2313;
the control switch 22 has three switches, which are electrically connected to the second LTEBand5 transmission port 2311, the second LTEBand5 main set reception port 2312 and the second LTEBand5 diversity reception port 2313, respectively.
Specifically, the second LTEBand5 transmitting port 2311 is connected to the second control pin 222 of one control switch, the second LTEBand5 primary set receiving port 2312 is connected to the second control pin 222 of another control switch, the second LTEBand5 diversity receiving port 2313 is connected to the second control pin 222 of the last control switch, and when each control switch 22 is connected to the second control pin 222, the communication interface 231 of the second LTEBand5 of the second chip 23 can process the LTEBand5 signal.
The second LTEBand5 transmitting port 2311 and the first LTEBand5 transmitting port 2121 are connected to two pins of a control switch 22, the second LTEBand5 main set receiving port 2312 and the first LTEBand5 main set receiving port 2122 are connected to two pins of a control switch 22, and the second LTEBand5 diversity receiving port 2313 and the first LTEBand5 diversity receiving port 2123 are connected to two pins of a control switch 22. Which port is connected, i.e. which chip is connected in the circuit, is selected by the control switch 22.
When the second chip 23 is provided, the second chip 23 is connected to the first chip 21. Specifically, the DRX _ CA on the second chip 23 is connected to the DRX _ CA on the first chip 21, and the PRX _ CA on the second chip 23 is connected to the PRX _ CA on the first chip 21.
In an embodiment of the present invention, as shown in fig. 1, the communication interface 211 of the other frequency band of the first chip 21 includes a transmission port 2111 of the other frequency band, a main set receiving port 2112 of the other frequency band, and a diversity receiving port 2113 of the other frequency band.
On the circuit board, the communication interfaces 211 of other frequency bands of the first chip 21 and the input ends of the control switches 22 are connected with the communication module through wires to realize the transceiving of signals.
In one embodiment of the present invention, the control switch 22 is a single pole double throw switch. The link selection of the control switch 22 can be achieved by changing software parameters, preferably, the single-pole double-throw switch is an SP2T switch.
The first chip and the second chip of the invention adopt WTR2965 type chips of the general company.
The circuit structure of the invention has compatible functions, can realize flexible circuit style selection by controlling the switch, and the structure in specific application is shown in fig. 2 and fig. 3, the circuit structure shown in fig. 2 comprises two chips which can support the downlink carrier aggregation function, the circuit structure shown in fig. 3 comprises one chip which does not support the downlink carrier aggregation function, so that the circuit can be flexibly selected according to specific market requirements and authentication requirements, and the hardware cost can be reduced and the price advantage of the product can be improved under the condition that the downlink carrier aggregation function does not need to be supported. The circuit structure design of the invention can be processed and produced on the same production line, and the difference is only whether to carry out the mounting of the second chip. The circuit structure of the invention well solves the problem that the circuit structure can not be flexibly changed in the existing fixed hardware circuit structure design, so that two chips are still arranged on a circuit board which does not need to support the downlink carrier aggregation function, thereby increasing the hardware cost.
While the present invention has been described in detail and with reference to the embodiments thereof as illustrated in the accompanying drawings, it will be apparent to one skilled in the art that various changes and modifications can be made therein. Therefore, certain details of the embodiments are not to be interpreted as limiting, and the scope of the invention is to be determined by the appended claims.
Claims (6)
1. A hardware circuit structure compatible with LTEBand5 downlink carrier aggregation function is characterized by comprising:
the first chip is provided with a communication interface of LTEBand5 and a communication interface of other frequency bands; and
the control switch is provided with a first control pin and a second control pin, the first control pin is electrically connected with the communication interface of the LTEBand5 of the first chip, and the control switch can be selectively communicated with the first control pin or the second control pin;
when the control switch is communicated with the first control pin, signal processing of all frequency bands is carried out through the first chip;
when the control switch is communicated with the second control pin, a second chip with a communication interface of LTEBand5 can be accessed to the second control pin, the second chip is used for processing signals of LETBand5, and the first chip is used for processing signals of other frequency bands;
the communication interface of the LTEBand5 of the first chip comprises a first LTEBand5 transmitting port, a first LTEBand5 main set receiving port and a first LTEBand5 diversity receiving port;
the control switches are three and are respectively electrically connected with the first LTEBand5 transmitting port, the first LTEBand5 main set receiving port and the first LTEBand5 diversity receiving port.
2. The hardware circuit structure of claim 1, wherein when a second chip is connected, the second control pin is electrically connected to a communication interface of LETBand5 of the second chip.
3. The hardware circuit structure of claim 2, wherein the communication interface of the lte band5 of the second chip comprises a second lte band5 transmission port, a second lte band5 main set receiving port, and a second lte band5 diversity receiving port;
and three control switches are respectively electrically connected with the second LTEBand5 transmitting port, the second LTEBand5 main set receiving port and the second LTEBand5 diversity receiving port.
4. The hardware circuit structure of claim 2, wherein the second chip is connected to the first chip.
5. The hardware circuit structure of claim 1, wherein the communication interfaces of other bands of the first chip comprise other-band transmitting ports, other-band main set receiving ports, and other-band diversity receiving ports.
6. The hardware circuit architecture of claim 1 compatible with LTEBand5 downlink carrier aggregation functionality, wherein the control switch is a single pole double throw switch.
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