CN113875304A

CN113875304A - Reference signal transmission method and device

Info

Publication number: CN113875304A
Application number: CN201980096847.5A
Authority: CN
Inventors: 吴霁; 张佳胤; 黄甦
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-08-16
Filing date: 2019-08-16
Publication date: 2021-12-31
Also published as: WO2021030983A1

Abstract

The application provides a reference signal transmission method and device, which can solve the problem of insufficient DMRS transmission resources, thereby improving the reliability of DMRS transmission, and can be applied to 4G or 5G communication systems, such as LTE, NR and the like. The method comprises the following steps: and the network equipment transmits the demodulation reference signal to the terminal equipment on the first symbol. Wherein, the first symbol is determined by the symbols respectively occupied by the synchronous signal block, the system message and the data channel. The first symbol may be a symbol not occupied by the synchronization signal block and the system message, among symbols occupied by the data channel.

Description

Reference signal transmission method and device

Technical Field

The present application relates to the field of communications, and in particular, to a method and an apparatus for transmitting a reference signal.

Background

The existing New Radio (NR) protocol specifies: among symbols occupied by a Physical Downlink Shared Channel (PDSCH), a demodulation reference signal (DMRS) can occupy only 1 symbol (symbol), such as the 3 rd or 4 th symbol (i.e., symbol 2 or symbol 3), or can occupy only 1 symbol (symbol), or can occupy only 5 symbols, such as PDSCH-5 symbols, after the symbols occupied by the remaining system information control resource set (RMSI CORESET), i.e., Type 0(Type 0) physical downlink control channel (PDCCH, hereinafter referred to as CORESET), and can occupy the same symbols as the SSB and CORESET, among symbols occupied by a Synchronization Signal Block (SSB), wherein the CORESET needs to occupy the most advanced 1 or 2 symbols, such as symbol 0, or symbol 0 and symbol 0, and the SSB-5 symbols, such as PDSCH-5 symbols, and CORESET only needs to occupy symbol 0, DMRS may be, and only may occupy symbol 1.

However, in case that, in the above example, CORESET needs to occupy the first 2 symbols, i.e., symbol 0 and symbol 1, all symbols that DMRS may occupy have been occupied by CORESET and SSB, resulting in that DMRS cannot be normally transmitted.

Disclosure of Invention

The embodiment of the application provides a reference signal transmission method and device, which can solve the problem of insufficient DMRS transmission resources, so that the reliability of DMRS transmission is improved.

In order to achieve the purpose, the technical scheme is as follows:

in a first aspect, a method for transmitting a reference signal is provided. The method comprises the following steps: and the network equipment transmits the demodulation reference signal to the terminal equipment on the first symbol. Wherein, the first symbol is determined by the symbols respectively occupied by the synchronous signal block, the system message and the data channel.

According to the transmission method of the reference signal, the network equipment can determine the first symbol according to the symbols respectively occupied by the synchronization signal block, the system message and the data channel, and send the DMRS to the terminal equipment on the first symbol, so that the problem that the DMRS cannot be transmitted because all the symbols originally occupied by the DMRS are occupied by the synchronization signal block and the system message in the symbols occupied by the data channel can be solved, and the reliability of transmitting the DMRS can be improved.

Specifically, the first symbol may be a symbol not occupied by the synchronization signal block and the system message among symbols occupied by the data channel.

In one possible design approach, the number of first symbols may be one. Accordingly, the one first symbol is located before or after the symbol occupied by the synchronization signal block in the time domain.

Further, the one first symbol may be: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain. Or, optionally, the one first symbol may be: the first symbol after the symbol occupied by the synchronization signal block in the time domain.

In another possible design approach, the number of first symbols is two. Accordingly, one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain, and the other is located after the symbol occupied by the synchronization signal block in the time domain. Or, optionally, both the two first symbols are located before the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive. Or, the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.

Further, the two first symbols are located before the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are discontinuous, which may include: the two first symbols may be: the first symbol and the last symbol are located before the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.

Further, the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, which may include: the two first symbols may be: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.

In a second aspect, a method for transmitting a reference signal is provided. The method comprises the following steps: the terminal device receives the synchronization signal block and parses the system message to determine a first symbol. The terminal equipment receives a demodulation reference signal from the network equipment on the first symbol.

The technical effect of the method for transmitting a reference signal according to the second aspect may refer to the technical effect of the method for transmitting a reference signal according to the first aspect, and is not described herein again.

In a third aspect, a method for transmitting a reference signal is provided. The method comprises the following steps: and the network equipment transmits the demodulation reference signal to the terminal equipment on the first symbol. The first symbol is a part of symbols occupied by the synchronization signal block, and the synchronization signal block and the data channel occupy the same symbols.

According to the reference signal transmission method provided by the embodiment of the application, the network equipment can determine part of symbols occupied by the synchronous signal block as the first symbols under the condition that the data channel and the synchronous signal block occupy the same symbols, and send the demodulation reference signal and the synchronous signal block on the first symbols in a frequency division multiplexing mode, so that the problem that the symbols occupied by the data channel are all occupied by the synchronous signal block, and therefore, no complete symbol capable of being used for transmitting the DMRS is available, and the DMRS cannot be transmitted is solved, and the reliability of DMRS transmission can be improved.

In one possible design approach, the number of first symbols may be one. Accordingly, the one first symbol may be any one of symbols occupied by the synchronization signal block. Wherein the symbols occupied by the synchronization signal block are typically 4 consecutive symbols.

Further, the one first symbol may be: the synchronization signal block occupies the second symbol or the third symbol of the symbols.

In another possible design approach, the number of first symbols is two. Accordingly, the two first symbols may be: the synchronization signal block occupies any two discontinuous symbols, such as a first symbol and a third symbol, or a second symbol and a fourth symbol, or a first symbol and a fourth symbol.

Further, the two first symbols may be: the synchronization signal block occupies the first and last of the symbols.

In one possible design method, the demodulation reference signal and the synchronization signal block may jointly occupy the first symbol in a frequency division multiplexing manner. Wherein, the synchronization signal block usually occupies a part of RBs near the carrier frequency, the demodulation reference signal may occupy other subcarriers besides the subcarriers occupied by the synchronization signal block, such as subcarriers with subcarrier indexes larger than and/or smaller than the subcarrier indexes occupied by the synchronization signal block.

In a fourth aspect, a method for transmitting a reference signal is provided. The method comprises the following steps: the terminal device receives the synchronization signal block and parses the system message to determine a first symbol. The terminal equipment receives a demodulation reference signal from the network equipment on the first symbol. The first symbol is a part of symbols occupied by the synchronization signal block, and the synchronization signal block and the data channel occupy the same symbols.

The technical effect of the method for transmitting a reference signal according to the fourth aspect may refer to the technical effect of the method for transmitting a reference signal according to the second aspect, and is not described herein again.

In a fifth aspect, a communications apparatus is provided. The communication device includes: a processing module and a transceiver module. The processing module is used for determining a first symbol according to the respective occupied symbols of the synchronization signal block, the system message and the data channel. And the transceiver module is used for sending the demodulation reference signal to the terminal equipment on the first symbol.

In one possible design, the number of first symbols may be one. Accordingly, the one first symbol is located before or after the symbol occupied by the synchronization signal block in the time domain.

In another possible design, the number of first symbols is two. Accordingly, one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain, and the other is located after the symbol occupied by the synchronization signal block in the time domain. Or, optionally, both the two first symbols are located before the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive. Or, the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.

Optionally, the communication device according to the fifth aspect may further include a storage module, which stores the program or the instructions. The program or instructions, when executed by the processing module, cause the communication apparatus of the fifth aspect to perform the functions of the network device of the first aspect.

The communication device according to the fifth aspect may be a network device, or may be a chip or a chip system provided in the network device, which is not limited in this application.

The technical effect of the communication apparatus according to the fifth aspect may refer to the technical effect of the method for transmitting a reference signal according to the first aspect, and is not described herein again.

In a sixth aspect, a communications apparatus is provided. The communication device includes: a processing module and a transceiver module. The receiving and sending module is used for receiving the synchronous signal block and the system message. And the processing module is used for determining a first symbol according to the synchronous signal block and the system message. The transceiver module is further configured to receive a demodulation reference signal from the network device on the first symbol.

Optionally, the communication apparatus according to the sixth aspect may further include a storage module, which stores the program or the instructions. The processing means, when executing the program or instructions, may cause the communication apparatus of the sixth aspect to perform the functions of the terminal device of the second aspect.

The communication device according to the sixth aspect may be a terminal device, or may be a chip or a chip system provided in the terminal device, which is not limited in this application.

The technical effect of the communication apparatus according to the sixth aspect may refer to the technical effect of the method for transmitting a reference signal according to the first aspect, and is not described herein again.

In a seventh aspect, a communications apparatus is provided. The communication device includes: a processing module and a transceiver module. The processing module is used for determining part of the symbols occupied by the synchronization signal block as first symbols. Wherein the synchronization signal block and the data channel occupy the same symbol. And the transceiver module is used for sending the demodulation reference signal to the terminal equipment on the first symbol.

In one possible design, the number of first symbols may be one. Accordingly, the one first symbol may be any one of symbols occupied by the synchronization signal block. Wherein the symbols occupied by the synchronization signal block are typically 4 consecutive symbols.

In another possible design, the number of first symbols is two. Accordingly, the two first symbols may be: the synchronization signal block occupies any two discontinuous symbols, such as a first symbol and a third symbol, or a second symbol and a fourth symbol, or a first symbol and a fourth symbol.

In one possible design, the demodulation reference signal and the synchronization signal block may jointly occupy the first symbol in a frequency division multiplexing manner. Wherein, the synchronization signal block usually occupies a part of RBs near the carrier frequency, the demodulation reference signal may occupy other subcarriers besides the subcarriers occupied by the synchronization signal block, such as subcarriers with subcarrier indexes larger than and/or smaller than the subcarrier indexes occupied by the synchronization signal block.

Optionally, the communication device according to the seventh aspect may further include a storage module, which stores the program or the instructions. The program or instructions, when executed by the processing module, enable the communication apparatus of the seventh aspect to perform the functions of the network device of the third aspect.

It should be noted that the communication device in the seventh aspect may be a network device, or may be a chip or a chip system provided in the network device, which is not limited in this application.

The technical effect of the communication apparatus according to the seventh aspect may refer to the technical effect of the transmission method of the reference signal according to the third aspect, and is not described herein again.

In an eighth aspect, a communication device is provided. The communication device includes: a processing module and a transceiver module. The receiving and sending module is used for receiving the synchronous signal block and the system message. And the processing module is used for determining a first symbol according to the synchronous signal block and the system message. The first symbol is a part of symbols occupied by the synchronization signal block, and the synchronization signal block and the data channel occupy the same symbols. The transceiver module is further configured to receive a demodulation reference signal from the network device on the first symbol.

Optionally, the communication device according to the eighth aspect may further include a storage module, which stores the program or the instructions. The processing module, when executing the program or the instructions, enables the communication apparatus of the eighth aspect to perform the functions of the terminal device of the fourth aspect.

The communication device according to the eighth aspect may be a terminal device, or may be a chip or a chip system provided in the terminal device, which is not limited in this application.

The technical effect of the communication apparatus according to the eighth aspect may refer to the technical effect of the method for transmitting a reference signal according to the third aspect, and is not described herein again.

In a ninth aspect, a communication device is provided. The communication device includes: a processor and a transceiver. The processor is configured to determine a first symbol according to respective occupied symbols of the synchronization signal block, the system message, and the data channel. And the transceiver is used for transmitting the demodulation reference signal to the terminal equipment on the first symbol.

Optionally, the communication apparatus according to the ninth aspect may further comprise a memory, which stores the program or the instructions. The program or instructions, when executed by a processor, cause the communication apparatus of the ninth aspect to perform the functions of the network device of the first aspect.

It should be noted that the communication apparatus according to the ninth aspect may be a network device, or may be a chip or a chip system disposed in the network device, which is not limited in this application.

Technical effects of the communication apparatus according to the ninth aspect may refer to the technical effects of the method for transmitting a reference signal according to the first aspect, and are not described herein again.

In a tenth aspect, a communication device is provided. The communication device includes: a processor and a transceiver. The transceiver is used for receiving the synchronization signal block and the system message. A processor for determining a first symbol based on the synchronization signal block and the system message. The transceiver is further configured to receive a demodulation reference signal from the network device on the first symbol.

Optionally, the communication apparatus according to the tenth aspect may further include a memory storing the program or the instructions. The program or instructions, when executed by a processor, cause the communication apparatus of the tenth aspect to perform the functions of the terminal device of the second aspect.

The communication device according to the tenth aspect may be a terminal device, or may be a chip or a chip system provided in the terminal device, which is not limited in this application.

The technical effect of the communication apparatus according to the tenth aspect may refer to the technical effect of the method for transmitting a reference signal according to the first aspect, and is not described herein again.

In an eleventh aspect, a communication device is provided. The communication device includes: a processor and a transceiver. The processor is configured to determine a part of symbols occupied by the synchronization signal block as first symbols. Wherein the synchronization signal block and the data channel occupy the same symbol. And the transceiver is used for transmitting the demodulation reference signal to the terminal equipment on the first symbol.

Optionally, the communication device of the eleventh aspect may further comprise a memory storing the program or the instructions. The program or instructions, when executed by a processor, cause the communication apparatus of the eleventh aspect to perform the functions of the network device of the third aspect.

The communication device according to the eleventh aspect may be a network device, or may be a chip or a chip system provided in the network device, and the present application is not limited thereto.

Technical effects of the communication apparatus according to the eleventh aspect may refer to technical effects of the method for transmitting a reference signal according to the third aspect, and are not described herein again.

In a twelfth aspect, a communication device is provided. The communication device includes: a processor and a transceiver. The transceiver is used for receiving the synchronization signal block and the system message. A processor for determining a first symbol based on the synchronization signal block and the system message. The first symbol is a part of symbols occupied by the synchronization signal block, and the synchronization signal block and the data channel occupy the same symbols. The transceiver is further configured to receive a demodulation reference signal from the network device on the first symbol.

Optionally, the communication device according to the twelfth aspect may further include a memory, which stores the program or the instructions. The program or instructions, when executed by a processor, cause the communication apparatus of the twelfth aspect to perform the functions of the terminal device of the fourth aspect.

The communication device according to the twelfth aspect may be a terminal device, or may be a chip or a chip system provided in the terminal device, which is not limited in this application.

For technical effects of the communication apparatus according to the twelfth aspect, reference may be made to the technical effects of the method for transmitting a reference signal according to the third aspect, and details are not repeated here.

In a thirteenth aspect, a chip system is provided, where the chip system includes a processor and an input/output port, where the processor is configured to implement the processing functions of the first to fourth aspects, and the input/output port is configured to implement the transceiving functions of the first to fourth aspects.

In one possible design, the system-on-chip further includes a memory for storing program instructions and data implementing the functions referred to in the first to fourth aspects.

The chip system may be constituted by a chip, or may include a chip and other discrete devices.

In a fourteenth aspect, a communication system is provided. The system comprises network equipment and terminal equipment.

In a fifteenth aspect, a computer-readable storage medium is provided, comprising: the computer readable storage medium having stored therein computer instructions; when the computer instructions are run on a computer, the computer is caused to execute the method for transmitting the reference signal according to any one of the possible implementation manners of the first aspect to the fourth aspect.

In a sixteenth aspect, a computer program product containing instructions is provided, which includes a computer program or instructions, when the computer program or instructions runs on a computer, causes the computer to execute the method for transmitting a reference signal according to any one of the possible implementations of the first to fourth aspects.

Drawings

Fig. 1 is a schematic architecture diagram of a communication system according to an embodiment of the present application;

fig. 2 is a first schematic structural diagram of a communication device according to an embodiment of the present disclosure;

fig. 3 is a first flowchart illustrating a method for transmitting a reference signal according to an embodiment of the present disclosure;

fig. 4 is a schematic diagram of a first scenario of reference signal transmission provided in an embodiment of the present application;

fig. 5 is a first example of DMRS configuration in a transmission scenario of a reference signal according to an embodiment of the present application;

fig. 6 is a second example of DMRS configuration in a first scenario of reference signal transmission provided in the embodiment of the present application;

fig. 7 is a third example of DMRS configuration under a transmission scenario of a reference signal according to an embodiment of the present application;

fig. 8 is a schematic diagram of a second scenario of reference signal transmission provided in the embodiment of the present application;

fig. 9 is an example of DMRS configuration in a second transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 10 is a schematic diagram of a third scenario of reference signal transmission according to an embodiment of the present application;

fig. 11 is a first example of DMRS configuration in a third transmission scenario of a reference signal according to an embodiment of the present application;

fig. 12 is a second example of DMRS configuration in a third transmission scenario of a reference signal according to an embodiment of the present application;

fig. 13 is a third example of DMRS configuration in a third transmission scenario of a reference signal according to an embodiment of the present application;

fig. 14 is a schematic diagram of a transmission scenario four of a reference signal provided in the embodiment of the present application;

fig. 15 is an example of DMRS configuration in a transmission scenario four of a reference signal provided in an embodiment of the present application;

fig. 16 is a schematic diagram of a fifth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 17 is a first example of DMRS configuration in a fifth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 18 is a second example of DMRS configuration in a fifth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 19 is a third example of DMRS configuration in a fifth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 20 is a fourth example of DMRS configuration in a fifth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 21 is a fifth example of DMRS configuration in a fifth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 22 is a schematic diagram of a sixth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 23 is a first example of DMRS configuration in a sixth scenario of reference signal transmission provided in an embodiment of the present application;

fig. 24 is a second example of DMRS configuration in a sixth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 25 is a schematic diagram of a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 26 is a first example of DMRS configuration in a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 27 is a second example of DMRS configuration in a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 28 is a third example of DMRS configuration in a transmission scenario seven of a reference signal according to an embodiment of the present application;

fig. 29 is a fourth example of DMRS configuration in a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 30 is a fifth example of DMRS configuration in a transmission scenario seven of a reference signal according to an embodiment of the present application;

fig. 31 is a sixth example of DMRS configuration in a transmission scenario seven of a reference signal according to an embodiment of the present application;

fig. 32 is a seventh example of DMRS configuration in a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 33 is an example eight of DMRS configuration in a transmission scenario seven of a reference signal according to an embodiment of the present application;

fig. 34 is a ninth example of DMRS configuration in a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 35 is a tenth exemplary DMRS configuration in a seventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 36 is an eleventh example of DMRS configuration in a transmission scenario seven of a reference signal according to an embodiment of the present application;

fig. 37 is a twelfth example of DMRS configuration in a transmission scenario seven of a reference signal according to an embodiment of the present application;

fig. 38 is a schematic diagram of a transmission scenario eight of a reference signal according to an embodiment of the present application;

fig. 39 is a first example of DMRS configuration in a transmission scenario eight of a reference signal according to an embodiment of the present application;

fig. 40 is a second example of DMRS configuration in a transmission scenario eight of a reference signal according to an embodiment of the present application;

fig. 41 is a third example of DMRS configuration in a transmission scenario eight of a reference signal according to an embodiment of the present application;

fig. 42 is a second flowchart illustrating a method for transmitting a reference signal according to an embodiment of the present application;

fig. 43 is a schematic diagram of a transmission scenario nine of a reference signal according to an embodiment of the present application;

fig. 44 is a first example of DMRS configuration in a ninth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 45 is a second example of DMRS configuration in a ninth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 46 is a third example of DMRS configuration in a ninth transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 47 is a fourth example of DMRS configuration in a ninth transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 48 is a fifth example of DMRS configuration in a ninth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 49 is a sixth example of DMRS configuration in a ninth transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 50 is a seventh example of DMRS configuration in a transmission scenario nine of a reference signal provided in an embodiment of the present application;

fig. 51 is a schematic diagram of a transmission scenario ten of a reference signal provided in an embodiment of the present application;

fig. 52 is a first example of DMRS configuration in a tenth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 53 is a second example of DMRS configuration in a tenth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 54 is a third example of DMRS configuration in a tenth transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 55 is a fourth example of DMRS configuration in a tenth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 56 is a fifth example of DMRS configuration in a tenth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 57 is a sixth example of DMRS configuration in a tenth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 58 is a seventh example of DMRS configuration in a tenth transmission scenario of a reference signal according to an embodiment of the present application;

fig. 59 is a schematic diagram of an eleventh transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 60 is a first example of DMRS configuration in an eleventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 61 is a second example of DMRS configuration in an eleventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 62 is a third example of DMRS configuration in an eleventh transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 63 is a fourth example of DMRS configuration in an eleventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 64 is a fifth example of DMRS configuration in an eleventh transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 65 is a sixth example of DMRS configuration in an eleventh transmission scenario of a reference signal according to an embodiment of the present application;

fig. 66 is a seventh example of DMRS configuration in an eleventh transmission scenario of a reference signal provided in an embodiment of the present application;

fig. 67 is a schematic structural diagram of a communication device according to an embodiment of the present application.

Detailed Description

The technical solution in the present application will be described below with reference to the accompanying drawings.

The technical solution of the embodiment of the present application may be applied to various unlicensed (U) communication systems, such as an NR-U system, a long term evolution-unlicensed (LTE-U) system, a wireless fidelity-unlicensed (WiFi-U) system, a vehicle-to-arbitrary object unlicensed (V2X-U) system, and the like, and future unlicensed systems, such as a 6th generation (6G) unlicensed system, and the like.

This application is intended to present various aspects, embodiments or features around a system that may include a number of devices, components, modules, and the like. It is to be understood and appreciated that the various systems may include additional devices, components, modules, etc. and/or may not include all of the devices, components, modules etc. discussed in connection with the figures. Furthermore, a combination of these schemes may also be used.

In addition, in the embodiments of the present application, words such as "exemplarily", "for example", etc. are used for indicating as examples, illustrations or explanations. Any embodiment or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the term using examples is intended to present concepts in a concrete fashion.

In the embodiment of the present invention, "information", "signal", "message", "channel", "signaling" may be used in combination, and it should be noted that the meaning to be expressed is consistent when the difference is not emphasized. "of", "corresponding", and "corresponding" may sometimes be used in combination, it being noted that the intended meaning is consistent when no distinction is made.

In the examples of the present application, the subscripts are sometimes as W₁It may be mistaken for a non-subscripted form such as W1, whose intended meaning is consistent when the distinction is de-emphasized.

The network architecture and the service scenario described in the embodiment of the present application are for more clearly illustrating the technical solution of the embodiment of the present application, and do not form a limitation on the technical solution provided in the embodiment of the present application, and as a person of ordinary skill in the art knows that along with the evolution of the network architecture and the appearance of a new service scenario, the technical solution provided in the embodiment of the present application is also applicable to similar technical problems.

In the embodiment of the present application, a part of scenarios will be described by taking a scenario in the communication system shown in fig. 1 as an example. It should be noted that the solution in the embodiment of the present application may also be applied to other mobile communication systems, and the corresponding names may also be replaced with names of corresponding functions in other mobile communication systems.

For the convenience of understanding the embodiments of the present application, a communication system applicable to the embodiments of the present application will be first described in detail by taking the communication system shown in fig. 1 as an example. Fig. 1 shows a schematic diagram of a communication system suitable for a transmission method of a reference signal according to an embodiment of the present application. Fig. 1 is a schematic structural diagram of a communication system to which the reference signal transmission method according to the embodiment of the present disclosure is applied. As shown in fig. 1, the communication system includes a network device and a terminal device. The network device is configured to send a demodulation reference signal to the terminal device on the first symbol. Wherein, the first symbol is determined by the symbols respectively occupied by the synchronous signal block, the system message and the data channel. And the terminal equipment is used for receiving the synchronization signal block and analyzing the system message to determine a first symbol, and receiving the demodulation reference signal from the network equipment on the first symbol.

The network device is a device located on the network side of the communication system and having a wireless transceiving function or a chip system that can be installed on the device. The network devices include, but are not limited to: an Access Point (AP) in a wireless fidelity (WiFi) system, such as a home gateway, a router, a server, a switch, a bridge, etc., an evolved Node B (eNB), a Radio Network Controller (RNC), a Node B (NB), a Base Station Controller (BSC), a Base Transceiver Station (BTS), a home base station (e.g., home evolved Node B, or home Node B, HNB), a Base Band Unit (BBU), a wireless relay Node, a wireless backhaul Node, a transmission point (transmission and reception point, TRP or transmission point, etc.), and may be 5G, such as a new radio interface (NR) system, a TP, a Transmission Point (TP), a group of antennas including one or more antenna panels (antenna panels) in the system, alternatively, the network node may also be a network node forming a gNB or a transmission point, such as a baseband unit (BBU), or a Distributed Unit (DU), a roadside unit (RSU) having a base station function, or the like.

The terminal device is a terminal which is accessed to the communication system and has a wireless transceiving function or a chip system which can be arranged on the terminal. The terminal device can also be called a user equipment, access terminal, subscriber unit, subscriber station, mobile station, remote terminal, mobile device, user terminal, wireless communication device, user agent, or user device. The terminal device in the embodiment of the present application may be a mobile phone (mobile phone), a tablet computer (Pad), a computer with a wireless transceiving function, a Virtual Reality (VR) terminal device, an Augmented Reality (AR) terminal device, a wireless terminal in industrial control (industrial control), a wireless terminal in self-driving (self-driving), a wireless terminal in remote medical (remote medical), a wireless terminal in smart grid (smart grid), a wireless terminal in transportation safety (transportation safety), a wireless terminal in smart city (smart city), a wireless terminal in smart home (smart home), a vehicle-mounted terminal, an RSU with a terminal function, and the like. The terminal device of the present application may also be an on-board module, an on-board component, an on-board chip, or an on-board unit that is built in the vehicle as one or more components or units, and the vehicle may implement the transmission method of the reference signal provided by the present application through the built-in on-board module, the built-in on-board module, the built-in chip, or the built-in unit.

It should be noted that the transmission method of the reference signal provided in the embodiment of the present application may be used between any two nodes shown in fig. 1, such as between terminal devices, between network devices, and between a terminal device and a network device. For communication between terminal devices, if a network device exists, the communication is a scene with network coverage; if no network device exists, the scene belongs to a scene without network coverage. In the scene with network coverage, the communication between the terminal devices can be carried out by using the resources configured by the network devices, and in the scene without network coverage, the communication between the terminal devices can be carried out by using the pre-configured resources.

It should be appreciated that fig. 1 is a simplified schematic diagram of an example for ease of understanding only, and that other network devices, and/or other terminal devices, not shown in fig. 1, may also be included in the communication system.

Fig. 2 is a schematic structural diagram of a communication device 200 that can be used to execute the method for transmitting a reference signal according to an embodiment of the present disclosure. The communication apparatus 200 may be a network device or a terminal device, and may also be a chip or other component with network device function or terminal device function applied in the network device or terminal device. As shown in fig. 2, the communication device 200 may include a processor 201, a memory 202, and a transceiver 203. Wherein the processor 201 is coupled to the memory 202 and the transceiver 203, such as may be connected by a communication bus.

The following describes each component of the communication apparatus 200 in detail with reference to fig. 2:

the processor 201 is a control center of the communication apparatus 200, and may be a single processor or a collective term for a plurality of processing elements. For example, the processor 201 is one or more Central Processing Units (CPUs), or may be an Application Specific Integrated Circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application, such as: one or more microprocessors (digital signal processors, DSPs), or one or more Field Programmable Gate Arrays (FPGAs).

The processor 201 may perform various functions of the communication device 200 by running or executing software programs stored in the memory 202 and invoking data stored in the memory 202, among other things.

Exemplarily, the communication apparatus 200 may be a network device, and the processor 201 may be configured to execute S301 and S4201 with reference to fig. 3 and fig. 42 described below.

For example, the communication apparatus 200 may be a terminal device, and referring to fig. 3 and fig. 42 described below, the processor 201 may be configured to parse the received synchronization signal block and the system message to determine the first symbol.

It should be noted that, the processor 201 may further execute a processing function of a network device or a processing function of a terminal device involved in various implementations of the following method embodiments, which may specifically refer to the related description of the following method embodiments and is not described herein again.

In particular implementations, processor 201 may include one or more CPUs, such as CPU0 and CPU1 shown in fig. 2, as one embodiment.

In particular implementations, communication apparatus 200 may also include multiple processors, such as processor 201 and processor 204 shown in fig. 2, as an example. Each of these processors may be a single-Core Processor (CPU) or a multi-Core Processor (CPU). A processor herein may refer to one or more communication devices, circuits, and/or processing cores for processing data (e.g., computer program instructions).

Memory 202 may be a read-only memory (ROM) or other type of static storage communication device that can store static information and instructions, a Random Access Memory (RAM) or other type of dynamic storage communication device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), a disk storage medium or other magnetic storage communication device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited to such. The memory 202 may be separate or integrated with the processor 201.

The memory 202 is used for storing software programs for executing the scheme of the application, and is controlled by the processor 201 to execute the software programs.

A transceiver 203 for communication with other communication devices. For example, the communication apparatus 200 is a terminal device, and the transceiver 203 may be used to communicate with a network device or with another terminal device. As another example, the communication apparatus 200 is a network device, and the transceiver 203 may be used for communication with a terminal device or with another network device. It is to be understood that the transceiver 203 may include a receiver for performing a receiving function and a transmitter for performing a transmitting function.

Exemplarily, the communication apparatus 200 may be a network device, and the transceiver 203 may be configured to perform S302 and S303, or S4202 and S4203, with reference to fig. 3 and fig. 42 described below.

Exemplarily, the communication apparatus 200 may be a terminal device, and referring to fig. 3 and fig. 42 described below, the transceiver 203 may be configured to perform functions of receiving the synchronization signal block and the system message in S304 and S305, or S4204 and S4205, and receiving the demodulation reference signal on the determined first symbol.

It should be noted that the transceiver 203 may further perform a sending function of a network device involved in various implementations of the following method embodiments, or a receiving function of a terminal device, which may specifically refer to the following description of the method embodiments, and is not described herein again.

It should be noted that the structure of the communication device 200 shown in fig. 2 does not constitute a limitation of the communication device, and an actual communication device may include more or less components than those shown, or combine some components, or arrange different components.

The method for transmitting the reference signal provided by the embodiment of the present application will be specifically described below with reference to fig. 3 to fig. 66.

Fig. 3 is a first flowchart illustrating a method for transmitting a reference signal according to an embodiment of the present disclosure. The transmission method of the reference signal may be applied to communication between the network device and the terminal device shown in fig. 1.

As shown in fig. 3, the method for transmitting the reference signal includes the following steps:

s301, the network device determines a first symbol according to the respective occupied symbols of the synchronization signal block, the system message and the data channel.

That is, the first symbol is determined by the respective occupied symbols of the synchronization signal block, the system message and the data channel, and the synchronization signal block, the system message and the data channel are in one-to-one correspondence.

In the following, taking the PDSCH as the data channel and the CORESET as the system message, and combining several scenarios, how to determine the first symbol, that is, the symbol occupied by the DMRS, is described in detail.

Exemplarily, fig. 4 is a schematic diagram of a first scenario of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 4, the SSB and its corresponding PDSCH occupy the first half slot, and the SSB occupies symbols 2-5 and CORESET occupies 1 symbol, i.e., symbol 0. In one possible implementation, the starting symbol (S) of the PDSCH is symbol 0, i.e., S is 0, and the symbol length (L) is 7 symbols, i.e., L is 7. That is, when L is 7, the PDSCH and the CORESET jointly occupy symbol 0 in a frequency division multiplexing (FMD) manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 1, i.e., S ═ 1, and the symbol length is 6 symbols, i.e., L ═ 6. That is, when L ═ 6, the PDSCH does not occupy symbol 0, and the CORESET occupies symbol 0. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario one shown in fig. 4, the symbols not occupied by SSB and CORESET include symbol 1 and symbol 6. In case DMRS only needs to occupy 1 symbol, as shown in fig. 5 and 6, DMRS may occupy symbol 1 or symbol 6, i.e., DMRS occupied symbol may be any one of symbols not occupied by SSB and CORESET from PDSCH occupied symbol. It is easily understood that in case DMRS needs to occupy 2 symbols, DMRS needs to occupy symbol 1 and symbol 6 as shown in fig. 7.

Exemplarily, fig. 8 is a schematic diagram of a second scenario of a transmission method of a reference signal provided in the embodiment of the present application. As shown in fig. 8, the SSB and its corresponding PDSCH occupy the first half slot, and the SSB occupies symbols 2-5 and CORESET occupies 2 symbols, i.e., symbol 0 and symbol 1. In one possible implementation, the starting symbol (S) of the PDSCH is symbol 0, i.e., S is 0, and the symbol length (L) is 7 symbols, i.e., L is 7. That is, when L is 7, the PDSCH and the CORESET jointly occupy symbol 0 in a frequency division multiplexing (FMD) manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 1, i.e., S ═ 1, and the symbol length is 6 symbols, i.e., L ═ 6. That is, when L is 6, the PDSCH does not occupy symbol 0, the CORESET occupies symbol 0, and the PDSCH and the CORESET jointly occupy symbol 1 in a frequency division multiplexing manner. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For the second scenario shown in fig. 8, the symbol not occupied by the SSB and the CORESET is only symbol 6, that is, the second scenario is only applicable to the case where the DMRS only needs to occupy 1 symbol, and then, as shown in fig. 9, the DMRS can only occupy symbol 6.

Exemplarily, fig. 10 is a schematic diagram of a third scenario of a transmission method of a reference signal provided in the embodiment of the present application. As shown in fig. 10, the SSB and its corresponding PDSCH occupy the second half slot, and the SSB occupies symbols 9 to 12 and the CORESET occupies 1 symbol, i.e., symbol 7. In one possible implementation, the starting symbol (S) of the PDSCH is symbol 7, i.e., S ═ 7, and the symbol length (L) is 7 symbols, i.e., L ═ 7. That is, when L is 7, the PDSCH and the CORESET share the symbol 7 in a frequency division multiplexing (FMD) manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 8, i.e., S-8, and the symbol length is 6 symbols, i.e., L-6. That is, when L ═ 6, the PDSCH does not occupy symbol 7, and the CORESET occupies symbol 7. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario three, shown in fig. 10, the symbols not occupied by SSB and CORESET include symbol 8 and symbol 13. In case DMRS only needs to occupy 1 symbol, DMRS may occupy symbol 8 or symbol 13 as shown in fig. 11 and 12, i.e., DMRS occupied symbol may be any one of symbols not occupied by SSB and CORESET from PDSCH occupied symbol. It is easily understood that in case DMRS needs to occupy 2 symbols, DMRS needs to occupy symbol 8 and symbol 13 as shown in fig. 13.

Exemplarily, fig. 14 is a schematic diagram of a scene four of a transmission method of a reference signal provided in the embodiment of the present application. As shown in fig. 14, the SSB and its corresponding PDSCH occupy the second half slot, and the SSB occupies symbols 9 to 12 and the CORESET occupies 2 symbols, i.e., symbol 7 and symbol 8. In one possible implementation, the starting symbol of the PDSCH is symbol 7, i.e., S-7, and the symbol length is 7 symbols, i.e., L-7. That is, when L is 7, the PDSCH and the CORESET jointly occupy symbol 7 and symbol 8 in a frequency division multiplexing manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 8, i.e., S-8, and the symbol length is 6 symbols, i.e., L-6. That is, when L is equal to 6, the PDSCH does not occupy symbol 7, the CORESET occupies symbol 7, and the PDSCH and the CORESET jointly occupy symbol 8 in a frequency division multiplexing manner. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario four shown in fig. 14, the symbol not occupied by SSB and CORESET is only symbol 13, that is, scenario four is only applicable to the case where DMRS only needs to occupy 1 symbol, and as shown in fig. 15, DMRS can only occupy symbol 13.

Table 1 is a symbol configuration table occupied by various DMRSs related to the above-mentioned scenes one to four. For example, for the scenario one shown in fig. 4, the DMRS configuration shown in fig. 5 may be any one of DMRS configurations corresponding to indexes 2 to 3 in table 1, the DMRS configuration shown in fig. 6 may be any one of DMRS configurations corresponding to indexes 11 to 12 in table 1, and the DMRS configuration shown in fig. 7 may be any one of DMRS configurations corresponding to indexes 4 to 5 in table 1.

For example, for scenario two shown in fig. 8, the DMRS configuration shown in fig. 9 may be any one of DMRS configurations corresponding to indexes 11 to 12 in table 1.

For example, for scenario three shown in fig. 10, the DMRS configuration shown in fig. 11 may be any one of DMRS configurations corresponding to indexes 6 to 7 in table 1, the DMRS configuration shown in fig. 12 may be any one of DMRS configurations corresponding to indexes 14 to 15 in table 1, and the DMRS configuration shown in fig. 13 may be any one of DMRS configurations corresponding to indexes 8 to 9 in table 1.

For example, for scenario four shown in fig. 14, the DMRS configuration shown in fig. 15 may be any one of DMRS configurations corresponding to indexes 14 to 15 in table 1.

In the above scenarios one to four, the SSB and the PDSCH corresponding thereto occupy the first half slot or the second half slot, or may be partial symbols in the first half slot or the second half slot. For example, as shown in table 1, for index 0, the SSB and its corresponding PDSCH occupy 5 symbols in total, and do not occupy symbol 0. For another example, as shown in table 1, for index 10, the SSB and its corresponding PDSCH occupy 5 symbols in total, and do not occupy symbol 0 and symbol 1. For another example, as shown in table 1, for index 13, the SSB and its corresponding PDSCH occupy 5 symbols in total, not occupying symbol 7 and symbol 8, from symbol 9 to symbol 13. It is easily understood that the symbols not occupied by the SSB and its corresponding PDSCH may be occupied by CORESET, i.e. in this case, the PDSCH and CORESET may occupy different symbols respectively in a time division multiplexing manner.

TABLE 1

Index	PDSCH mapping type	S	L	Symbols occupied by DMRS	Time slot length
0	Type B	1	5	1	6
1	Type B	0	6	1	7
2	Type B	1	6	1	7
3	Type B	0	7	1	7
4	Type B	1	6	{1,6}	7
5	Type B	0	7	{1,6}	7
6	Type B	8	6	8	7
7	Type B	7	7	8	7
8	Type B	8	6	{8,13}	7
9	Type B	7	7	{8,13}	7
10	Type B	2	5	6	7
11	Type B	1	6	6	7
12	Type B	0	7	6	7
13	Type B	9	5	13	7
14	Type B	8	6	13	7
15	Type B	7	7	13	7

Exemplarily, fig. 16 is a schematic diagram of a fifth scenario of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 16, the SSB and its corresponding PDSCH occupy the last 7 or 8 symbols in one slot, i.e., symbol 7-symbol 13, or symbol 6-symbol 13, and the SSB occupies symbol 8-symbol 11 and the CORESET occupies 1 symbol, i.e., symbol 6. In one possible implementation, the starting symbol of the PDSCH is symbol 6, i.e., S-6, and the symbol length is 8 symbols, i.e., L-8. That is, when L is 8, the PDSCH and the CORESET jointly occupy the symbol 6 in a frequency division multiplexing manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 7, i.e., S ═ 7, and the symbol length is 7 symbols, i.e., L ═ 7. That is, when L ═ 7, the PDSCH does not occupy symbol 6, and the CORESET occupies symbol 6. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario five shown in fig. 16, the symbols not occupied by SSB and CORESET include symbol 7, symbol 12, and symbol 13. In case DMRS only needs to occupy 1 symbol, DMRS may occupy symbol 7 or symbol 12 or symbol 13 as shown in fig. 17-19, i.e., DMRS occupied symbol may be any one selected from symbols occupied by PDSCH not occupied by SSB and CORESET. It is easily understood that in case DMRS needs to occupy 2 symbols, DMRS may occupy symbol 7 and symbol 12, or occupy symbol 7 and symbol 13, i.e. one before and one after the symbol occupied by SSB for the 2 symbols occupied by DMRS, as shown in fig. 20-fig. 21.

Exemplarily, fig. 22 is a schematic diagram of a sixth scenario of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 22, the SSB and its corresponding PDSCH occupy the last 7 or 8 symbols in one slot, i.e., symbol 7-symbol 13, or symbol 6-symbol 13, and the SSB occupies symbol 8-symbol 11 and the CORESET occupies 2 symbols, i.e., symbol 6 and symbol 7. In one possible implementation, the starting symbol of the PDSCH is symbol 6, i.e., S-6, and the symbol length is 8 symbols, i.e., L-8. That is, when L is 8, the PDSCH and the CORESET jointly occupy the symbol 6 in a frequency division multiplexing manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 7, i.e., S ═ 7, and the symbol length is 7 symbols, i.e., L ═ 7. That is, when L ═ 7, the PDSCH does not occupy symbol 6, and the CORESET occupies symbol 6. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario six shown in fig. 22, only

symbols

12 and 13 are occupied by SSB and CORESET, and

symbols

12 and 13 are consecutive, that is, scenario six is only applicable to the case that DMRS only needs to occupy 1 symbol, and then, as shown in fig. 23 to fig. 24, DMRS may occupy symbol 12 or symbol 13.

Table 2 is a symbol configuration table occupied by various DMRSs related to the above-mentioned scenes five to six. For example, for scenario five shown in fig. 16, the DMRS configuration shown in fig. 17 may be any one of DMRS configurations corresponding to indexes 0 to 1 in table 2, the DMRS configuration shown in fig. 18 may be any one of DMRS configurations corresponding to indexes 2 to 3 in table 2, and the DMRS configuration shown in fig. 19 may be any one of DMRS configurations corresponding to indexes 4 to 5 in table 2. For example, for scenario five shown in fig. 16, the DMRS configuration shown in fig. 20 may be any one of DMRS configurations corresponding to indexes 6 to 7 in table 2, and the DMRS configuration shown in fig. 21 may be any one of DMRS configurations corresponding to indexes 8 to 9 in table 2.

For example, for scenario six shown in fig. 22, the DMRS configuration shown in fig. 23 may be any one of DMRS configurations corresponding to indexes 2 to 3 in table 2, and the DMRS configuration shown in fig. 24 may be any one of DMRS configurations corresponding to indexes 4 to 5 in table 2.

TABLE 2

Index	PDSCH mapping type	S	L	Symbols occupied by DMRS	Time slot length
0	Type B	7	7	7	8
1	Type B	6	8	7	8
2	Type B	7	7	12	8
3	Type B	6	8	12	8
4	Type B	7	7	13	8
5	Type B	6	8	13	8
6	Type B	7	7	{7,12}	8
7	Type B	6	8	{7,12}	8
8	Type B	7	7	{7,13}	8
9	Type B	6	8	{7,13}	8

Exemplarily, fig. 25 is a schematic diagram of a seventh scenario of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 25, the SSB and its corresponding PDSCH occupy the first 9 or 10 symbols, i.e., symbol 1-symbol 9, or symbol 0-symbol 9, in one slot, and the SSB occupies symbol 2-symbol 5 and the CORESET occupies 1 symbol, i.e., symbol 0. In one possible implementation, the starting symbol of the PDSCH is symbol 0, i.e., S ═ 0, and the symbol length is 10 symbols, i.e., L ═ 10. That is, when L is 10, the PDSCH and the CORESET jointly occupy symbol 0 in a frequency division multiplexing manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 1, i.e., S ═ 1, and the symbol length is 9 symbols, i.e., L ═ 9. That is, when L is 9, the PDSCH does not occupy symbol 0 and the CORESET occupies symbol 0. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario seven shown in fig. 25, the symbols not occupied by SSB and CORESET include symbol 1, symbol 6-symbol 9. In case DMRS only needs to occupy 1 symbol, DMRS may occupy any one of symbol 1, symbol 6-symbol 9, as shown in fig. 26-fig. 30, i.e., DMRS occupied symbol may be any one of symbols not occupied by SSB and CORESET from among symbols occupied by PDSCH. It is easily understood that in case DMRS needs to occupy 2 symbols, DMRS may occupy symbol 1 and symbol 6, or occupy symbol 1 and symbol 7, or occupy symbol 1 and symbol 8, or occupy symbol 1 and symbol 9, as shown in fig. 31-fig. 34, i.e. for the 2 symbols occupied by DMRS, one is located before and one is located after the symbol occupied by SSB. Or, alternatively, in case the DMRS needs to occupy 2 symbols, as shown in fig. 35-fig. 37, the DMRS may occupy symbol 6 and symbol 8, or occupy symbol 6 and symbol 9, or occupy symbol 7 and symbol 9, i.e., 2 symbols occupied for the DMRS may all be located after the symbol occupied by the SSB, and the 2 symbols are not consecutive.

Exemplarily, fig. 38 is a schematic diagram of a scene eight of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 38, the SSB and its corresponding PDSCH occupy the first 9 or 10 symbols, i.e., symbol 1-symbol 9, or symbol 0-symbol 9, in one slot, and the SSB occupies symbol 2-symbol 5 and the CORESET occupies 2 symbols, i.e., symbol 0 and symbol 1. In one possible implementation, the starting symbol of the PDSCH is symbol 0, i.e., S ═ 0, and the symbol length is 10 symbols, i.e., L ═ 10. That is, when L is 10, the PDSCH and the CORESET jointly occupy symbol 0 and symbol 1 in a frequency division multiplexing manner. Alternatively, in another possible implementation, the starting symbol of the PDSCH is symbol 1, i.e., S ═ 1, and the symbol length is 9 symbols, i.e., L ═ 9. That is, when L ═ 9, the PDSCH does not occupy symbol 0, the CORESET occupies symbol 0, and the PDSCH and CORESET jointly occupy symbol 1. In the embodiment of the present application, no specific limitation is made on whether the PDSCH and the CORESET occupy the same symbol.

For scenario eight shown in fig. 38, symbols not occupied by SSB and CORESET include symbols 6-9, then as shown in fig. 39-41, DMRS may occupy symbol 6 and symbol 8, or occupy symbol 6 and symbol 9, or occupy symbol 7 and symbol 9, i.e., 2 symbols occupied by DMRS are all located after the symbols occupied by SSB, and the 2 symbols are not consecutive.

Table 3 is a symbol configuration table occupied by various DMRSs involved in the above-mentioned scenes seven to eight. For example, for the scenario seven shown in fig. 25, the DMRS configurations shown in fig. 26-fig. 30 may be DMRS configurations corresponding to index 2 or index 5 in table 3, and the DMRS configurations shown in fig. 31-fig. 34 and fig. 36 may be DMRS configurations corresponding to index 15 or index 18 in table 3.

For example, for scenario eight shown in fig. 38, in view that CORESET already occupies symbol 0 and symbol 1, the DMRS configuration shown in fig. 40 may be a configuration that does not include symbol 1 in the DMRS configurations corresponding to index 15 or index 18 in table 3.

TABLE 3

It should be noted that, in various configurations in table 3, the configuration in which DMRS occupies symbol 1 is only applicable to scene seven, but not applicable to scene eight, in view of the fact that DMRS needs to occupy symbols after the symbols occupied by CORESET. In addition, the scenarios shown in fig. 25 and 38 are only illustrated by taking a slot with a symbol length of 10 as an example, and the slot with other symbol lengths is also included in table 3, which is not described herein again.

In the embodiment of the present application, when the number of the first symbols is two, in order to improve the accuracy of PDSCH channel estimation as much as possible, two symbols which are not occupied by SSB and CORESET and have a large symbol deviation with each other may be preferentially selected as the first symbols from among the symbols occupied by PDSCH. For example, one first symbol is located before the symbol occupied by the SSB, and another first symbol is located after the symbol occupied by the SSB. For another example, the two first symbols are the first symbol and the last symbol in the PDSCH symbol after the symbol occupied by the SSB, respectively. For another example, the two first symbols are the first symbol and the last symbol in the PDSCH symbol before the symbol occupied by the SSB, respectively. In other words, two symbols having a small symbol deviation from each other are not generally selected as the first symbol. For example, for the scenario of index 15 or index 18 in table 3, two configurations of {6,8} and {7,9} may also be selected, but since the symbol deviation between two symbols in the two configurations is small, only 2 symbols, and the accuracy of the channel estimation result of the PDSCH is poor, the symbol in the two configurations is not determined as the first symbol, and is certainly not included in table 3.

Similarly, when the first symbol is one, in order to improve the accuracy of PDSCH channel estimation as much as possible, a symbol which is not occupied by SSB and CORESET and is located in the middle of the PDSCH occupied symbol may be preferentially selected as the first symbol from among the PDSCH occupied symbols. For example, the last symbol before the symbol occupied by the SSB may be preferentially selected, or the first symbol after the symbol occupied by the SSB may be preferentially selected as the first symbol.

S302, the network device sends the synchronization signal block, the system message and the data channel to the terminal device on the symbols respectively occupied by the synchronization signal block, the system message and the data channel.

S303, the network device sends a demodulation reference signal to the terminal device on the first symbol.

Illustratively, the network device may transmit the SSB, CORESET, DMRS, PDSCH to the terminal device on a Downlink (DL) on a symbol occupied by the SSB, CORESET, DMRS, PDSCH determined in S301. That is, the SSB, CORESET, DMRS, and PDSCH are transmitted in the order of the occupied symbols.

S304, the terminal equipment receives the synchronous signal block and analyzes the system message to determine a first symbol.

Illustratively, the terminal device may receive and parse the SSB to obtain symbols occupied by the system message, and receive and parse the system message on the symbols occupied by the system message to obtain a position of the first symbol and demodulation parameters of the data channel, such as a modulation & coding scheme (MCS). The position of the first symbol may refer to tables 1 to 3, which are not described herein again.

S305, the terminal device receives a demodulation reference signal from the network device on the first symbol.

For example, after obtaining the position of the first symbol, the terminal device may receive the DMRS on the first symbol and perform channel estimation on the data channel. Then, the terminal device demodulates and decodes the data channel based on the channel estimation result and the demodulation parameter of the data channel, thereby acquiring user data.

The reference signal transmission methods shown in fig. 3 to fig. 41 are all that transmit demodulation reference signals in a time division multiplexing manner. In this embodiment of the present application, when a symbol occupied by a data channel is already occupied by all SSBs, a demodulation reference signal may also be transmitted in a frequency division multiplexing manner, that is, a DMRS may occupy subcarriers not occupied by the SSBs on a part of symbols occupied by the SSBs for transmission.

Fig. 42 is a flowchart illustrating a second method for transmitting a reference signal according to an embodiment of the present disclosure. The transmission method of the reference signal may be applied to communication between the network device and the terminal device shown in fig. 1. As shown in fig. 42, the method for transmitting the reference signal includes the following steps:

s4201, the network device determines a part of symbols occupied by the synchronization signal block as a first symbol.

Wherein the synchronization signal block and the data channel occupy the same symbol.

Exemplarily, fig. 43 is a schematic diagram of a scenario nine of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 43, the SSB and its corresponding PDSCH jointly occupy symbols 2-5, and the CORESET occupies 2 symbols, i.e., symbol 0 and symbol 1. The starting symbol of the PDSCH is symbol 2, i.e., S ═ 2, and the symbol length is 4 symbols, i.e., L ═ 4.

For scenario nine shown in fig. 43, in case that the DMRS only needs to occupy 1 symbol, the DMRS may occupy any one of symbols 2 to 5 as shown in fig. 44 to 47. In case that the DMRS needs to occupy 2 symbols, the DMRS may occupy symbol 2 and symbol 4, or occupy symbol 2 and symbol 5, or occupy symbol 3 and symbol 5, as shown in fig. 48-50.

Exemplarily, fig. 51 is a schematic diagram of a scenario ten of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 51, SSB and its corresponding PDSCH jointly occupy symbol 8-11, and CORESET occupies 1 symbol, i.e., symbol 7. The starting symbol of the PDSCH is symbol 8, i.e., S ═ 8, and the symbol length is 4 symbols, i.e., L ═ 4.

For scenario ten shown in fig. 51, in case that the DMRS only needs to occupy 1 symbol, the DMRS may occupy any one of symbols 8-11 as shown in fig. 52-55. In case that the DMRS needs to occupy 2 symbols, the DMRS may occupy symbol 8 and symbol 10, or occupy symbol 8 and symbol 11, or occupy symbol 9 and symbol 11, as shown in fig. 56-fig. 58.

Exemplarily, fig. 59 is a schematic diagram of a scene eleven of a transmission method of a reference signal provided in an embodiment of the present application. As shown in fig. 59, the SSB and its corresponding PDSCH jointly occupy symbol 9-symbol 12, and the CORESET occupies 2 symbols, i.e., symbol 7 and symbol 8. The starting symbol of the PDSCH is symbol 9, i.e., S ═ 9, and the symbol length is 4 symbols, i.e., L ═ 4.

For scenario eleven shown in fig. 59, in case that the DMRS needs to occupy only 1 symbol, the DMRS may occupy any one of symbols 9-12 as shown in fig. 60-63. In case that the DMRS needs to occupy 2 symbols, the DMRS may occupy symbol 9 and symbol 11, or occupy symbol 9 and symbol 12, or occupy symbol 10 and symbol 12, as shown in fig. 64-66.

S4202, the network device sends the synchronization signal block, the system message, and the data channel to the terminal device on the symbol occupied by the synchronization signal block, the system message, and the data channel. For specific implementation, reference may be made to S302, which is not described herein again.

S4203, the network device sends a demodulation reference signal to the terminal device on the first symbol.

It should be noted that, in S303, since the first symbol is time division multiplexed with the symbol occupied by the CORESET and the symbol occupied by the SSB, the demodulation reference signal, the CORESET, and the SSB are transmitted on different symbols, that is, the demodulation reference signal, the CORESET, and the SSB are not transmitted at the same time. Whereas in S4203, the first symbol is a partial symbol occupied by the SSB, and the demodulation reference signal needs to be transmitted simultaneously on a different subcarrier of the same symbol as part of the content in the SSB.

For example, assuming that a synchronization signal block and a data channel occupy symbol 2-symbol 5, which are used to transmit a Primary Synchronization Signal (PSS), a 1 st Physical Broadcast Channel (PBCH), a Secondary Synchronization Signal (SSS), and a 2 nd PBCH in sequence, a demodulation reference signal is transmitted with the PSS on symbol 2 and a second PBCH on symbol 5.

S4204, the terminal device receives the synchronization signal block and parses the system message to determine the first symbol.

S4205, the terminal device receives, on the first symbol, a demodulation reference signal from the network device.

S4204-S4205 can be implemented by referring to S304-S305, and are not described herein.

The method for transmitting the reference signal provided by the embodiment of the present application is described in detail above with reference to fig. 3 to 66. The communication device provided in the embodiment of the present application is described in detail below with reference to fig. 67.

Fig. 67 is a schematic structural diagram of a communication device according to an embodiment of the present application. The communication apparatus may be applied to the communication system shown in fig. 1, and performs the function of the network device in the transmission method of the reference signal shown in fig. 3. For convenience of explanation, fig. 67 shows only main components of the communication apparatus.

As shown in fig. 67, the communication device 6700 includes: a processing module 6701 and a transceiver module 6702.

The processing module 6701 is configured to determine a first symbol according to symbols occupied by the synchronization signal block, the system message, and the data channel. The transceiving module 6702 is configured to send a demodulation reference signal to the terminal device on the first symbol.

Optionally, the communication device 6700 may also include a memory module (not shown in fig. 67) that stores programs or instructions. The processing module 6701, when executing the program or instructions, enables the communication apparatus 6700 to perform the functions of the network device in the transmission method of the reference signal illustrated in fig. 3.

The communication device 6700 may be a network device, or may be a chip or a chip system disposed in the network device, which is not limited in this application.

Technical effects of the communication device 6700 can refer to the technical effects of the transmission method of the reference signal shown in fig. 3, which are not described herein again.

Alternatively, the communication device 6700 may also be applied to the communication system shown in fig. 1, and perform the function of the terminal device in the transmission method of the reference signal shown in fig. 3.

The transceiver 6702 is configured to receive a synchronization signal block and a system message. The processing module 6701 is configured to determine the first symbol according to the synchronization signal block and the system message. The transceiving module 6702 is further configured to receive a demodulation reference signal from the network device on the first symbol.

Optionally, the communication device 6700 may also include a memory module (not shown in fig. 67) that stores programs or instructions. The processing module 6701, when executing the program or instructions, enables the communication apparatus 6700 to perform the functions of the terminal device in the transmission method of the reference signal shown in fig. 3.

The communication device 6700 may be a terminal device, or may be a chip or a chip system provided in the terminal device, which is not limited in this application.

In another possible design, the communication apparatus 6700 may be adapted to be used in the communication system shown in fig. 1 to perform the function of a network device in the transmission method of the reference signal shown in fig. 42.

Wherein, the processing module 6701 is configured to determine a part of symbols occupied by the synchronization signal block as first symbols. Wherein the synchronization signal block and the data channel occupy the same symbol. The transceiving module 6702 is configured to send a demodulation reference signal to the terminal device on the first symbol.

Optionally, the communication device 6700 may also include a memory module (not shown in fig. 67) that stores programs or instructions. The processing module 6701, when executing the program or instructions, enables the communication apparatus 6700 to perform the functions of the network device in the transmission method of the reference signal shown in fig. 42.

Technical effects of the communication device 6700 can refer to the technical effects of the transmission method of the reference signal shown in fig. 42, which are not described herein again.

Alternatively, the communication device 6700 may also be applied to the communication system shown in fig. 1, and perform the function of the terminal device in the transmission method of the reference signal shown in fig. 42.

The transceiver 6702 is configured to receive a synchronization signal block and a system message. The processing module 6701 is configured to determine the first symbol according to the synchronization signal block and the system message. The first symbol is a part of symbols occupied by the synchronization signal block, and the synchronization signal block and the data channel occupy the same symbols. The transceiving module 6702 is further configured to receive a demodulation reference signal from the network device on the first symbol.

Optionally, the communication device 6700 may also include a memory module (not shown in fig. 67) that stores programs or instructions. The processing module 6701, when executing the program or the instructions, makes it possible for the communication apparatus 6700 to perform the functions of the terminal device in the transmission method of the reference signal shown in fig. 42.

The embodiment of the application provides a chip system. The system on chip includes a processor for implementing the processing functions according to the above method embodiments, and an input/output port for implementing the transceiving functions according to the above method embodiments.

In one possible design, the system-on-chip further includes a memory for storing program instructions and data implementing the functions involved in the above-described method embodiments.

An embodiment of the present application provides a computer-readable storage medium, including: the computer readable storage medium having stored therein computer instructions; when the computer instructions are run on a computer, the computer is caused to execute the transmission method of the reference signal according to the above method embodiment.

The present application provides a computer program product containing instructions, including a computer program or instructions, which when run on a computer causes the computer to execute the method for transmitting a reference signal according to the above method embodiments.

It should be understood that the processor in the embodiments of the present application may be a Central Processing Unit (CPU), and the processor may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It will also be appreciated that the memory in the embodiments of the subject application can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of Random Access Memory (RAM) are available, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct bus RAM (DR RAM).

The above embodiments may be implemented in whole or in part by software, hardware (e.g., circuitry), firmware, or any combination thereof. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. The procedures or functions according to the embodiments of the present application are wholly or partially generated when the computer instructions or the computer program are loaded or executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains one or more collections of available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium may be a solid state disk.

It should be understood that the term "and/or" herein is merely one type of association relationship that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. In addition, the "/" in this document generally indicates that the former and latter associated objects are in an "or" relationship, but may also indicate an "and/or" relationship, which may be understood with particular reference to the former and latter text.

In the present application, "at least one" means one or more, "a plurality" means two or more. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.

It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

A method for transmitting a reference signal, comprising:

the network equipment sends a demodulation reference signal to the terminal equipment on the first symbol; wherein the first symbol is determined by the symbols respectively occupied by the synchronization signal block, the system message and the data channel.
The method according to claim 1, wherein the first symbol is a symbol not occupied by the synchronization signal block and the system message, among symbols occupied by the data channel.
The method according to claim 2, wherein the number of the first symbols is one, and the one first symbol is located before or after a symbol occupied by the synchronization signal block in a time domain.
The method according to claim 3, wherein the one first symbol is: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain.
The method according to claim 3, wherein the one first symbol is: the first symbol after the symbol occupied by the synchronization signal block in the time domain.
The method according to claim 2, wherein the number of the first symbols is two;

one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain and the other is located after the symbol occupied by the synchronization signal block in the time domain; or,

the two first symbols are positioned before the symbol occupied by the synchronous signal block in the time domain, and the two first symbols are discontinuous; or,

the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
The method according to claim 6, wherein the two first symbols are both located before the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, and the method comprises:

the two first symbols are: the first symbol and the last symbol before the symbol occupied by the synchronization signal block are located in time domain, and the two first symbols are not consecutive.
The method according to claim 6, wherein the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, and the method comprises:

the two first symbols are: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
A method for transmitting a reference signal, comprising:

the terminal equipment receives the synchronous signal block and analyzes the system message to determine a first symbol;

and the terminal equipment receives a demodulation reference signal from network equipment on the first symbol.
The method for transmitting reference signals according to claim 9, wherein the synchronization signal block and the system message are used to indicate: the first symbol is a symbol not occupied by the synchronization signal block and the system message in symbols occupied by a data channel.
The method according to claim 10, wherein the number of the first symbols is one, and the one first symbol is located before or after a symbol occupied by the synchronization signal block in a time domain.
The method of claim 11, wherein the one first symbol is: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain.
The method of claim 11, wherein the one first symbol is: the first symbol after the symbol occupied by the synchronization signal block in the time domain.
The method according to claim 10, wherein the number of the first symbols is two;

one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain and the other is located after the symbol occupied by the synchronization signal block in the time domain; or,

the two first symbols are positioned before the symbol occupied by the synchronous signal block in the time domain, and the two first symbols are discontinuous; or,

the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
The method according to claim 14, wherein the two first symbols are both located before the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, and comprising:

the two first symbols are: the first symbol and the last symbol before the symbol occupied by the synchronization signal block are located in time domain, and the two first symbols are not consecutive.
The method according to claim 14, wherein the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, and the method comprises:

the two first symbols are: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
A communications apparatus, comprising: the device comprises a processing module and a transmitting-receiving module; wherein,

the processing module is used for determining a first symbol according to the respective occupied symbols of the synchronization signal block, the system message and the data channel;

and the transceiver module is configured to send a demodulation reference signal to a terminal device on the first symbol.
The communications apparatus of claim 17, wherein the first symbol is a symbol not occupied by the synchronization signal block and the system message among symbols occupied by the data channel.
The communications apparatus as claimed in claim 18, wherein the number of the first symbols is one, and the one first symbol is located before or after a symbol occupied by the synchronization signal block in a time domain.
The communications apparatus as claimed in claim 19, wherein the one first symbol is: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus as claimed in claim 19, wherein the one first symbol is: the first symbol after the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus of claim 17, wherein the first symbols are two in number;

one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain and the other is located after the symbol occupied by the synchronization signal block in the time domain; or,

the two first symbols are positioned before the symbol occupied by the synchronous signal block in the time domain, and the two first symbols are discontinuous; or,

the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 22, wherein the two first symbols are both located before the symbol occupied by the synchronization signal block in the time domain, and wherein the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol before the symbol occupied by the synchronization signal block are located in time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 22, wherein the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
A communications apparatus, comprising: the device comprises a processing module and a transmitting-receiving module; wherein,

the transceiver module is used for receiving a synchronization signal block and a system message;

the processing module is configured to determine a first symbol according to the synchronization signal block and the system message;

the transceiver module is further configured to receive a demodulation reference signal from a network device on the first symbol.
The communications apparatus of claim 25, wherein the synchronization signal block and the system message are configured to indicate: the first symbol is a symbol not occupied by the synchronization signal block and the system message in symbols occupied by a data channel.
The communications apparatus of claim 26, wherein the number of the first symbols is one, and the one first symbol is located before or after a symbol occupied by the synchronization signal block in a time domain.
The communications apparatus as claimed in claim 27, wherein the one first symbol is: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus as claimed in claim 27, wherein the one first symbol is: the first symbol after the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus of claim 26, wherein the first symbol is two in number;

one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain and the other is located after the symbol occupied by the synchronization signal block in the time domain; or,

the two first symbols are positioned before the symbol occupied by the synchronous signal block in the time domain, and the two first symbols are discontinuous; or,

the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 30, wherein the two first symbols are both located before the symbol occupied by the synchronization signal block in the time domain, and wherein the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol before the symbol occupied by the synchronization signal block are located in time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 30, wherein the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
A communication apparatus, characterized in that the communication apparatus comprises: a processor and a transceiver; wherein,

the processor is used for determining a first symbol according to the respective occupied symbols of the synchronization signal block, the system message and the data channel;

and the transceiver is used for sending a demodulation reference signal to the terminal equipment on the first symbol.
The communications apparatus of claim 33, wherein the first symbol is a symbol not occupied by the synchronization signal block and the system message among symbols occupied by the data channel.
The communications apparatus of claim 34, wherein the number of the first symbols is one, and the one first symbol is located before or after a symbol occupied by the synchronization signal block in a time domain.
The communications apparatus as claimed in claim 35, wherein the one first symbol is: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus as claimed in claim 35, wherein the one first symbol is: the first symbol after the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus of claim 34, wherein the first symbol is two in number;

one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain and the other is located after the symbol occupied by the synchronization signal block in the time domain; or,

the two first symbols are positioned before the symbol occupied by the synchronous signal block in the time domain, and the two first symbols are discontinuous; or,

the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 38, wherein the two first symbols are both located before the symbol occupied by the synchronization signal block in the time domain, and wherein the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol before the symbol occupied by the synchronization signal block are located in time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 38, wherein the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
A communication apparatus according to any of claims 33-40, wherein the communication apparatus is a network device.
A communication device as claimed in any of claims 33 to 40, wherein the communication device is a chip.
A communication apparatus, characterized in that the communication apparatus comprises: a processor and a transceiver; wherein,

the transceiver is used for receiving a synchronization signal block and a system message;

the processor is configured to determine a first symbol according to the synchronization signal block and the system message;

the transceiver is further configured to receive a demodulation reference signal from a network device on the first symbol.
The communications apparatus of claim 43, wherein the synchronization signal block and the system message are configured to indicate: the first symbol is a symbol not occupied by the synchronization signal block and the system message in symbols occupied by a data channel.
The communications apparatus of claim 44, wherein the number of the first symbols is one, and the one first symbol is located before or after a symbol occupied by the synchronization signal block in a time domain.
The communications apparatus as claimed in claim 45, wherein the one first symbol is: the last symbol preceding the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus as claimed in claim 45, wherein the one first symbol is: the first symbol after the symbol occupied by the synchronization signal block in the time domain.
The communications apparatus of claim 44, wherein the first symbol is two in number;

one of the two first symbols is located before the symbol occupied by the synchronization signal block in the time domain and the other is located after the symbol occupied by the synchronization signal block in the time domain; or,

the two first symbols are positioned before the symbol occupied by the synchronous signal block in the time domain, and the two first symbols are discontinuous; or,

the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 48, wherein the two first symbols are both located before the symbol occupied by the synchronization signal block in the time domain, and wherein the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol before the symbol occupied by the synchronization signal block are located in time domain, and the two first symbols are not consecutive.
The communications apparatus of claim 48, wherein the two first symbols are both located after the symbol occupied by the synchronization signal block in the time domain, and wherein the two first symbols are not consecutive, comprising:

the two first symbols are: the first symbol and the last symbol after the symbol occupied by the synchronization signal block in the time domain, and the two first symbols are not consecutive.
A communication apparatus according to any of claims 43-50, wherein the communication apparatus is a terminal device.
A communication device as claimed in any of claims 43 to 50, wherein the communication device is a chip.
A chip system, characterized in that the chip system comprises a processor for implementing a processing function as claimed in any of the claims 1 to 16 and an input/output port for implementing a transceiving function as claimed in any of the claims 1 to 16.
A readable storage medium, characterized by comprising a program or instructions which, when run on a computer, cause the computer to carry out the method of transmission of a reference signal according to any one of claims 1 to 16.
A computer program product, the computer program product comprising: computer program code which, when run on a computer, causes the computer to carry out the method of transmission of a reference signal according to any one of claims 1 to 16.