CN113868045A - Super-path interconnection link screening and classifying method, device and medium - Google Patents
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Abstract
The application relates to a method, a device and a medium for screening and classifying hyper-path interconnection links. The method comprises the steps of testing a to-be-optimized hyper-path interconnection link through a first test to acquire parameters of set link characteristics, primarily screening the to-be-optimized hyper-path interconnection link according to the parameters of the link characteristics, calculating an average value of the link characteristic parameters after primary screening, weighting to obtain a sorting index, sorting according to the size of the sorting index, and preferably selecting the to-be-optimized hyper-path interconnection link according to set constraint conditions and sorting to obtain the optimized hyper-path interconnection link. And carrying out a second test on the optimal hyper-path interconnection link, providing a first environment, a second environment, a third environment, a fourth environment and a fifth environment which are more and more loose in sequence, judging whether the optimal hyper-path interconnection link can pass the specification requirement of the second test under different environments to determine the classification of the optimal hyper-path interconnection link, and applying the hyper-path interconnection link in the real environments with different complexities and occasions with different stability requirements according to the classification.
Description
Technical Field
The present application relates to the field of link testing, and in particular, to a method, an apparatus, and a medium for screening and classifying a hyper-path interconnect link.
Background
An UPI (Ultra Path Interconnect) link is a point-to-point inter-chip Interconnect link, and interconnects chips so that the chips can cooperate with each other to complete a task with a large processing capacity requirement.
With the development of technology, the Ultra Path Interconnect link becomes more and more complex, and the complexity mainly appears in two points: firstly, the data transmission rate of the super-path interconnection link is continuously improved, and at present, the maximum data transmission rate reaches more than 20 Ghz. Secondly, the number of Lanes of the hyper-path interconnection links is continuously increased, and the number of Lanes reaches 24 at most at present. The more complex the design of the hyper-path interconnect link is, the more unpredictable risk is brought to the actual application of the hyper-path interconnect link, which causes poor stability of the actual hyper-path interconnect link, and the stability of the hyper-path interconnect link determines the stability of the whole system chip processing system. Therefore, quality control needs to be performed on the hyper-path interconnection link to achieve optimization, and the hyper-path interconnection link is classified according to the actual quality of the hyper-path interconnection link and applied to environments with different complexity and stability requirements.
Disclosure of Invention
In order to solve the technical problems or at least partially solve the technical problems, the present application provides a method, an apparatus, and a medium for screening and classifying a hyper-path interconnection link.
In a first aspect, the present application provides a method for screening and classifying a hyper-path interconnect link, including:
and carrying out a second test on the preferred hyper-path interconnection link, providing environments with different strictness degrees for the second test, testing and verifying whether the preferred hyper-path interconnection link can pass the specification requirements of the second test under different environments according to a strict to loose sequence from the strictest environment, and classifying the preferred hyper-path interconnection link according to the strictest environment which can pass the specification requirements of the second test.
Further, the acquiring process of the preferred hyper-path interconnection link includes:
different PCBs and different processors are combined randomly to form a plurality of superior path interconnection links to be optimized;
carrying out first test on the superior path interconnection link to be optimized according to preset configuration parameters; the preset configuration parameters comprise a preset continuous time equalization parameter, a preset super-path interconnection link training negotiation time parameter and a preset equalization matching parameter;
acquiring a parameter set of preset link characteristics of a first test, and acquiring a set number of worst parameters from the acquired parameter set;
determining whether the set number of worst parameters is the specification requirement of the first test,
if so, obtaining an average value of each link characteristic parameter of each hyper-path interconnection link to be optimized, and carrying out weighted summation on the average values of each link characteristic according to preset weights to obtain a sequencing index;
sorting each hyper-path interconnection link to be optimized according to the size of the sorting index;
and preferably selecting the superior path interconnection link to be preferred according to the set constraint conditions and the sequence to obtain the preferred superior path interconnection link.
Still further, the link features include a TDR feature of the PCB board, a LOSS feature of the PCB board, a TDR feature of the PCB assembly, and a LOSS feature of the PCB assembly.
Further, the determining whether the set number of worst parameters meets the specification requirement of the first test is as follows: and if the parameters in the worst parameters with the set number of the link characteristics do not meet the specification requirement of the first test, the specification requirement of the first test is not met.
Further, the set constraint conditions include setting the number of the types of manufacturers to which the PCBs belong and the number of the types of manufacturers to which the processors belong in the preferred hyper-path interconnect link to be tested.
Further, the providing different strictness environments for the second test may include, in a strict to loose order from the strictest environment, the specification requirement for the test to verify whether the preferred over-path interconnection link can pass the second test under different environments:
performing a second test in the first environment and judging whether the preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a first type;
performing a second test in a second environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a second type;
performing a second test in a third environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a third type;
performing a second test in a fourth environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a fourth class;
and performing a second test under a fifth environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a fifth type.
Furthermore, the first environment configuration content includes a target transmission speed, a target transmission bit width, a target continuous time equalization parameter, and a target over-path interconnection link negotiation time parameter, and the equalization matching parameter takes any value in a set range in the first environment;
the second environment configuration content comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a target super path interconnection link negotiation time parameter;
the third environment configuration content comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a longest allowed negotiation time parameter of the hyper-path interconnection link;
the fourth environment configuration content comprises an optimal balance matching parameter, an allowed lowest transmission speed, a target transmission bit width, a target continuous time balance parameter and an allowed longest hyper-path interconnection link negotiation time parameter;
the fifth environment configuration content comprises an optimal equalization matching parameter, a lowest allowed transmission speed, a lowest allowed transmission bit width, a target continuous time equalization parameter and a longest allowed hyper path interconnection link negotiation time parameter.
Furthermore, according to the equalization matching parameters in the set step traversal range, the equalization matching parameter which enables the transmission signal of the hyper-path interconnection link to be optimal is taken as the optimal equalization matching parameter.
In a second aspect, the present application provides an apparatus for implementing a method for screening and classifying a hyper-path interconnect link, including a first test module, where the first test module is configured to perform a first test on a hyper-path interconnect link to be optimized according to a preset configuration parameter;
the measurement module is used for measuring parameters of each link characteristic of the first test and the second test;
the first judgment module is used for judging whether the to-be-optimized hyper-path interconnection link for performing the first test passes the specification requirement of the first test;
the sorting module is used for solving a corresponding average value of the link characteristic parameters passing the first test of the hyper-path interconnection link to be optimized, weighting the average value by corresponding weight values and then summing to obtain a sorting index, and sorting the hyper-path interconnection link to be optimized according to the sorting index;
the optimization module screens out the optimal hyper-path interconnection link according to the set constraint condition and the sequencing result of the hyper-path interconnection link to be optimized;
the environment configuration module is used for configuring each environment of the second test;
the second testing module is used for carrying out second testing on the preferred hyper-path interconnection link according to the configured environment and the strictness degree of the configured environment;
the second judgment module is used for judging whether the optimal superior path interconnection link for performing the second test in each environment passes the second test specification;
and the classification module classifies the optimal superior path interconnection link according to the judgment result of the second judgment module.
In a third aspect, the present application provides a storage medium for implementing a super-path interconnect link screening and classifying method, where the storage medium for implementing the super-path interconnect link screening and classifying method stores at least one instruction, and reads and executes the instruction to implement the super-path interconnect link screening and classifying method.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages:
the method includes the steps of testing a hyper-path interconnection link to be optimized through a first test to acquire parameters of set link characteristics, primarily screening the hyper-path interconnection link to be optimized according to the parameters of the link characteristics, weighting and solving a sorting index for an average value of link characteristic parameters of the hyper-path interconnection link to be optimized, obtained through primary screening, sorting according to the size of the sorting index, preferentially selecting the hyper-path interconnection link to be optimized according to set constraint conditions and sorting, and screening a PCB and processor combination capable of well forming the hyper-path interconnection link. And carrying out second test on the optimized superior path interconnection link to provide different environments, wherein the environments comprise a first environment, a second environment, a third environment, a fourth environment and a fifth environment, the setting is more and more loose from the first environment to the fifth environment, the classification of the optimized superior path interconnection link is determined according to the specification requirement of the second test under different environments is judged, and the optimized superior path interconnection link can be applied to the occasions with different complexity and different stability requirements according to the classification of different environments to make the best use of the things. And when the superior path interconnection link to be optimized is optimized, the constraint conditions are set as the type number of the manufacturer to which the PCB belongs and the type number of the manufacturer to which the processor belongs in the optimized superior path interconnection link to be optimized according to the sequence and the set constraint conditions, so that the diversity of a supply chain can be optimized, the stability of device supply is improved, and the reasonable supply price of the device is maintained.
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The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a flowchart of a method for screening and classifying a hyper-path interconnection link according to an embodiment of the present application;
fig. 2 is a flowchart for acquiring a preferred hyper-path interconnect link according to an embodiment of the present disclosure;
FIG. 3 is a flowchart of performing a second test and classification under different environments according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of an apparatus for implementing super-path interconnection link screening and classification according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Example 1
The embodiment of the application provides a method for screening and classifying a super-path interconnection link, which includes performing a second test on an optimal super-path interconnection link, providing environments with different degrees of strictness for the second test, testing and verifying whether the optimal super-path interconnection link can pass through specification requirements of the second test in different environments according to a strict to loose sequence from a strictest environment, and classifying the optimal super-path interconnection link according to the strictest environment where the optimal super-path interconnection link can pass through the specification requirements of the second test.
Referring to fig. 1, a specific process of the method for screening and classifying the hyper-path interconnect link includes:
s100, acquiring a preferred super-path interconnection link; in the specific implementation process, referring to fig. 2, the process of acquiring the preferred hyper-path interconnection link includes:
s101, combining different PCBs and different processors at will to form a plurality of superior path interconnection links to be optimized; in the specific implementation process, the two processors connected with the hyper-path interconnection link are ensured to be the same in any combination process.
S102, carrying out a first test on a to-be-optimized hyper-path interconnection link according to preset configuration parameters; the preset configuration parameters comprise preset continuous time balance parameters, preset negotiation time parameters for the training of the hyper-path interconnection link and preset balance matching parameters.
S103, collecting a parameter set of the preset link characteristics of the first test, and acquiring a set number of worst parameters from the collected parameter set; in a specific implementation process, the link characteristics include a TDR characteristic of a PCB board, a LOSS characteristic of the PCB board, a TDR characteristic of a PCB assembly, and a LOSS characteristic of the PCB assembly. TDR is the time domain reflection and LOSS is the signal LOSS. One possible way is: and sorting the parameters in the parameter sets of the link characteristics, and selecting the worst 20 parameters from each parameter set.
And S104, judging whether the set number of worst parameters meets the first test specification requirement, specifically, if the parameters in the set number of worst parameters with the link characteristics do not meet the first test specification requirement, the first test specification requirement is not met.
If yes, executing S105; otherwise, under the condition of design verification stage, optimizing the design of the hyper-path interconnection link through an optimization strategy, and directly excluding the hyper-path interconnection link under the preferable condition. The optimization strategy is to optimize the material of the PCB plate and/or optimize the thickness of the PCB copper foil. Specifically, if the link characteristic parameters of the PCB assembly do not meet the specification requirement of the first test, the thickness of the PCB copper foil is optimized. If the link characteristic parameters of the PCB do not meet the first test specification requirement, the material quality and/or the copper foil thickness of the PCB are/is considered; .
S105, calculating the average value of each link characteristic parameter of each hyper-path interconnection link to be optimized, and carrying out weighted summation on the average value of each link characteristic according to preset weight to obtain a sorting index;
s106, sorting the super path interconnection links to be optimized according to the sorting index;
and S107, preferably selecting the superior path interconnection link to be preferred according to the set constraint conditions and the sequence to obtain the preferred superior path interconnection link. In a specific implementation process, the set constraint conditions include the number of manufacturer types to which the PCBs belong and the number of manufacturer types to which the processors belong in the optimal hyper-path interconnect link to be tested are set.
S200, providing environments with different degrees of strictness for the second test; in the specific implementation process, the environments with different degrees of stringency include, but are not limited to: a first environment, a second environment, a third environment, a fourth environment, and a fifth environment. Wherein the content of the first and second substances,
the first environment configuration content comprises a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a target hyper-path interconnection link negotiation time parameter, and the balance matching parameter can be arbitrarily taken within a set range in the first environment; the first environment is most stringent of five different environments. And setting the change step length of the equilibrium matching parameter, and traversing the equilibrium matching parameter in the set range according to the change step length of the equilibrium matching parameter from one end of the set range of the equilibrium matching parameter so as to realize the arbitrary value taking of the equilibrium matching parameter in the set range.
The second environment configuration content comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a target super path interconnection link negotiation time parameter; the second environment is more relaxed than the first environment and more stringent than the third environment. And according to the balance matching parameters in the set step traversal range, taking the balance matching parameters which enable the transmission signals of the super-path interconnection link to be optimal as the optimal balance matching parameters.
The third environment configuration content comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a longest allowed negotiation time parameter of the hyper-path interconnection link; the third environment is more relaxed than the second environment and more stringent than the fourth environment. And recalculating the optimal equilibrium matching parameters in the third environment, wherein the calculation mode is that the optimal equilibrium matching parameters which enable the transmission signals of the hyper-path interconnection link to be optimal are taken as the optimal equilibrium matching parameters according to the equilibrium matching parameters in the set step traversal range.
The fourth environment configuration content comprises an optimal balance matching parameter, an allowed lowest transmission speed, a target transmission bit width, a target continuous time balance parameter and an allowed longest hyper-path interconnection link negotiation time parameter; the fourth environment is more relaxed than the third environment and more stringent than the fifth environment. And recalculating the optimal equilibrium matching parameters in the fourth environment, wherein the calculation mode is that the optimal equilibrium matching parameters which enable the transmission signals of the hyper-path interconnection link to be optimal are taken as the optimal equilibrium matching parameters according to the equilibrium matching parameters in the set step traversal range.
The fifth environment configuration content comprises an optimal equalization matching parameter, a lowest allowed transmission speed, a lowest allowed transmission bit width, a target continuous time equalization parameter and a longest allowed hyper path interconnection link negotiation time parameter, and the fifth environment is most relaxed in five different environments. And recalculating the optimal equilibrium matching parameters in the fifth environment, wherein the calculation mode is that the optimal equilibrium matching parameters which enable the transmission signals of the hyper-path interconnection link to be optimal are taken as the optimal equilibrium matching parameters according to the equilibrium matching parameters in the set step traversal range.
S300, performing a second test in different environments and classifying according to results, specifically, performing the second test on the optimal hyper-path interconnection link from the strictest environment in a strict to loose sequence; classifying the preferred hyper-path interconnect link according to the most stringent environment of specification requirements that the preferred hyper-path interconnect link can pass the second test;
referring to fig. 3, the specific process of step S300 includes:
s301, performing a second test in the first environment, judging whether the preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a first type;
s302, performing a second test in a second environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a second type;
s303, performing a second test in a third environment, judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a third class;
s304, performing a second test in a fourth environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a fourth class;
s305, performing a second test in a fifth environment and determining whether the unclassified preferred hyper-path interconnect link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnect link into a fifth category.
Different classes of hyper-path interconnect links are applied depending on real-world complexity and processor stability requirements.
Example 2
The embodiment of the application provides another feasible super-path interconnection link screening and classifying method, which is different from the embodiment in that:
the negotiation time parameter of the hyper-path interconnection link in the third environment is adjustable, the negotiation time parameter of the hyper-path interconnection link is gradually prolonged according to the set step length, so that all conditions of the third environment are traversed, the optimal equilibrium matching parameter is recalculated every time one condition of the third environment is obtained, the calculation mode is that the optimal equilibrium matching parameter of the hyper-path interconnection link transmission signal is taken as the optimal equilibrium matching parameter according to the equilibrium matching parameter in the set step length traversal range. And during classification, the specification requirements passing the second test are classified into a third class when the longest allowed hyper-path interconnection link negotiation time parameter is reached. And/or the presence of a gas in the gas,
the transmission speed of the fourth environment and the longest negotiation time parameter of the hyper path interconnection link are both adjustable, the transmission speed is gradually reduced according to the set step length, the negotiation time parameter of the hyper path interconnection link is prolonged according to the set step length when the transmission speed is reduced once, so that all conditions of the fourth environment are traversed, and the optimal equilibrium matching parameter is recalculated when one condition of the fourth environment is obtained. During classification, in the range of the longest allowed negotiation time parameter of the hyper-path interconnection link and the lowest allowed transmission speed, any fourth environment meeting the specification requirement of the second test is classified into a fourth class. And/or the presence of a gas in the gas,
and parameters of the transmission speed, the transmission bit width and the negotiation time of the hyper-path interconnection link of the fifth environment are all adjustable, all transmission bit widths are traversed, all transmission speeds corresponding to all bit widths are traversed, all negotiation time of the hyper-path interconnection link corresponding to each transmission speed is traversed, all conditions of the fifth environment are traversed, and the optimal equilibrium matching parameter is recalculated every time one condition of the fourth environment is obtained. During classification, any fifth environment meeting the specification requirements of the second test exists in the ranges of the longest allowed negotiation time parameter of the hyper-path interconnection link, the lowest allowed transmission speed and the lowest allowed transmission bit width, and the fifth environment is classified into a fifth type.
Example 3
An embodiment of the present application provides an apparatus for implementing a method for screening and classifying a hyper-path interconnect link, which is shown in fig. 4 and includes:
the first testing module is used for carrying out first testing on the to-be-optimized hyper-path interconnection link according to preset configuration parameters; in a specific implementation process, the preset configuration parameters include a preset continuous time equalization parameter, a preset super-path interconnection link training negotiation time parameter, and a preset equalization matching parameter.
The measurement module is used for measuring parameters of each link characteristic of the first test and the second test; in a specific implementation process, the link characteristics include a TDR characteristic of the PCB, a LOSS characteristic of the PCB, a TDR characteristic of the PCB assembly, and a LOSS characteristic of the PCB assembly.
The first judgment module is used for judging whether the to-be-optimized hyper-path interconnection link for performing the first test passes the specification requirement of the first test; the specification requirement of the first test comprises preset minimum required values of each characteristic link parameter.
The sorting module is used for solving a corresponding average value of the link characteristic parameters passing the first test of the hyper-path interconnection link to be optimized, weighting the average value by corresponding weight values and then summing to obtain a sorting index, and sorting the hyper-path interconnection link to be optimized according to the sorting index;
the optimization module screens out the optimal hyper-path interconnection link according to the set constraint condition and the sequencing result of the hyper-path interconnection link to be optimized; the constraint conditions include, but are not limited to, setting the number of the types of manufacturers to which the PCBs belong and the number of the types of manufacturers to which the processors belong in the preferred hyper-path interconnect link to be tested.
The environment configuration module is used for configuring each environment of the second test, and in the specific implementation process, the environment comprises a first environment, a second environment, a third environment, a fourth environment and a fifth environment; wherein the content of the first and second substances,
the first environment configuration content comprises a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a target hyper-path interconnection link negotiation time parameter, and the balance matching parameter can be arbitrarily taken within a set range in the first environment;
the second environment configuration content comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a target super path interconnection link negotiation time parameter;
the third environment configuration content comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a longest allowed negotiation time parameter of the hyper-path interconnection link;
the fourth environment configuration content comprises an optimal balance matching parameter, an allowed lowest transmission speed, a target transmission bit width, a target continuous time balance parameter and an allowed longest hyper-path interconnection link negotiation time parameter;
the fifth environment configuration content comprises an optimal equalization matching parameter, a lowest allowed transmission speed, a lowest allowed transmission bit width, a target continuous time equalization parameter and a longest allowed hyper path interconnection link negotiation time parameter.
The second testing module is used for carrying out second testing on the preferred hyper-path interconnection link according to the configured environment and the strictness degree of the configured environment; a second test is performed on the preferred transcribe interlink in strict to loose order starting from the most stringent environment.
The second judgment module is used for judging whether the optimal superior path interconnection link for performing the second test in each environment passes the second test specification;
and the classification module classifies the optimal superior path interconnection link according to the judgment result of the second judgment module. The preferred hyper-path interconnect link is classified according to the most stringent circumstances of the specification requirements that the preferred hyper-path interconnect link can pass the second test.
Example 4
The embodiment of the application provides a storage medium for realizing a super-path interconnected link screening and classifying method, wherein the storage medium for realizing the super-path interconnected link screening and classifying method stores at least one instruction, and reads and executes the instruction to realize the super-path interconnected link screening and classifying method.
Those skilled in the art will readily appreciate that the techniques of the embodiments of the present invention may be implemented as software plus a required general purpose hardware platform. Based on such understanding, the technical solutions in the embodiments of the present invention may be embodied in the form of a software product, where the computer software product is stored in a storage medium, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, and the storage medium can store program codes, and includes instructions for enabling a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, and the like) to perform all or part of the steps of the method in the embodiments of the present invention.
The same and similar parts in the various embodiments in this specification may be referred to each other. Especially, for the terminal embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the description in the method embodiment.
In the embodiments provided by the present invention, it should be understood that the disclosed system, system and method can be implemented in other ways. For example, the above-described system embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, systems or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
Although the present invention has been described in detail by referring to the drawings in connection with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications or substitutions are within the scope of the present invention/any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A super path interconnection link screening and classifying method is characterized by comprising the following steps:
and carrying out a second test on the preferred hyper-path interconnection link, providing environments with different strictness degrees for the second test, testing and verifying whether the preferred hyper-path interconnection link can pass the specification requirements of the second test under different environments or not according to a strict to loose sequence from the strictest environment, and classifying the preferred hyper-path interconnection link according to the strictest environment of the specification requirements of the second test which can be passed by the preferred hyper-path interconnection link.
2. The method for screening and classifying the hyper-path interconnect link according to claim 1, wherein the obtaining process of the preferred hyper-path interconnect link comprises:
different PCBs and different processors are combined randomly to form a plurality of superior path interconnection links to be optimized;
carrying out first test on the superior path interconnection link to be optimized according to preset configuration parameters; the preset configuration parameters comprise a preset continuous time equalization parameter, a preset super-path interconnection link training negotiation time parameter and a preset equalization matching parameter;
acquiring a parameter set of preset link characteristics of a first test, and acquiring a set number of worst parameters from the acquired parameter set;
determining whether the set number of worst parameters is the specification requirement of the first test,
if so, obtaining an average value of each link characteristic parameter of each hyper-path interconnection link to be optimized, and carrying out weighted summation on the average values of each link characteristic according to preset weights to obtain a sequencing index;
sorting each hyper-path interconnection link to be optimized according to the size of the sorting index;
and preferably selecting the superior path interconnection link to be preferred according to the set constraint conditions and the sequence to obtain the preferred superior path interconnection link.
3. The method of claim 2, wherein the link characteristics include TDR characteristics of a PCB board, LOSS characteristics of a PCB board, TDR characteristics of a PCB assembly, and LOSS characteristics of a PCB assembly.
4. The method for screening and classifying hyper-path interconnect links according to claim 2, wherein said determining whether the set number of worst parameters meets the specification requirement of the first test is: and if the parameters in the worst parameters with the set number of the link characteristics do not meet the specification requirement of the first test, the specification requirement of the first test is not met.
5. The method for screening and classifying the interconnection links of the hyper-paths according to claim 2, wherein the set constraint conditions include setting the number of the types of manufacturers to which the PCBs belong and the number of the types of manufacturers to which the processors belong in the preferred interconnection links of the hyper-paths to be tested.
6. The method as claimed in claim 1, wherein the providing different strict environments for the second test, starting from the most strict environment, and in a strict to loose order, the testing to verify whether the preferred hyper-path interconnect link can pass the specification requirement of the second test under different environments comprises:
performing a second test in the first environment and judging whether the preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a first type;
performing a second test in a second environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a second type;
performing a second test in a third environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a third type;
performing a second test in a fourth environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a fourth class;
and performing a second test under a fifth environment and judging whether the unclassified preferred hyper-path interconnection link can pass the specification requirement of the second test, and classifying the preferred hyper-path interconnection link into a fifth type.
7. The method according to claim 6, wherein the configuration content of the first environment includes a target transmission speed, a target transmission bit width, a target continuous time equalization parameter, and a target hyper-path interconnect link negotiation time parameter, and the equalization matching parameter takes any value within a set range in the first environment;
the configuration content of the second environment comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a target super path interconnection link negotiation time parameter;
the configuration content of the third environment comprises an optimal balance matching parameter, a target transmission speed, a target transmission bit width, a target continuous time balance parameter and a longest allowed negotiation time parameter of the hyper-path interconnection link;
the configuration content of the fourth environment comprises an optimal balance matching parameter, a lowest allowed transmission speed, a target transmission bit width, a target continuous time balance parameter and a longest allowed negotiation time parameter of the hyper-path interconnection link;
the configuration content of the fifth environment comprises an optimal equalization matching parameter, a lowest allowed transmission speed, a lowest allowed transmission bit width, a target continuous time equalization parameter and a longest allowed hyper path interconnection link negotiation time parameter.
8. The method for screening and classifying interconnection links with hyper-paths according to claim 7, wherein the equalization matching parameter that makes the transmission signal of interconnection links with hyper-paths optimal is selected as the optimal equalization matching parameter according to the equalization matching parameter in the set step traversal range.
9. A device for realizing a super-path interconnection link screening and classifying method is characterized by comprising a first testing module, a second testing module and a third testing module, wherein the first testing module is used for carrying out first testing on a super-path interconnection link to be optimized according to preset configuration parameters;
the measurement module is used for measuring parameters of each link characteristic of the first test and the second test;
the first judgment module is used for judging whether the to-be-optimized hyper-path interconnection link for performing the first test passes the specification requirement of the first test;
the sorting module is used for solving a corresponding average value of the link characteristic parameters passing the first test of the hyper-path interconnection link to be optimized, weighting the average value by corresponding weight values and then summing to obtain a sorting index, and sorting the hyper-path interconnection link to be optimized according to the sorting index;
the optimization module screens out the optimal hyper-path interconnection link according to the set constraint condition and the sequencing result of the hyper-path interconnection link to be optimized;
the environment configuration module is used for configuring each environment of the second test;
the second testing module is used for carrying out second testing on the preferred hyper-path interconnection link according to the configured environment and the strictness degree of the configured environment;
the second judgment module is used for judging whether the optimal superior path interconnection link for performing the second test in each environment passes the second test specification;
and the classification module classifies the optimal superior path interconnection link according to the judgment result of the second judgment module.
10. A storage medium for implementing a super-path interconnect link screening and classifying method, wherein the storage medium for implementing the super-path interconnect link screening and classifying method stores at least one instruction, reads and executes the instruction to implement the super-path interconnect link screening and classifying method according to any one of claims 1 to 8.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115048235A (en) * | 2022-06-14 | 2022-09-13 | 北京百度网讯科技有限公司 | Link parameter configuration method, device, equipment and medium |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107396586A (en) * | 2017-07-27 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of UPI interconnection systems for reducing backboard stacking |
| CN110191010A (en) * | 2019-04-11 | 2019-08-30 | 深圳市同泰怡信息技术有限公司 | The method for testing pressure of server |
| US20190288421A1 (en) * | 2019-06-04 | 2019-09-19 | Intel Corporation | Connector with active circuit |
| CN111290957A (en) * | 2020-02-19 | 2020-06-16 | 北京航天测控技术有限公司 | Signal-oriented test path planning method, device, equipment and storage medium |
| CN112463483A (en) * | 2020-11-23 | 2021-03-09 | 苏州浪潮智能科技有限公司 | UPI pressure testing method, system, terminal and storage medium |
| CN112532348A (en) * | 2020-11-22 | 2021-03-19 | 广州技象科技有限公司 | Link adaptation method, device, equipment and storage medium based on communication channel |
-
2021
- 2021-09-02 CN CN202111027940.6A patent/CN113868045B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107396586A (en) * | 2017-07-27 | 2017-11-24 | 郑州云海信息技术有限公司 | A kind of UPI interconnection systems for reducing backboard stacking |
| CN110191010A (en) * | 2019-04-11 | 2019-08-30 | 深圳市同泰怡信息技术有限公司 | The method for testing pressure of server |
| US20190288421A1 (en) * | 2019-06-04 | 2019-09-19 | Intel Corporation | Connector with active circuit |
| CN111290957A (en) * | 2020-02-19 | 2020-06-16 | 北京航天测控技术有限公司 | Signal-oriented test path planning method, device, equipment and storage medium |
| CN112532348A (en) * | 2020-11-22 | 2021-03-19 | 广州技象科技有限公司 | Link adaptation method, device, equipment and storage medium based on communication channel |
| CN112463483A (en) * | 2020-11-23 | 2021-03-09 | 苏州浪潮智能科技有限公司 | UPI pressure testing method, system, terminal and storage medium |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115048235A (en) * | 2022-06-14 | 2022-09-13 | 北京百度网讯科技有限公司 | Link parameter configuration method, device, equipment and medium |
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