CN113853584A - 可变延时指令 - Google Patents

可变延时指令 Download PDF

Info

Publication number
CN113853584A
CN113853584A CN202080037631.4A CN202080037631A CN113853584A CN 113853584 A CN113853584 A CN 113853584A CN 202080037631 A CN202080037631 A CN 202080037631A CN 113853584 A CN113853584 A CN 113853584A
Authority
CN
China
Prior art keywords
instruction
execution
pipeline
data
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202080037631.4A
Other languages
English (en)
Chinese (zh)
Inventor
T·D·安德森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US16/384,328 external-priority patent/US11210098B2/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CN113853584A publication Critical patent/CN113853584A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
CN202080037631.4A 2019-04-15 2020-04-15 可变延时指令 Pending CN113853584A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/384,328 US11210098B2 (en) 2013-07-15 2019-04-15 Variable latency instructions
US16/384,328 2019-04-15
PCT/US2020/028178 WO2020214624A1 (fr) 2019-04-15 2020-04-15 Instructions à latence variable

Publications (1)

Publication Number Publication Date
CN113853584A true CN113853584A (zh) 2021-12-28

Family

ID=72837575

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080037631.4A Pending CN113853584A (zh) 2019-04-15 2020-04-15 可变延时指令

Country Status (2)

Country Link
CN (1) CN113853584A (fr)
WO (1) WO2020214624A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11210098B2 (en) * 2013-07-15 2021-12-28 Texas Instruments Incorporated Variable latency instructions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6195748B1 (en) * 1997-11-26 2001-02-27 Compaq Computer Corporation Apparatus for sampling instruction execution information in a processor pipeline
GB2447907B (en) * 2007-03-26 2009-02-18 Imagination Tech Ltd Processing long-latency instructions in a pipelined processor
US8688964B2 (en) * 2009-07-20 2014-04-01 Microchip Technology Incorporated Programmable exception processing latency

Also Published As

Publication number Publication date
WO2020214624A1 (fr) 2020-10-22

Similar Documents

Publication Publication Date Title
JP5357017B2 (ja) 高速で安価なストア−ロード競合スケジューリング及び転送機構
US7051190B2 (en) Intra-instruction fusion
US20220113966A1 (en) Variable latency instructions
US11693661B2 (en) Mechanism for interrupting and resuming execution on an unprotected pipeline processor
US20010042188A1 (en) Multiple-thread processor for threaded software applications
US20210294639A1 (en) Entering protected pipeline mode without annulling pending instructions
EP2269134A1 (fr) Système et méthode de remise sélective du résultat d'une instruction exécutée
US20040205326A1 (en) Early predicate evaluation to reduce power in very long instruction word processors employing predicate execution
US20240036876A1 (en) Pipeline protection for cpus with save and restore of intermediate results
US6341348B1 (en) Software branch prediction filtering for a microprocessor
US20210326136A1 (en) Entering protected pipeline mode with clearing
JP2001209535A (ja) プロセッサの命令スケジューリング装置
CN113535236A (zh) 基于指令集体系结构的和自动的加载跟踪的方法和装置
CN113853584A (zh) 可变延时指令
US20080141252A1 (en) Cascaded Delayed Execution Pipeline
US6988121B1 (en) Efficient implementation of multiprecision arithmetic
US10901747B2 (en) Unified store buffer
US11449336B2 (en) Method of storing register data elements to interleave with data elements of a different register, a processor thereof, and a system thereof
CN113568663A (zh) 代码预取指令

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination