CN113849346A - Data backup method, device and equipment - Google Patents

Data backup method, device and equipment Download PDF

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Publication number
CN113849346A
CN113849346A CN202111131740.5A CN202111131740A CN113849346A CN 113849346 A CN113849346 A CN 113849346A CN 202111131740 A CN202111131740 A CN 202111131740A CN 113849346 A CN113849346 A CN 113849346A
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data
tcp
disk array
programmable chip
data packet
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张申
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Beijing Tengling Technology Co ltd
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Beijing Tengling Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1446—Point-in-time backing up or restoration of persistent data
    • G06F11/1448—Management of the data involved in backup or backup restore
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1446—Point-in-time backing up or restoration of persistent data
    • G06F11/1458—Management of the backup or restore process
    • G06F11/1464—Management of the backup or restore process for networked environments
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

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Abstract

The application provides a data backup method, a data backup device and data backup equipment. The main board is integrated with a programmable chip, when the data is stored, the programmable chip analyzes a data packet to be backed up received from the network card to obtain a TCP data packet only containing data flow in the data to be backed up, acquires a physical address for writing the TCP data packet into the disk array from the CPU after the TCP data packet is stored in a target cache data space, and finally stores the TCP data packet in a designated position of the disk array corresponding to the physical address. Therefore, by applying the technical scheme provided by the embodiment of the application, the expense of the CPU can be greatly reduced, so that the CPU cannot cause insufficient processing performance due to the storage of the TCP data packet, and further the backup performance is not influenced.

Description

Data backup method, device and equipment
Technical Field
The present application relates to data storage technologies, and in particular, to a data backup method, apparatus, and device.
Background
The network backup refers to centralized management of data backup of the whole network through data backup management software in combination with corresponding hardware and storage equipment under a network environment, so as to realize automatic backup, file archiving, data hierarchical storage, disaster recovery and the like. And installing backup client software on a server which needs data backup management in a network, and backing up data to a storage device in a centralized manner through the network.
At present, in the prior art, in the process of executing a backup task, two types of data packets, which are a control stream and a data stream, are generally transmitted to a backup server. All data are sent to the backup software of the user space by a Central Processing Unit (CPU) for processing and then stored in the disk array, but the CPU resources are consumed when the data are copied. However, in practical applications, data of the type control flow is generally small and does not have an obvious effect on the CPU, while data of the type data flow is different and contains all data to be backed up, which usually has several hundreds of MB to several hundreds of GB, which causes a huge CPU overhead and affects the backup performance due to insufficient CPU processing performance.
Disclosure of Invention
The application provides a data backup method, a data backup device and data backup equipment, which are used for reducing the influence on backup performance caused by insufficient CPU processing performance.
The technical scheme provided by the application comprises the following steps:
in a first aspect, an embodiment of the present application provides a data backup method, which is applied to a programmable chip, where the programmable chip is integrated on a motherboard and is connected to a CPU, a network card, and a disk array on the motherboard, and the method includes:
analyzing data to be backed up received from a network card to obtain a Transmission Control Protocol (TCP) data packet only containing data streams in the data to be backed up;
searching an idle target cache data space for storing data blocks from the programmable chip, and storing the TCP data packet into the target cache data space;
sending a disk array addressing instruction for storing the TCP data packet to a CPU (central processing unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array;
and storing the TCP data packet into the appointed position of the disk array corresponding to the physical address according to the physical address returned by the CPU.
In a second aspect, an embodiment of the present application provides another data backup method, which is applied to a CPU, where the CPU is connected to a programmable chip integrated on a motherboard, and the programmable chip is further connected to a network card and a disk array, and the method includes:
acquiring a disk array addressing instruction which is sent by the programmable chip and used for storing a TCP data packet; the TCP data packet is a data packet which only contains data flow and is obtained by analyzing the data to be backed up received from the network card by the programmable chip; the disk array addressing instruction is an instruction sent by the programmable chip after the TCP data packet is stored in a free target cache data space which is searched for and used for storing the data block;
determining a physical address for writing the storage TCP data packet into the disk array according to the disk array addressing instruction;
and sending the determined physical address to the programmable chip according to the physical address returned by the CPU, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address.
In a third aspect, an embodiment of the present application provides a data backup device, which is applied to a programmable chip, where the programmable chip is integrated on a motherboard and is connected to a CPU, a network card, and a disk array on the motherboard, and the device includes:
the analysis unit is used for analyzing the data to be backed up received from the network card to obtain a TCP data packet only containing data stream in the data to be backed up;
the data cache unit is used for searching an idle target cache data space for storing data blocks from the programmable chip and storing the TCP data packet into the target cache data space;
an address instruction sending unit, configured to send a disk array addressing instruction for storing the TCP data packet to a CPU, so that the CPU determines a physical address at which the TCP data packet is written in the disk array;
and the magnetic disk storage unit is used for storing the TCP data packet into the appointed position of the magnetic disk array corresponding to the physical address according to the physical address returned by the CPU.
In a fourth aspect, an embodiment of the present application provides another data backup device, which is applied to a CPU, where the CPU is connected to a programmable chip integrated on a motherboard, and the programmable chip is further connected to a network card and a disk array, and the device includes:
the command acquisition unit is used for acquiring a disk array addressing command which is sent by the programmable chip and used for storing the TCP data packet; the TCP data packet is a data packet which only contains data flow and is obtained by analyzing the data to be backed up received from the network card by the programmable chip; the disk array addressing instruction is an instruction sent by the programmable chip after the TCP data packet is stored in a free target cache data space which is searched for and used for storing the data block;
the address determining unit is used for determining a physical address for writing the storage TCP data packet into the disk array according to the disk array addressing instruction;
and the address sending unit is used for sending the determined physical address to the programmable chip according to the physical address returned by the CPU, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address.
According to the technical scheme, the programmable chip is integrated on the mainboard, when data are stored, the programmable chip analyzes the data packets to be backed up received from the network card to obtain the TCP data packets only containing data streams in the data to be backed up, after the TCP data packets are stored in the target cache data space, the physical addresses of the disk array, which are written with the TCP data packets, are obtained from the CPU, and finally the TCP data packets are stored in the designated positions of the disk array corresponding to the physical addresses. It can be seen that, when the method provided by the embodiment of the present application is applied to store the TCP data packet with the type of data stream, the method does not rely on the CPU for processing any more, but a programmable chip is specially configured on the host to share and store instead of the CPU, so that the cost of the CPU is greatly reduced, and the CPU does not cause insufficient processing performance due to the storage of the TCP data packet, thereby affecting the backup performance.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
FIG. 1 is a diagram of a data backup provided by the prior art;
FIG. 2 is a flow chart of a data backup method provided herein;
FIG. 3 is a flow chart of another data backup method provided herein;
fig. 4 is a structural diagram of a data backup device provided in the present application;
FIG. 5 is a block diagram of another data backup device provided herein;
fig. 6 is a schematic structural diagram of an electronic device provided in the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
The network backup refers to centralized management of data backup of the whole network through data backup management software in combination with corresponding hardware and storage equipment under a network environment, so as to realize automatic backup, file archiving, data hierarchical storage, disaster recovery and the like. The working principle is that an application server is selected on the network, network data storage management server side software is installed to serve as a backup server of the whole network, and a large-capacity storage device is connected to the backup server. And installing backup client software on a server which needs data backup management in a network, and backing up data to a storage device in a centralized manner through the network.
At present, in the prior art, as shown in fig. 1, a process of executing a backup task specifically includes: the backup client sends a control packet (control flow indicated by a dotted arrow in fig. 1) with a backup type of control flow and a data packet (data flow indicated by a solid arrow in fig. 1) with a backup type of data flow to the backup server through the TCP socket, so that the backup server performs corresponding processing according to different received data types. And the backup server receives a control packet with the type of control flow and a data packet with the type of data flow from the network card. The CPU copies the data containing the control packet and the data packet from the network card to the Socket buffer area, copies the data in the Socket buffer area to the user buffer area to switch from the kernel mode to the user mode, and the backup software analyzes the data and performs corresponding processing and simultaneously initiates write operation on the control flow data and the data flow data which need to be stored. After switching from the user mode to the kernel mode, the CPU copies user-specified storage data from the user buffer to the kernel buffer and copies specified data from the kernel buffer to the disk array.
Therefore, in the prior art, all data are sent to the backup software of the user space by the CPU for processing and then stored in the disk array, but the resources of the CPU are consumed all the time during data copying, and if the CPU is frequently occupied to switch between the kernel mode and the user mode and copy data, the upper limit of the processing capacity of the CPU is easily exceeded, which becomes a bottleneck of backup performance. However, in practical applications, data of the type control flow is generally small and does not have an obvious effect on the CPU, while data of the type data flow is different and contains all data to be backed up, which usually has several hundreds of MB to several hundreds of GB, which causes a huge CPU overhead and affects the backup performance due to insufficient CPU processing performance.
In order to solve the above technical problem, an embodiment of the present application provides a data backup method, where the method is applied to a programmable chip, the programmable chip is integrated on a motherboard and is connected to a CPU, a network card, and a disk array on the motherboard, and specifically includes: analyzing data to be backed up received from a network card to obtain a TCP (Transmission Control Protocol) data packet only containing data flow in the data to be backed up; searching an idle target cache data space for storing data blocks from the programmable chip, and storing the TCP data packet into the target cache data space; sending a disk array addressing instruction for storing the TCP data packet to a CPU (central processing unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array; and storing the TCP data packet into the appointed position of the disk array corresponding to the physical address according to the physical address returned by the CPU. It can be seen that, when the method provided by the embodiment of the present application is applied to store the TCP data packet with the type of data stream, the method does not rely on the CPU for processing any more, but a programmable chip is specially configured on the host to share and store instead of the CPU, so that the cost of the CPU is greatly reduced, and the CPU does not cause insufficient processing performance due to the storage of the TCP data packet, thereby affecting the backup performance.
Referring to fig. 2, fig. 2 is a flowchart of a data backup method provided in the present application, where the method may be applied to a programmable chip, and the programmable chip is integrated on a motherboard and connected to a CPU, a network card, and a disk array on the motherboard.
The programmable chip can be realized by mainly parallel operation and hardware description language and can be used as an independent intelligent operation unit.
As shown in fig. 1, the flow implemented by the method may include the following steps:
step 101, analyzing data to be backed up received from a network card to obtain a TCP data packet only containing data stream in the data to be backed up.
The data to be backed up comprises a TCP control packet with the type of control flow and a TCP data packet with the type of data flow, and considering that the TCP data packet with the type of data flow comprises data with the size of hundreds of MB to hundreds of GB, based on the data, the programmable chip specially analyzes the TCP data packet with the type of data flow from the data packet to be backed up and obtains the TCP data packet so as to perform subsequent processing.
Step 102, searching a free target cache data space for storing data blocks from the programmable chip, and storing the TCP data packet into the target cache data space.
The target cache data space is a cache space capable of storing the TCP data packet, and the size of the target cache data space is larger than or equal to that of the TCP data packet, so that the TCP data packet can be stored.
Step 103, sending a disk array addressing instruction for storing the TCP data packet to a CPU, so that the CPU determines a physical address for writing the TCP data packet into the disk array.
After the TCP data packet is cached in the idle target cache data space in the programmable chip, a disk array addressing instruction for acquiring a physical address of a disk array for storing the TCP data packet is sent to the CPU, so that the CPU can send the physical address to the programmable chip and can store the TCP data packet in the disk array according to the physical address.
As an embodiment, the implementation manner of implementing step 102 may include step a:
and step A, searching a free target cache data space from the number corresponding to each cache data space.
The cache data space is a space obtained by equally dividing the cache space of the programmable chip according to the maximum value of each backup data, and each cache data space corresponds to different numbers.
In this step, the cache space includes a cache data space of the stored data block and a free cache data space of the non-stored data block, and the target cache data space is a cache data space of the non-stored data block.
It should be noted that the cache space may be divided equally or not according to the above implementation manner, and the cache space is actually required to be divided, which is not limited in this embodiment.
As an embodiment, each cache data space is numbered, and the numbers of the cache data spaces are different, the number corresponding to the cache data space of the stored data block is stored in one set, and the cache data space of the data block which is not stored is stored in another set, so that when the free cache data space is searched, the number capable of storing the data block can be found from another set, and then the cache data spaces are obtained according to the found number and serve as the target cache data space.
Based on step a, the implementation manner of implementing step 103 may include step B:
and step B, sending a disk array addressing instruction which carries the number corresponding to the target cache data space and is used for storing the TCP data packet to a CPU (Central processing Unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
The CPU obtains the disk array addressing command, analyzes the numbers from the disk array addressing command, determines how much storage space the disk array needs according to the numbers, and further determines the physical address capable of storing the TCP data packet according to the specific storage condition of the disk array.
Therefore, by applying the technical scheme provided by the embodiment of the application, the target cache space for storing the TCP data packet can be quickly determined according to the number corresponding to the cache data space, and the CPU can also quickly determine the physical address for storing the TCP data packet.
The programmable chip of this embodiment stores the backup data in a hardware RAID (Redundant Arrays of independent Disks), which avoids moving the user data to be backed up between a network card and operating system backup software and data PCIE (Peripheral component interconnect express, Direct Memory Access) between the operating system software and the hardware RAID, and significantly reduces the load of the whole machine in the aspect of PCIE MEMERY I/O, thereby effectively improving the performance of data backup to RAID.
And 104, storing the TCP data packet into the designated position of the disk array corresponding to the physical address according to the physical address returned by the CPU.
After determining the physical address of the TCP data packet stored in the disk array, the CPU directly returns to the programmable chip, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address.
So far, the description shown in fig. 2 is completed.
According to the technical scheme, the programmable chip is integrated on the mainboard, when data are stored, the programmable chip analyzes the data packets to be backed up received from the network card to obtain the TCP data packets only containing data streams in the data to be backed up, after the TCP data packets are stored in the target cache data space, the physical addresses of the disk array, which are written with the TCP data packets, are obtained from the CPU, and finally the TCP data packets are stored in the designated positions of the disk array corresponding to the physical addresses. It can be seen that, when the method provided by the embodiment of the present application is applied to store the TCP data packet with the type of data stream, the method does not rely on the CPU for processing any more, but a programmable chip is specially configured on the host to share and store instead of the CPU, so that the cost of the CPU is greatly reduced, and the CPU does not cause insufficient processing performance due to the storage of the TCP data packet, thereby affecting the backup performance.
Referring to fig. 3, fig. 3 is a flowchart of another data backup method provided in the present application, where the method may be applied to a CPU, the CPU is connected to a programmable chip integrated on a motherboard, and the programmable chip is further connected to a network card and a disk array.
As shown in fig. 3, the flow implemented by the method may include the following steps:
step 201, obtaining a disk array addressing instruction sent by the programmable chip for storing a TCP data packet.
The TCP data packet is a data packet which only contains data flow and is obtained by analyzing the data to be backed up received from the network card by the programmable chip; and the disk array addressing instruction is an instruction sent by the programmable chip after the TCP data packet is stored in the free target cache data space which is searched for and used for storing the data block.
After the TCP data packet is cached in the idle target cache data space in the programmable chip, the programmable chip sends a disk array addressing instruction for acquiring the physical address of the disk array for storing the TCP data packet to the CPU, so that the CPU can determine the physical address of the disk array for storing the TCP data packet according to the disk array addressing instruction when acquiring the disk array addressing instruction.
Step 202, determining a physical address for writing the storage TCP data packet into the disk array according to the disk array addressing instruction.
As an embodiment, the implementation manner of implementing step 201 may include step C:
and step C, acquiring a disk array addressing instruction which is sent by the programmable chip, carries a number corresponding to the target cache data space and is used for storing the TCP data packet.
The target cache data space is a space in which the programmable chip searches for an idle cache data space from numbers corresponding to the cache data spaces, the cache data space is a space in which the cache space of the programmable chip is equally divided according to the maximum value of the backup data each time, and each cache data space corresponds to a different number.
In this step, the cache space includes a cache data space of the stored data block and a free cache data space of the non-stored data block, and the target cache data space is a cache data space of the non-stored data block.
It should be noted that the cache space may be divided equally or not according to the above implementation manner, and the cache space is actually required to be divided, which is not limited in this embodiment.
As an embodiment, each cache data space is numbered, and the numbers of the cache data spaces are different, the number corresponding to the cache data space of the stored data block is stored in one set, and the cache data space of the data block which is not stored is stored in another set, so that when the free cache data space is searched, the number capable of storing the data block can be found from another set, and then the cache data spaces are obtained according to the found number and serve as the target cache data space.
Based on step C, the implementation manner of implementing step 202 may include step D:
and D, determining a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
The CPU obtains the disk array addressing command, analyzes the numbers from the disk array addressing command, determines how much storage space the disk array needs according to the numbers, and further determines the physical place capable of storing the TCP data packet according to the specific storage condition of the disk array.
By applying the technical scheme provided by the embodiment of the application, the CPU can quickly determine the physical address for storing the TCP data packet according to the number corresponding to the cache data space.
Step 203, sending the determined physical address to the programmable chip according to the physical address returned by the CPU, so that the programmable chip stores the TCP data packet in the designated location of the disk array corresponding to the physical address.
After determining the physical address of the TCP data packet stored in the disk array, the CPU directly returns to the programmable chip, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address.
Up to this point, the description shown in fig. 3 is completed.
According to the technical scheme, the programmable chip is integrated on the mainboard and connected with the CPU, when data are stored, the CPU determines the physical address according to the disk array addressing instruction which is sent by the programmable chip and used for determining the physical address for storing the TCP data packet, and sends the determined physical address to the programmable chip, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address. It can be seen that, when the method provided by the embodiment of the present application is applied to store the TCP data packet with the type of data stream, the method does not rely on the CPU for processing any more, but a programmable chip is specially configured on the host to share and store instead of the CPU, so that the cost of the CPU is greatly reduced, and the CPU does not cause insufficient processing performance due to the storage of the TCP data packet, thereby affecting the backup performance.
After completing the steps of the flowchart shown in fig. 3, as an embodiment, the method further includes the following steps E to G:
and step E, analyzing the data to be backed up received from the network card to obtain a TCP control packet only containing a control flow in the data to be backed up.
And F, copying the TCP control packet to a Socket buffer area, and copying the TCP control packet in the Socket buffer area to a user buffer area at a user side.
And G, after determining that a user makes a storage instruction on the TCP control packet of the user buffer area, copying the TCP control packet from the user buffer area to a disk array.
Therefore, in the technical scheme provided by the embodiment of the application, the CPU only processes the TCP control packet of which the type is the control flow, so that the storage of the TCP control packet in the disk array is quickly completed under the condition of reducing the overhead of the CPU.
The following describes the apparatus provided in the present application:
referring to fig. 4, fig. 4 is a schematic structural diagram of a first disk backup device 400 for a switching device provided in the present application, where the programmable chip is integrated on a motherboard and is connected to a CPU, a network card, and a disk array on the motherboard, and the device may include:
the analysis unit 401 is configured to analyze data to be backed up received from a network card to obtain a TCP data packet only including a data stream in the data to be backed up;
a data cache unit 402, configured to search a free target cache data space for storing a data block from the programmable chip, and store the TCP data packet in the target cache data space;
an address instruction sending unit 403, configured to send a disk array addressing instruction for storing the TCP packet to a CPU, so that the CPU determines a physical address for writing the TCP packet into the disk array;
and the disk storage unit 404 is configured to store the TCP data packet in the specified location of the disk array corresponding to the physical address according to the physical address returned by the CPU.
In an embodiment, the data caching unit 402 is specifically configured to: searching for an idle target cache data space from the numbers corresponding to the cache data spaces, wherein the cache data spaces are spaces obtained by equally dividing the cache space of the programmable chip according to the maximum value of each backup data, and the cache data spaces correspond to different numbers;
the address instruction sending unit 403 is specifically configured to: and sending a disk array addressing instruction which carries the number corresponding to the target cache data space and is used for storing the TCP data packet to a CPU (Central processing Unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
Up to this point, the description shown in fig. 4 is completed.
According to the technical scheme, the programmable chip is integrated on the mainboard, when data are stored, the programmable chip analyzes the data packets to be backed up received from the network card to obtain the TCP data packets only containing data streams in the data to be backed up, after the TCP data packets are stored in the target cache data space, the physical addresses of the disk array, which are written with the TCP data packets, are obtained from the CPU, and finally the TCP data packets are stored in the designated positions of the disk array corresponding to the physical addresses. It can be seen that, when the method provided by the embodiment of the present application is applied to store the TCP data packet with the type of data stream, the method does not rely on the CPU for processing any more, but a programmable chip is specially configured on the host to share and store instead of the CPU, so that the cost of the CPU is greatly reduced, and the CPU does not cause insufficient processing performance due to the storage of the TCP data packet, thereby affecting the backup performance.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a second data backup device 500 for a switching device, which is applied to a CPU, where the CPU is connected to a programmable chip integrated on a motherboard, and the programmable chip is further connected to a network card and a disk array, and the device may include:
an instruction obtaining unit 501, configured to obtain a disk array addressing instruction used for storing a TCP data packet and sent by the programmable chip; the TCP data packet is a data packet which only contains data flow and is obtained by analyzing the data to be backed up received from the network card by the programmable chip; the disk array addressing instruction is an instruction sent by the programmable chip after the TCP data packet is stored in a free target cache data space which is searched for and used for storing the data block;
an address determining unit 502, configured to determine, according to the raid addressing instruction, a physical address for writing the storage TCP packet into the raid;
an address sending unit 503, configured to send the determined physical address to the programmable chip according to the physical address returned by the CPU, so that the programmable chip stores the TCP data packet in the specified location of the disk array corresponding to the physical address.
In an embodiment, the address determining unit 502 is specifically configured to:
acquiring a disk array addressing instruction which is sent by the programmable chip, carries a number corresponding to the target cache data space and is used for storing a TCP data packet; the target cache data space is a space in which the programmable chip searches for an idle cache data space from numbers corresponding to the cache data spaces, the cache data space is a space in which the cache space of the programmable chip is equally divided according to the maximum value of each backup data, and each cache data space corresponds to different numbers;
the address determining unit 502 is specifically configured to: and determining a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
Up to this point, the description shown in fig. 5 is completed.
According to the technical scheme, the programmable chip is integrated on the mainboard and connected with the CPU, when data are stored, the CPU determines the physical address according to the disk array addressing instruction which is sent by the programmable chip and used for determining the physical address for storing the TCP data packet, and sends the determined physical address to the programmable chip, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address. It can be seen that, when the method provided by the embodiment of the present application is applied to store the TCP data packet with the type of data stream, the method does not rely on the CPU for processing any more, but a programmable chip is specially configured on the host to share and store instead of the CPU, so that the cost of the CPU is greatly reduced, and the CPU does not cause insufficient processing performance due to the storage of the TCP data packet, thereby affecting the backup performance.
The implementation process of the functions and actions of each unit in the above device is specifically described in the implementation process of the corresponding step in the above method, and is not described herein again.
In the electronic device provided in the embodiment of the present application, from a hardware level, a schematic diagram of a hardware architecture can be seen in fig. 6. The method comprises the following steps: a machine-readable storage medium and a processor, wherein: the machine-readable storage medium stores machine-executable instructions executable by the processor; the processor is configured to execute machine-executable instructions to implement the data backup operations disclosed in the above examples.
Machine-readable storage media are provided by embodiments of the present application that store machine-executable instructions that, when invoked and executed by a processor, cause the processor to implement the data backup operations disclosed in the above examples.
Here, a machine-readable storage medium may be any electronic, magnetic, optical, or other physical storage device that can contain or store information such as executable instructions, data, and so forth. For example, the machine-readable storage medium may be: a RAM (random Access Memory), a volatile Memory, a non-volatile Memory, a flash Memory, a storage drive (e.g., a hard drive), a solid state drive, any type of storage disk (e.g., an optical disk, a dvd, etc.), or similar storage medium, or a combination thereof.
The systems, devices, modules or units illustrated in the above embodiments may be implemented by a computer chip or an entity, or by a product with certain functions. A typical implementation device is a computer, which may take the form of a personal computer, laptop computer, cellular telephone, camera phone, smart phone, personal digital assistant, media player, navigation device, email messaging device, game console, tablet computer, wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Furthermore, these computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
For the device embodiments, since they substantially correspond to the method embodiments, reference may be made to the partial description of the method embodiments for relevant points. The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the scheme of the application. One of ordinary skill in the art can understand and implement it without inventive effort.
So far, the description of the apparatus shown in fig. 6 is completed.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims (10)

1. A data backup method is characterized in that the method is applied to a programmable chip, the programmable chip is integrated on a mainboard and is connected with a Central Processing Unit (CPU), a network card and a disk array on the mainboard, and the method comprises the following steps:
analyzing data to be backed up received from a network card to obtain a Transmission Control Protocol (TCP) data packet only containing data streams in the data to be backed up;
searching an idle target cache data space for storing data blocks from the programmable chip, and storing the TCP data packet into the target cache data space;
sending a disk array addressing instruction for storing the TCP data packet to a CPU (central processing unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array;
and storing the TCP data packet into the appointed position of the disk array corresponding to the physical address according to the physical address returned by the CPU.
2. The method of claim 1, wherein the searching a free target cache data space for storing a data block from the programmable chip and storing the TCP packet in the target cache data space comprises:
searching for an idle target cache data space from the numbers corresponding to the cache data spaces, wherein the cache data spaces are spaces obtained by equally dividing the cache space of the programmable chip according to the maximum value of each backup data, and the cache data spaces correspond to different numbers;
the sending a disk array addressing instruction for storing the TCP data packet to a CPU so that the CPU determines a physical address for writing the TCP data packet into the disk array includes:
and sending a disk array addressing instruction which carries the number corresponding to the target cache data space and is used for storing the TCP data packet to a CPU (Central processing Unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
3. A data backup method is characterized in that the method is applied to a CPU, the CPU is connected with a programmable chip integrated on a mainboard, the programmable chip is also connected with a network card and a disk array, and the method comprises the following steps:
acquiring a disk array addressing instruction which is sent by the programmable chip and used for storing a TCP data packet; the TCP data packet is a data packet which only contains data flow and is obtained by analyzing the data to be backed up received from the network card by the programmable chip; the disk array addressing instruction is an instruction sent by the programmable chip after the TCP data packet is stored in a free target cache data space which is searched for and used for storing the data block;
determining a physical address for writing the storage TCP data packet into the disk array according to the disk array addressing instruction;
and sending the determined physical address to the programmable chip according to the physical address returned by the CPU, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address.
4. The method of claim 3, wherein obtaining the RAID addressing instructions sent by the programmable chip for storing TCP packets comprises:
acquiring a disk array addressing instruction which is sent by the programmable chip, carries a number corresponding to the target cache data space and is used for storing a TCP data packet; the target cache data space is a space in which the programmable chip searches for an idle cache data space from numbers corresponding to the cache data spaces, the cache data space is a space in which the cache space of the programmable chip is equally divided according to the maximum value of each backup data, and each cache data space corresponds to different numbers;
the determining, according to the disk array addressing instruction, a physical address for writing the storage TCP packet into the disk array includes:
and determining a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
5. The method of claim 3 or 4, further comprising:
analyzing data to be backed up received from a network card to obtain a TCP control packet only containing a control flow in the data to be backed up;
copying the TCP control packet to a Socket buffer area, and copying the TCP control packet in the Socket buffer area to a user buffer area at a user side;
copying the TCP control packet from the user buffer to a disk array after determining that a user made a store instruction for the TCP control packet of the user buffer.
6. A data backup device is characterized in that the device is applied to a programmable chip, the programmable chip is integrated on a mainboard and is connected with a central processing unit CPU, a network card and a disk array on the mainboard, and the device comprises:
the analysis unit is used for analyzing the data to be backed up received from the network card to obtain a Transmission Control Protocol (TCP) data packet only containing data stream in the data to be backed up;
the data cache unit is used for searching an idle target cache data space for storing data blocks from the programmable chip and storing the TCP data packet into the target cache data space;
an address instruction sending unit, configured to send a disk array addressing instruction for storing the TCP data packet to a CPU, so that the CPU determines a physical address at which the TCP data packet is written in the disk array;
and the magnetic disk storage unit is used for storing the TCP data packet into the appointed position of the magnetic disk array corresponding to the physical address according to the physical address returned by the CPU.
7. The apparatus of claim 6, wherein the data cache unit is specifically configured to:
searching for an idle target cache data space from the numbers corresponding to the cache data spaces, wherein the cache data spaces are spaces obtained by equally dividing the cache space of the programmable chip according to the maximum value of each backup data, and the cache data spaces correspond to different numbers;
the address instruction sending unit is specifically configured to:
and sending a disk array addressing instruction which carries the number corresponding to the target cache data space and is used for storing the TCP data packet to a CPU (Central processing Unit), so that the CPU determines a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
8. A data backup device is characterized in that the data backup device is applied to a CPU, the CPU is connected with a programmable chip integrated on a mainboard, the programmable chip is also connected with a network card and a disk array, and the device comprises:
the command acquisition unit is used for acquiring a disk array addressing command which is sent by the programmable chip and used for storing the TCP data packet; the TCP data packet is a data packet which only contains data flow and is obtained by analyzing the data to be backed up received from the network card by the programmable chip; the disk array addressing instruction is an instruction sent by the programmable chip after the TCP data packet is stored in a free target cache data space which is searched for and used for storing the data block;
the address determining unit is used for determining a physical address for writing the storage TCP data packet into the disk array according to the disk array addressing instruction;
and the address sending unit is used for sending the determined physical address to the programmable chip according to the physical address returned by the CPU, so that the programmable chip stores the TCP data packet in the designated position of the disk array corresponding to the physical address.
9. The apparatus of claim 8, wherein the address determination unit is specifically configured to:
acquiring a disk array addressing instruction which is sent by the programmable chip, carries a number corresponding to the target cache data space and is used for storing a TCP data packet; the target cache data space is a space in which the programmable chip searches for an idle cache data space from numbers corresponding to the cache data spaces, the cache data space is a space in which the cache space of the programmable chip is equally divided according to the maximum value of each backup data, and each cache data space corresponds to different numbers;
the address determination unit is specifically configured to: and determining a physical address for writing the TCP data packet into the disk array according to the number corresponding to the target cache data space.
10. An electronic device comprising a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor; the processor is configured to execute machine-executable instructions to perform the method steps described above.
CN202111131740.5A 2021-09-26 2021-09-26 Data backup method, device and equipment Pending CN113849346A (en)

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Application Number Priority Date Filing Date Title
CN202111131740.5A CN113849346A (en) 2021-09-26 2021-09-26 Data backup method, device and equipment

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